CN112987989B - Screen display interaction method for laboratory ultrasonic biological treatment - Google Patents

Screen display interaction method for laboratory ultrasonic biological treatment Download PDF

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Publication number
CN112987989B
CN112987989B CN201911306597.1A CN201911306597A CN112987989B CN 112987989 B CN112987989 B CN 112987989B CN 201911306597 A CN201911306597 A CN 201911306597A CN 112987989 B CN112987989 B CN 112987989B
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frequency
page
touch button
display
efficiency
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CN112987989A (en
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屈百达
程宪宝
姜愉
梁家海
胡俐蕊
农国才
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Beibu Gulf University
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Beibu Gulf University
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/048Interaction techniques based on graphical user interfaces [GUI]
    • G06F3/0481Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01HMEASUREMENT OF MECHANICAL VIBRATIONS OR ULTRASONIC, SONIC OR INFRASONIC WAVES
    • G01H17/00Measuring mechanical vibrations or ultrasonic, sonic or infrasonic waves, not provided for in the preceding groups
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01JMEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J1/00Photometry, e.g. photographic exposure meter
    • G01J1/42Photometry, e.g. photographic exposure meter using electric radiation detectors
    • G01J1/44Electric circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/048Interaction techniques based on graphical user interfaces [GUI]
    • G06F3/0487Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser
    • G06F3/0488Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures

Abstract

A screen display interaction method for ultrasonic biological treatment in an integrated visual laboratory comprises the following steps: 0. and setting parameters. 1. Read about the given parameter. 2. Assigning values to related variables; setting initial values of relevant variables. 3. Opening an efficiency database; and resetting the records of each frequency point. 4. And refreshing each frequency point record by using the register variable data of the pins of the controller chip according to the pulse oscillation sequence. 5. And opening an efficiency increment difference value database and associating the efficiency database. 6. And averaging the accumulated values of the frequency points recorded in the pulse oscillation frequency, and sending the average values to a pin of a controller chip for display. 7. The difference of the frequency interval is obtained for the average value of each adjacent frequency point, and the record in the efficiency increment difference value database is refreshed. 8. The efficiency increment records of each frequency point are refreshed by difference values and are simultaneously sent to pins of the controller chip for display. 9. And judging the high-efficiency frequency point. 10. And locking the operation or continuing to search at the efficient frequency point. 11. And stopping or returning 4 according to time. 12. Shutdown each database, shutdown, or continue locked operation.

Description

Screen display interaction method for laboratory ultrasonic biological treatment
Technical Field
The invention relates to an ultrasonic biological treatment system, working software, a process and a method for a laboratory.
Background
The laboratory device, the process and the method of ultrasonic biological treatment still belong to the modes of single-frequency treatment, group comparison and induction effect at present. The current laboratory method of ultrasonic biological treatment is as follows: by setting or selecting a certain operating frequency of the ultrasonic wave generating apparatus in advance, the ultrasonic wave of the frequency is applied to the treatment object. However, the processing rate of the ultrasonic waves to the object is highly related to the ultrasonic frequency, and the ultrasonic frequency is different, so that the processing efficiency is greatly different; furthermore, the type of biological cells to be treated is highly correlated with the frequency of ultrasonic waves, and different biological cells have greatly different sensitivities to ultrasonic waves of different frequencies. This makes the determination of the primary ultrasonic frequency of the conventional ultrasonic biological treatment method blind, and further makes the additional ultrasonic frequency analysis and determination dependent. The actual working process is as follows: processing conditions of certain biological cells under different frequencies are utilized to carry out sub-band comparison and analysis determination to obtain related data; in later work, the appropriate ultrasound frequency was determined empirically, using the data for that particular object. This has been a common practice. Essentially, such a method cannot guarantee that the working ultrasonic frequency is the efficient optimal frequency for the object, and cannot perform precise fine frequency adjustment on different objects, and the accumulated experience is not the optimal process; moreover, the method not only consumes a lot of manpower, financial resources and material resources in the initial stage, but also frequently requires observation, adjustment and maintenance in the lifetime. In view of the above, there is a need to develop a new and efficient strategy for ultrasound bioprocessing that does not follow the inefficient procedure of first cross-band comparison, analysis to determine the ultrasound frequency, and then empirically determining the desired frequency, but rather makes the process of determining the desired frequency maximally efficient and automated. The scheme for solving the problems can be divided into a multi-body integrated networking visual structure experimental device, a process and a method, or a multi-frequency integrated visual structure experimental device, a process and a method.
Disclosure of Invention
In order to make the ultrasonic biological treatment process measurable and controllable and realize the broadband search and control in a biological-mechanical-electrical integrated visual treatment system, the invention provides a screen display interaction method for ultrasonic biological treatment in an integrated visual laboratory, which comprises the following steps:
0. and setting parameters. 1. Read about the given parameter. 2. Assigning values to related variables; setting initial values of relevant variables. 3. Opening an efficiency database; and resetting the records of each frequency point. 4. And refreshing each frequency point record by using the register variable data of the pins of the controller chip according to the pulse oscillation sequence. 5. And opening an efficiency increment difference value database and associating the efficiency database. 6. And averaging the accumulated values of the frequency points recorded in the pulse oscillation frequency, and sending the average values to a pin of a controller chip for display. 7. The difference of the frequency interval is obtained for the average value of each adjacent frequency point, and the record in the efficiency increment difference value database is refreshed. 8. The efficiency increment records of each frequency point are refreshed by difference values and are simultaneously sent to pins of the controller chip for display. 9. And judging the high-efficiency frequency point. 10. And locking the operation or continuing to search at the efficient frequency point. 11. And stopping or returning 4 according to time. 12. Shutdown each database, shutdown, or continue locked operation.
The technical scheme adopted by the invention for solving the technical problems is as follows:
st0. manually performing such actions as processing duration (i.e. time of use L), power (i.e. setting P) on the display human-computer interaction interfaceR) Duration of pulse-beat (i.e. width of pulse τ)P) Frequency search rate (i.e., rate V)f) Search starting point frequency (i.e., starting point F)1) End point frequency (i.e. end point F)2) Etc. are set.
St1. reading given power P of ultrasonic treatmentRGiven processing duration L and pulse duration tauPFrequency search rate V of frequency search processfFrequency search processing gives a starting point frequency F1Frequency search process gives an end point frequency F2And calculating the precision epsilon by the system.
St2, assigning the number of frequency points N to 3 and the frequency interval GfAssigned a value of 20k/VfThe frequency of pulse vibration K is assigned to Gf/(τP+ 2); setting initial values of local sequence variables i and j as 1; setting the initial value of a register variable D to be 0.
St3, opening an efficiency real-time value database BEF; record A for each frequency point ii0、Ai1、Bi0、Bi1And (6) clearing.
St4. according to the pulse-vibration sequence j, using the controller chip UCThe register variable D of the PA2 pin refreshes each frequency point record Aij
And St5, opening an efficiency increment difference value database BEV and associating an efficiency real-time value database BEF.
St6. record A for each frequency point iiAverage the accumulated value in the number of times K of pulse oscillation, and send it to the controller chip UCThe PD1 pin for display, sending the frequency switch/select signal.
St7. average value A of frequency points i, i-1 and i-1, i-2i、Ai-1And Ai-1、Ai-2Separately find the frequency interval GfFor records A in the efficiency delta difference value database BEViAnd BiAnd (6) refreshing.
St8. in the efficiency increment difference value database BEV, efficiency increment C is recorded for each frequency point iiWith Ai-BiIs refreshed and is simultaneously sent to the controller chip UCPin PD1 for display.
And St9, judging whether the current frequency point i is efficient or not.
St10, if the current frequency point i is determined to be the high-efficiency frequency point, locking the current frequency point i to operate, and jumping to St 12; if the current frequency point i is determined to be a non-efficient frequency point and all the frequency points N are not searched, the next frequency point is switched to, and St6 is returned.
St11. if all frequency points N have been searched and the given processing time length L has been reached or a manual forced shutdown instruction has been given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; if the given processing duration L is not reached or there is no manual forced shutdown command, St4 is returned.
St12, if the given processing time L is reached or a manual forced shutdown instruction is given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; and if the given processing time length L is not reached or no manual forced shutdown instruction is given, continuing to lock the current frequency point i for operation.
The invention has the beneficial effects that: the integration greatly simplifies the system structure and the operation, is convenient for adjusting the control scheme and realizing various novel control strategies through the change of program software, can realize the automatic storage of operation data, can make the ultrasonic biological treatment process measurable and controllable, realizes the biological-mechanical-electrical integration, and is beneficial to realizing the intellectualization of the ultrasonic biological treatment; the frequency of the transducer can be continuously monitored and adjusted to provide the best ultrasonic output; the process monitoring and parameter graphic display function of the touch screen display is utilized to specially program all processing operation parameters and graphically express the change of ultrasonic frequency, power, processing speed and processing process physicochemical parameters; the processing program can be adjusted through a man-machine conversation mode of the control terminal, and an operator can input related data according to prompts, so that the operation is intuitive and clear; the long time consumption of sub-band comparison and analysis for determining the optimal frequency is avoided, the proper frequency for processing various biological cells is easy to find, and the optimal process conditions are quickly established. The mode that the resonant inductor is additionally provided with the secondary winding current detection coil is adopted, the utility/volume ratio of the inductance coil is improved, the problem that the inductance coil is subjected to point and current detection is solved, the occupation of the machine body space is reduced, and the utilization rate of detection points is greatly improved. The circuit is an ultrasonic driving power supply circuit with high cost performance, can powerfully drive the processing tank energy converter, and enables the laboratory ultrasonic biological processing device to become an ultrasonic experiment and test device which is portable, easy to operate, and suitable for wide application type biological processing in various occasions. The device is convenient to realize and adjust, simple in structure and easy for batch production; the software and hardware of the system are formed, so that the maintenance and the repair are simple and easy.
Drawings
The invention is further illustrated with reference to the following figures and examples.
FIG. 1 is a block diagram of a process tank sound intensity detection feedback circuit.
FIG. 2 is a block diagram of a light intensity detection feedback circuit of the processing bath.
FIG. 3 is a schematic diagram of an ultrasonic power source output current and voltage detection feedback circuit.
Fig. 4 is a structural diagram of an ultrasonic power source output period detection feedback circuit.
FIG. 5 is a block diagram of an ultrasound bioprocessing system of the apparatus.
FIG. 6 is a circuit diagram of an operating power supply of the ultrasonic biological treatment system.
Fig. 7 is a diagram of a power up and mode setting circuit of the system.
Fig. 8 is a diagram of the PWM driving and inverting circuits of the system.
Fig. 9 is a block diagram of the power matching and band switching circuitry of the system.
Fig. 10 is a diagram of the main control and man-machine interaction circuit of the system.
FIG. 11 is a schematic view of a display home operating interface of the device.
Fig. 12 is a schematic view of a sub-page operation interface of the display.
FIG. 13 is a third page of the operating interface diagram of the display.
FIG. 14 is a schematic view of the last page operating interface of the display.
FIG. 15 is a system processing efficiency display interface schematic of the display.
Fig. 16 is a block diagram of an ultrasonic frequency control system of the system.
Fig. 17 is an ultrasonic cycle feedback data processing flowchart.
FIG. 18 is a flow chart of the operation of the ultrasound bioprocessing run.
Sys flow chart of frequency control and PWM drive data processing of the system.
FIG. 20 is a flow chart of human interaction data processing for the system.
Fig. 21 is a structural view of a processing liquid temperature detection feedback circuit.
In FIGS. 1 to 10 and 16 to 19: rs1Is the bias current resistance of the sound intensity signal, S is the sound intensity signal, SsIs an acoustic intensity sensor, Rs2Coupling resistance for acoustic intensity signals, AsFor sound intensity signal operational amplification, RsfAmplifying the feedback resistance for sound intensity, FsIs a sound intensity signal output terminal, E is a positive terminal of a working power supply of the control circuit, UCPA0 is controller chip analog input pin 0.
In FIGS. 2 to 10 and 16 to 19: l isEDFor projecting LED, RLEDFor projecting LED current-limiting resistor, SDIs an ultraviolet sensor, y is an ultraviolet intensity signal, RDCoupling resistance for signals of ultraviolet intensity, ADFor UV intensity signal amplification, RDfAmplifying the feedback resistance for the UV intensity signal, FDFor processing the tank efficiency signal output terminals, UCPA1 is controlThe system chip simulates input pin 1.
In FIGS. 3 to 10 and 16 to 19: e is the power matching part of the ultrasonic biological treatment system, TvFor power matching of the upper terminal of the output voltage, DvFor output voltage half-cycle balanced diodes, Tv0For power matching of the lower terminal of the output voltage, Rv0For detecting the divider resistance, LC, for the output voltagevRectifying-isolating optocoupler, R, for outputting voltage signalsv2Feedback of divider resistance, R, for output voltage signalv1For outputting voltage signals dividing resistors, Rv3Amplifying ground resistance for output voltage signal, AVFor outputting voltage signals, RvfFor outputting voltage signals to feedback resistors, FVFor the voltage signal output terminal, UCPA2 is controller chip analog input pin 2; g is a frequency band matching part of the ultrasonic biological treatment system, TiDetecting dotted terminals for band-matched output current, WiFor outputting current sense windings, Ti0Detection of the end of heteronymy for band-matched output current, DiRectifying diodes for outputting current-sensing signals, RiAmplifying the ground resistance for the output current signal, AIFor outputting current signals, RifFeedback resistance for output current signal, FIFor current signal output terminals, UCPA3 is controller chip analog input pin 3.
In FIGS. 4 to 10 and 16 to 19: dv1Detecting the positive half-cycle rectifier diode for the output voltage, Dv2Detecting the negative half-cycle rectifier diode for the output voltage, Di1Detecting positive half-cycle rectifier diodes for output current, Di2Detecting a negative half-cycle rectifier diode for the output current; rviFor voltage signal divider resistors, RiiA voltage dividing resistor for current signals; cviA filter capacitor for the voltage signal, DviClipping diodes for voltage signals, DiiA clipping diode for the current signal; IC (integrated circuit)1A phase discrimination processing chip; IC (integrated circuit)2A double-D trigger chip; fFFor frequency-feedback output terminals, UCPA4 is controller chip analog input pin 4.
In FIG. 5 >10. 16, the following steps: a is a power supply part of the ultrasonic biological treatment system, b is a power adjusting part of the ultrasonic biological treatment system, c is a PWM driving part of the system, d is a PWM inverting part of the system, f is a frequency band switching part of the system, h is an ultrasonic treatment executing part of the system, i is a signal processing and controlling part of the system, and j is a human-computer interaction part of the system; eVPositive terminal of bus power supply for system, E1A positive terminal of a working power supply for a system driving circuit; pCFor the power and mode control signals of the system, Dr is the PWM drive control signal, Dsin is the sinusoidal duty cycle PW control signal, v is the power matching voltage feedback signal, FCIs a frequency band matching control signal, v is a frequency band matching current feedback signal, and De is a processing tank target concentration feedback signal; kRFor processing data on the number of oscillations in the working pulse, MRSelection of data for processing of operating mode, FRFor setting data for frequency, PRFor power setting data, fSFor frequency display data, PSTo power display data, Ef is efficiency display data.
In FIGS. 6 to 10: kpIs a power switch, Br is a rectifier bridge, CP1Is a first filter capacitor, CP2To absorb capacitance, RP1To absorb resistance, DP1To absorb the diode, UPFor power supply circuit PWM controller chip, CP3Is a second filter capacitor, CP4For buffer capacitance, RP2Is a voltage dividing resistor; trPFor the output transformer, W1For the primary winding of the output transformer, W2For the output transformer detecting winding, W3For outputting the first secondary winding of the transformer, W4A second secondary winding of the output transformer; rP3As a current limiting resistor, DP2Being a rectifier diode, LCPIs a feedback optocoupler device; dP3Rectifier diodes for controlling the circuit operating power supply, CP5A first filter capacitor for controlling the working power supply of the circuit, LP1Filter inductance for controlling circuit operation power supply, CP6A second filter capacitor for controlling the working power supply of the circuit; dP4Rectifier diodes, C, for the operating power supply of the system drive circuitP7Power supply for system drive circuitA filter capacitor, LP2Power supply filter inductance for system driving circuit operation, CP8A second filter capacitor for supplying working power to the system driving circuit; rP4For feeding back current-limiting resistors, RP5Dividing the voltage of the first resistor for feedback, CP9For self-excited absorption of capacitance, U6As reference voltage source devices, RP6The second resistor is divided for feedback.
In FIGS. 7 to 10: cPM1A first filter capacitor for adjusting power; LC (liquid Crystal)PwIsolating optocouplers, LC, for power-modulating signalsMdIsolating the optocoupler for mode signals, DPWFor regulating power signal or gate diode, DMdIs a mode signal OR gate diode, DPMIs a voltage-dividing diode, RPbIs an OR gate pull-up resistor; qPMFor power-regulating switches of MOSFETs, RPgIs a gate-level voltage divider resistor, RPcIs a gate level trigger resistor, TPAmplifying the triode for the trigger signal; dwPFor power-regulating freewheeling diodes, LPMFor adjusting power, filtering inductance, CPM1A second filter capacitor for adjusting power; ePIs the positive terminal of the PWM inversion bus power supply.
In FIGS. 8 to 10: LC (liquid Crystal)LAIsolating optocoupler and LC for driving logic low-end input signal of left arm of inverter bridgeHAIsolating optical coupler and LC for driving logic high-end input signal by left arm of inverter bridgeLBIsolating optocoupler and LC for driving logic low-end input signal of right arm of inverter bridgeHBIsolating an optocoupler for driving a logic high-end input signal by a right arm of the inverter bridge; t isHAFor inverter bridge left arm to drive logic high-end input signal end, TLAFor inverter bridge left arm to drive logic low-end input signal terminal, TCOIs the common end of the inverter bridge driving chip; t isHBFor inverter bridge right arm to drive logic high-end input signal end, TLBDriving a logic low-end input signal end for the right arm of the inverter bridge; drAIs an inverter bridge left arm driving chip, DrBThe inverter bridge right arm driving chip; dVbADriving bootstrap diodes for the left arm of the inverter bridge, CVA1Bootstrap flat-wave capacitor for left arm drive of inverter bridge, CVA2Drive bootstrap capacitors, R, for the left arm of the inverter bridgeHAFor inverter bridge left arm drive heightEnd coupling resistance, RLADriving a low-end coupling resistor for the left arm of the inverter bridge; drBDriving bootstrap diodes for the right arm of the inverter bridge, CVB1Drive bootstrap capacitor for inverter bridge right arm, CVB2For inverter bridge right arm drive bootstrap flat wave capacitance, RHBFor driving high-end coupling resistor R for right arm of inverter bridgeLBDriving a low-end coupling resistor for the right arm of the inverter bridge; qHAFor inverter bridge left arm to drive high-end MOSFET switch, QLADriving a low-end MOSFET switch for the left arm of the inverter bridge; cPWMThe bus filter capacitor is an inverter bridge; qHBDriving a high-side MOSFET switch, Q, for the inverter bridge right armLBThe inverter bridge right arm drives the low side MOSFET switch.
In FIGS. 9 to 10: LC (liquid Crystal)J1Isolating optocoupler, LC for first band relay drive signalJ2Isolating optocoupler, LC for second band relay drive signalJ2Isolating the optocoupler for a third frequency band relay drive signal; tm isJ1For the first frequency band relay driving signal terminal, TmJ2For the second frequency band relay driving signal terminal, TmJ3Is a third frequency band relay driving signal end; rJ1For the first frequency band relay drive signal coupling resistance, RJ2For the second frequency band relay drive signal coupling resistance, RJ3A third frequency band relay drive signal coupling resistor; t isJ1For driving a transistor, T, for a relay of a first frequency bandJ2For driving transistors, T, for relays of a second frequency bandJ3Driving a triode for a third band relay; j. the design is a square1Switching relays for the first frequency band, J2Switching relays for the second frequency band, J3And switching the relay for a third frequency band. J. the design is a square1-1 is the normally open contact of the first band switching relay, J2-1 is the second band switching relay normally open contact, J3-1 is a normally open contact of a third band switching relay; t isZ1Driving switching terminals, T, for a first band transducerZ2Drive switching terminal, T, for second band transducerZ3Driving a switching terminal for a third frequency band transducer; z1Is a first frequency band transducer, Z2Is a second frequency band transducer, Z3For the third frequency bandEnergy devices; t isL0For frequency band matching of the beginning of the inductor, TL1Matching terminals, T, for transducers of a first frequency bandL2Matching terminals, T, for transducers of the second frequency bandL3Matching terminals for a third band transducer; wLThe inductor is frequency band matched.
In fig. 10, 16: u shapeDFor touch screen display modules, KMFor controlling the system start key, RKMBuffer resistors for enabling signals, CKMBuffering the capacitor for a start signal; cp1Is a first self-excited capacitor, Cp2Is a second self-excited capacitor, CfA crystal oscillator; u shapeCIs a controller chip; rPC5Is an optical coupler LCPwDivider resistance, RPC4Is an optical coupler LCMdDivider resistance, RPC3Is an optical coupler LCHADivider resistance, RPC2Is an optical coupler LCLADivider resistance, RPC1Is an optical coupler LCHBDivider resistance, RPC0Is an optical coupler LCLBDivider resistance, RPB2Is an optical coupler LCJ1Divider resistance, RPB1Is an optical coupler LCJ2Divider resistance, RPB0Is an optical coupler LCJ3A voltage dividing resistor; rR1For resetting the signal pull-up resistor, RR2Buffer resistors for resetting signals, CRBuffer capacitor for resetting signal, KRThe keys are reset for the controller.
In FIGS. 11 to 15: 1. the touch button of the page turning before 2, the touch button of the page turning after 3, the touch button of up-regulating, 4, the touch button of down-regulating.
In FIGS. 16 to 19: f. ofRGiven frequency for sonication,. DELTA.f is offset frequency, CfFor the frequency control element, Δ (τ/T)τ) For deviation of PWM pulse width duty ratio, Tr (c) for conversion processing, tau/TτFor PWM pulse width duty cycle, τ is PWM pulse width, TτIn order to be a PWM pulse period,>(d, e) is an amplification link, v is a transduction driving voltage, Ex (f, g) is a transduction execution link, i is a transduction driving current, Fd is a frequency conversion feedback link, fFThe frequency is fed back for the ultrasound treatment.
In FIGS. 17 to 19: t isFIs a location of ultrasonic wavesAnd (4) a physical feedback period.
In FIGS. 18 to 19: t is the ultrasonic treatment given period, and PWDB is the PWM pulse database.
In fig. 19: t is t/CFor timing clock variables, i is PWM-driven data processing order variable, NT/2Is the number of sine wave half-cycle pulses, tauUPiFor the data at the moment of the rising edge of the ith pulse, τiIs the ith pulse width data.
In fig. 20: p is given power of ultrasonic wave treatment, L is given treatment time length, tauPThe pulse duration VfProcessing search rate for frequency search, F1Given a starting point frequency, F, for the frequency search process2And setting an end point frequency for frequency search processing, wherein epsilon is system calculation precision, BEF is an efficiency real-time value database, and BEV is an efficiency increment difference value database.
Detailed Description
In the processing tank sound intensity detection feedback circuit structure shown in fig. 1: the processing tank sound intensity detection feedback circuit adopts a sound intensity sensor SsThe sound intensity detection feedback circuit is a core device. Sound intensity signal bias current resistor Rs1One end of the sound intensity sensor S is connected to the positive terminal E of the working power supply of the control circuit, and the other end is connected to the sound detecting part 14.8sAn output end of the sound intensity signal s; sound intensity sensor SsThe ground terminal of (2) is grounded. Sound intensity sensor SsThe output end of the sound intensity signal s is coupled with the resistor R through the sound intensity signals2Connected to the sound intensity signal operational amplifier AsAn inverting input terminal; sound intensity signal operational amplifier AsThe non-inverting input terminal is grounded. Sound intensity amplification feedback resistor RsfTransboundary sound intensity signal operational amplifier AsBetween the inverting input and the output. Sound intensity signal operational amplifier AsThe positive end of the power supply is connected to the positive terminal E of the working power supply of the control circuit, and the negative end of the power supply is grounded. Sound intensity signal operational amplifier AsAs the sound intensity signal output terminal FSConnected to the controller chip analog input pin 1, i.e. UC.PA1。
The structure of the processing tank sound intensity detection feedback circuit shown in FIG. 1 and the processing tank light intensity detection feedback circuit shown in FIG. 2In the road structure diagram: the light intensity detection feedback circuit of the treatment tank is a UVM-30 type ultraviolet sensor SDThe sound intensity detection feedback circuit is a core device. Light projecting LED L in light projecting part 14.6EDThe negative end of the LED passes through a light projecting LED current limiting resistor RLEDGrounding; light projecting LED LEDIs connected to the positive terminal E of the working power supply of the control circuit. Ultraviolet sensor S of photometry section 14.7DThe positive terminal of the power supply is connected to the positive terminal E of the working power supply of the control circuit, and the grounding terminal is grounded; ultraviolet sensor SDThe signal output end of the ultraviolet intensity signal y is used as a terminal of the ultraviolet intensity signal y and is connected to the ultraviolet intensity signal operational amplifier ADThe inverting input terminal of (1); ultraviolet intensity signal operational amplifier ADThe same-direction input end of the transformer is grounded. Ultraviolet intensity signal coupling resistor RDConnected across the positive terminal E of the working power supply of the control circuit and the ultraviolet intensity signal operational amplifier ADBetween the inverting input terminals. Ultraviolet intensity signal amplification feedback resistor RDfBridged on an ultraviolet intensity signal operational amplifier ADThe reverse input end and the ultraviolet intensity signal operational amplifier ADBetween the signal output terminals; ultraviolet intensity signal operational amplifier ADThe same-direction input end of the transformer is grounded. Ultraviolet intensity signal operational amplifier ADThe positive end of the power supply is connected to the positive terminal E of the working power supply of the control circuit, and the negative end of the power supply is grounded. Ultraviolet intensity signal operational amplifier ADAs a processing tank efficiency signal output terminal FDConnected to the controller chip analog input pin 2, i.e. UC.PA2。
In the circuit configuration diagram shown in fig. 2 and the ultrasonic power source output current and voltage detection feedback circuit configuration diagram shown in fig. 3: the ultrasonic power source output current and voltage detection feedback circuit uses an output voltage signal operational amplifier AVAnd an output current signal operational amplifier AIThe current and voltage detection feedback circuit is a core device. Power matching part e of ultrasonic biological treatment system outputs voltage upper terminal T by power matchingvIs connected to the band matching unit g of the ultrasonic biological treatment system. Output voltage half-cycle balancing diode DvAnd output voltage signal rectification-isolation optocoupler LCvIs transported byThe input ends are reversely connected in parallel; output voltage signal rectification-isolation optocoupler LCvThe positive input end of the voltage divider resistor R detects the voltage through the output voltagev0Upper terminal T connected to power matching output voltagev(ii) a Output voltage signal rectification-isolation optocoupler LCvIs connected to the lower terminal T of the power matching output voltagev0. Output voltage signal rectification-isolation optocoupler LCvThe anode output end of the voltage divider resistor R outputs a voltage signalv1Is connected to the positive terminal E of the working power supply of the control circuit; output voltage signal rectification-isolation optocoupler LCvThe negative output end of the voltage divider is fed back to the divider resistor R through an output voltage signalv2. Output voltage signal rectification-isolation optocoupler LCvThe negative output end of the voltage-stabilizing circuit is connected to the output voltage signal operational amplifier AVThe inverting input terminal of (1); output voltage signal operational amplifier AVThe non-inverting input end amplifies the grounding resistor R through the output voltage signalv3And (4) grounding. Output voltage signal operational amplifier AVThe positive terminal of the power supply is connected to the positive terminal E of the working power supply of the control circuit, and the output voltage signal operational amplifier AVThe negative end of the power supply is grounded; output voltage signal operational amplifier AVAs a voltage signal output terminal FVConnected to the controller chip analog input pin 3, i.e. UCPA 3. Output voltage signal feedback resistor RvfConnected across to the output voltage signal operational amplifier AVThe inverting input terminal and the output voltage signal operational amplifier AVBetween the signal output terminals. Output current detection winding W in band matching section g of ultrasonic biological treatment systemiLeading-out frequency band matching output current detection dotted terminal TiDifferent name terminal T for detecting output current matched with frequency bandi0. Band matching output current detection dotted terminal TiA rectifier diode D connected to the output current detection signaliPositive electrode of (1), band-matched output current detection synonym terminal Ti0And (4) grounding. Output current detection signal rectifier diode DiNegative pole and output current signal operational amplifier AIThe inverting input end of the first switch is connected; output current signal operational amplifier AIThe non-inverting input end amplifies the grounding resistor R through the output current signaliAnd (4) grounding. Output electricityStream signal operational amplifier AIThe positive terminal of the power supply is connected to the positive terminal E of the working power supply of the control circuit, and the output current signal operational amplifier AIThe negative end of the power supply is grounded; output current signal operational amplifier AIAs a current signal output terminal FIConnected to the controller chip analog input pin 4, i.e. UCPA 4. Output voltage signal feedback resistor RifConnected across to the output current signal operational amplifier AIThe inverting input terminal and the output current signal operational amplifier AIBetween the signal output terminals.
In thatDrawing (A)In the structure diagram of the feedback circuit for detecting the output current and voltage of the ultrasonic power source shown in fig. 3 and the structure of the feedback circuit for detecting the output period of the ultrasonic power source shown in fig. 4: the ultrasonic power source output period detection feedback circuit is a MAX9382 type phase discrimination processing chip IC1Is a phase discrimination and signal processing circuit of a core device. Output voltage detection positive half-cycle rectifier diode Dv1Positive and output voltage detecting negative half-cycle rectifier diode Dv2Respectively connected to the power matching output voltage upper terminal TvTerminal T for matching power with output voltagev0Positive half-cycle rectifier diode D for detecting output voltagev1Negative and positive and output voltage detection negative half-cycle rectifier diode Dv2The negative electrode of the voltage divider resistor R simultaneously passes through the voltage signalviConnected to a phase-detecting processing chip IC1Pin 7 of (a). Output current detection positive half-cycle rectifier diode Di1Positive and output current detecting negative half-cycle rectifier diode Di2Respectively connected to the band matching output current detection homonymous terminal TiDifferent name terminal T for detecting output current matched with frequency bandi0Positive half-cycle rectifier diode D for detecting output currenti1And a negative half-cycle rectifier diode D for detecting output currenti2Negative pole of the resistor is passed through a current signal divider resistor RiiConnected to a phase-detecting processing chip IC1Pin 6 of (a). Voltage signal filter capacitor CviAnd voltage signal clipping diode DviParallel connection; voltage signal clipping diode DviIs connected to the phase detection processing chip IC1Pin 7 of (2); voltage signalSign clipping diode DviThe positive electrode of (2) is grounded. Current signal clipping diode DiiThe anode is connected to the phase discrimination processing chip IC1Pin 6 of (2); current signal clipping diode DiiThe negative electrode is grounded. Phase discrimination processing chip IC1Pin 8 is connected to the positive terminal E of the working power supply of the control circuit, and the phase discrimination processing chip IC1Pin 5 of which is grounded. Phase discrimination processing chip IC1Pin 1 of (a) is connected to a dual D flip-flop chip IC2Pin 11. double-D trigger chip IC2Pin 13 is connected to pin 3, pin 12 is connected to pin 9, pins 10, 8, 6 and 4 are all grounded, pin 5 is connected to pin 2, and pin 1 is connected through frequency feedback output terminal FFConnected to the controller chip analog input pin 5, i.e. UC.PA5。
In the circuit configuration diagram shown in fig. 4 and the ultrasonic biological processing system configuration block diagram of the apparatus shown in fig. 5: the ultrasonic biological treatment system of the device is a full closed loop control system which takes the signal processing and control part of the system as a core link and takes the ultrasonic treatment execution part h as an execution link. The power supply unit a of the ultrasonic biological treatment system converts 220V AC power into three-level constant DC voltage. And through the positive terminal E of the bus power supply of the systemVAnd a positive terminal E of a working power supply of the system driving circuit1And the positive terminal E output of the working power supply of the control circuit. Power regulating part b of ultrasonic biological treatment system regulates power and mode control signal P in systemCAnd controlling the required bus voltage and the continuous time of the bus voltage. The PWM driver c of the system outputs a PWM drive control signal Dr under the control of the sine duty PW control signal Dsin. And a PWM inverter part d of the system cuts the bus voltage duration under the control of a PWM driving control signal Dr to form a bus voltage sine wave PW sequence. A power matching unit e of the ultrasonic biological processing system, a frequency band switching unit F of the system, and a frequency band matching unit g of the ultrasonic biological processing system match the control signal F in the frequency bandCControlling to switch and match the output power, the inductance value section and the transducer; at the same time, a power matching voltage feedback signal Vout is generated from a power matching part e of the ultrasonic biological treatment systemThe conventional band matching unit g generates a band matching current feedback signal i and outputs the signal. The ultrasonic treatment execution part h of the system processes and generates a target object under the action of the generated ultrasonic waves, and generates and outputs a treatment tank target object concentration feedback signal De through a matched sensor. The system signal processing and control unit i receives the power matching voltage feedback signal v, the band matching current feedback signal i and the treatment tank target concentration feedback signal De from the power matching unit e of the ultrasonic biological treatment system, the band matching unit g of the ultrasonic biological treatment system and the ultrasonic treatment execution unit h of the system, and outputs the system power adjusting and mode control signal P to the power adjusting unit b of the ultrasonic biological treatment system, the system PWM driving unit c and the system band switching unit fCA sine duty ratio PW control signal Dsin and a frequency band matching control signal FC. The human-computer interaction part j of the system receives the frequency display data f from the signal processing and control part i of the systemSPower display data PSAnd efficiency display data Ef, and outputting processed pulse frequency data K to the signal processing and control part i of the system by screen operationRProcessing the operation mode selection data MRFrequency setting data FRAnd power setting data PR
In the structural block diagram of the ultrasonic biological treatment system of the device shown in fig. 5 and the structural block diagram of the working power supply circuit of the ultrasonic biological treatment system shown in fig. 6:
the working power supply circuit of the ultrasonic biological treatment system is an SD4842 type PWM controller chip UPAnd the three-way AC-DC circuit is used as a core device.
220V mains supply passes through power switch KpTwo alternating current input ends of a rectifier bridge Br are introduced. The positive output end of the rectifier bridge Br is connected to the positive terminal E of the bus power supply of the systemVSimultaneously with the first filter capacitor CP1The positive electrode of (1) is connected; and the negative output end of the rectifier bridge Br is connected with the execution circuit ground. A first filter capacitor CP1The negative pole of the voltage regulator is connected with the execution circuit ground; absorption capacitance CP2And an absorption resistance RP1Parallel connection, one end of the parallel branch circuit and the first filter capacitor CP1The other end of the anode is connected with an absorption electrodePolar tube DP1The negative electrode of (1) is connected; absorption diode DP1Positive pole and power supply circuit PWM controller chip UPThe 6, 7 and 8 pins are connected. Power supply circuit PWM controller chip UPPins 1 and 2 of the circuit are connected with an execution circuit ground; power supply circuit PWM controller chip UPPin 3 and a second filter capacitor CP3Is connected to the positive pole of a second filter capacitor CP3The negative pole of the voltage regulator is connected with the execution circuit ground; power supply circuit PWM controller chip U P4 pin of through buffer capacitor CP4The execution circuit is connected with the ground; power supply circuit PWM controller chip UPThe 5 feet are suspended. Voltage dividing resistor RP2Connected across the first filter capacitor CP1Positive pole and power supply circuit PWM controller chip U P3 feet.
Output transformer TrPPrimary winding W of the output transformer1The homonymous terminal is connected to the first filter capacitor CP1The different name end of the positive pole is connected to a PWM controller chip U of the power circuit P6, 7, 8; output transformer TrPOutput transformer detection winding W2The end with the same name passes through a current limiting resistor RP3And a rectifier diode DP2Is connected to the positive pole of a rectifier diode DP2Is connected to the PWM controller chip U of the power circuit P3 feet of (1); output transformer TrPOutput transformer detection winding W2The different name is terminated and executed the circuit ground; output transformer TrPFirst secondary winding W of the output transformer3Different name terminal and output transformer second secondary winding W4The different name ends are all grounded; output transformer TrPFirst secondary winding W of the output transformer3Homonymous terminal and second secondary winding W of output transformer4The homonymous terminals of the control circuit are respectively connected with a working power supply rectifier diode DP3And a rectifier diode D of the working power supply of the system driving circuitP4Is connected to the positive electrode. Rectifier diode D of working power supply of control circuitP3The negative electrode of the capacitor is simultaneously connected with a first filter capacitor C of a working power supply of the control circuitP5The positive pole and the filter inductance L of the working power supply of the control circuitP1Is connected with one end of the connecting rod; first filter capacitor C of control circuit working power supplyP5The negative electrode of (2) is grounded; control circuit working power filterWave inductor LP1The other end of the first filter capacitor C is connected with a second filter capacitor C of a working power supply of the control circuitP6Is connected to the positive terminal E of the operating power supply. Second filter capacitor C of control circuit working power supplyP6The negative electrode of (2) is grounded. System drive circuit working power supply rectifier diode DP4The negative electrode of the first filter capacitor C is simultaneously connected with the working power supply of the system driving circuitP7The positive pole and the system driving circuit work power supply filter inductance LP2Is connected with one end of the connecting rod; first filter capacitor C of system driving circuit working power supplyP7The negative electrode of (2) is grounded; system drive circuit work theory power supply filter inductance LP2The other end of the first filter capacitor C is connected with a second filter capacitor C of a system driving circuit working power supplyP8Is connected to the positive terminal E of the signal processing power supply1. Second filter capacitor C of system driving circuit working power supplyP8The negative electrode of (2) is grounded.
Feedback current limiting resistor RP4Is connected to the positive terminal E of the signal processing power supply1And the other end of the feedback optical coupler LC is connected with a (TLP521-1 type) feedback optical coupler LCPIs connected with the 1 pin. Feedback voltage division first resistor RP5Is connected to the positive terminal E of the signal processing power supply1The other end of the first resistor is connected with a feedback voltage-dividing second resistor RP6Is connected with one end of the connecting rod; feedback voltage-dividing second resistor RP6And the other end of the same is grounded. Reference voltage source device U (TL431 type)6Negative pole and feedback optical coupler LC P2 pin connection of a reference voltage source device U6Is grounded, and a reference voltage source device U6Is connected to the feedback voltage-dividing first resistor RP5And a feedback voltage-dividing second resistor RP6The connection point of (a). Self-excited absorption capacitor CP9Connected across the reference voltage source device U6Between the negative electrode and the control electrode. Feedback optocoupler LC P3 pin of the feedback optocoupler LC P4 pins and power circuit PWM controller chip UPIs connected with the 4 pins.
In the circuit structure diagram of the working power supply of the ultrasonic biological treatment system shown in fig. 6 and the circuit structure diagram of the power adjusting and mode setting of the system shown in fig. 7: of a systemThe power regulating and mode setting circuit is a MOSFET power regulating switch QPMPW control circuit as core device. Power-adjusting first filter capacitor CPM1Is connected to the positive terminal E of the bus power supply of the systemVWhile adjusting power with MOSFET switch QPMIs connected to the drain of (1). Power-adjusting signal isolation optocoupler LCPwThe anode output end of the power adjusting circuit is connected to a power adjusting signal OR gate diode DPwThe negative electrode of (1). Mode signal isolation optocoupler LCMdIs connected to a mode signal or gate diode DMdThe negative electrode of (1). Power regulating signal OR gate diode DPwPositive pole and mode signal or gate diode DMdThe anode of the diode is simultaneously connected with the voltage-dividing diode DPMIs connected to the positive pole of the transistor and is connected to the negative pole of the transistor through an OR gate pull-up resistor RPbAnd a positive terminal E of a bus power supply connected to the systemV. And a voltage dividing diode DPMThe positive electrode of (1) is connected; gate-level voltage divider resistor RPgBridged over MOSFET power-regulating switch QPMBetween the drain and the gate. Gate-level trigger resistor RPcBridged over MOSFET power-regulating switch QPMGrid and trigger signal amplifying triode TPBetween the collector electrodes; trigger signal amplifying triode TPBase and voltage-dividing diode DPMThe negative electrode of (1) is connected; voltage dividing diode DPMThe emitter of (2) is grounded. MOSFET power-regulating switch QPMIs connected to the power regulating freewheeling diode DwPNegative pole and power-adjusting filter inductor LPMOne end of (a); power-regulating freewheeling diode DwPThe positive electrode of (2) is grounded. Power-regulating filter inductor LPMAnd the other end of the first filter capacitor C and the power-adjusting second filter capacitor CPM1Is connected to the positive terminal E of the PWM inversion bus power supplyP. Power-adjusting second filter capacitor CPM1The negative electrode of (2) is grounded.
In the structural block diagram of the ultrasonic biological treatment system of the apparatus shown in fig. 5, the circuit structural diagrams shown in fig. 6 to 7, and the structural diagram of the PWM driving and inverting circuit of the system shown in fig. 8:
the PWM driving and inverting circuits of the system are respectively an IR2110 type inverter bridge left arm driving chip DrAInverter bridge right arm driving chip DrBCore PWM driving circuitHigh-end MOSFET switch Q driven by left arm of enhanced MOSFET inverter bridgeHALeft arm drive low-end MOSFET switch Q of inverter bridgeLAInverter bridge right arm driven high-end MOSFET switch QHBAnd inverter bridge right arm drive low-side MOSFET switch QLBThe inverter circuit is the core.
Inverter bridge left arm drive logic low-end input signal isolation optocoupler LCLAPositive electrode output terminal ofALeft arm drive logic high-end input signal isolation optocoupler LC of inverter bridgeHAThe positive output end of the isolating optocoupler LC is connected with the inverter bridge right arm drive logic low-end input signalLBThe positive output end of the isolating optocoupler LC is connected with the high-end input signal of the driving logic of the right arm of the inverter bridgeHBThe positive output ends of the two terminals are connected to a positive terminal E of a signal processing power supply1. Inverter bridge left arm drive logic low-end input signal isolation optocoupler LCLAThe negative output end of the inverter bridge drives a logic low-end input signal end T through a left arm of the inverter bridgeLAIs connected to the left arm driving chip Dr of the inverter bridgeAL ofINA pin; inverter bridge left arm drive logic high-end input signal isolation optocoupler LCHAThe negative output end of the inverter bridge drives a logic high-end input signal end T through a left arm of the inverter bridgeHAIs connected to the left arm driving chip Dr of the inverter bridgeAH of (A) to (B)INA pin; inverter bridge right arm drive logic low-end input signal isolation optocoupler LCLBThe negative output end of the inverter bridge drives a logic low-end input signal end T through a right arm of the inverter bridgeLBIs connected to the inverter bridge right arm driving chip DrBL ofINA pin; inverter bridge right arm drive logic high-end input signal isolation optocoupler LCHBThe negative output end of the inverter bridge drives a logic high-end input signal end T through a right arm of the inverter bridgeHBIs connected to the inverter bridge right arm driving chip DrBH of (A) to (B)INAnd (7) a pin.
Inverter bridge left arm driving chip DrAV ofCCPin and inverter bridge right arm driving chip DrBV ofCCThe pins are all connected to the positive terminal E of the signal processing power supply1. Inverter bridge left arm driving chip DrACom pin and inverter bridge right arm driving chip DrBAll Com pins are driven by an inverter bridgeChip common terminal TCOAnd (4) grounding. Inverter bridge left arm driving chip DrAV ofbPin and inverter bridge right arm driving chip DrBV ofbPin is respectively connected with left arm of inverter bridge to drive bootstrap diode DVbAThe cathode and the right arm of the inverter bridge drive a bootstrap diode DrBThe negative electrode of (1) is connected; left arm driving bootstrap diode D of inverter bridgeVbAThe positive pole and the right arm of the inverter bridge drive a bootstrap diode DrBAre all connected to the positive terminal E of a signal processing power supply1. Inverter bridge left arm driving chip DrAV ofSPin passes through inverter bridge left arm drive bootstrap flat wave capacitor CVA1And inverter bridge left arm driving bootstrap capacitor CVA2Parallel branch and inverter bridge left arm driving chip DrAV ofbConnecting pins; left arm driving bootstrap capacitor C of inverter bridgeVA2The driving chip Dr of the left arm of the positive pole and the inverter bridgeAV ofbPin connected, negative pole and left arm driving chip Dr of inverter bridgeAV ofSAnd connecting the pins. Inverter bridge right arm driving chip DrBV ofSPin passes through inverter bridge right arm drive bootstrap flat wave capacitor CVB1And inverter bridge left arm driving bootstrap capacitor CVB2Parallel branch and inverter bridge right arm driving chip DrBV ofbConnecting pins; inverter bridge right arm drive bootstrap capacitor CVB1The positive electrode and the inverter bridge right arm driving chip DrBV ofbPin connected, negative electrode and inverter bridge right arm driving chip DrBV ofSAnd connecting the pins.
Inverter bridge left arm driving chip DrAH of (A) to (B)OPin passes through inverter bridge left arm drive high-end coupling resistor RHAHigh-end MOSFET switch Q connected to left arm of inverter bridge for drivingHAA gate electrode of (1). Inverter bridge left arm driving chip DrAL ofOPin drives low-end coupling resistor R through left arm of inverter bridgeLADrive low side MOSFET switch Q connected to inverter bridge left armLAA gate electrode of (1). Inverter bridge right arm driving chip DrBH of (A) to (B)OPin drives high-end coupling resistor R through inverter bridge right armHBHigh-side MOSFET switch Q connected to right arm of inverter bridge for drivingHBA gate electrode of (1). Inverter bridge right arm driving chip DrBL ofOPin drives low-end coupling resistor R through inverter bridge right armLBConnected to the right arm of the inverter bridge to drive the low-side MOSFET switch QLBA gate electrode of (1).
Inverter bridge left arm driving high-end MOSFET switch QHADrain and inverter bridge left arm driven low side MOSFET switch QLAThe drain electrodes of the two-phase inverter are connected to the positive terminal E of the PWM inversion bus power supplyP(ii) a Inverter bridge left arm driving high-end MOSFET switch QHAThe source and the right arm of the inverter bridge drive the high-side MOSFET switch QHBThe source electrodes of the inverter bridge are respectively connected with a left arm drive low-end MOSFET switch Q of the inverter bridgeLADrain and inverter bridge right arm drive low side MOSFET switch QLBIs connected with the drain electrode of the transistor; inverter bridge left arm driven low-side MOSFET switch QLBSource and inverter bridge right arm drive low side MOSFET switch QLBThe source electrode drives the common terminal T of the chip through an inverter bridgeCOAnd (4) grounding. Bus filter capacitor C of inverter bridgePWMIs connected to the positive terminal E of the PWM inversion bus power supplyPThe negative pole drives the common end T of the chip through an inverter bridgeCOAnd (4) grounding. Inverter bridge left arm driving high-end MOSFET switch QHASource and inverter bridge left arm drive low side MOSFET switch QLAIs connected to the power matching output voltage upper terminal Tv(ii) a Inverter bridge right arm drive high-end MOSFET switch QHBSource and inverter bridge right arm drive low side MOSFET switch QLBIs connected to a lower terminal T of the power matching output voltagev0
In the structural block diagram of the ultrasonic biological processing system of the apparatus shown in fig. 5, the circuit structural diagrams shown in fig. 6 to 8, and the power matching and band switching circuit structure of the system shown in fig. 9:
the power matching and frequency band switching circuit of the system is a frequency band matching inductance coil WLMatching circuit as core device and relay J switched by first frequency band1And a second frequency band switching relay J2And a third frequency band switching relay J3Is a switching circuit of a core device.
First frequency band relay drive signalIsolating optocoupler LCJ1Is connected to a first frequency band relay drive signal terminal TmJ1And the output end of the negative electrode is grounded. Second frequency band relay drive signal isolation optocoupler LCJ2Is connected to the second frequency band relay drive signal terminal TmJ2And the output end of the negative electrode is grounded. Third frequency band relay drive signal isolation optocoupler LCJ3Is connected to a third band relay drive signal terminal TmJ3And the output end of the negative electrode is grounded.
First frequency band relay driving triode TJ1The base electrode of the first frequency band relay drives a signal coupling resistor RJ1Connected to a first frequency band relay drive signal terminal TmJ1(ii) a First frequency band relay driving triode TJ1The emitter of the switching relay is connected with a first frequency band switching relay J in series1And (4) grounding. Second frequency band relay driving triode TJ2Base electrode of the first frequency band relay drives a signal coupling resistor R through a second frequency band relayJ2Connected to a second frequency band relay drive signal terminal TmJ2(ii) a Second frequency band relay driving triode TJ2The emitter of the switching relay is connected with the second frequency band switching relay J in series2And (4) grounding. Third frequency band relay driving triode TJ3The base electrode of the relay drives a signal coupling resistor R through a third frequency band relayJ3Connected to a third band relay drive signal terminal TmJ3(ii) a Third frequency band relay driving triode TJ3The emitter of the three-band switching relay is connected in series3And (4) grounding. First frequency band relay driving triode TJ1Collector electrode, second frequency band relay driving triode TJ2Collector and third band relay driving triode TJ3Are all connected to the positive terminal E of the signal processing power supply1
Frequency band matching inductance coil WLStarting end T of frequency band matching inductance coilL0Upper terminal T connected to power matching output voltagev. Normally open contact J of first frequency band switching relay1-1 driving the switching terminal T through the first frequency band transducerZ1And a first frequency band transducer Z1In series with the series branch across a power-matched outputPress-down terminal Tv0Inductance coil W matched with frequency bandLFirst band transducer of (1) matching terminal TL1In the meantime. Normally open contact J of second frequency band switching relay2-1 driving the switching terminal T via the second band transducerZ2And a second frequency band transducer Z2In series with the series branch being connected across terminal T at a power-matched output voltagev0Inductance coil W matched with frequency bandLSecond band transducer matching terminal TL2In the meantime. Normally open contact J of third frequency band switching relay3-1 driving the switching terminal T through the third band transducerZ3And a third frequency band transducer Z3In series with the series branch being connected across terminal T at a power-matched output voltagev0Inductance coil W matched with frequency bandLThird frequency band transducer of (2) matching terminal TL3In the meantime.
In the circuit configuration diagram shown in fig. 9 and the main control and man-machine interaction circuit configuration diagram of the system shown in fig. 10:
the main control and man-machine interaction circuit of the system is a controller chip U of a single chip microcomputer in Mega16 typeCIs a control and operation circuit of the core.
Touch screen display module UDV ofCCThe pin is connected to the positive terminal E of the working power supply of the control circuit, and the GND pin is grounded; touch screen display module UDWR pin of the controller is connected to the controller chip UCAnd a PD0 pin, the RD pin of which is connected to the controller chip UCPD1 pin.
Control system start key KMAnd start signal buffer resistor RKMIn series, a controller chip UCThe pin PA0 of is grounded through the series branch; starting signal buffer capacitor CKMIs bridged on the controller chip UCBetween the PA0 pin and ground. Controller chip UCThe PA1 pin, the PA2 pin, the PA3 pin, the PA4 pin, and the PA5 pin are connected to the sound intensity signal output terminal F, respectivelySAnd a processing tank efficiency signal output terminal FDVoltage signal output terminal FVCurrent signal output terminal FIAnd a frequency feedback output terminal FF. Controller chip UCThe XTAL1 pin passes through a first self-excited capacitor Cp1Ground, its XTAL2 pin passing through the second self-excited capacitor Cp2Grounding; crystal oscillator CfIs bridged on the controller chip UCBetween the XTAL1 pin and the XTAL2 pin.
Controller chip UCV ofCCThe pin is connected to the positive terminal E of the control circuit operating power supply. Controller chip UCThe pin PC5, the pin PC4, the pin PC3, the pin PC2, the pin PC1 and the pin PC0 are respectively connected through an optical coupler LCPwVoltage dividing resistor RPC5LC optical couplerMdVoltage dividing resistor RPC4LC optical couplerHAVoltage dividing resistor RPC3LC optical couplerLAVoltage dividing resistor RPC2LC optical couplerHBVoltage dividing resistor RPC1And an optocoupler LCLBVoltage dividing resistor RPC0Connected to an optocoupler LCPwInput end anode of (1), optical coupler LCMdInput end anode of (1), optical coupler LCHAInput end anode of (1), optical coupler LCLAInput end anode of (1), optical coupler LCHBInput terminal anode and optical coupler LCLBThe input end anode of (1); optical coupler LCPwInput terminal cathode, optical coupler LCMdInput terminal cathode, optical coupler LCHAInput terminal cathode, optical coupler LCLAInput terminal cathode, optical coupler LCHBInput terminal cathode and optical coupler LCLBThe negative poles of the input ends of the two are all grounded. Controller chip UCThe PB2 pin, the PB1 pin and the PB0 pin pass through the optical couplers LC respectivelyJ1Voltage dividing resistor RPB2LC optical couplerJ2Voltage dividing resistor RPB1And an optocoupler LCJ3Voltage dividing resistor RPB0Connected to an optocoupler LCJ1Input end anode of (1), optical coupler LCJ2Input terminal anode and optical coupler LCJ3The input end anode of (1); optical coupler LCJ1Input terminal cathode, optical coupler LCJ2Input terminal cathode and optical coupler LCJ3The negative poles of the input ends of the two are all grounded. Controller chip UCRESET non-pin pull-up resistor R through RESET signalR1Is connected to the positive terminal E of the working power supply of the control circuit. Controller chip UCThe RESET non-pin of the resistor buffer R is RESET through a RESET signalR2Reset key K of controllerRThe series branch of (2) is grounded; controller chip UCThe RESET non-pin of through RESET signal buffer capacitor CRAnd (4) grounding. Controller chip UCThe GND pin of (b) is grounded.
In the display home operation interface diagram of the apparatus shown in fig. 11: the front page-turning touch button 1 and the mode M button, the frequency F button, the power P button and the back page-turning touch button 2 below the front page-turning touch button are arranged in a row at the right side position of the screen. The main surface of the screen is sequentially laid with patterns, frequencies and power settings from top to bottom to display a graduation pattern.
In the second page operation interface diagram of the display shown in fig. 12: front page-turning touch button 1 and 'moving width tau' below the samePThe ' up-regulation touch button 3 and down-regulation touch button 4 side-by-side button, the ' time L ' up-regulation touch button 3 and down-regulation touch button 4 side-by-side button, the ' speed V ' up-regulation touch button 3 and down-regulation touch button 4 side-by-side button and the back page-turning touch button 2 are arranged at the right side position of the screen in a row. The motion widths tau are sequentially arranged from top to bottom on the left side of the main surface of the screenP"," elapsed time L ", and" rate V "prompt icons. The main surface of the screen is horizontally arranged from top to bottom corresponding to the motion width tauPThe dynamic width, the time consumption and the speed are sequentially arranged, and a graduated graph is set and displayed.
In the third page of the operation interface diagram of the display shown in fig. 13: front page-turning touch button 1 and "start point F" therebelow1"frequency up touch button 3 and down touch button 4 side by side button, blank row," end point F2"the frequency up touch button 3 and the frequency down touch button 4 are arranged in a row at the right side of the screen, along the buttons and the back page touch button 2. "starting points F" are arranged in this order from top to bottom on the left side of the main surface of the screen1"," Current F ", and" terminal F2"prompt icon. The main surface of the screen is arranged horizontally from top to bottom to correspond to a "starting point F1"," Current F ", and" terminal F2"sequentially laying out a starting point frequency setting chart, a current frequency display chart and an end point frequency setting chart.
In the last page operation interface diagram of the display shown in fig. 14: front page-turning touchThe button 1 and the 'set P' frequency up-regulating touch button 3 and the down-regulating touch button 4 below the button are arranged in a row at the right side position of the screen, and the touch buttons of the blank row and the back page turning touch button 2 are arranged in a row. The settings P are arranged in the order from top to bottom on the left side of the main surface of the screenRAnd a "current P" prompt icon. Setting P corresponding to the horizontal row from top to bottom of the main surface of the screenRAnd the 'current P' are sequentially arranged to set the power of the starting point and display a graduation chart of the current power.
In the system processing efficiency display interface schematic of the display shown in fig. 15: the front page turning touch button 1 and the empty row and the rear page turning touch button 2 below the front page turning touch button are arranged in a row at the right side position of the screen. And the left side of the main surface of the screen is sequentially provided with an efficiency/difference prompt icon and an efficiency/frequency point prompt icon from top to bottom. The main surface of the screen is provided with efficiency difference value display and efficiency real-time value display graduation charts of each frequency point in sequence from top to bottom corresponding to the efficiency/difference and the efficiency/frequency point.
In the system display interface schematic diagrams of the displays shown in fig. 11 to 15:
operating an interface on a display home page: pressing the front page-turning touch button 1 returns to the system cover. If the current value of the pattern, frequency and power setting display scale chart of the main surface of the screen is confirmed, directly pressing the back page turning touch button 2 to enter the lower page; otherwise, sequentially or selectively pressing the 'mode M' button, the 'frequency F' button and the 'power P' button as appropriate to enter a next page for carrying out corresponding adjustment setting.
And operating an interface on a display secondary page: pressing the page forward touch button 1 returns to the home page operation interface. If the "motion width τ of the main surface of the screen is confirmedPThe current values of the display scale chart are set by 'time L' and 'speed V', and then the page turning touch button 2 is directly pressed to enter the next page; otherwise, as appropriate, sequentially or selectively by "dynamic width τPThe buttons of the up-regulating touch button 3 or the down-regulating touch button 4 in the row corresponding to the 'time-use L' and the 'speed V' are correspondingly regulated and set.
And on a third page of the display, operating the interface: pressing the page-before-turning touch button 1 returns to the next-page operation interface. If the "starting point F" of the main surface of the screen is confirmed1"frequency sum" end point F2"the frequency setting displays the current value of the graduated graph, then directly press the back page-turning touch button 2 to enter the lower page; otherwise, as appropriate, sequentially or selectively as "starting point F1"and" end point F2And the up-regulating touch button 3 or the down-regulating touch button 4 of the corresponding row carries out corresponding regulation setting.
And operating an interface at the last page of the display: pressing the page-forward touch button 1 returns to the third page operation interface. If the "setting P" of the main surface of the screen is confirmedR"the power setting displays the current value of the graduated graph, then directly press the back page-turning touch button 2 to enter the lower page; otherwise, press "set P" as appropriateRAnd the up-regulating touch button 3 or the down-regulating touch button 4 of the corresponding row carries out corresponding regulation setting.
In the ultrasonic biological processing system block diagram of the apparatus shown in fig. 5, the main control and man-machine interaction circuit block diagram of the system shown in fig. 10, and the ultrasonic frequency control system block diagram of the system shown in fig. 16:
the ultrasonic frequency control system of the system is composed of a comparison link
Figure GDA0003524208900000111
Frequency control unit CfA conversion processing link Tr (c) and an amplification link>(d, e), a transduction performing element Ex (f, g), and a frequency conversion feedback element Fd.
Set ultrasonic treatment given frequency fRWith ultrasonic treatment feedback frequency fFTo be stored in the controller chip UCIs compared with
Figure GDA0003524208900000112
A middle comparison, producing a deviation frequency Δ f; via a memory in the controller chip UCFrequency control unit CfCalculating the deviation frequency Deltaf to be converted into deviation PWM pulse width duty ratio Deltaf (tau/T)τ) (ii) a Offset PWM pulse width duty cycle delta (tau/T)τ) Converted into PWM pulse width duty ratio tau/T by a conversion processing link Tr (c)τ(ii) a In the amplification stage>(d, e) PWM pulse width duty ratio τ/TτThe transduction driving electricity for controlling the linkPressing v; the transduction driving voltage v generates a transduction driving current i through matching and resonance of a transduction execution link Ex (f, g); after the calculation processing of the frequency conversion feedback link Fd, the transduction driving voltage v and the transduction driving current i are converted into the ultrasonic treatment feedback frequency fF to be introduced into the comparison link
Figure GDA0003524208900000113
In the circuit structure diagram shown in fig. 4, the main control and man-machine interaction circuit structure diagram of the system shown in fig. 10, and the ultrasonic cycle feedback data processing flow diagram shown in fig. 17: firstly, reading a pulse width duration signal input from a pin PA 5; warp controller chip UCAfter calculating and converting the pulse width data into the ultrasonic processing feedback period TFVariable, then through the controller chip UCAccording to fF=1/TFCalculating and converting into ultrasonic treatment feedback frequency fFA variable; then the ultrasonic treatment is fed back for a period TFVariable data and ultrasonic treatment feedback frequency fFAnd (4) registering variable data.
In the schematic diagrams of the display operation interface shown in fig. 11 to 15, the block diagram of the ultrasonic frequency control system of the system shown in fig. 16, the flow chart of the ultrasonic period feedback data processing shown in fig. 17, the block diagram of the ultrasonic frequency control system of the system shown in fig. 16, and the flow chart of the ultrasonic biological treatment operation shown in fig. 18:
step0, manually performing the operations such as processing time (namely, time L), power (namely, setting P) on the man-machine interaction interface of the displayR) Duration of pulse-beat (i.e. width of pulse τ)P) Frequency search rate (i.e., rate V)f) Search starting point frequency (i.e., starting point F)1) End point frequency (i.e. end point F)2) Etc. are set.
Step1.fRAssigned value of F1(ii) a Reading a given period T of ultrasonic treatment; the PWM pulse database PWDB is opened.
Step2. selection of fRPulse data recording of (2); reading the sonication feedback period TFA value; setting a global order variable iτPThe initial value is 1.
Step3. frequency locked running flp.sys.
Step4, if the resonant frequency switching or selecting signal is obtained, judging whether the intermittent pulse oscillation time point is reached; if no resonant frequency switching or selected signal is obtained, the FLP.Sys is continuously operated.
Step5. if the intermittent pulse-oscillation point is reached, iτP=iτP+1, judging whether an operation stop signal is obtained; if the intermittent pulse oscillation time point is not reached, the FLP.Sys is continuously operated.
Step6, if the operation stop signal is obtained, closing the PWM pulse database PWDB; stopping the processing operation; and if the operation stop signal is not obtained, switching to the next resonant matching network is executed.
Step7. determine if the handover is complete? If the switching is finished, starting the next resonant frequency processing operation; otherwise, the pause time is continued until the switching is completed.
Step8. the next pulse starts, returning to Step 1.
In the ultrasonic biological treatment operation workflow diagram shown in fig. 18 and the frequency control and PWM drive data processing flp.sys flow diagram of the system shown in fig. 19:
SuSt1. setting a timing clock variable t/CSetting the initial value of a local sequence variable i as 1 when the initial value of timing is 0 second; reading the number N of sine wave half-cycle pulsesT/2
SuSt2. controller chip UCThe respective pin register data of the PC0, PC1, PC2, and PC3 are cleared.
SuSt3. reading the ith pulse rising edge time data tau from the PWM pulse database PWDBUPiAnd ith pulse width data taui(ii) a Time clock variable t/CThe timing is started.
SuSt4. ultrasonic treatment feedback period T if readFGreater than the given period T of ultrasonic treatment, at 0.99TτCorrecting pulse periods T in a PWM pulse database PWDBτAt 0.99 tauUPiCorrecting the data tau at the rising edge of the ith pulseUPi(ii) a If the read ultrasonic treatment feedback period TFLess than the given period T of ultrasonic treatment, at 1.01TτCorrecting pulse periods in a PWM pulse database PWDBPeriod TτAt 1.01 τUPiCorrecting the data tau at the rising edge of the ith pulseUPi(ii) a Otherwise, judging the timing clock variable t/CWhether the ith pulse rising edge time data tau is reachedUPiThe value is obtained.
SuSt5. if the clock variable t is timed/CThe ith pulse rising edge time data tau has not been reachedUPiValue, then delay wait until the timing clock variable t/CData tau up to the ith pulse rising edge timeUPiAnd (4) entering the next step.
SuSt6. with the ith pulse width data tauiValue assigning controller chip UCThe PC3 and PC0 pins register and output.
SuSt7. if N is not completed yetT/2Assigning and outputting the pulse width data, increasing the value of the current PWM driving data processing sequence variable i by 1, and returning to SuSt 3; otherwise, the PWM driving data processing sequence variable i is assigned with 1, and the controller chip U is assigned with 1CThe register data of each pin of the PC0, the PC1, the PC2 and the PC3 are cleared; time clock variable t/CAnd (5) initializing again by 0.
SuSt8. procedure running SuSt 3-SuSt 5.
SuSt9. with the ith pulse width data tauiValue assigning controller chip UCThe PC1 and PC2 pins register and output.
SuSt10. if N is not completed yetT/2Assigning and outputting the pulse width data, increasing the value of the current PWM driving data processing sequence variable i by 1, and returning to SuSt 8; otherwise, one PWM drive data period ends.
Figure GDA0003524208900000121
In the schematic diagrams of the display operation interface shown in fig. 11 to 15, the block diagram of the ultrasonic frequency control system of the system shown in fig. 16, the flowcharts shown in fig. 17 to 19, and the flow chart of the human-computer interaction data processing of the system shown in fig. 20:
st0. manually performing such actions as processing duration (i.e. time of use L), power (i.e. setting P) on the display human-computer interaction interfaceR) Duration of pulse-beat (instant motion)Width tauP) Frequency search rate (i.e., rate V)f) Search starting point frequency (i.e., starting point F)1) End point frequency (i.e. end point F)2) Etc. are set.
St1. reading given power P of ultrasonic treatmentRGiven processing duration L and pulse duration tauPFrequency search rate V of frequency search processfFrequency search processing gives a starting point frequency F1Frequency search process gives an end point frequency F2And calculating the precision epsilon by the system.
St2, assigning the number of frequency points N to 3 and the frequency interval GfAssigned a value of 20k/VfThe frequency of pulse vibration K is assigned to Gf/(τP+ 2); setting initial values of local sequence variables i and j as 1; setting the initial value of a register variable D to be 0.
St3, opening an efficiency real-time value database BEF; record A for each frequency point ii0、Ai1、Bi0、Bi1And (6) clearing.
St4. according to the pulse-vibration sequence j, using the controller chip UCThe register variable D of the PA2 pin refreshes each frequency point record Aij
And St5, opening an efficiency increment difference value database BEV and associating an efficiency real-time value database BEF.
St6. record A for each frequency point iiAverage the accumulated value in the number of times K of pulse oscillation, and send it to the controller chip UCThe PD1 pin for display, sending the frequency switch/select signal.
St7. average value A of frequency points i, i-1 and i-1, i-2i、Ai-1And Ai-1、Ai-2Separately find the frequency interval GfFor records A in the efficiency delta difference value database BEViAnd BiAnd (6) refreshing.
St8. in the efficiency increment difference value database BEV, efficiency increment C is recorded for each frequency point iiWith Ai-BiIs refreshed and is simultaneously sent to the controller chip UCPin PD1 for display.
And St9, judging whether the current frequency point i is efficient or not.
St10, if the current frequency point i is determined to be the high-efficiency frequency point, locking the current frequency point i to operate, and jumping to St 12; if the current frequency point i is determined to be a non-efficient frequency point and all the frequency points N are not searched, the next frequency point is switched to, and St6 is returned.
St11. if all frequency points N have been searched and the given processing time length L has been reached or a manual forced shutdown instruction has been given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; if the given processing duration L is not reached or there is no manual forced shutdown command, St4 is returned.
St12, if the given processing time L is reached or a manual forced shutdown instruction is given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; and if the given processing time length L is not reached or no manual forced shutdown instruction is given, continuing to lock the current frequency point i for operation.

Claims (3)

1. A screen display interaction method for laboratory ultrasonic biological treatment is characterized in that:
st0. manually processing the human-computer interaction interface of the display with a duration L and a power PRDuration of pulse-vibration τPFrequency search rate VfSearch starting point frequency F1End point frequency F2Setting parameters of (1);
st1. reading given power P of ultrasonic treatmentRGiven processing duration L and pulse duration tauPFrequency search rate V of frequency search processfFrequency search processing gives a starting point frequency F1Frequency search process gives an end point frequency F2Calculating the precision epsilon by the system;
st2, assigning the number of frequency points N to 3 and the frequency interval GfAssigned a value of 20k/VfThe frequency of pulse vibration K is assigned to Gf/(τP+ 2); setting initial values of local sequence variables i and j as 1; setting the initial value of a register variable D to be 0;
st3, opening an efficiency real-time value database BEF; record A for each frequency point ii0、Ai1、Bi0、Bi1Clearing;
st4. according to the pulse-vibration sequence j, using the controller chip UCThe register variable D of the PA2 pin refreshes each frequency point record Aij
St5, opening an efficiency increment difference value database BEV, and associating an efficiency real-time value database BEF;
st6. record A for each frequency point iiAverage the accumulated value in the number of times K of pulse oscillation, and send it to the controller chip UCPD1 pin for display, sending frequency switching/selection signal;
st7. average value A of frequency points i, i-1 and i-1, i-2i、Ai-1And Ai-1、Ai-2Separately find the frequency interval GfFor records A in the efficiency delta difference value database BEViAnd BiRefreshing;
st8. in the efficiency increment difference value database BEV, efficiency increment C is recorded for each frequency point iiWith Ai-BiIs refreshed and is simultaneously sent to the controller chip UCPD1 pin for display;
st9, judging whether the current frequency point i is efficient or not;
st10, if the current frequency point i is determined to be the high-efficiency frequency point, locking the current frequency point i to operate, and jumping to St 12; if the current frequency point i is determined to be a non-efficient frequency point and all frequency point numbers N are not searched, switching to the next frequency point, and returning to St 6;
st11. if all frequency points N have been searched and the given processing time length L has been reached or a manual forced shutdown instruction has been given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; if the given processing time length L is not reached or there is no manual forced shutdown instruction, returning to St 4;
st12, if the given processing time L is reached or a manual forced shutdown instruction is given, closing the efficiency increment difference value database BEV and the efficiency real-time value database BEF, calling and shutting down; and if the given processing time length L is not reached or no manual forced shutdown instruction is given, continuing to lock the current frequency point i for operation.
2. The on-screen display interaction method for laboratory ultrasound bioprocessing according to claim 1, wherein:
operating an interface on a display home page: pressing the front page-turning touch button can return to the system cover; if the mode, the frequency and the power of the main surface of the screen are confirmed to set the current value of the display scale chart, directly pressing a page turning touch button to enter a lower page; otherwise, pressing the mode M button, the frequency F button and the power P button in turn or selectively as appropriate to enter the lower page for corresponding adjustment and setting;
and operating an interface on a display secondary page: the page turning touch button can be pressed to return to the home page operation interface; if the "motion width τ of the main surface of the screen is confirmedPSetting current values of a display scale chart by using 'time L' and 'speed V', and directly pressing a back page turning touch button to enter a lower page; otherwise, as appropriate, sequentially or selectively by "dynamic width τPThe up-regulating touch buttons or the down-regulating touch buttons in the row corresponding to the 'time-use L' and the 'speed V' are correspondingly regulated and set;
and on a third page of the display, operating the interface: the page turning touch button can return to the secondary page operation interface before being pressed; if the "starting point F" of the main surface of the screen is confirmed1"frequency sum" end point F2"the frequency setting displays the current value of the graduated graph, then directly presses the back page-turning touch button to enter the lower page; otherwise, as appropriate, sequentially or selectively as "starting point F1"and" end point F2The corresponding row of up-regulating touch buttons or down-regulating touch buttons carries out corresponding regulation setting;
and operating an interface at the last page of the display: the page turning touch button can be pressed to return to the third page operation interface; if the "setting P" of the main surface of the screen is confirmedR"the power setting displays the current value of the graduated graph, then directly press the back page-turning touch button to enter the lower page; otherwise, press "set P" as appropriateRAnd performing corresponding adjustment setting on the corresponding row of up-regulation touch buttons or down-regulation touch buttons.
3. The on-screen display interaction method for laboratory ultrasound bioprocessing according to claim 1, wherein:
operating an interface on a home page of a display of the device: the front page-turning touch button, the mode M button, the frequency F button, the power P button and the rear page-turning touch button below the front page-turning touch button are arranged at the right side position of the screen in a row; arranging a mode, a frequency and a power setting display graduation chart on the main surface of the screen from top to bottom in sequence;
and operating an interface on a secondary page of the display: front page-turning touch button and 'moving width tau' below the samePThe ' up-regulating touch button and down-regulating touch button side-by-side button ', the ' time L ' up-regulating touch button and down-regulating touch button side-by-side button ', the ' speed V ' up-regulating touch button and down-regulating touch button side-by-side button and the back page-turning touch button are arranged at the right side position of the screen in a row; the motion widths tau are sequentially arranged from top to bottom on the left side of the main surface of the screenP"," elapsed time L "and" rate V "prompt icons; the main surface of the screen is horizontally arranged from top to bottom corresponding to the motion width tauPThe dynamic width, the time consumption and the speed are sequentially arranged, and a scale chart is set and displayed;
in a third page of the operation interface schematic diagram of the display: front page-turning touch button and 'starting point F' below the same1"frequency up touch button and down touch button side by side button, blank row," terminal point F2The frequency up-regulation touch button, the frequency down-regulation touch button, the side-by-side buttons and the back page-turning touch button are arranged at the right side position of the screen in a row; "starting points F" are arranged in this order from top to bottom on the left side of the main surface of the screen1"," Current F ", and" terminal F2"prompt icon; the main surface of the screen is arranged horizontally from top to bottom to correspond to a "starting point F1"," Current F ", and" terminal F2"sequentially laying out a starting point frequency setting chart, a current frequency display chart and an end point frequency setting chart;
in the last page operation interface schematic diagram of the display: the front page turning touch button and the set P frequency up-regulation touch button and the down-regulation touch button below the front page turning touch button are arranged in a row at the right side position of the screen; the settings P are arranged in the order from top to bottom on the left side of the main surface of the screenRAnd a "current P" prompt icon; setting P corresponding to the horizontal row from top to bottom of the main surface of the screenRThe sum and the current P are sequentially distributedSetting point power and displaying a calibration chart at the current power;
in a system processing efficiency display interface schematic of a display: the front page-turning touch button, the empty row below the front page-turning touch button and the rear page-turning touch button are arranged at the right side position of the screen in a row; the left side of the main surface of the screen is sequentially provided with efficiency/difference and efficiency/frequency point prompting icons from top to bottom; the main surface of the screen is provided with efficiency difference value display and efficiency real-time value display graduation charts of each frequency point in sequence from top to bottom corresponding to the efficiency/difference and the efficiency/frequency point.
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CN102882495A (en) * 2011-07-15 2013-01-16 赛普拉斯半导体公司 Reduced eletromagnetic interference for pulse-width modulation
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