CN112969110B - OTN signal different mapping rate ODU identification method - Google Patents

Abstract

The invention discloses a method for identifying ODU (optical data Unit) of OTN (optical transport network) signals at different mapping rates, which comprises the following steps: preprocessing overhead information; analyzing FASTS position; MFASTS location analysis; and (5) analyzing the rest TS. The method is based on the predicted line spacing scanning FAS and iterative matching, and has the advantages of stronger universality, high accuracy and relatively simple processing; the mapped ODU0/ODU1/ODU3 can be effectively identified and processed no matter single or multiple mixtures; performing MFAS scanning matching design based on the determined FAS position and analyzing ODUj normative design based on the combined residual TS, so that the method is suitable for relatively complex ODU2 recognition and completes recognition of all different ODUj; the OTN line is effectively analyzed, the structural object mapped by the OTN can be identified under the condition that the OTNMSI information is invalid, and the OTN line identification method has important application value.

Description

OTN signal different mapping rate ODU identification method

Technical Field

The invention relates to an OTN signal different mapping rate ODU identification method.

Background

According to the specification of the OTN (Optical Transport Network) standard technical protocol, the entire ODUk frame is a 4 × 3824 matrix block, the first 14 columns of the first row are fas (frame Alignment signal)/mfas (multi frame Alignment signal)/OTUk (Optical Transport Unit-k) overhead, and the two columns of 15 and 16 are OPUk overhead. Column 17 of the whole ODUk (Optical Data Unit-k) frame matrix block is an OPUk (Optical Payload Unit-k) Payload area. For ODU4(ODU: Optical Data Unit), columns 3817 to 3824 are fixed fill fields. The size of FS (Fixed padding) field, the depth of MSI (Multiplex Structure Identifier), the JC rate adjustment mode, and the field effect of the overhead field of ODUk (Optical Data Unit-k) with different rates may be different.

As shown in fig. 2, which is an ODUk Frame structure, FAS (Frame Alignment Signal) is used for Frame synchronization and is a Frame synchronization header composed of three consecutive OA1 bytes and three consecutive OA2 bytes. The OA1 value was F6 hexadecimal and the OA2 value was 28 hexadecimal. MFAS (MultiFrame Alignment Signal) is used for ODUk MultiFrame numbering to identify the number of consecutive ODUk, whose value is sequentially cycled through 256, and returns to 0 and starts over again when reaching 256. Starting from the ODUk multiframe number of 2, its PSI (Payload Structure Identifier) starts to carry MSI information, and the PSI in a batch of consecutive ODUk frames constitutes an MSI information array. k is different, the MSI array length is different, and the core function of the MSI array is mapping structure information indicating the interior of the ODUk. The ODUk also has an important concept, namely, a logical TS (tributary slot), and each byte of the OPUk payload area of the entire ODUk is divided into different logical TSs. The ODU4 has 80 logical TSs, and the allocation rule is that each byte occupies a different logical TS from top to bottom and from left to right in the OPUk payload (except FS) area, and 80 logical TSs are numbered and repeated cyclically. The low-rate ODUj is mapped to the ODTU through the GMP/AMP, and the ODTU multiplexes each byte from left to right from top to bottom into the logical TS allocated to the ODU 4. The ODU0/ODU1/ODU2/ODU3 are mapped to the ODU4 by adopting GMP, and the distribution of ODTU effective data blocks can be obtained by calculation in JC (Positive control) information. And filling block intervals are formed in the middle of the effective data blocks, and the removed filling blocks are the low-rate ODUj information. The ODUj padding blocks of different rates are different in size, for example, the ODU2 is mapped to the ODU4, the padding block is 8 bytes, and the specific padding method refers to the GMP algorithm, as shown in fig. 3.

In the existing scheme, a low-rate ODUj is mapped to a high-rate ODUk (k > j, k, j are 0 to 4), the logical TS of the ODUk occupied by the ODUj is explicitly carried by the MSI, and if the number of the occupied logical TS is confirmed, the ODUj is also clear.

As shown in fig. 4, the low-rate ODUj structure object (j is 0 or 1/2/3) mapped by the ODUk and the logical TS information occupied by the ODUj can be confirmed by the TS groups with the same Tributary Port #, so that the ODUk-ODUj analysis can be performed.

In the prior art, structure information mapped to an ODUk by an ODUj is carried by MSI information according to a standard, and in an actual application process, a device at two ends agrees in advance to occupy a logical TS, so that the MSI information is basically not carried, and only an OTN signal is used, and an ODUk cannot be effectively developed for identifying a low-rate ODUj. There is also a related technical scheme for performing structure identification for MSI information invalidation, mainly applying a specific ODU4 to carry two specific scenarios of 10 ODUs 2. One is that each ODU2 occupies 8 logical TSs sequentially, and the other is that 10 ODUs 2 occupy 8 different logical TSs by interleaving. The technical scheme is that the data are grouped through JC information, and the technical scheme identifies a specific scene and is limited in application.

Disclosure of Invention

The invention realizes the purpose through the following technical scheme: and determining occupied logic TS through FAS and MFAS rule distribution of ODUj, and if all occupied logic TS can not be completely determined according to FAS and MFAS, determining the last logic TS by combining the rest logic TS attempts and the determined logic TS and calling frame length analyzed by GMP algorithm and whether overhead information is matched with standard specification.

The present invention aims to solve the above problems and provide a method for identifying ODU of an OTN signal at different mapping rates, including:

overhead information preprocessing: acquiring the number of ODUj structure objects mapped in the ODU4, a logic TS with the largest number occupied by each structure object ODUj and GMP adjustment control information of each structure object ODUj according to JC information in the ODU4 OPUk overhead; the GMP adjustment control information is used for removing the filling block when the ODU4 analyzes the ODUj;

FAS TS position analysis: predicting FAS scanning position information of different ODUj through ODUk adjustment control information, carrying out strong judgment through iterative matching, and determining a logic TS occupied by a structural object of the FAS according to the distribution rule of the FAS;

MFAS TS location analysis: scanning and matching to find MFAS information according to the line position information recorded by the FAS to confirm the next logic TS;

and (4) residual TS analysis: and combining the rest logic TS into the already-defined logic TS through a circular attempt, analyzing the ODU2 by the ODU4 through a GMP algorithm by using JC information acquired through overhead preprocessing, and confirming the final logic TS according to the frame length of the analyzed ODU2 and the standardization of an overhead domain.

The invention has the beneficial effects that:

(1) FAS scanning and iterative matching are carried out based on the predicted line spacing, so that the universality is stronger, the accuracy is high, and the processing is relatively simple; the mapped ODU0/ODU1/ODU3 can be effectively identified and processed no matter single or multiple mixtures; the application is not limited to software implementation, and is also suitable for hardware implementation, so that the adaptability is strong;

(2) performing MFAS scanning matching design based on the determined FAS position and analyzing ODUj normative design based on the combined residual TS, so that the method is suitable for relatively complex ODU2 recognition and completes recognition of all different ODUj;

(3) the OTN line is effectively analyzed, the structural object mapped by the OTN can be identified under the condition that the MSI information of the OTN is invalid, and the method has important application value.

Drawings

FIG. 1 is a flow diagram of the present invention;

fig. 2 is a schematic diagram of an ODU4 frame structure and overhead information;

FIG. 3 is a data block and fill block distribution diagram;

FIG. 4 is a schematic illustration of MSI information;

FIG. 5 is a schematic diagram of predicted line spacing FAS scanning and iterative matching in M matrix blocks;

fig. 6 is a schematic diagram of FAS location row MFAS scan matching.

Detailed Description

The invention will be further described with reference to the accompanying drawings in which:

as shown in fig. 1, the method for identifying ODUs with different mapping rates of an OTN signal according to the present invention includes:

overhead information preprocessing: acquiring the number of ODUj structure objects mapped in the ODU4, a logic TS with the largest number occupied by each structure object ODUj and GMP adjustment control information of each structure object ODUj according to JC information in the ODU4 OPUk overhead; the GMP adjustment control information is used for removing the filling block when the ODU4 analyzes the ODUj;

FAS TS position analysis: predicting FAS scanning position information of different ODUj through ODUk adjustment control information, carrying out strong judgment through iterative matching, and determining a logic TS occupied by the structural object according to the distribution rule of FAS;

MFAS TS location analysis: scanning and matching to find MFAS information according to the line position information recorded by the FAS to confirm the next logic TS;

and (4) residual TS analysis: and combining the rest logic TS into the already-defined logic TS through a circular attempt, analyzing the ODU2 by the ODU4 through a GMP algorithm by using JC information acquired through overhead preprocessing, and confirming the final logic TS according to the frame length and the overhead domain of the analyzed ODU 2.

Specifically, the FAS TS location analysis is a method of scanning FAS and iterative matching based on a predicted line spacing, including:

as known, the ODU0/ODU1/ODU2/ODU3 is mapped to the ODU4 by GMP, an ODTU effective data block distribution is calculated in JC information, and the effective data block is subjected to block interval filling and block filling to remove a filling block, so that low-rate ODUj information is obtained; converting a plurality of OPUk payloads of ODU4 frames excluding FS into a matrix block M with a row width of 80 bytes; the column numbers of matrix blocks M are C0, C1,. C79, the row numbers are R0, R1 and R2 …, ODU2 in one row occupy 8 bytes of 8 logic TS to form a Block, the blocks are numbered B0, B1, B2 to B7 in sequence, the Block location in the matrix blocks M is determined by row and column values Ri and Bj, Ri is the ith row, Bj is the jth Block in the row, and then the next ODU2 FAS is found by adjusting the row spacing based on the speed adjusting information calculated by JC after the row spacing is fully loaded;

scanning 80 bytes from the initial row of the matrix block M, recording OA1 or OA2 information and positions, and recording the current behavior Rm if FAS characteristic information exists; if the FAS characteristic information is not found in the current line, continuing to start from the next line;

the regulation control information JC of the different structure objects ODUj is carried by a multiframe of a certain ODU 4; specifically, which ODU4 multiframe carries is the ODU4 with the multiframe number being the ODUj occupying the maximum logical TS number; in the first step, 6 logical TS numbers occupied by FAS information are confirmed, wherein if an ODU4 multiframe number with a JC match can be found, JC adjustment control information of the ODU4 multiframe controls the ODUj; roughly calculating the adjustment line spacing information according to JC, and if the next ODU2 FAS characteristic information can be found by offsetting the full-load line spacing with Rm lines and adjusting the line spacing vicinity; then, the front and rear FAS are considered to be credible and are frame synchronization headers of two consecutive ODUs 2, and the row position of the rear ODU2 FAS is recorded as Rn;

starting from the Rn row, shifting the full-load row spacing and adjusting the row spacing, if FAS characteristic information can be found nearby, shifting the full-load row spacing and adjusting the row spacing based on the position, and thus iterating for many times to successfully scan the FAS characteristic information, one of the ODU2 FAS is confirmed; the actions of the previous step are repeated from the next row of Rm, and FAS of other ODU2 are also scanned and confirmed; if the iteration is not matched for multiple times, the FAS scanned by the Rm line is not trusted, and the actions of the steps are continued from the Rm +1 line until the analysis code stream finishes the FAS traversal scanning of different ODUs 2.

Specifically, the 8 logical TSs occupied by the ODU2 are not in a complete order and are arbitrarily selected according to a standard protocol.

Specifically, the MFAS TS location analysis specifically includes:

according to the frame structure of the ODU2, after FAS is MFAS information, the MFAS also occupies a different logical TS, the MFAS sequentially circulates in 256, returns to the 0 number and restarts after reaching 256, the FAS scans the FAS row position where each ODU2 has been recorded, finds the data content of the logical TS in the row data, and if the data sequence is incremented and within 256, the MFAS and the FAS are matched.

Specifically, the ODU0 occupies one logical TS of the ODU4, and all FAS of the ODU0 are in the logical TS; the ODU1 occupies two logical TSs of the ODU4, and the FAS of the ODU1 also occupies the two logical TSs; the rate-adjusted padding block of the ODU0 mapped to the ODU4 is one byte, so FAS may be split by the padding block, and the rate-adjusted padding block of the ODU1 mapped to the ODU4 is two bytes, and FAS is also split by the padding block; the ODU0/ODU1 can scan FAS distribution to confirm the number and position of logical TSs, and the algorithm is the same as the previous ODU2 FAS scanning process, except that the matching rule of FAS, the full-load line spacing and the calculation of the adjusted line spacing are different; OA1 and OA2 in ODU0/ODU1 FAS span multiple rows of a matrix block M, and column data of multiple adjacent rows are needed to be judged together;

the ODU3 occupies 31 logical TSs of the ODU4, and a padding block of rate adjustment of the ODU3 mapped to the ODU4 is 31 bytes; if the FAS of the first ODU3 falls in the 13 th TS position at (4 × 3824)%31 of the 31 logical TSs, only 31 consecutive ODUs 3 are needed, and the FAS of the ODU3 will traverse all 31 logical TSs; the cyclic rule for FAS of consecutive ODU3 to fall at 31 logical TSs is as follows: 13,26,8,21,3,16,29,11,24,6,19,1,14,27,9,22,4,17,30,12,25,7,20,2,15,28,10,23,5,18, 0; therefore, FAS distribution is scanned in 480 logical TSs of the ODU, and logical TSs occupied by FAS are arranged longitudinally in 31 rows, and if a plurality of FAS are distributed in the above rule, FAS belongs to ODU3, and all logical TSs occupied by ODU3 can be confirmed by 31 FAS.

Specifically, the ODU2 is mapped to the ODU4, and the ODU2 occupies ODU48 logical TSs. According to a rule that ODU2 bytes are multiplexed to ODU4 logical TS, FAS of ODU2 is distributed in 6 different logical TS of ODU4, MFAS is distributed in another logical TS, and 7 logical TS occupied by ODU2 can be confirmed only by the distribution rule of FAS and MFAS. For the remaining one logic TS, a traversal attempt method is adopted, all remaining logic TSs are assumed to be the current ODU2 logic TS one by one, the assumed logic TS and the previous 7 clear logic TSs are combined to analyze the ODU2, and if the frame lengths of the ODU2 are matched and the overhead information matches the protocol specification, it is indicated that the assumed logic TS belongs to the current ODU 2.

According to the standard protocol, the GMP regulation control information of each low-rate ODUj is carried in JC information in the OPUk overhead when the number of the ODU4 multiframe is the maximum logical TS number occupied by the ODU overhead. Overhead information preprocessing is mainly used for acquiring the number of ODUj structure objects mapped in the ODU4, a logic TS with the largest number occupied by each structure object ODUj, and GMP (good manufacturing practice) adjustment control information of each structure object ODUj according to JC information in the ODU4 OPUk overhead. The GMP scaling control information is mainly used to remove padding blocks when the ODU4 parses the ODUj.

FAS TS location analysis mainly confirms 6 logical TSs occupied by the structural objects according to the distribution rule of FAS.

The MFAS TS location analysis is mainly to find the MFAS information to identify the 7 th logical TS based on the row location of the previous FAS record.

According to the FAS TS position and the MFAS TS position, 7 logic TSs of the ODU2 structure object are confirmed, the remaining logic TSs are combined into the 7 logic TSs which are already clear through a circulating attempt, the ODU4 analyzes the ODU2 through a GMP algorithm by using JC information obtained through overhead preprocessing, and the last logic TS is confirmed according to the specification of analyzing the ODU2 frame length and an overhead domain.

FAS TS position analysis adopts a scanning FAS based on prediction line spacing and an iterative matching method:

the ODU2 mapped by the ODU4 may load the STM64 entirely, while the frame header of STM64 is FAS × 64 information, and there are a lot of OA1 and OA2, and in addition, the payload information of the ODU2 may also exist OA1(0XF6) or OA2(0x 28). In order to eliminate interference information and avoid FAS misjudgment, prediction-based line spacing scanning and iterative matching are adopted.

The ODU4 has 80 logical TSs, and the allocation rule is that each byte occupies a different logical TS from top to bottom and from left to right in the OPUk payload (except FS) area, and the 80 logical TS numbers repeat cyclically. The ODUj with low rate is mapped to the ODTU through GMP/AMP, and each byte of the ODTU is multiplexed into the logic TS correspondingly allocated to the ODU4 from left to right from top to bottom. The ODU0/ODU1/ODU2/ODU3 are mapped to the ODU4 by adopting GMP, the distribution of ODTU effective data blocks can be obtained in JC information through calculation, the effective data blocks are filled with block intervals, and the removal of the filling blocks is the low-rate ODUj information. Here, the OPUk payload (divided FS) extraction ODTU of a plurality of ODU4 frames is first converted into a matrix block M of 80 bytes line width. As shown in fig. 5, for matrix block M, assume column numbers C0, C1,. C79, and row numbers R0, R1, R2 …. The ODU2 in a row occupies 8 bytes of 8 logical TSs to form a Block, which is numbered B0, B1, B2, and then B7. Here, the 8 logical TSs occupied by the ODU2 are not completely sequential, and can be arbitrarily selected according to the standard protocol. And determining a certain Block location in the matrix Block by RiBj, wherein Ri is the ith row, and Bj is the jth Block in the row.

Distribution of FAS of ODU2 at matrix block M: according to the ODU2 standard frame length is 4 × 3824 bytes, if an FAS of ODU2 appears in Ri row of matrix block M and ODU2 is full load multiplexing to ODTU, where full load indicates no padding block, the FAS position of the next ODU2 must be found in Ri + (4 × 3824)/8 row of matrix block M. According to the standard frame length of the ODU2, each row of the matrix block M only occupies 8 logical TSs according to the ODU2, and the calculated row spacing (4 × 3824)/8 is called as the full row spacing. In an actual scene, all ODUs 2 have some rate adjustment through a GMP algorithm, and in an ODTU, some filling blocks, the next ODU2 FAS can be found only after the full line spacing is adjusted, and the adjusted line spacing depends on the rate adjustment information calculated by the JC.

FAS scanning position can be quickly and effectively determined based on the predicted line spacing, namely by using full-load line spacing and adjusting the line spacing as reference line spacing.

An ODTU stripped 8-byte padding block parsed by the ODU4 is an ODU2, an ODU2 standard frame length is again a multiple of 8, and if FAS of the ODU2 is not split by the padding block, FAS of multiple consecutive ODUs 2 loaded in the ODTU is not split by the padding block, and then a logic TS allocated to the FAS, three OA1 of the FAS, and three OA2 are sequentially connected together. Considering that 8 logical TSs occupied by one ODU2 may be arbitrary, when scanning 80 logical TSs in a row, bytes in other logical TSs are separated between OA1, between OA2, and between OA1 and OA2, that is, OA1 or OA2 found in 80 bytes in a row may be sequentially placed in a circular queue, and whether FAS characteristic information can be found is determined according to circular continuous data in the circular queue.

The whole processing process can be divided into the following logic processing steps:

the first step is as follows: scanning 80 bytes from the initial row of the matrix block M, recording OA1 or OA2 information and positions, recording the current behavior Rm if FAS characteristic information exists, and continuing to start from the next row if the FAS characteristic information is not found in the current row;

the second step is that: adjusting control information JC of an ODUj with a different structure object is carried by an ODU4 whose maximum logical TS number is occupied by the ODUj through a multiframe number, it is confirmed in a first step that there are 6 logical TS numbers occupied by the FAS information, and if an ODU4 multiframe number matched with the JC can be found, JC adjusting control information of the ODU4 multiframe controls the ODUj; roughly calculating adjustment line spacing information according to JC, if next ODU2 FAS characteristic information can be found by shifting full line spacing by Rm lines and adjusting the line spacing vicinity, the front and rear FASs are credible and serve as frame synchronization heads of two front and rear continuous ODUs 2, and the line position of the rear ODU2 FAS is recorded as Rn;

the third step: starting from the Rn row, the full-load row spacing and the adjusted row spacing are shifted, if FAS characteristic information can be found nearby, the full-load row spacing and the adjusted row spacing are shifted based on the position, and thus, the FAS characteristic information is successfully scanned repeatedly, and one ODU2 FAS is confirmed. And (4) the step action is repeated from the next row of Rm, FAS of other ODU2 are also scanned and confirmed, if iteration is not matched for several times, FAS scanned by the Rm row is not trusted, and the step action is continuously started from the Rm +1 row until certain code stream is analyzed to finish scanning FAS of different ODU 2.

Performing MFAS scan matching processing based on the determined FAS location row:

after scanning FAS of all ODUs 2 based on predicted line spacing and iterative matching, 6 logic TSs of each ODU2 are confirmed, according to the frame structure of the ODU2, after FAS is MFAS information, the MFAS also occupies a different logic TS, the MFAS sequentially circulates in 256, returns to the 0 number and restarts after reaching 256, and the position of the MFAS and the corresponding logic TS are confirmed according to the characteristic.

Since the FAS row position of each ODU2 has been recorded in the previous FAS scan, if the data content of a certain logical TS is found sequentially increasing and within 256 within the row data, then MFAS and FAS match.

By adopting the FAS based on predicted line spacing scanning and the iterative matching method, interference information can be eliminated, and FAS misjudgment can be avoided.

As shown in fig. 6, the FAS row position of each ODU2 is recorded previously, and the row positions of all FAS of a certain ODU2 are traversed, if the number in a certain logical TS of the corresponding row has a sequentially increasing characteristic, then the logical TS is the MFAS of the current ODU2, and as TS78 has the characteristic, the current ODU2 may explicitly include several logical TS: TS1, TS3, TS5, TS72, TS74, TS76, TS 78. And traversing the current ODU2, and reprocessing other ODU2 FAS rows based on the same algorithm until the MFAS of all ODUs 2 is determined.

Resolving the ODUj based on the combined residual TS:

6 logic TSs occupied by ODU2 are obtained based on prediction line spacing scanning FAS and iterative matching, a 7 th logic TS is obtained by performing MAS scanning matching on a recording FAS line, and combined analysis needs to be tried for determining the last logic TS of ODU 2; firstly, 7 logic TSs of all ODUs 2 are found, and the set of the remaining logic TSs is reduced to the maximum extent; traversing a set of the remaining logical TSs through each logical TS and 7 explicit logical TS combinations of the ODU2, resolving the ODU2 through the ODU4 GMP, determining whether the frame format of the ODU2 matches the standard, and whether the JC domain of the sixteenth column of the ODU2 matches the standard specification, if all the frames are matched, selecting the traversed logical TS to be the 8 th logical TS of the ODU2, and analyzing JC to fall on the 8 th logical TS according to theory because JC of the ODU2 is in the sixteen columns.

ODU3 FAS distribution strong rule matching:

in an actual OTN line, ODU0/ODU1/ODU3 can be mapped to ODU 4. The ODU0 occupies one logical TS of the ODU4, and all FAS of the ODU0 are in the logical TS. The ODU1 occupies two logical TSs of the ODU4, and the FAS of the ODU1 also occupies the two logical TSs. The ODU0 is mapped to the ODU4 with its rate-adjusted padding block being one byte, so FAS may be split by the padding block, and the ODU1 is mapped to the ODU4 with its rate-adjusted padding block being two bytes, and FAS is also split by the padding block. The ODU0/ODU1 can scan FAS distribution to confirm the number and location of logical TSs, and the algorithm is the same as the previous ODU2 FAS scanning process, except that the matching rule, full line spacing and adjusted line spacing calculation of FAS are different. OA1 and OA2 in ODU0/ODU1 FAS span multiple rows of the matrix block M, and multiple column data of adjacent rows are needed to judge together.

The ODU3 occupies 31 logical TSs of the ODU4, and the rate-adjusted padding block of the ODU4 mapped to the ODU3 is 31 bytes. If the FAS of the first ODU3 falls in the 13 th TS position at (4 × 3824)%31 of the 31 logical TSs, only 31 consecutive ODUs 3 are needed, and the FAS of the ODU3 will traverse all 31 logical TSs. Even if there is a padding block in the middle, it does not affect because the padding block is 31 bytes. The circular law that FAS of consecutive ODUs 3 falls within 31 logical TSs is as follows:

13,26,8,21,3,16,29,11,24,6,19,1,14,27,9,22,4,17,30,12,25,7,20,2,15,28,10,23,5,18,0. Therefore, FAS distribution is scanned in 480 logical TSs of the ODU, and logical TSs occupied by FAS are arranged longitudinally in 31 rows, and if a plurality of FAS are distributed according to the above rule, FAS is certainly owned by ODU3, and all logical TSs occupied by ODU3 can be confirmed by 31 FAS.

For more effective processing, for ODU0/ODU1/ODU2/ODU3 mapped by ODU4, preferentially identifying ODU0, secondly identifying ODU1, secondly identifying ODU3, and lastly identifying ODU 2. For the ODU0/ODU1/ODU3, confirmation can be performed only according to FAS distribution.

The invention proposes:

one is as follows: based on the predicted line spacing scanning FAS and iterative matching, FAS scanning position information of different ODUj is predicted through ODUk adjustment control information, meanwhile, strong judgment is carried out through iterative matching, and accurate and efficient identification of FAS is guaranteed;

the second step is as follows: based on the determined FAS position, performing MFAS scanning matching, and performing MFAS scanning on the corresponding line through the FAS line position information recorded above to ensure that FAS and MFAS are matched with each other;

analyzing the normalization of the ODUj based on the combined residual TS, determining the occupied logic TS of the current ODUj through FAS and MFAS, traversing the combination of the residual logic TS and the occupied logic TS, and determining the final logic TS through the analyzed normalization of the ODUj;

fourthly, an ODU3 FAS distribution strong rule is matched, for ODU3 mapped by ODU4, because ODU3 occupies 31 logic TSs, the ODU3 standard frame length is fixed, a filling block is also 31 bytes, FAS distribution follows a certain rule in 31 logic TSs, and ODU3 is identified accurately and efficiently based on the rule.

The invention can realize the identification of all multiplexing ODUj structures in the OTN signal, and has the following advantages:

(1) FAS scanning and iterative matching are carried out based on the predicted line spacing, so that the universality is stronger, the accuracy is high, and the processing is relatively simple; the mapped ODU0/ODU1/ODU3 can be effectively identified and processed no matter single or multiple mixtures; the application is not limited to software implementation, and is also suitable for hardware implementation, so that the adaptability is strong;

(2) performing MFAS scanning matching design based on the determined FAS position and analyzing ODUj normative design based on the combined residual TS, so that the method is suitable for relatively complex ODU2 recognition and completes recognition of all different ODUj;

(3) the OTN can complete service signal transmission, multiplexing and monitoring in an optical domain. The OTN converges all the advantages of SDH and WDM network technologies, and at present, OTN networks are applied more and more in commercial scale, and accordingly, the application of OTN line signal analysis is more and more important. The identification of the multiplexed structure objects is a key step of signal analysis of the OTN line, and if the multiplexed structure objects are not identified or misjudged, the OTN line cannot be effectively analyzed. The invention can identify the structural object mapped by the OTN under the condition that the MSI information of the OTN is invalid, and has important application value.

The technical solution of the present invention is not limited to the limitations of the above specific embodiments, and all technical modifications made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims (4)

1. A method for identifying different mapping rates ODU of an OTN signal is characterized by comprising the following steps:

overhead information preprocessing: acquiring the number of ODUj structure objects mapped in an optical channel data unit ODU4, a logical branch slot TS with the largest number occupied by each structure object optical channel data unit jODUj, and GMP (generalized mapping rule) regulation control information of each structure object optical channel data unit jODUj according to regulation control JC information in an optical channel data unit 4ODU4 optical channel payload unit k overhead OPUk overhead; the GMP adjustment control information of the generic mapping procedure is used to remove the padding block when the optical channel data unit 4ODU4 parses the optical channel data unit jODUj;

analyzing the position of a frame positioning signal branch position FAS TS: predicting scanning position information of a frame positioning signal FAS of a jODUj of different optical channel data units through adjusting control information of the optical channel data units kODUk, carrying out strong judgment through iterative matching, and determining a logical branch slot position TS occupied by a structural object of the frame positioning signal FAS according to a distribution rule of the frame positioning signal FAS;

analyzing the position of a multiframe positioning signal branch slot position MFAS TS: scanning and matching to find out multiframe positioning signal MFAS information according to the line position information recorded by the frame positioning signal FAS to confirm the next logic branch slot position TS;

analyzing the residual branch slot position TS: combining the remaining logical tributary slot TS into the already-defined logical tributary slot TS through a cyclic attempt, analyzing an optical channel data unit 2ODU2 by an optical channel data unit 4ODU4 through a general mapping procedure GMP algorithm by using adjustment control JC information obtained by overhead preprocessing, and determining the final logical tributary slot TS according to the frame length and the overhead domain of the analyzed optical channel data unit 2ODU 2;

the analysis of the position of the frame positioning signal branch slot FAS TS is a method for scanning the frame positioning signal FAS based on the predicted line spacing and iterative matching, and comprises the following steps:

known optical channel data unit 0ODU 0/optical channel data unit 1ODU 1/optical channel data unit 2ODU 2/optical channel data unit 3ODU3 is mapped to optical channel data unit 4ODU4 by using a common mapping rule GMP, effective data block distribution of an optical data tributary unit ODTU is obtained by calculation in adjustment control JC information, and the effective data blocks are subjected to block interval filling and block filling removal to obtain jODUj information of a low-rate optical channel data unit; converting an optical channel payload unit k overhead OPUk payload extraction optical data tributary unit ODTU, which does not include FS, of a plurality of optical channel data unit 4ODU4 frames into a matrix block M of 80 bytes in line width; let the column numbers of matrix Block M be C0, C1,. C79, row numbers be R0, R1, R2 …, optical channel data unit 2ODU2 in a row occupy 8 bytes of 8 logical tributary slot TS to combine into a Block, Block is numbered B0, B1, B2 to B7 in sequence, Block positioning in matrix Block M is determined by row column values Ri and Bj, Ri is ith row, Bj is jth Block in the row, then next optical channel data unit 2 frame positioning signal ODU2 FAS is found by adjusting row spacing based on rate adjustment information calculated by adjustment control JC after full row spacing;

scanning 80 bytes from the initial row of the matrix block M, recording OA1 or OA2 information and positions, and recording the current action Rm if frame alignment signal FAS characteristic information exists; if the FAS characteristic information of the frame positioning signal is not found in the current line, continuing to start from the next line;

the regulation control information regulation control JC of the optical channel data unit jODUj of a different structure object is carried by a multiframe of a certain optical channel data unit 4ODU 4; specifically, which optical channel data unit 4ODU4 multi-frame is carried is the ODU4 with the multi-frame number that the optical channel data unit jODUj occupies the maximum logical tributary slot TS number; in the first step, the information of the frame alignment signal FAS has 6 logical tributary slot TS numbers occupied by it, where if an optical channel data unit 4ODU4 multiframe number matching with an alignment control JC can be found, the alignment control JC alignment control information of the optical channel data unit 4ODU4 multiframe controls this optical channel data unit jODUj; adjusting line spacing information can be roughly calculated according to the adjusting control JC, and if the next optical channel data unit 2 frame positioning signal ODU2 FAS characteristic information can be found by shifting the full line spacing by Rm lines and adjusting the vicinity of the line spacing; then, the two frame alignment signals FAS before and after are considered to be trusted and are frame synchronization headers of two consecutive optical channel data units 2ODU2, and a row position of a frame alignment signal ODU2 FAS of the next optical channel data unit 2 is recorded as Rn;

starting from the Rn row, shifting the full-load row spacing and adjusting the row spacing, if the characteristic information of the frame alignment signal FAS can be found nearby, shifting the full-load row spacing and adjusting the row spacing based on the position, and thus iterating many times to successfully scan the characteristic information of the frame alignment signal FAS, one of the optical channel data units j is confirmed by the frame alignment signal ODU2 FAS; the above steps are repeated from the next row Rm, and frame alignment signals FAS of other optical channel data units 2ODU2 are also scan-confirmed; if the iteration is not matched for multiple times, the frame alignment signal FAS scanned on the Rm line is not trusted, and the above steps are continued from the Rm +1 line until the analysis code stream completes traversal scanning of the frame alignment signal FAS of the different optical channel data units 2ODU 2.

2. The method according to claim 1, wherein 8 logical tributary slot bits TS occupied by the optical channel data unit 2ODU2 are in a non-complete order and are arbitrarily selected according to a standard protocol.

3. The method according to claim 1, wherein the analyzing of the positions of the multi-frame positioning signal tributary slots MFAS TS specifically includes:

according to the frame structure of the optical channel data unit 2ODU2, the frame locating signal FAS is followed by the information of the multiframe locating signal MFAS, and then the multiframe locating signal MFAS also occupies a different logical tributary slot TS, the multiframe locating signal MFAS circulates sequentially within 256, returns to the 0 number and restarts again after reaching 256, the frame locating signal FAS scans the row position of the frame locating signal FAS, where each optical channel data unit 2ODU2 has been recorded, finds the data content of the logical tributary slot TS within the row data, and if the data sequence increases incrementally and within 256, the multiframe locating signal MFAS matches the frame locating signal FAS.

4. The method according to claim 1, wherein the optical channel data unit 0ODU0 occupies one logical tributary slot TS of the optical channel data unit 4ODU4, and all frame alignment signals FAS of the optical channel data unit 0ODU0 are in the logical tributary slot TS; the optical channel data unit 1ODU1 occupies two logical tributary slot TS of the optical channel data unit 4ODU4, and the frame alignment signal FAS of the optical channel data unit 1ODU1 also occupies the two logical tributary slot TS; optical channel data unit 0ODU0 maps to optical channel data unit 4ODU4, and its rate-adjusted padding block is one byte, so frame alignment signal FAS may be split by the padding block, optical channel data unit 1ODU1 maps to optical channel data unit 4ODU4, and its rate-adjusted padding block is two bytes, and frame alignment signal FAS is also split by the padding block; optical channel data unit 0ODU 0/optical channel data unit 1ODU1 may both scan the distribution of frame alignment signal FAS to determine the number and position of logical tributary slots TS, and the algorithm is the same as the scanning process of previous optical channel data unit 2 frame alignment signal ODU2 FAS, except that the matching rule, full row spacing, and adjusted row spacing of frame alignment signal FAS are not the same; OA1 and OA2 in optical channel data unit 0/optical channel data unit 1 frame positioning signal ODU0/ODU1 FAS span multiple rows of matrix block M, and need column data of multiple adjacent rows to judge together;

the optical channel data unit 3ODU3 occupies 31 logical tributary slot TS of the optical channel data unit 4ODU4, and a rate-adjusted padding block mapped by the optical channel data unit 3ODU3 to the optical channel data unit 4ODU4 is 31 bytes; if the frame alignment signal FAS of the first optical channel data unit 3ODU3 falls at (4 × 3824)%31 of the 31 logical tributary slot TS positions, which is the 13 th tributary slot TS position, only 31 consecutive optical channel data units 3ODU3 are needed, and the frame alignment signal FAS of the optical channel data unit 3ODU3 traverses all 31 logical tributary slot TS; the cycle rule that the frame locating signal FAS of the continuous optical channel data unit 3ODU3 falls in 31 logical tributary slot bits TS is as follows: 13,26,8,21,3,16,29,11,24,6,19,1,14,27,9,22,4,17,30,12,25,7,20,2,15,28,10,23,5,18, 0; therefore, frame alignment signals FAS are scanned in 480 logical tributary slot TS of the optical channel data unit 4ODU to be distributed, and the frame alignment signals FAS occupying the logical tributary slot TS are arranged longitudinally in 31 lines, and if a plurality of consecutive frame alignment signals FAS are distributed according to the above rule, the frame alignment signals FAS belong to the optical channel data unit 3ODU3, and all the logical tributary slot TS occupied by the optical channel data unit 3ODU3 can be confirmed by the consecutive 31 frame alignment signals FAS.

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