CN112954849A

CN112954849A - APFC boost circuit-based novel constant-voltage framework evolution circuit system for dimming and color mixing

Info

Publication number: CN112954849A
Application number: CN202110416106.XA
Authority: CN
Inventors: 李伟; 陈耀显; 林炜旭
Original assignee: Jiangmen Huahuihui Intelligent Power Technology Co ltd
Current assignee: Jiangmen Huahuihui Intelligent Power Technology Co ltd
Priority date: 2021-04-19
Filing date: 2021-04-19
Publication date: 2021-06-11

Abstract

The invention relates to the technical field of APFC booster circuits, and discloses a novel constant-voltage framework evolution circuit system for dimming and color mixing based on an APFC booster circuit, which comprises an active power factor correction APFC control circuit, wherein the active power factor correction APFC control circuit is electrically connected with a PWM 1-cold color signal control circuit, and can be compatible with various dimming and color mixing control modes through MOS control output, wherein the dimming and color mixing control modes comprise PLC power carrier dimming and color mixing, 0-10V dimming and color mixing, DALI dimming and color mixing, ZigBee dimming and color mixing, Bluetooth dimming and color mixing, 2.4G dimming and color mixing and the like, and when the dimming and color mixing control modes are carried out, the single dimming can be realized, the dimming and color mixing operation can be carried out on the basis of re-dimming, the dimming and color mixing operations can be carried out independently, so that the application of LED high-voltage direct current lamp belts which can not be compatible with various dimming, the large-scale application of the subsequent high-voltage lamp strip is greatly improved, and the effect of more dimming scene applications is brought to the subsequent high-voltage lamp strip industry.

Description

APFC boost circuit-based novel constant-voltage framework evolution circuit system for dimming and color mixing

Technical Field

The invention relates to the technical field of APFC boost circuits, in particular to a novel constant-voltage framework evolution circuit system for dimming and color mixing based on an APFC boost circuit.

Background

The commercial power is directly connected to the LED high-voltage lamp strip after passing through the rectifier bridge stack, the output power of the circuit control mode can change along with the fluctuation change of the input voltage and can not be constant, when the input voltage is higher, the lamp beads on the high-voltage lamp strip at the output end are damaged due to higher power and serious heating or light attenuation, the power frequency flicker is serious, and no output protection function exists, the commercial power outputs a large electrolytic capacitor after passing through the rectifier bridge stack and is connected to the LED high-voltage lamp strip, the output power of the circuit control mode can change along with the fluctuation change of the input voltage and can not be constant, the circuit control mode has no output protection function except that the lamp beads on the lamp strip are easily damaged, the power factor is only 0.5 and does not meet the requirement of Chinese mandatory products, and the circuit control mode is that a switching power supply constant voltage and no stroboscopic circuit outputs 200-220V of the high-voltage lamp strip, the traditional single-stage APFC circuit cannot be verified through a short circuit test so as not to meet the requirements of the mandatory product in China, and the application of the circuit is restricted.

To the problems, through research and tests, a novel constant-voltage framework evolution circuit system for dimming and color mixing based on an APFC booster circuit is provided, the system can realize that the power factor is more than 0.95, the PWM dimming frequency is more than 3125Hz, the system belongs to a non-stroboscopic high-frequency exemption standard, the standard requirement of Chinese mandatory products is met, the cost performance is high, the dimming function application can be realized, the national standard short-circuit test requirement can be met, the application that the LED high-voltage direct-current lamp strip cannot be compatible with various dimming is realized, the innovation of the old technology is broken, the large-scale application of the subsequent high-voltage lamp strip is greatly improved, and meanwhile, the application of more dimming scenes is brought to the subsequent high-voltage lamp strip industry.

Disclosure of Invention

Technical problem to be solved

Aiming at the defects of the prior art, the invention provides a novel constant voltage framework evolution circuit system for dimming and color modulation based on an APFC booster circuit, which not only can realize that the power factor is more than 0.95, the PWM dimming frequency is more than 3125Hz, the circuit system belongs to a non-stroboscopic high-frequency exemption standard, meets the standard requirement of Chinese mandatory products, has higher cost performance, can realize dimming function application, can meet the requirement of national standard short circuit test, and realizes the application that the LED high-voltage direct-current lamp strip cannot be compatible with various dimming, breaks through the innovation of the old technology, greatly improves the large-scale application of subsequent high-voltage lamp strips, simultaneously brings the application of more dimming scenes for the subsequent high-voltage lamp strip industry, solves the problems that the traditional LED high-voltage lamp strip is difficult to realize dimming and can be compatible with various dimming mode control, and the circuit structure is complex or the price is high, the circuit structure can not be widely popularized and applied, and the short-circuit protection function can not be realized by singly using APFC output.

(II) technical scheme

In order to realize the purposes that the power factor can be realized by more than 0.95, the PWM dimming frequency is more than 3125Hz, the standard is a stroboflash-free high-frequency exemption standard, the standard requirement of Chinese mandatory products is met, the cost performance is high, the dimming function application can be realized, the national standard short circuit test requirement can be met, the LED high-voltage direct-current lamp strip cannot be compatible with various dimming applications, the innovation of the old technology is broken, the large-scale application of subsequent high-voltage lamp strips is greatly improved, and more dimming scenes are applied to the subsequent high-voltage lamp strip industry, the invention provides the following technical scheme: the utility model provides a novel constant voltage framework evolution circuit system of adjusting luminance and mixing of colors based on APFC boost circuit, includes active power factor correction APFC control circuit, active power factor correction APFC control circuit electricity is connected with PWM 1-cold color signal control circuit, PWM 1-cold color signal control circuit electricity is connected with PWM 2-warm color signal control circuit, PWM 2-warm color signal control circuit electricity is connected with PWM 2-warm color driving capability reinforcing circuit, PWM 2-warm color driving capability reinforcing circuit electricity is connected with MCU mixing of colors control module of adjusting luminance, MCU mixing of colors control module electricity is connected with PWM 1-cold color driving capability reinforcing circuit, MCU mixing of colors control module electricity is connected with the mixing of colors control module power supply circuit of adjusting luminance.

As a further optimization, the active power factor correction APFC control circuit, the live line L of the ac voltage is electrically connected to a fuse F1, the fuse F1 is electrically connected to a varistor MOV1, the thermistor RT1 is electrically connected to a varistor MOV1, the fuse F1 is electrically connected to a boost inductor T3, the boost inductor T4 is electrically connected to a power input anti-interference capacitor CX2, the boost inductor T1 is electrically connected to an LF2, the LF2 is connected to a power input anti-interference capacitor CX2 connected in series with the boost inductor T3, the power input anti-interference capacitor CX2 is electrically connected to a resistor R14, the power input anti-interference capacitor CX2 is electrically connected to a resistor R13, the resistor R14 is electrically connected to a resistor R13, the resistor R14 is electrically connected to a coil CX, the resistor R13 is electrically connected to a coil, the coil is electrically connected to an LF1, the LF1 is electrically connected to a power input anti-interference capacitor 1, the coil is connected with LF1 series power input anti-jamming capacitance CX1 electricity, power input anti-jamming capacitance CX1 is connected with alternating current AC electricity, power input anti-jamming capacitance CX1 with alternating current AC electricity be connected, alternating current AC is connected with electric capacity C3 electricity, alternating current AC is connected with live wire L1 electricity, alternating current AC is connected with live wire L1 series capacitance C3 electricity, alternating current AC is connected with electric capacity C1 and diode D1 electricity, electric capacity C1 is connected with the diode electricity, alternating current AC is connected with ground electricity, ground wire is connected with diode D3 electricity, ground wire is connected with boost inductance T1 electricity, diode D3 is connected with resistance R2 electricity, diode D3 is connected with diode D4 electricity, boost inductance T1 eight port is connected with source supply voltage VSS electricity, supply voltage VSS is connected with electric capacity C5 electricity, electric capacity C5 is connected with resistance R2 electricity, the diode D3 is electrically connected with a power supply voltage VSS capacitor C5, the diode D3 is electrically connected with a power supply voltage VSS and a resistor R2, the source power supply voltage VSS is electrically connected with a resistor R5, the resistor R5 is electrically connected with a zero current detection input ZCD, the diode D4 is electrically connected with a resistor R3, the diode D4 is electrically connected with a gate discharge tube Q2 of a field tube M1, the resistor R3 is electrically connected with a zener diode ZD1, the zener diode ZD1 is electrically connected with a ground line, the zener diode ZD1 is electrically connected with a gate Q2 of the field tube M1, a gate discharge tube Q2 of the field tube M1 is electrically connected with an operating voltage VCC inside the device, an operating voltage VCC inside the device is electrically connected with a capacitor C6, an operating voltage VCC inside the device is electrically connected with an operating voltage VCC8 terminal inside the device, the live wire L1 is electrically connected with a resistor R4, and the resistor R4 is electrically connected with a resistor R9, the resistor R9 is electrically connected to a resistor R17, the resistor R9 is electrically connected to a capacitor C8, the resistor R8 is electrically connected to a capacitor C8, the capacitor C8 is electrically connected to a voltage U8, the capacitor C8 is electrically connected to an internal multiplier input terminal MULT 8, the ground GND 8 is electrically connected to the voltage U8, the comparator COMP 8 is electrically connected to an inverting input terminal INV 8 of the error amplifier and the capacitor C8, the comparator COMP 8 is electrically connected to a resistor 23, the resistor 23 is electrically connected to the capacitor C8 at the inverting input terminal INV 8 of the error amplifier, the capacitor C8 is electrically connected to the resistor R8, the capacitor C8 is electrically connected to a five-port boost inductor T8, a three-port of the boost inductor T8 is electrically connected to a diode D8, a three-port of the boost inductor T8 is electrically connected to a shunt-type reference circuit Q8, the shunt-type shunt-reference circuit Q8 is electrically connected to the shunt-type shunt-8 in parallel with the resistor R8, the resistor R10 is electrically connected with the end of the gate drive output terminal GD7, the resistor R8 is electrically connected with the resistor R16, the resistor R16 is electrically connected with the end of the current detection input terminal CS4, the resistor R16 is electrically connected with the resistor R22, the resistor R22 is electrically connected with the resistor R21, the resistor R21 and the resistor R21 in parallel, the resistor 22, the resistor R21 and the resistor R21 are electrically connected with the ground wire, the cathode of the diode D21 is electrically connected with the capacitor C21 and the capacitor C21 in parallel, the capacitor C21 is electrically connected with the boost large electrolyte, the boost large electrolyte is electrically connected with the capacitor C21, the diode D21 is electrically connected with the source power supply voltage VSS, the source power supply voltage VSS is electrically connected with the resistor R21, the resistor R21 is electrically connected with the resistor R21.

As a further optimization, the PWM 1-cold signal control circuit includes a Q1 shunt-type reference circuit, the Q1 shunt-type reference circuit is electrically connected to a resistor R1, the resistor R1 is electrically connected to a resistor R6, the resistor R6 is electrically connected to the negative electrode of the LED1, the resistor R1 is electrically connected to an OC, and the OC is electrically connected to a resistor Res.

As a further optimization, the PWM 2-warm signal control circuit includes a Q4 shunt-type reference circuit, the Q4 shunt-type reference circuit is electrically connected to a resistor R25, the resistor R26 is electrically connected to the resistor R1, the resistor R6 is electrically connected to the resistor R26, and the negative electrode of the LED2 is electrically connected to the resistor R26.

As a further optimization, the PWM 2-warm driving capability enhancement circuit includes an IGBT driver chip U3, the IGBT driver chip U3 is divided into five pins, which are respectively a pin 1 of U3, a pin 2 of U3, a pin 3 of U3, a pin 4 of U3, a pin 5 of U3, the pin 1 of U3 is connected to a voltage of 15V, the pin 3 of U3 is electrically connected to a resistor R26, the pin 4 of U3 is electrically connected to a ground line, and the pin 5 of U3 is electrically connected to the MCU dimming and color adjustment control module.

As a further optimization, the MCU dimming and toning control module comprises a PLC power carrier dimming and toning unit, a 0-10V dimming and toning unit, a DALI dimming and toning unit, a ZigBee dimming and toning unit, a Bluetooth dimming and toning unit and a 2.4G dimming and toning unit, wherein the MCU dimming and toning control module is electrically connected with an open collector output end OC, and the MCU dimming and toning control module is electrically connected with a ground wire.

As a further optimization, the PWM 1-cold color driving capability enhancement circuit includes an IGBT driver chip U4, the IGBT driver chip U4 is divided into five pins, which are respectively a U4 pin 1, a U4 pin 2, a U4 pin 3, a U4 pin 4, and a U4 pin 5, the IGBT driver chip U4 is electrically connected to a capacitor C13, the capacitor C13 is electrically connected to a zener diode ZD2, the zener diode ZD2 is electrically connected to a Q5 shunt-type reference circuit, the Q5 shunt-type reference circuit is electrically connected to a resistor R27, the Q5 shunt-type reference circuit is electrically connected to a resistor R28, the resistor R28 is electrically connected to a diode D8, the U4 pin 1 is connected to a voltage of 15V, the U4 pin 3, the U4 pin 4 is electrically connected to a capacitor C13, and the U4 pin 5 is electrically connected to a ground line.

As a further optimization, the power supply circuit of the dimming and toning control module includes an IGBT driver chip U1, the IGBT driver chip U1 is divided into eight pins, which are respectively a U1 pin 1, a U1 pin 2, a U1 pin 3, a U1 pin 4, a U1 pin 5, a U1 pin 6, a U1 pin 7, a U1 pin 8, a U1 pin 1 is electrically connected with a capacitor C7, a U1 pin 1 is electrically connected with a resistor R12, a resistor R12 is electrically connected with a diode D6, a U1 pin 2 is electrically connected with a diode D7, a U1 pin 2 is electrically connected with a live wire L2, a U1 pin 3 is electrically connected with a TVS1, a capacitor C11, a capacitor C10, a U1 pin 4, a U1 pin 5, a U1 pin 6, a U1 pin 7, and a U1 pin 8 are electrically connected with a ground wire.

As a further optimization, the PWM 1-cold color signal control circuit and the PWM 2-warm color signal control circuit are collectively referred to as a PWM dimming signal control circuit, and the PWM 1-cold color driving capability enhancement circuit and the PWM 2-warm color driving capability enhancement circuit are collectively referred to as a PWM driving capability enhancement circuit, which develops two branch circuits on the basis of dimming, and the dimming circuit can work independently and simultaneously realize the functions of dimming and color mixing.

(III) advantageous effects

Compared with the prior art, the invention provides a novel constant-voltage framework evolution circuit system for dimming and color mixing based on an APFC booster circuit, which has the following beneficial effects:

1. this novel constant voltage framework evolution circuit system of adjusting luminance and mixing of colors based on APFC boost circuit, through adopting preceding stage APFC circuit control mode, can realize more than 0.95 of power factor, PWM adjusts luminance frequency and belongs to no stroboscopic high frequency exemption standard more than 3125Hz, cancel and adjust luminance signal conversion module, be one kind and accord with chinese mandatory product requirement, the supporting power in conventional high-voltage lamp area of high performance-price ratio, adopt LED high-voltage lamp area or hard lamp strip can support the control circuit of compatible multiple mode of adjusting luminance, thereby reach and accord with chinese mandatory product standard requirement, the cost performance is higher, can realize the function application of adjusting luminance, and can satisfy the effect that national standard short circuit test required.

2. The novel constant-voltage framework evolution circuit system for dimming and color mixing based on the APFC booster circuit has the advantages that the circuit is flexibly and changeably applied by extending to a dimming and color mixing control function, and the extended circuit can be output through MOS control and can be compatible with various dimming and color mixing control modes, and the circuit comprises PLC power carrier dimming and color mixing, 0-10V dimming and color mixing, DALI dimming and color mixing, ZigBee dimming and color mixing, Bluetooth dimming and color mixing, 2.4G dimming and color mixing and the like, and when the dimming and color mixing modes are carried out, the MCU dimming and color mixing control module can output two groups of PWM 1-cold colors and PWM 2-warm colors which are signals for complementary control; on the basis of dimming, a PWM warm color control signal of one path is output more, a group of PWM driving capability enhancement band paths are added, another path of MOS tube Q2 is controlled, another path of LED warm color is enabled to change color, independent dimming can be realized, dimming and color mixing can be performed on the basis of dimming again, and the two paths of MOS tube Q2 can operate independently, so that the LED high-voltage direct-current lamp belt can not be compatible with multiple dimming and color mixing applications, the innovation of the old technology is broken, the large-scale application of the follow-up high-voltage lamp belt is greatly improved, and meanwhile, the effect of more dimming scene applications is brought to the follow-up high-voltage lamp belt industry.

Drawings

FIG. 1 is a schematic diagram of a dimming circuit according to the present invention;

fig. 2 is a schematic diagram of a dimming and toning circuit according to the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention and the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 1-2, a novel constant voltage framework evolution circuit system for dimming and color modulation based on an APFC voltage boost circuit includes an active power factor correction APFC control circuit, a live line L of an ac voltage electrically connected to a fuse F1, a fuse F1 electrically connected to a varistor MOV1, a thermistor RT1 electrically connected to a varistor MOV1, a fuse F1 electrically connected to a boost inductor T3, a boost inductor T4 electrically connected to a power input anti-interference capacitor CX2, a boost inductor T1 electrically connected to an LF2, an LF2 electrically connected to a boost inductor T3 end in series with a power input end anti-interference capacitor CX2, a power input end anti-interference capacitor CX2 electrically connected to a resistor R14, a power input end anti-interference capacitor CX2 electrically connected to a resistor R13, a resistor R14 electrically connected to a resistor R13, a resistor R14 electrically connected to a coil, and a resistor R13 electrically connected to the coil, the coil is electrically connected with LF1, LF1 is electrically connected with a power input end anti-interference capacitor CX1, the coil is electrically connected with an LF1 series power input end anti-interference capacitor CX1, a power input end anti-interference capacitor CX1 is electrically connected with an alternating current AC, a power input end anti-interference capacitor CX1 is electrically connected with an alternating current AC, the alternating current AC is electrically connected with a capacitor C3, the alternating current AC is electrically connected with a live wire L1, the alternating current AC is electrically connected with a live wire L1 series capacitor C3, the alternating current AC is electrically connected with a capacitor C1 and a diode D1, a capacitor C1 is electrically connected with a diode, the alternating current AC is electrically connected with a ground wire, the ground wire is electrically connected with a diode D3, the ground wire is electrically connected with a boost inductor T1, a diode D3 is electrically connected with a resistor R2, a diode D3 is electrically connected with a diode D4, an, diode D3 is electrically connected to a power supply voltage VSS capacitor C5, diode D3 is electrically connected to a power supply voltage VSS and resistor R2, source power supply voltage VSS is electrically connected to a resistor R5, resistor R5 is electrically connected to a zero current detection input ZCD, diode D4 is electrically connected to a resistor R3, diode D4 is electrically connected to a gate discharge tube Q2 of field tube M1, resistor R3 is electrically connected to a zener diode ZD1, zener diode ZD1 is electrically connected to a ground line, zener diode ZD1 is electrically connected to a gate discharge tube Q1 of field tube M1, gate discharge tube Q1 of field tube M1 is electrically connected to an operating voltage VCC inside the device, operating voltage VCC inside the device is electrically connected to a capacitor C1, operating voltage VCC inside the device is electrically connected to an operating voltage VCC terminal VCC inside the device, a live line L1 is electrically connected to resistor R1, resistor R1 is electrically connected to resistor R1, a resistor R is electrically connected with a capacitor C, the capacitor C is electrically connected with a voltage U, the capacitor C is electrically connected with an input end MULT of an internal multiplier, a ground wire GND end is electrically connected with the voltage U, a comparator COMP end is electrically connected with an inverting input end INV end capacitor C of an error amplifier, the comparator COMP end is electrically connected with a resistor 23, the resistor 23 is electrically connected with the inverting input end INV end capacitor C of the error amplifier, the capacitor C is electrically connected with a resistor R, the capacitor C is electrically connected with a five-port of a boosting inductor T, a three-port of the boosting inductor T is electrically connected with a diode D, a three-port of the boosting inductor T is electrically connected with a shunt-type reference circuit Q, the shunt-type reference circuit Q is electrically connected with the resistor R and the diode D in parallel, the shunt-type reference circuit Q is electrically connected with a resistor R of the shunt-type reference circuit Q, the resistor R is, a resistor R16 is electrically connected with a resistor R22, a resistor R22 is electrically connected with a resistor R21, a resistor R20, a resistor R19 and a resistor R18 in parallel, a resistor 22, a resistor R21, a resistor R20, a resistor R19 and a resistor R18 are electrically connected with the ground, the cathode of a diode D2 is electrically connected with a capacitor C4 and a capacitor C4 in parallel, the capacitor C4 is electrically connected with a boost rectifier, the boost rectifier is electrically connected with the capacitor C4, the diode D4 is electrically connected with a source power supply voltage VSS, the source power supply voltage VSS is electrically connected with the resistor R4, the resistor R4 is electrically connected with the resistor R4, the active power factor correction APFC control circuit is electrically connected with a PWM 4-cold signal control circuit, the PWM 4-cold signal control circuit and the PWM 4-cold signal control circuit are collectively called as a PWM 4-warm signal control circuit, and the PWM 4-warm signal control circuit is called as a PWM driving capability enhancement circuit. The circuit develops two branch circuits on the basis of dimming, the dimming circuit can realize the dimming and toning functions while working independently, the PWM 1-cold color signal control circuit comprises a Q1 shunting type reference circuit, the Q1 shunting type reference circuit is electrically connected with a resistor R1, a resistor R1 is electrically connected with a resistor R6, a resistor R6 is electrically connected with the cathode of an LED1, a resistor R1 is electrically connected with an OC, the OC is electrically connected with a resistor Res, the PWM 1-cold color signal control circuit is electrically connected with a PWM 2-warm color signal control circuit, the PWM 2-warm color signal control circuit comprises a Q4 shunting type reference circuit, the Q4 shunting type reference circuit is electrically connected with a resistor R25, the resistor 25 is electrically connected with a resistor R26, the resistor R1 is electrically connected with a resistor R6, the resistor R26 is electrically connected with the cathode of the LED2, the PWM 2-PWM 2-warm color signal control circuit is electrically connected with a warm color driving capability enhancing circuit, the PWM 2-warm color driving capability enhancing circuit comprises an IGBT driving chip U3, the IGBT driving chip U3 is divided into five pins, namely a U3 pin 1, a U3 pin 2, a U3 pin 3, a U3 pin 4, a U3 pin 5, the U3 pin 1 is connected with a voltage of 15V, a U3 pin 3 is electrically connected with a resistor R26, a U3 pin 4 is electrically connected with a grounding wire, the U3 pin 5 is electrically connected with an MCU dimming and toning control module, the PWM 2-warm color driving capability enhancing circuit is electrically connected with an MCU dimming and toning control module, the MCU dimming and toning control module comprises a PLC power carrier dimming and toning unit, a 0-10V dimming and toning unit, a DALI dimming and toning unit, a ZigBee dimming and toning unit, a Bluetooth dimming and toning unit, a 2.4G dimming and toning unit, the MCU dimming and toning control module is electrically connected with an open collector output end OC, and the MCU dimming and toning control, the MCU dimming and toning control module is electrically connected with a PWM 1-cold tone driving capability enhancing circuit, the PWM 1-cold tone driving capability enhancing circuit comprises an IGBT driving chip U4, the IGBT driving chip U4 is divided into five pins, namely a U4 pin 1, a U4 pin 2, a U4 pin 3, a U4 pin 4 and a U4 pin 5, the IGBT driving chip U4 is electrically connected with a capacitor C13, a capacitor C13 is electrically connected with a zener diode ZD2, the zener diode ZD2 is electrically connected with a Q5 shunting type reference circuit, the Q5 shunting type reference circuit is electrically connected with a resistor R27, a Q5 shunting type reference circuit is electrically connected with a resistor R28, the resistor R28 is electrically connected with a diode D28, a pin 1 of the U28 is connected with a voltage of 15V, a pin 3 of the U28, a pin 4 of the U28 is electrically connected with a capacitor C28, a pin 5 of the U28 is electrically connected with a ground wire, the MCU dimming and toning control module is electrically connected with a dimming and toning control, the IGBT driving chip U1 is divided into eight pins, which are respectively a U1 pin 1, a U1 pin 2, a U1 pin 3, a U1 pin 4, a U1 pin 5, a U1 pin 6, a U1 pin 7, a U1 pin 8, a U1 pin 1 and a capacitor C7 are electrically connected, a U1 pin 1 and a resistor R12 are electrically connected, a resistor R12 and a diode D6 are electrically connected, a U1 pin 2 and a diode D7 are electrically connected, a U1 pin 2 and a live wire L2 are electrically connected, a U1 pin 3 and a TVS1, a capacitor C11 and a capacitor C10 are electrically connected, a U1 pin 4, a U1 pin 5, a U1 pin 6, a U1 pin 7 and a U1 pin 8 are electrically connected with a ground wire.

The working principle is as follows: the commercial power is introduced, the commercial power flows through an EMC device and is rectified by a bridge stack BD1 to store energy for a boost inductor T1, the power is synchronously supplied to a U2APFC control chip through a pull-up resistor R4/R7 and a pull-down resistor R9, a driving signal is provided through a resistor R10 after the chip U2 is supplied with power, MOSQ3 starts to work, and finally DC400V is output between large electrolytic capacitors C2, the voltage value of DC400V can be accurately obtained through the voltage division of the pull-up resistor R7/R11/R15 and the pull-down resistor R24, namely, the high-power factor control output is realized through a front APFC control circuit, the power is supplied to a U1 chip in an MCU dimming control module power supply circuit through an auxiliary winding VSS of the boost inductor T1, the chip U1 controls the output of a direct current voltage VDD to supply power to the MCU dimming control module, the MCU dimming control module H1 outputs a PWM dimming control signal through a PWM enhancing circuit, and then, the MCU dimming control module does not need to worry that the driving capability is not enough to drive the high-voltage MOS tube and dimming application cannot be carried out, so that the dimming function of the high-voltage direct-current lamp strip is realized; not only the above, but also can perform short circuit abnormality detection through the OC pin in the MCU dimming control module, that is, after two ends of the output LED are short-circuited, a very large transient current can be generated, and flows through the Rcs resistor detected by the OC function, at this time, there will be a voltage value on the Rcs resistor, by comparing this voltage value with the voltage value preset by the OC pin in the MCU dimming control module, once the voltage value exceeds the preset OC protection voltage threshold, the MCU dimming control module will turn off the PWMout control signal output until the short circuit abnormality is removed, the MCU restart after power down will output the PWMout control signal again, and when performing the dimming and toning mode again, the MCU dimming control module will output two sets of PWM 1-cold color and PWM 2-warm color, and are complementary control signals, and on the basis of dimming, one more PWM warm color control signal is output, and one set of PWM driving capability enhancement band is added, and the other path of MOS tube Q2 is controlled to change the color of the other path of LED, so that the independent dimming can be realized, and the dimming and color mixing operations can be performed on the basis of the dimming, and the two paths of MOS tubes can independently operate.

To sum up, the novel constant voltage framework evolution circuit system for dimming and color mixing based on the APFC booster circuit can realize the power factor of more than 0.95 by adopting a pre-stage APFC circuit control mode, the PWM dimming frequency of more than 3125Hz belongs to the non-stroboscopic high-frequency exemption standard, a dimming signal conversion module is eliminated, the circuit is a conventional high-voltage lamp strip matched power supply which meets the mandatory product requirement of China and has high cost performance, an LED high-voltage lamp strip or a hard lamp strip can support a control circuit compatible with various dimming modes, the circuit is flexibly applied and changeably by extending to the dimming and color mixing control function, the circuit can also be compatible with various dimming and color mixing control circuit modes, when the dimming and color mixing modes are carried out, the MCU dimming and color mixing control module outputs two groups of PWM 1-cold color and PWM 2-warm color, and is a complementary control signal, and a plurality of PWM warm color control signals are output on the basis of dimming, a group of PWM driving capacity enhancing belt paths are added, the other path of MOS tube Q2 is controlled, the other path of LED warm color is changed in color, accordingly, the requirement of Chinese mandatory product standard is met, the cost performance is high, the dimming function application can be realized, the national standard short circuit test requirement can be met, the LED high-voltage direct current lamp belt can not be compatible with multiple dimming applications, the innovation of the old technology is broken, the large-scale application of the follow-up high-voltage lamp belt is greatly improved, and meanwhile, the effect of more dimming scene applications is brought to the follow-up high-voltage lamp belt industry.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. The utility model provides a novel constant voltage framework evolution circuit system of adjusting luminance and mixing of colors based on APFC boost circuit, includes active power factor correction APFC control circuit, its characterized in that: the active power factor correction APFC control circuit is electrically connected with a PWM 1-cold color signal control circuit, the PWM 1-cold color signal control circuit is electrically connected with a PWM 2-warm color signal control circuit, the PWM 2-warm color signal control circuit is electrically connected with a PWM 2-warm color driving capability enhancement circuit, the PWM 2-warm color driving capability enhancement circuit is electrically connected with an MCU dimming and color mixing control module, the MCU dimming and color mixing control module is electrically connected with a PWM 1-cold color driving capability enhancement circuit, and the MCU dimming and color mixing control module is electrically connected with a dimming and color mixing control module power supply circuit.

2. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: active power factor correction APFC control circuit, alternating current voltage's live wire L and fuse F1 electric connection each other, fuse F1 and piezo-resistor MOV1 are connected electrically, thermistor RT1 and piezo-resistor MOV1 are connected electrically, fuse F1 is connected with boost inductance T3 electricity, boost inductance T4 is connected with power input end interference-free capacitance CX2 electricity, boost inductance T1 is connected with LF2 electricity, LF2 is connected and is connected with boost inductance T3 end in series and has power input end interference-free capacitance CX2 electricity to be connected electrically, power input end interference-free capacitance CX2 is connected with resistance R14 electricity, power input end interference-free capacitance CX2 is connected with resistance R13 electricity, resistance R14 is connected with resistance R13 electricity, resistance R14 is connected with the coil electricity, resistance R13 is connected with the coil electricity, the coil is connected with 1 electricity, LF1 is connected with power input end CX1 electricity, the coil is connected with LF1 series power input anti-jamming capacitance CX1 electricity, power input anti-jamming capacitance CX1 is connected with alternating current AC electricity, power input anti-jamming capacitance CX1 with alternating current AC electricity be connected, alternating current AC is connected with electric capacity C3 electricity, alternating current AC is connected with live wire L1 electricity, alternating current AC is connected with live wire L1 series capacitance C3 electricity, alternating current AC is connected with electric capacity C1 and diode D1 electricity, electric capacity C1 is connected with the diode electricity, alternating current AC is connected with ground electricity, ground wire is connected with diode D3 electricity, ground wire is connected with boost inductance T1 electricity, diode D3 is connected with resistance R2 electricity, diode D3 is connected with diode D4 electricity, boost inductance T1 eight port is connected with source supply voltage VSS electricity, supply voltage VSS is connected with electric capacity C5 electricity, electric capacity C5 is connected with resistance R2 electricity, the diode D3 is electrically connected with a power supply voltage VSS capacitor C5, the diode D3 is electrically connected with a power supply voltage VSS and a resistor R2, the source power supply voltage VSS is electrically connected with a resistor R5, the resistor R5 is electrically connected with a zero current detection input ZCD, the diode D4 is electrically connected with a resistor R3, the diode D4 is electrically connected with a gate discharge tube Q2 of a field tube M1, the resistor R3 is electrically connected with a zener diode ZD1, the zener diode ZD1 is electrically connected with a ground line, the zener diode ZD1 is electrically connected with a gate Q2 of the field tube M1, a gate discharge tube Q2 of the field tube M1 is electrically connected with an operating voltage VCC inside the device, an operating voltage VCC inside the device is electrically connected with a capacitor C6, an operating voltage VCC inside the device is electrically connected with an operating voltage VCC8 terminal inside the device, the live wire L1 is electrically connected with a resistor R4, and the resistor R4 is electrically connected with a resistor R9, the resistor R9 is electrically connected to the resistor R17, the resistor R9 is electrically connected to the capacitor C8, the resistor R17 is electrically connected to the capacitor C8, the capacitor C8 is electrically connected to the voltage U8, the capacitor C8 is electrically connected to the three ports of the internal multiplier input terminal MULT, the ground GND 8 is electrically connected to the voltage U8, the comparator COMP 8 is electrically connected to the capacitor C8 at the inverting input terminal INV 8 of the error amplifier, the comparator COMP 8 is electrically connected to the resistor 23, the resistor 23 is electrically connected to the capacitor C8 at the inverting input terminal INV 8 of the error amplifier, the capacitor C8 is electrically connected to the resistor R8, the capacitor C8 is electrically connected to the boosting inductor T8, the boosting inductor T8 is electrically connected to the diode D8, the boosting inductor T8 is electrically connected to the reference Q8, the shunt-type reference Q8 is electrically connected to the shunt-type shunt circuit Q8, the shunt-type shunt circuit 8 is electrically connected to the resistor R8 and the diode D8 in parallel, the resistor R10 is electrically connected with the end of the gate drive output terminal GD7, the resistor R8 is electrically connected with the resistor R16, the resistor R16 is electrically connected with the end of the current detection input terminal CS4, the resistor R16 is electrically connected with the resistor R22, the resistor R22 is electrically connected with the resistor R21, the resistor R21 and the resistor R21 in parallel, the resistor 22, the resistor R21 and the resistor R21 are electrically connected with the ground wire, the cathode of the diode D21 is electrically connected with the capacitor C21 and the capacitor C21 in parallel, the capacitor C21 is electrically connected with the boost large electrolyte, the boost large electrolyte is electrically connected with the capacitor C21, the diode D21 is electrically connected with the source power supply voltage VSS, the source power supply voltage VSS is electrically connected with the resistor R21, the resistor R21 is electrically connected with the resistor R21.

3. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the PWM 1-cold color signal control circuit internally comprises a Q1 shunt type reference circuit, the Q1 shunt type reference circuit is electrically connected with a resistor R1, the resistor R1 is electrically connected with a resistor R6, the resistor R6 is electrically connected with the cathode of an LED1, the resistor R1 is electrically connected with an OC, and the OC is electrically connected with a resistor Res.

4. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the PWM 2-warm color signal control circuit comprises a Q4 shunt type reference circuit, the Q4 shunt type reference circuit is electrically connected with a resistor R25, the resistor 25 is electrically connected with a resistor R26, the resistor R1 is electrically connected with a resistor R6, and the resistor R26 is electrically connected with the cathode of an LED 2.

5. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the PWM 2-warm color driving capability enhancement circuit comprises an IGBT driving chip U3, wherein the IGBT driving chip U3 is divided into five pins, namely a U3 pin 1, a U3 pin 2, a U3 pin 3, a U3 pin 4 and a U3 pin 5.

6. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the MCU dimming and color mixing control module comprises a PLC power carrier dimming and color mixing unit, a 0-10V dimming and color mixing unit, a DALI dimming and color mixing unit, a ZigBee dimming and color mixing unit, a Bluetooth dimming and color mixing unit and a 2.4G dimming and color mixing unit.

7. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the PWM 1-cold driving capability enhancement circuit comprises an IGBT driving chip U4, the IGBT driving chip U4 is divided into five pins, namely a U4 pin 1, a U4 pin 2, a U4 pin 3, a U4 pin 4 and a U4 pin 5, the IGBT driving chip U4 is electrically connected with a capacitor C13, the capacitor C13 is electrically connected with a zener diode ZD2, the zener diode ZD2 is electrically connected with a Q5 shunting type reference circuit, the Q5 shunting type reference circuit is electrically connected with a resistor R27, the Q5 shunting type reference circuit is electrically connected with a resistor R28, and the resistor R28 is electrically connected with a diode D8.

8. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the dimming and toning control module power supply circuit comprises an IGBT driving chip U1, wherein the IGBT driving chip U1 is divided into eight pins, namely a U1 pin 1, a U1 pin 2, a U1 pin 3, a U1 pin 4, a U1 pin 5, a U1 pin 6, a U1 pin 7 and a U1 pin 8.

9. The circuit system of claim 1, wherein the APFC boost circuit based novel constant voltage architecture evolution circuit system for dimming and color matching comprises: the PWM 1-cold color signal control circuit and the PWM 2-warm color signal control circuit are collectively called a PWM dimming signal control circuit, and the PWM 1-cold color driving capability enhancement circuit and the PWM 2-warm color driving capability enhancement circuit are collectively called a PWM driving capability enhancement circuit.