CN112953679B - Data transmission coprocessor control method, device, medium, terminal and system in deterministic network - Google Patents

Abstract

The invention belongs to the technical field of data transmission networks, and discloses a control method, a system and an application of a data transmission coprocessor in a deterministic network, wherein a sending end is sent to the coprocessor when needing to send data; firstly, entering a check information adding module to add a sending serial number and a sending timestamp; when the receiving end receives the data frame, checking through the source end identification of the network configured by the user in advance to verify the source correctness of the data; calculating the consumed time in the sending process according to the local time value which is synchronized by combining the synchronization function in the network; after the calculation is finished, comparing the time delay with the transmission time delay determined in advance in the network; the receiving end may continuously maintain a register in accordance with the above problems when data originating from a link occurs. The invention can reduce the collision rate of the data check code while ensuring that the data is not modified in the data transmission process, and can actively report the abnormal link.

Description

Data transmission coprocessor control method, device, medium, terminal in deterministic network and system

technical field

The invention belongs to the technical field of data transmission network, and in particular relates to a data transmission coprocessor control method, system and application in a deterministic network.

Background technique

At present: In the traditional data transmission network, both the UDP layer and the IP layer have the checksum content of the header to guarantee the data, but the checksum generation method is simple, and it is only used for whether there is an error in the data transmission process. It cannot detect the problem of data tampering during transmission. In the MAC layer, a data cyclic redundancy check is performed, and a cyclic redundancy check is performed on the data that has been encapsulated into the MAC as the basis for the correctness of the data. The data error detection method of the above general protocol layer has been known to the general public, and it can only deal with data errors during transmission, and is powerless against malicious tampering of data during transmission.

In addition, there is only one reception check function for the time-triggered business in the time-triggered Ethernet, which checks whether the received MAC frame arrives at the receiving end at the expected time. However, these two functions are not implemented in the same module. There is a certain time difference between the two modules due to the length of the transmitted data and the time recording points of both parties are not symmetrical between the sending and receiving sides, which will lead to statistical transmission time. It cannot be true and accurate, and ultimately cannot accurately judge whether the data arrives at the specified time; in terms of data source inspection, there is still no relatively complete solution for verification except for encrypting the transmitted data, and it is impossible to verify the data from the data at the receiving end. Verify the source of network data to identify whether the currently received data comes from internal members of the network or from attackers outside the network.

With the highly developed network technology, the application of network technology to industrial control is increasing day by day. The most popular solution for industrial control network in aerospace scenarios is time-triggered Ethernet. However, there will be a single event flip effect in data transmission in aerospace, which will cause unpredictable errors in the data transmission process, and eventually cause the receiving end to fail to correctly receive the data that the sending end expects to receive. In view of this situation, it is necessary to check the correctness of the data transmitted in the network. At the same time, because there are many different types and different sending rules in the network, when the data service plan is too dense, congestion will occur, and naturally there will be data that cannot reach the receiving end within the specified time due to congestion in the network . In view of this situation, it is necessary to detect the real-time data of the data transmitted in the network. In some specific cases, there may be an error in the way of use or a situation of deliberate sabotage, causing a device to mistakenly send misleading data to the target device, causing the target receiving end to respond incorrectly, and eventually causing the network to fail. Known errors and ultimately affect the work of the overall network. For this situation, it is necessary to check the correctness of the data source for the data transmitted in the network.

The solution to the above problems requires that the end nodes of the network have a function that can simultaneously detect the correctness, real-timeness, and source correctness of the data. Therefore, it is necessary to have a load-bearing detection method and data frame structure.

Through the above analysis, the problems and defects in the prior art are:

(1) The protection methods for the data transmission process in the traditional Ethernet include the checksum method in UDP/IP and the CRC method in the MAC layer. Due to the long development of the network, the traditional Ethernet at each level Calibration methods have been widely disseminated.

(2) The problem of inaccurate time caused by the traditional reception check function.

(3) The data bit width used when generating CRC in traditional MAC is 8 bits, and the rate is relatively slow when transmitting data.

The difficulty of solving the above problems and defects is:

(1) For the widely used existing Ethernet transmission methods, how to break through the limitations of traditional methods, invent a new method for data verification, and at the same time verify and protect the transmitted data in various ways, is an existential problem.

(2) In a synchronous network, it is necessary to overcome the statistical problem of data sending and receiving time. Due to the different lengths of data transmission, there is also the phenomenon of simultaneous multi-channel data transmission. How to correctly make correct transmission time statistics for the transmitted data It is a technical problem that exists.

(3) In traditional MAC, when performing CRC calculation on data when sending and receiving, it is necessary to perform bit width conversion first, and then perform CRC check code generation, so that the time for transmitting data will increase exponentially. The calculation of the CRC check code in the state is also a problem in the academic circles.

The significance of solving the above problems and defects is:

(1) In the dedicated deterministic network, by customizing the private protocol, multi-layer protection is carried out for the transmitted data, providing new ideas and solutions for the development of the transmission mode of the public network in the future.

(2) It is very meaningful to count the transmission delay of the same data. This is because the deterministic network has strict requirements on the real-time performance of data. Once the cost is determined, the receiving time point must also be determined. After fully grasping the time cost of data transmission, the bandwidth utilization rate of the overall network can be better controlled and more data can be transmitted.

(3) The processing rate of the traditional CRC generation method is too slow, which will become a bottleneck in the process of data transmission. In order not to cause unnecessary time delay in this module and absorb the disadvantages of CRC generation in MAC, use 32bit bit width for CRC calculation, combined with the 32-bit bus for data transmission and reception outside the module, achieves the optimization of data processing rate.

Contents of the invention

Aiming at the problems existing in the prior art, the present invention provides a data transmission coprocessor control method, system and application in a deterministic network.

The present invention is achieved in this way, a method for controlling a data transmission coprocessor in a deterministic network, the method for controlling a data transmission coprocessor in a deterministic network includes:

When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp;

When the receiving end receives the data frame, it verifies the source identification of the network pre-configured by the user to verify the correctness of the source of the data;

Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process;

After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received;

When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected.

The CRC check code generated in a special way in the present invention can better ensure the verification of the data source during data transmission, because not only the correct CRC generator polynomial but also the correct source port number are required for verification. The addition of the serial number allows the receiving end to check the continuity of the received data, and verify whether the currently received data is continuous with the previous data through the recorded serial number. The existence of "life value" can monitor the situation of the data link in real time during the data transmission process, and continuously quantitatively update the individual data link, and the update basis is the identification of the received data.

Further, the data transmission coprocessor control method in the deterministic network includes a frame format for secondary encapsulation of data in the UDP layer, and encapsulated content;

A method for judging whether the data conforms to the receiving rules with the three elements of the serial number, the time stamp, and the CRC check code in the packaged content;

The CRC verification code in the package content is calculated by adding the source number that is not transmitted when the sender generates it, and needs to be recalculated in combination with the source number to verify the correctness of the data source when the receiver receives it.

Further, the processing process of the data sending end of the data transmission coprocessor control method in the deterministic network includes:

(1) Data input;

(2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data;

(3) After the operation of "adding 0" is completed, add header information to the header of the data, and add a serial number and a sending timestamp to the header;

(4) After adding the serial number and time stamp of the header, the data enters two directions in different directions, one side is sent to the cache block for caching, and the other side needs to add the unique network identifier of the local device to the header before Sent to the CRC generation module to generate the CRC calculation result;

(5) After the data sent to the CRC generation module ends, two CRC calculation results of the data will be obtained, and the CRC results will be input into the buffer area;

(6) Output the data frame added by the verification information.

Further, the CRC generation input and output timing of the data transmission coprocessor control method in the deterministic network will be sent to the CRC generation module after the data is added with the unique identifier, serial number and time stamp of the source system Perform CRC check code generation; the input signals of the CRC module are: CRC_data_input to be calculated data input, 32bit width data signal) CRC_init CRC module initialization signal, high level active, CRC_data_en CRC input data valid signal; high level active, CRC_getResult CRC check code result acquisition signal, high level single pulse is valid;

During the continuous input of data, the CRC generation module will continuously calculate the CRC check code of the current input data. After the data input is completed, give CRC_getResult a single pulse high level to make the CRC check code result in the next clock output during the cycle.

Further, the processing process of the data receiving end of the data transmission coprocessor control method in the deterministic network includes:

(1) Data input;

(2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data;

(3) After completing the operation of "adding 0", extract the attached serial number, time stamp and CRC check code at the end of the data frame to prepare for subsequent information verification;

(4) After the serial number and time stamp extraction of the header are completed, the data enters two different directions in two ways. While sending it to the cache block for caching, it needs to add the unique network identifier of the source device to the header and then send it to the CRC generation module to generate the CRC calculation result; at the same time, check the serial number and time stamp, By checking the serial number continuity of the serial number register maintained by the current link; by checking the local synchronization time and the extracted frame sending time point, check whether the data frame transmission process takes too much time;

(5) After the data sent to the CRC generation module is finished, two CRC calculation results of the data will be obtained, and the CRC result is compared with the previously extracted CRC check code to check whether they are consistent;

(6) Check the information inspection part to confirm whether the data frame meets the inspection requirements, and judge whether to output the data frame according to the inspection result.

Another object of the present invention is to provide a computer device, the computer device includes a memory and a processor, the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the following step:

When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp;

When the receiving end receives the data frame, it verifies the source identification of the network pre-configured by the user to verify the correctness of the source of the data;

Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process;

After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received;

When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected.

Another object of the present invention is to provide a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the processor performs the following steps:

When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp;

When the receiving end receives the data frame, it verifies the source identification of the network pre-configured by the user to verify the correctness of the source of the data;

Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process;

After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received;

When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected.

Another object of the present invention is to provide an information and data processing terminal, which is used to implement the method for controlling a data transmission coprocessor in a deterministic network.

Another object of the present invention is to provide a data transmission coprocessor control system in a deterministic network implementing the data transmission coprocessor control method in a deterministic network, the data transmission coprocessor control system in a deterministic network include:

Receiver: including a verification information adding module, a CRC-X generating module and a CRC-Y generating module;

Sending end: including verification information verification module, CRC-X generation module and CRC-Y generation module;

Verification information addition module: Add verification information to the data sent by the upper layer, complete the "add 0" detection of the data, make the data aligned, and facilitate the subsequent generation of CRC results;

Verification information verification module: verify the verification information of the data from the network, and perform local verification on the pre-filled sender information;

CRC-X and CRC-Y modules: The user can pre-configure the corresponding CRC polynomial with a width of 16 bits, and perform CRC calculation on the input data and the identification of the source device to obtain the CRC calculation result.

Another object of the present invention is to provide a data transmission network control system for running the data transmission coprocessor control method in a deterministic network.

In combination with all the above-mentioned technical solutions, the advantages and positive effects of the present invention are:

(1) The protection methods for the data transmission process in the traditional Ethernet include the checksum method in UDP/IP and the CRC method in the MAC layer. Due to the long development of the network, the traditional Ethernet at each level Calibration methods have been widely disseminated. Therefore, if the data is maliciously modified during data transmission, it cannot be detected. In view of the above situation, the present invention adds two additional CRC checks in the UDP layer and generates two check codes by using different polynomials, which can reduce the data check code while ensuring that the data is not modified during the data transmission process. the collision rate.

(2) Compared with the reception check function of the traditional deterministic Ethernet, the present invention effectively avoids the time inaccuracy problem caused by the traditional reception check function by setting symmetrical modules at both ends of the transceiver to perform transmission time statistics. The present invention also supports the link management function, and can actively report the abnormal link after it is found many times that a certain link spends too much time for transmission continuously.

(3) Compared with the prior art, the present invention develops the function of authenticating the data source, and the sending end, when sending data, adds the unique number of the machine that does not transmit in the network to the data that generates the CRC check code. In this way, the receiving end can only verify the source of the data correctly after receiving the data by using the correct source end number. The source number should be well planned when planning the network, and the entire network should be fully configured after power-on. According to the characteristics of the deterministic network, the overall topology of the network, and the number of devices should be determined, so each device should know the number corresponding to the source of the data.

(4) The data bit width used when generating CRC in the traditional MAC is 8bit, and the rate is relatively slow when transmitting data, but the present invention adds extra non-data fields when calculating CRC, so in order to improve the speed of calculation, adopt The 32bit width is calculated, and the CRC calculation problem when the data is not an integer multiple of 4 bytes is solved by "adding 0" to the header.

The invention is based on the data transmission control coprocessor developed by FPGA, and supports the sending and receiving detection function of the data sent to and from the network. By adopting the improved 32bitCRC calculation method of the present invention, the data can be transmitted into the CRC generator through the 32bit method, and the CRC result is output directly at the end of the data. Compared with the 8bit generation method in MAC, the transmission of the same length of data only takes Takes 25% of the original time.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the accompanying drawings required in the embodiments of the present application. Obviously, the accompanying drawings described below are only some embodiments of the present application. Those of ordinary skill in the art can also obtain other drawings based on these drawings without making creative efforts.

Fig. 1 is a flowchart of a method for controlling a data transmission coprocessor in a deterministic network provided by an embodiment of the present invention.

Fig. 2 is a schematic structural diagram of a data transmission coprocessor control system in a deterministic network provided by an embodiment of the present invention.

Fig. 3 is a schematic diagram of a data processing process provided by an embodiment of the present invention.

Fig. 4 is a schematic diagram of a layered structure of a protocol provided by an embodiment of the present invention.

Fig. 5 is a schematic diagram of a data encapsulation frame structure provided by an embodiment of the present invention.

Fig. 6 is a flow chart of data sending end processing provided by an embodiment of the present invention.

FIG. 7 is a schematic diagram of input and output timing of the CRC generation module provided by the embodiment of the present invention.

Fig. 8 is a flow chart of processing at a data receiving end provided by an embodiment of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention more clear, the present invention will be further described in detail below in conjunction with the examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

Aiming at the problems existing in the prior art, the present invention provides a data transmission coprocessor control method, system and application in a deterministic network. The present invention will be described in detail below in conjunction with the accompanying drawings.

As shown in Figure 1, the data transmission coprocessor control method in the deterministic network provided by the present invention includes the following steps:

S101: When the sending end needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp;

S102: When the receiving end receives the data frame, it verifies the correctness of the source of the data through the identification of each source end of the network pre-configured by the user;

S103: Combined with the synchronization function in the network, when the data is sent, enter the time point of the sending time. After the receiving side at the other end receives the data, the sending time point of the sending end can be extracted, and then according to the time value that has been synchronized locally Calculate the time consumed in the sending process;

S104: After the calculation is completed, by comparing with the transmission delay determined in advance in the network, once the maximum threshold value specified by the user is exceeded, the data can be judged as overtime data and not received;

S105: When the data from a certain link has problems such as persistent serial number loss or disorder, long time consumption in the sending process, source verification failure, etc., the receiving end can continuously maintain a register according to the above problems , as the "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected.

The method for guaranteeing data transmission in a deterministic network in the present invention includes a frame format for secondary encapsulation of data in the UDP layer, and encapsulated content;

The serial number, time stamp, and CRC check code in the packaged content jointly determine whether the data conforms to the receiving rule.

The CRC verification code in the package content is calculated by adding the source number that is not transmitted when the sender generates it, and needs to be recalculated in combination with the source number to verify the correctness of the data source when the receiver receives it.

The method for controlling data transmission coprocessor in a deterministic network provided by the present invention can also be implemented by those skilled in the art by using other steps. The method for controlling data transmission coprocessor in a deterministic network provided by the present invention in FIG. 1 is only a specific example. Examples only.

As shown in Figure 2, the data transmission coprocessor control system in the deterministic network provided by the present invention includes:

Receiving end: including a verification information adding module, a CRC-X generating module and a CRC-Y generating module.

Sending end: including a verification information verification module, a CRC-X generation module and a CRC-Y generation module.

Verification information addition module: Add verification information to the data sent by the upper layer, complete the "add 0" detection of the data, make the data aligned, and facilitate the subsequent generation of CRC results.

Verification information verification module: verify the verification information of the data from the network, and perform local verification on the pre-filled sender information.

CRC-X and CRC-Y modules: The user can pre-configure the corresponding CRC polynomial with a width of 16 bits, and perform CRC calculation on the input data and the identification of the source device to obtain the CRC calculation result.

The technical scheme of the present invention will be further described below in conjunction with the accompanying drawings.

Figure 3 is a detailed analysis diagram of the data processing process. When the sender needs to send data, it will be sent to the coprocessor. First enter the verification information adding module to add the sending sequence number and sending time stamp. The "EQ_ID" in the figure is the unique identifier of the sending source in the network. This identifier is not put into the data frame for transmission. It is only added to the calculation when generating the CRC. When the receiving end receives the data frame, it is passed through the user The pre-configured network source identifiers are verified to verify the correctness of the source of the data and avoid data attacks by third parties pretending to be the source. The "SN" in the figure is marked as the sending sequence number. The sending sequence number can ensure the continuity of the current data and avoid the loss of data during transmission without being detected. "TS" in the figure is the time point when the sender sends data. Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process. After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold value specified by the user is exceeded, the data can be judged as overtime data and will not be received. When the data from a certain link has problems such as persistent serial number loss or disorder, long time consumption in the sending process, source verification failure, etc., the receiving end can continuously maintain a register according to the above problems, as The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected.

Fig. 4 is the protocol level of the method of the present invention. The encapsulation of data is located in the UDP payload, and the user's data is directly added with verification information after it is delivered, which can be used together with the hardware protocol stack or with the software protocol stack. Fig. 5 is the data frame structure of the method of the present invention. The figure shows the frame structure of the data frame during the transmission process, including the "SN" (serial number) field of 32bit width, the "TS" (time stamp) field of 48bit width, and the user Data payload, CRC-X and CRC-Y check calculation results with 16bit width.

The working principle and process of the technical solution are described below.

1. Data sender

(1) Data input.

(2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data.

(3) After completing the "add 0" operation, add header information to the header of the data, and add a serial number and a sending timestamp to the header.

(4) After adding the serial number and timestamp of the header, the data enters in two directions in different directions. While sending it to the cache block for caching, it needs to add the unique network identifier of the local device to the header and then send it to the CRC generation module to generate the CRC calculation result.

(5) After the data sent to the CRC generating module is finished, two CRC calculation results of the data will be obtained, and the CRC results will be input into the buffer area.

(6) Output the data frame added by the verification information.

Fig. 6 is a flowchart of data processing at the sending end.

Figure 7 shows the input and output timing of the CRC generation module.

After the data is added with the unique identifier, serial number and time stamp of the source system, it will be sent to the CRC generation module for CRC check code generation. The input signals of the CRC module are: CRC_data_input (data input to be calculated, 32bit width data signal), CRC_init (CRC module initialization signal, high level active), CRC_data_en (CRC input data valid signal. High level active), CRC_getResult ( CRC check code result acquisition signal, high level single pulse is valid).

During the continuous input of data, the CRC generation module will continuously calculate the CRC check code of the current input data. After the data input is completed, give CRC_getResult a single pulse high level to make the CRC check code result in the next clock output during the cycle.

2. Data receiver

(1) Data input.

(2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data.

(3) After completing the "add 0" operation, extract the serial number, time stamp and CRC check code at the end of the data frame to prepare for subsequent information verification.

(4) After the serial number and time stamp extraction of the header are completed, the data enters two different directions in two ways. While sending it to the cache block for caching, it needs to add the unique network identifier of the source device to the header and then send it to the CRC generation module to generate the CRC calculation result. In addition, check the serial number and time stamp at the same time, check the serial number continuity of the serial number register maintained by the current link; check the data frame transmission by checking the local synchronization time and the extracted frame sending time point Whether the process is taking an excessive amount of time.

(5) After the data sent to the CRC generation module is finished, two CRC calculation results of the data will be obtained, and the CRC results will be compared with the previously extracted CRC check code to check whether they are consistent.

(6) Check the information inspection part to confirm whether the data frame meets the inspection requirements, and judge whether to output the data frame according to the inspection result.

FIG. 8 is a flow chart of the data receiving process.

It should be noted that the embodiments of the present invention can be realized by hardware, software, or a combination of software and hardware. The hardware part can be implemented using dedicated logic; the software part can be stored in memory and executed by a suitable instruction execution system such as a microprocessor or specially designed hardware. Those of ordinary skill in the art will understand that the above-described devices and methods can be implemented using computer-executable instructions and/or contained in processor control code, for example, on a carrier medium such as a magnetic disk, CD or DVD-ROM, such as a read-only memory Such code is provided on a programmable memory (firmware) or on a data carrier such as an optical or electronic signal carrier. The device and its modules of the present invention may be implemented by hardware circuits such as VLSI or gate arrays, semiconductors such as logic chips, transistors, etc., or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., It can also be realized by software executed by various types of processors, or by a combination of the above hardware circuits and software such as firmware.

The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person familiar with the field of the present invention is within the technical scope disclosed in the present invention. Any modifications, equivalent replacements and improvements made within shall fall within the protection scope of the present invention.

Claims (10)

1. a data transmission coprocessor control method in a deterministic network, characterized in that, the data transmission coprocessor control method in the deterministic network comprises: When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp; When the receiving end receives the data frame, it verifies the correctness of the source of the data through the number of each source end of the network pre-configured by the user; Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process; After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received; When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected. 2. the data transmission coprocessor control method in the deterministic network as claimed in claim 1, is characterized in that, the data transmission coprocessor control method in the deterministic network comprises encapsulating data in the UDP layer; The serial number, time stamp, and CRC check code in the package content jointly determine whether the data meets the receiving rules; The CRC check code in the package content is calculated by adding the source number that is not to be transmitted when the sending end generates it. When the receiving end receives it, it needs to combine the source number to perform recalculation to verify the correctness of the data source. 3. the data transmission coprocessor control method in the deterministic network as claimed in claim 1, is characterized in that, the processing procedure of the data transmission coprocessor control method data sending end in the deterministic network comprises: (1) Data input; (2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data; (3) After the operation of "adding 0" is completed, add header information to the header of the data, and add a serial number and a sending timestamp to the header; (4) After adding the serial number and time stamp of the header, the data enters two directions in different directions, one side is sent to the cache block for caching, and the other side needs to add the unique network identifier of the local device to the header before Sent to the CRC generation module to generate the CRC calculation result; (5) After the data sent to the CRC generation module ends, two CRC calculation results of the data will be obtained, and the CRC results will be input into the buffer area; (6) Output the data frame added by the verification information. 4. the data transmission coprocessor control method in the deterministic network as claimed in claim 1 is characterized in that, the CRC of the data transmission coprocessor control method in the deterministic network generates input and output timing, and the data is completed at the source After the unique identifier, serial number and time stamp of the end system are added, they will be sent to the CRC generation module for CRC check code generation; the input signals of the CRC module are: CRC_data_input to be calculated data input, 32bit width data signal; CRC_initCRC Module initialization signal, high level is valid; CRC_data_en CRC input data valid signal, high level is valid; CRC_getResult CRC check code result acquisition signal, high level single pulse is valid; During the continuous input of data, the CRC generation module will continuously calculate the CRC check code of the current input data. After the data input is completed, give CRC_getResult a single pulse high level to make the CRC check code result in the next clock output during the cycle. 5. the data transmission coprocessor control method in the deterministic network as claimed in claim 1, is characterized in that, the processing procedure of the data receiving end of the data transmission coprocessor control method in the deterministic network comprises: (1) Data input; (2) Judging according to the length of the data, since the internal transmission width is 32bit, it is necessary to check whether the data length is an integer multiple of 4 bytes, and judge whether it is necessary to perform the "add 0" operation at the front end of the data; (3) After completing the operation of "adding 0", extract the attached serial number, time stamp and CRC check code at the end of the data frame to prepare for subsequent information verification; (4) After the serial number and timestamp extraction of the header are completed, the data enters two directions in two directions, one is sent to the cache block for caching, and the other needs to add the unique network identifier of the source device to the header before Send it to the CRC generation module to generate CRC calculation results; at the same time, check the serial number and time stamp, by checking the serial number continuity of the serial number register maintained by the current link; by checking the local synchronization time and the extracted Check the frame sending time point to check whether the data frame transmission process takes too much time; (5) After the data sent to the CRC generation module is finished, two CRC calculation results of the data will be obtained, and the CRC result is compared with the previously extracted CRC check code to check whether they are consistent; (6) Check the information inspection part to confirm whether the data frame meets the inspection requirements, and judge whether to output the data frame according to the inspection result. 6. A computer device, characterized in that the computer device includes a memory and a processor, the memory stores a computer program, and when the computer program is executed by the processor, the processor is made to perform the following steps: When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp; When the receiving end receives the data frame, it verifies the source identification of the network pre-configured by the user to verify the correctness of the source of the data; Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process; After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received; When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected. 7. A computer-readable storage medium, storing a computer program, when the computer program is executed by a processor, the processor is made to perform the following steps: When the sender needs to send data, it is sent to the coprocessor; first enter the verification information adding module to add the sending serial number and sending time stamp; When the receiving end receives the data frame, it verifies the source identification of the network pre-configured by the user to verify the correctness of the source of the data; Combined with the synchronization function in the network, when the data is sent, enter the sending time point. After the receiving side at the other end receives the data, it can extract the sending time point of the sending end, and then send according to the time value that has been synchronized locally. Calculate the time consumed in the process; After the calculation is completed, it is compared with the transmission delay determined in advance in the network. Once the maximum threshold specified by the user is exceeded, the data can be judged as overtime data and will not be received; When the data from a certain link appears: the continuous serial number is lost or disordered, the time spent in the sending process is too long, and the source end verification fails, the receiving end can continuously maintain a register according to the above problems as the The "life value" of the link, once the "life value" of the link is lower than the minimum threshold required by the user, the current connection can be disconnected. 8. An information data processing terminal, characterized in that the information data processing terminal is used to implement the data transmission coprocessor control method in a deterministic network according to any one of claims 1-5. 9. A data transmission coprocessor control system in a deterministic network that implements the data transmission coprocessor control method in a deterministic network described in any one of claims 1 to 5, wherein the data in the deterministic network The transport coprocessor control system includes: Sending end: including a verification information adding module, a CRC-X generating module and a CRC-Y generating module; Receiver: including verification information verification module, CRC-X generation module and CRC-Y generation module; Verification information addition module: Add verification information to the data sent by the upper layer, complete the "add 0" detection of the data, make the data aligned, and facilitate the subsequent generation of CRC results; Verification information verification module: verify the verification information of the data from the network, and perform local verification on the pre-filled sender information; CRC-X and CRC-Y modules: users can pre-configure the corresponding CRC polynomial with a width of 16 bits, and perform CRC calculation on the input data and the identification of the source device to obtain the CRC calculation result. 10. A data transmission network control system, characterized in that the data transmission network control system is used to run the data transmission coprocessor control method in a deterministic network according to any one of claims 1-5.

Images