CN112947184B - Pulse height-based optical phased array driving circuit and driving method thereof - Google Patents
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
The invention discloses an Optical Phased Array (OPA) driving circuit based on pulse height and a driving method thereof, which belong to the technical field of instruments and meters and measurement.
Description
Technical Field
The invention belongs to the technical field of instruments and meters and measurement, and particularly relates to an Optical Phased Array (OPA) driving circuit based on pulse height and a driving method thereof.
Background
The optical phased array scanning system comprises a laser emitter, an optical phased array chip, a phase control circuit, an MCU, an upper computer, a light display screen and an optical CCD camera. The laser emits a beam of pulse laser to be coupled into the optical phased array chip, the pulse laser is modulated into light spots with certain distribution after entering the optical phased array chip, the light spots are driven to the optical phased array chip by the phase control circuit, the light spots are driven to the shading white board to be acquired by the CCD camera and displayed in the upper computer in real time, and the computer changes the phase driving voltage in real time by controlling the corresponding algorithm so as to change the scanning position of the light spots, thereby realizing the scanning of the light beams.
The common mechanical radar changes the position of emergent light through a motor, so that light beam scanning is realized, and the solid-state laser radar changes the emission angle through an optical phased array, so that the scanning of different positions by the light beam is controlled. The optical phased array technology is to control the phase difference of each phase modulation to make the phase difference of each output light identical, so that each light ray can interfere at the angle to form a light beam with higher intensity at the central position, and the cancellation is realized in other directions.
The existing optical phased array driving circuit is designed by a digital-to-analog converter and a voltage amplifier, so that the designed driving circuit is seriously influenced by the digital-to-analog conversion chip in use, has limited precision, has a constant output voltage value, is seriously influenced by power supply noise, has poor stability and has ripple and burr phenomena. And voltage is applied to the optical phased array chip for a long time, the temperature of the waveguides is continuously increased, thermal crosstalk phenomenon occurs between the waveguides, and the light beams are seriously influenced by temperature drift; meanwhile, due to inconsistent heating time of each waveguide, deviation occurs in each output light phase, and the coherent effect of the light beam is poor.
Disclosure of Invention
Aiming at the problems of low precision, poor stability caused by thermal crosstalk between waveguides, inconsistent heating time of each waveguide and the like of an optical phased array driving circuit in the prior art, the invention provides an Optical Phased Array (OPA) driving method and circuit based on pulse heights. The method fully utilizes the integration and flexibility of the MCU and a simple peripheral circuit to realize high-precision pulse high-current driving output.
The invention is realized by the following technical scheme:
an optical phased array driving circuit based on pulse height comprises an optical phased array chip 1, a voltage-controlled current source array 2, an analog switch array 3, a digital-to-analog converter array 4, an MCU control circuit 5, a Synchronous Dynamic Random Access Memory (SDRAM) 6 and a PC upper computer 7; the PC upper computer 7 sends a voltage amplitude digital signal required by pulse to the MCU control circuit 5 through the MCU serial port driving circuit, the MCU control circuit 5 transmits the voltage amplitude digital signal to the digital-to-analog converter array 4, then the converted analog signal is loaded into the analog switch array 3, and the analog switch array 3 generates a pulse voltage signal with the same pulse width under the control of the MCU control circuit 5; then pulse voltage signals pass through the voltage-controlled current source array 2, and pulse current signals generated by the voltage-controlled current source array 2 are transmitted into a phase control end of the optical phased array chip 1 to realize light beam scanning; the SDRAM6 is used for temporarily storing digital voltage signals transmitted to the MCU control circuit 5 by the upper computer PC 7.
Preferably, the voltage-controlled current source array 2 is formed by arranging and distributing a plurality of voltage-controlled current source circuits 8 in parallel, and works independently, and the voltage-controlled current source circuits 8 are formed by a rail-to-rail precision instrumentation amplifier (AD 8422), two high-output current amplifiers (LM 7332) and a sampling resistor; the control end of the voltage-controlled current source circuit is connected with a pulse voltage signal output by an analog switch of the analog switch array 3, the input end of the instrument amplifier U1 is connected with the output end of the analog switch, the positive input of the current amplifier U2A is connected with the output end of the instrument amplifier U1, the negative input is connected with the output end of the current amplifier U2A, the output end of the current amplifier U2A is connected with the sampling resistor R, the other end of the sampling resistor is a constant current source output end, the output end of the constant current source is connected with the positive input end of another high-output current amplifier U2B, and the negative input and the output end of U2B are connected with the feedback end of the instrument amplifier U1 to form a voltage negative feedback circuit.
Preferably, the analog switch array 3 is formed by arranging and distributing a plurality of analog switches 9 in parallel, and works independently, the input end of the analog switch 9 is connected with the voltage output end of the digital-to-analog converter 10 of the digital-to-analog converter array 4, the control end is connected with the singlechip, and the output end is connected with the control end of the voltage-controlled current source array; when the control end inputs high level, the analog switch is in a conducting state, and when the control end inputs low level, the analog switch is in an off state.
Preferably, the digital-to-analog converter array 4 is formed by parallel arrangement and distribution of a plurality of digital-to-analog converters 10, and works independently, the input end of the digital-to-analog converter 10 performs SPI communication with the MCU control circuit 5, obtains a digital voltage signal with a height required by the optical waveguide, and the output end is connected with the analog switch to transmit the converted analog voltage signal to the analog switch.
Preferably, the MCU serial port driving circuit is composed of a CH340G chip, two small lamps are connected in series at RXD and TXD ends, the speed change of data transmission is observed by observing the flicker speed of the small lamps, and crystal oscillators are arranged at XI and XO positions to meet the requirement of calibrating the oscillation frequency of the chip.
Another object of the present invention is to provide a driving method of an Optical Phased Array (OPA) driving circuit based on pulse height, which specifically includes the following steps:
step one: after the power is on, the upper computer PC7 measures the specific position of the optical CCD camera in real time, calculates the voltage value of each path required by deflection through improving a genetic algorithm, transmits signals to the MCU control circuit 5 through a serial port, and simultaneously puts the signals into the SDRAM6 for temporary storage;
step two: SPI communication is carried out between the MCU control circuit 5 and the digital-to-analog converter array 4, a voltage amplitude signal is transmitted to the digital-to-analog converter array 4, digital-to-analog conversion is carried out, and an analog voltage signal is obtained;
step three: generating pulse voltage signals with the same pulse width under the control of the MCU control circuit 5 through analog voltage signals of the analog switch array 3;
step four: the voltage-controlled current source circuit 8 converts the pulse voltage signals with the same pulse width into pulse current signals with the same pulse width, and the pulse current signals generated by the voltage-controlled current source circuit 8 are loaded to the phase control end of the optical phased array chip 1 to realize light beam scanning.
Compared with the prior art, the invention has the following advantages:
1. the MCU and the peripheral circuit are adopted to form the circuit, and the circuit structure is simple;
2. the pulse signal can be used for completing the short-time heating treatment of the waveguides in the chip, so that the temperature crosstalk among the waveguides can not be caused by excessive heating after the refractive index of the optical waveguides is changed, and the stability of the system is greatly improved;
3. the pulse current signals with the same pulse width are utilized to heat each waveguide equally, so that poor beam coherence effect caused by inconsistent heating time is avoided.
4. When the circuit works, the power consumption is all on the amplifier U2A instead of the instrument amplifier, so that the output capacity of the constant current source is greatly improved, and meanwhile, the cost is reduced;
5. the singlechip and the upper computer adopt RS232 serial communication, and adopt a frame head and frame tail verification mode, so that the communication efficiency is high and the error rate is low.
Drawings
FIG. 1 is a system block diagram of an optical phased array drive circuit based on pulse height according to the present invention;
in the figure: the optical phased array chip 1, the voltage-controlled current source array 2, the analog switch array 3, the digital-to-analog converter array 4, the MCU control circuit 5, the Synchronous Dynamic Random Access Memory (SDRAM) 6, the PC upper computer 7, the voltage-controlled current source circuit 8, the analog switch 9 and the digital-to-analog converter 10;
FIG. 2 is a schematic diagram of pulse height driving of an optical phased array driving circuit based on pulse height according to the present invention;
in the figure: i1, I2 to In: pulse current signal height; q1, Q2 to Qn: channel power consumption within a single pulse period; τ: a time window;
FIG. 3 is a circuit diagram of a digital to analog conversion and analog switch array of an optical phased array driving circuit based on pulse height according to the present invention;
in the figure: LTC2664: DAC of four-way SPI interface by adenuo semiconductor (ADI); ADG5412: high voltage latch-up prevention four-channel SPST switch from adenuo semiconductor (ADI); CS (cs_a): SPI chip select signal; SCK (sck_a): SPI clock signal; SDI (sdi_a1, sdi_a2, sdi_a3, sdi_a4): SPI data input signal; VOUT0, VOUT1, VOUT3 (VOA 1 to VOA 16): analog voltage output of the DAC;
FIG. 4 is a voltage controlled current source circuit diagram of an optical phased array driving circuit based on pulse height according to the present invention;
in the figure: u1: an AD8422 chip; u2 and U3: an LM7332 chip; c1 to C10, capacitance;
FIG. 5 is a schematic diagram of an MCU serial port driving circuit of an optical phased array driving circuit based on pulse height;
in the figure: u1: CH340G; r1 and R2: a resistor; LED1, LED2: a light emitting diode.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings in the following examples. It should be understood that the detailed description and specific examples, while indicating and illustrating the invention, are not intended to limit the invention.
The invention realizes a complete driving system for the optical phased array chip, so that the light beam deflects at different positions, a large-scale current driving unit is adopted, and an MCU is used for performing system level control on the output current of each unit circuit, protocol transmission is performed through a serial port and an upper computer, so that the upper computer can measure the specific position of an optical CCD camera to detect the light plate in real time, and the current value of each path required by deflection is calculated through an algorithm.
As shown in fig. 1, an optical phased array driving circuit based on pulse height comprises an optical phased array chip 1, a voltage-controlled current source array 2, an analog switch array 3, a digital-to-analog converter array 4, an MCU control circuit 5, a Synchronous Dynamic Random Access Memory (SDRAM) 6 and a PC host 7; the PC upper computer 7 sends a voltage amplitude digital signal required by pulse to the MCU control circuit 5 through the MCU serial port driving circuit, the MCU control circuit 5 transmits the voltage amplitude digital signal to the digital-to-analog converter array 4, then the converted analog signal is loaded into the analog switch array 3, and the analog switch array 3 generates a pulse voltage signal with the same pulse width under the control of the MCU control circuit 5; then, the pulse voltage signal passes through the voltage-controlled current source array 2, and the pulse current signal generated by the voltage-controlled current source array 2 is transmitted into the phase control end of the optical phased array chip 1 to realize light beam scanning.
The principle of operation of the pulse height driven phased array (OPA) is shown in figure 2. In fig. 2, the current signals with different pulse heights (I1, I2-In) control the optical phased array chip, the pulse height signals In a single pulse period can heat the waveguide In the same short time (τ), and the modulation of the waveguide In the optical phased array chip is completed In the relaxation time, so that the problems of thermal crosstalk between the waveguides caused by overlong heating time, poor beam coherence effect caused by inconsistent heating time and the like are avoided.
The optical phased array chip 1 is a multipath light output control, light beam scanning is realized by changing the phase of each path of optical waveguide, and the phase control of the optical waveguide is realized by changing the refractive index of the waveguide by changing the current or voltage loaded on the optical phased array chip.
The voltage-controlled current source array 2 is formed by arranging and distributing a plurality of voltage-controlled current source circuits 8 in parallel and works independently, and the voltage-controlled current source circuits 8 consist of a rail-to-rail precision instrument amplifier (AD 8422), two high-output current amplifiers (LM 7332) and a sampling resistor; the control end of the voltage-controlled current source circuit is connected with a pulse voltage signal output by an analog switch of the analog switch array 3, the input end of the instrument amplifier U1 is connected with the output end of the analog switch, the positive input of the current amplifier U2A is connected with the output end of the instrument amplifier U1, the negative input is connected with the output end of the current amplifier U2A, the output end of the current amplifier U2A is connected with the sampling resistor R, the other end of the sampling resistor is a constant current source output end, the output end of the constant current source is connected with the positive input end of another high-output current amplifier U2B, and the negative input and the output end of U2B are connected with the feedback end of the instrument amplifier U1 to form a voltage negative feedback circuit.
The voltage-controlled current source circuit diagram is shown in fig. 4, and the voltage-controlled current source circuit consists of a rail-to-rail precision instrument amplifier (AD 8422), two high-output current amplifiers (LM 7332) and a sampling resistor; the pulse voltage signal output by the analog switch is connected with the control end of the voltage-controlled current source, the input end of the instrument amplifier U1 is connected with the output end of the analog switch, the positive input of the current amplifier U2A is connected with the output end of the instrument amplifier U1, the negative input of the current amplifier U2A is connected with the output end of the current amplifier U2A, the output end of the current amplifier U2A is connected with the sampling resistor R, the other end of the sampling resistor is a constant current source output end, the output end of the constant current source is connected with the positive input end of another high-output current amplifier U2B, and the negative input and output end of U2B are connected with the feedback end of the instrument amplifier U1 to form a voltage negative feedback circuit.
The analog switch array 3 is formed by arranging and distributing a plurality of analog switches 9 in parallel and works independently, the input end of the analog switch 9 is connected with the voltage output end of the digital-to-analog converter 10 of the digital-to-analog converter array 4, the control end is connected with the singlechip, and the output end is connected with the control end of the voltage-controlled current source array; when the control end inputs high level, the analog switch is in a conducting state, and when the control end inputs low level, the analog switch is in an off state.
The digital-to-analog converter array 4 is formed by parallel arrangement and distribution of a plurality of digital-to-analog converters 10, and works independently, the input end of each digital-to-analog converter 10 carries out SPI communication with the MCU control circuit 5, digital voltage signals with the height required by the optical waveguide are obtained, the output end of each digital-to-analog converter is connected with the analog switch, and the converted analog voltage signals are transmitted to the analog switch.
The circuit diagram of the digital-to-analog converter array and the analog switch array is shown in fig. 3, the digital-to-analog conversion process is mainly realized by connecting a singlechip MCU with a plurality of digital-to-analog conversion chips (LTC 2664) through SPI serial ports, controlling the output threshold value of the digital-to-analog conversion chips (LTC 2664), and the output range of the chips can reach +/-10V, so that the peak value requirement of the input voltage required by a voltage-controlled current source can be met; the pulse signal generating process mainly comprises an analog switch array chip (ADG 5412), and the on-resistance curve of the chip is very flat in the whole analog input range, so that good linearity and low distortion performance can be ensured when the audio signal is switched. The input ends (D1, D2, D3 and D4) of the analog switch array are connected with the voltage output ends of the DAC chip, the control ends (IN 1, IN2, IN3 and IN 4) are connected with the single chip microcomputer, when the control ends input high levels, the analog switches are IN on states, and when the control ends input low levels, the analog switches are IN off states. The single chip microcomputer controls the output end to generate pulse control signals with the same pulse width, so that the internal switch of the analog switch is switched between on and off states at high speed, when one end has input voltage, the other end of the analog switch is output to become a pulse output signal, the other end of the analog switch is output to the next stage of voltage-controlled current source, and the output voltage is modulated to be a pulse voltage signal.
The MCU control circuit 5 receives a digital voltage signal calculated by the PC upper computer 7, and outputs the signal to the digital-to-analog converter array 4 through SPI communication; the MCU control circuit is connected with the control end of the analog switch array 3 and provides control signals with the same pulse width for the analog switch.
The SDRAM6 is used for temporarily storing digital voltage signals transmitted to the MCU control circuit 5 by the upper computer PC 7.
As shown in FIG. 5, the MCU serial port driving circuit mainly comprises CH340G chips, two small lamps are connected in series at RXD and TXD ends, the speed change of data transmission is observed by observing the flicker speeds of the small lamps, a crystal oscillator is arranged at XI and XO positions to meet the requirement of calibrating the oscillation frequency of the chip, the singlechip is communicated with the upper computer through a UART, the accuracy of data is increased by checking frame heads and frame tails, the upper computer firstly transmits three 8bits of frame heads of 0xFA,0xEA and 0xDA, after the three data are read by the singlechip, the calibration is successful, then the singlechip receives the upper computer to transmit 64 paths of voltage data, then the upper computer transmits the three frames of 0xFB,0xEB and 0xDB, and meanwhile, the singlechip transmits the 64 bits of voltage data to drive 64 paths of DAC output voltages, so that the upper computer can control the pulse current amplitude.
Example 2
A driving method of an Optical Phased Array (OPA) driving circuit based on pulse height comprises the following specific steps:
step one: after the power is on, the upper computer PC7 measures the specific position of the optical CCD camera in real time, calculates the voltage value of each path required by deflection through improving a genetic algorithm, transmits signals to the MCU control circuit 5 through a serial port, and simultaneously puts the signals into the SDRAM6 for temporary storage;
step two: SPI communication is carried out between the MCU control circuit 5 and the digital-to-analog converter array 4, a voltage amplitude signal is transmitted to the digital-to-analog converter array 4, digital-to-analog conversion is carried out, and an analog voltage signal is obtained;
step three: generating pulse voltage signals with the same pulse width under the control of the MCU control circuit 5 through analog voltage signals of the analog switch array 3;
step four: the voltage-controlled current source circuit 8 converts the pulse voltage signals with the same pulse width into pulse current signals with the same pulse width, and the pulse current signals generated by the voltage-controlled current source circuit 8 are loaded to the phase control end of the optical phased array chip 1 to realize light beam scanning.
The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings, but the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solution of the present invention within the scope of the technical concept of the present invention, and all the simple modifications belong to the protection scope of the present invention.
In addition, the specific features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various possible combinations are not described further.
Moreover, any combination of the various embodiments of the invention can be made without departing from the spirit of the invention, which should also be considered as disclosed herein.
Claims (6)
1. The optical phased array driving circuit based on pulse height is characterized by comprising an optical phased array chip (1), a voltage-controlled current source array (2), an analog switch array (3), a digital-to-analog converter array (4), an MCU control circuit (5), a synchronous dynamic random access memory (6) and a PC upper computer (7); the PC upper computer (7) sends voltage amplitude digital signals required by pulses to the MCU control circuit (5) through the MCU serial port driving circuit, specifically, the upper computer PC7 measures the specific position of the optical CCD camera in real time, calculates each path of voltage value required by deflection through improving a genetic algorithm, transmits the signals to the MCU control circuit (5) through serial ports, the MCU control circuit (5) transmits the voltage amplitude digital signals to the digital-analog converter array (4), then loads converted analog signals into the analog switch array (3), and the analog switch array (3) generates pulse voltage signals with the same pulse width under the control of the MCU control circuit (5); then pulse voltage signals pass through the voltage-controlled current source array (2), and pulse current signals with different pulse heights generated by the voltage-controlled current source array (2) are transmitted into a phase control end of the optical phased array chip (1) to realize light beam scanning; the SDRAM (6) is used for temporarily storing digital voltage signals transmitted to the MCU control circuit (5) by the upper computer PC (7).
2. An optical phased array driving circuit based on pulse height according to claim 1, characterized in that the voltage controlled current source array (2) is composed of a plurality of voltage controlled current source circuits (8) which are arranged in parallel and distributed and work independently, the voltage controlled current source circuits (8) are composed of a rail-to-rail precision instrumentation amplifier U1, two high output current amplifiers U2A and U2B and a sampling resistor R; the control end of the voltage-controlled current source circuit is connected with a pulse voltage signal output by an analog switch of the analog switch array (3), the input end of the instrument amplifier U1 is connected with the output end of the analog switch, the positive input of the current amplifier U2A is connected with the output end of the instrument amplifier U1, the negative input is connected with the output end of the current amplifier U2A, the output end of the current amplifier U2A is connected with the sampling resistor R, the other end of the sampling resistor is a constant current source output end, the constant current source output end is connected with the positive input end of another high-output current amplifier U2B, and the negative input and the output end of U2B are connected with the feedback end of the instrument amplifier U1 to form a voltage negative feedback circuit.
3. The optical phased array driving circuit based on pulse height according to claim 1, wherein the analog switch array (3) is formed by arranging and distributing a plurality of analog switches (9) in parallel, and works independently, an input end of the analog switch (9) is connected with a voltage output end of a digital-to-analog converter (10) of the digital-to-analog converter array (4), a control end is connected with the MCU control circuit, and an output end is connected with a control end of the voltage-controlled current source array; when the control end inputs high level, the analog switch is in a conducting state, and when the control end inputs low level, the analog switch is in an off state.
4. The optical phased array driving circuit based on pulse height according to claim 1, wherein the digital-to-analog converter array (4) is formed by parallel arrangement and distribution of a plurality of digital-to-analog converters (10), the digital-to-analog converters (10) work independently, the input end of each digital-to-analog converter (10) communicates with the MCU control circuit (5) through SPI, digital voltage signals with the height required by the optical waveguide are obtained, the output end of each digital-to-analog converter is connected with the analog switch, and the converted analog voltage signals are transmitted to the analog switch.
5. The optical phased array driving circuit based on pulse height according to claim 1, wherein the MCU serial port driving circuit is composed of a CH340G chip, two small lamps are connected in series at RXD and TXD ends, speed change of data transmission is observed by observing the flicker speed of the small lamps, and crystal oscillators are arranged at XI and XO to meet the requirement of calibrating the oscillation frequency of the chip.
6. The driving method of an optical phased array driving circuit based on pulse height as claimed in claim 2, comprising the specific steps of:
step one: after the power is on, the upper computer PC (7) measures the specific position of the optical CCD camera in real time to detect the light plate, calculates the voltage value of each path required by deflection through improving a genetic algorithm, transmits signals to the MCU control circuit (5) through a serial port, and simultaneously puts the signals into the SDRAM (6) for temporary storage;
step two: SPI communication is carried out between the MCU control circuit (5) and the digital-to-analog converter array (4), a voltage amplitude signal is transmitted to the digital-to-analog converter array (4), and digital-to-analog conversion is carried out, so that an analog voltage signal is obtained;
step three: generating pulse voltage signals with the same pulse width under the control of an MCU control circuit (5) through analog voltage signals of an analog switch array (3);
step four: the pulse voltage signals with the same pulse width are converted into pulse current signals with the same pulse width through the voltage-controlled current source circuit (8), and the pulse current signals generated by the voltage-controlled current source circuit (8) are loaded to the phase control end of the optical phased array chip (1) to realize light beam scanning.
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