CN112928495B - High-precision sequential phase feeding method for K-bit digital phase shifter based on FPGA - Google Patents

High-precision sequential phase feeding method for K-bit digital phase shifter based on FPGA Download PDF

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CN112928495B
CN112928495B CN202110084260.1A CN202110084260A CN112928495B CN 112928495 B CN112928495 B CN 112928495B CN 202110084260 A CN202110084260 A CN 202110084260A CN 112928495 B CN112928495 B CN 112928495B
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phase
array
wave control
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control code
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CN112928495A (en
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张仁李
赵雨航
盛卫星
马晓峰
韩玉兵
崔杰
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Nanjing University of Science and Technology
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q3/00—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
    • H01Q3/26—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture
    • H01Q3/30—Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elements; varying the distribution of energy across a radiating aperture varying the relative phase between the radiating elements of an array
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Abstract

The invention discloses a high-precision sequential phase feeding method for a K-bit digital phase shifter based on an FPGA (field programmable gate array). The method is used for carrying out subarray division on an array surface aiming at an active phased array antenna with array elements arranged in a central symmetry manner, calculating and quantifying to obtain an array element theory phase-fed wave control code, and carrying processing and truncation processing are carried out on the array element theory phase-fed wave control code to obtain two phase-fed errors. And feeding phases according to the sequence of the subarrays, and determining the actual phase feeding mode of the array elements in each subarray through iteration. Under the condition of ensuring high beam pointing accuracy, the FPGA has moderate computation complexity and real-time phase feed, and meets the requirements of rapid beam scanning and tracking of the phased array antenna.

Description

High-precision sequential phase feeding method for K-bit digital phase shifter based on FPGA
The technical field is as follows:
the invention belongs to the field of phased array antennas, and particularly relates to a high-precision sequential phase feeding method for a K-bit digital phase shifter based on an FPGA (field programmable gate array).
Background
An active phased array antenna system is an important component of a digital array radar and is widely applied to beam space scanning to quickly search, intercept and track targets. In an active phased array antenna system, each antenna element is connected to a corresponding T/R assembly. Wherein, T/R subassembly transmission channel mainly includes: phase shifter, attenuator, transmission switch, drive amplifier and power amplifier, etc. The system can control the phase of each antenna array element radiation signal by driving the phase shifter, realize directional power synthesis of the radiation signals of the plurality of T/R components in space, and complete the formation of the transmission beam.
The earliest microstrip phase shifters achieved phase shifting by changing the length of the microstrip lines. With the development of analog technology, analog devices such as varactors are applied to analog phase shifters, and although the phase shifting precision is high and the phase shifting is continuous, the analog phase shifters have the disadvantages of complex control circuits, low reliability and the like. Compared with an analog phase shifter, the digital phase shifter such as a switch type digital phase shifter and a load type digital phase shifter is simple to control, stable in phase shifting and high in integration level. Therefore, the digital phase shifter is widely applied to an active phased array antenna system.
However,the phase shift of the K-bit digital phase shifter is stepped to delta 2 pi/2 K I.e. only integer multiples of delta are provided. When the phase feeding value of the array element is not integral multiple of delta, only the theoretical phase feeding value can be approximated to complete the configuration of the phase-shifting wave control code. This produces phase quantization errors, which ultimately results in reduced beam pointing accuracy.
The active phased array antenna needs to complete tasks such as rapid beam scanning and tracking, and increasingly higher requirements are put forward on the hardware structure and the processing speed of an antenna wave control system. The FPGA (Field-Programmable Gate Array) has abundant logic resources and high-speed data parallel processing capability, so that the FPGA can complete the real-time calculation of the phase-feed wave control code of the large-Array wave control system. Meanwhile, the FPGA utilizes abundant IO pin resources to realize connection with the digital TR component interface, and rapid configuration of multi-bit wave control information is completed.
Conventional phase-fed calculation methods such as a truncation method, a carry method and a rounding method can cause the beam pointing error of the phased array antenna to present a periodic characteristic.
The invention content is as follows:
the invention aims to provide a high-precision sequential phase feeding method of a K-bit digital phase shifter based on an FPGA.
The technical scheme for realizing the purpose of the invention is as follows: a high-precision sequential phase feeding method for a K-bit digital phase shifter based on an FPGA (field programmable gate array) comprises the following steps of:
step 1, establishing a triangularly-arranged active phased-array antenna consisting of 4N isotropic antenna array elements, wherein all the array elements are centrosymmetric about an origin, and the array elements are numbered from No.0 to No. (4N-1);
step 2, carrying out subarray division on the array surface, wherein array elements No. (2N-2) and No. (2N-1) form a subarray (N is 1, 2N), and 2N subarrays are counted;
step 3, according to the preset beam direction and the working wavelength, array element No. 0-No. (2N-1) is taken, a theoretical phase-fed wave control code is obtained through calculation and quantization, and carry and truncation processing is carried out on the theoretical phase-fed wave control code to obtain a carry phase-fed error and a truncation phase-fed error;
step 4, array element No. 0-No. (2N-1) is taken, the actual phase feeding mode of the nth sub-array is determined in sequence from N-1 to N-N, the actual phase feeding mode of the 2N +1-N sub-arrays is determined according to the central symmetry characteristic of the array surface, and the cycle is performed for N times to obtain the actual phase feeding wave control code of the full array;
step 5, the calculation of the final phase-fed wave control code of the full array is realized through the FPGA, and the method specifically comprises the following steps: quantizing working parameters in advance and storing the working parameters into an RAM (random access memory), and reading a parametric quantization ROM according to a preset beam direction and a working wavelength during calculation; according to the step 3 and the step 4, calculating the carry and truncation phase feeding errors of the upper half array element, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array;
and 6, configuring a phase feed wave control code of the digital TR component according to the corresponding wave control time sequence to complete real-time phase feed of the phased array antenna.
Preferably, the specific method for obtaining the carry phase feed error and the truncation phase feed error according to the predetermined beam direction and the operating wavelength is as follows:
step 3-1: calculating and quantifying to obtain a theoretical phase-fed wave control code of the No.n array element;
step 3-2: carrying out truncation processing and carry processing on the theoretical phase-fed wave control code of the No.n array element to obtain a carry phase-fed error and a truncation phase-fed error, and specifically comprising the following steps:
actual wave control code C of No. n array element n Phase feed value phi n And phase error delta phi n Comprises the following steps:
Figure BDA0002910222600000021
φ n ＝C n Δ
δφ n ＝δC n Δ
wherein, carry represents carry quantization, truncate represents truncation quantization; delta C n Error introduced for wave control code rounding, | δ C n Phase shift step of digital phase shifter with less than 1 and K bits of delta, C the o， n Feeding a phase wave control code for theory;
the actual phase-fed wave control code, phase-fed value and phase-fed error obtained by the theoretical phase-fed wave control code according to carry processing are respectively marked as C up,n ，φ up,n ，δφ up,n (ii) a The actual phase-fed wave control code, phase-fed value and phase-fed error obtained by truncation are respectively recorded as C dn,n ，φ dn,n ，δφ dn,n 。
Preferably, the specific method for obtaining the theoretical phase-fed wave control code of the no.n array element by calculation and quantization comprises the following steps:
the theoretical phase-feed value of the No. n array element is as follows:
Figure BDA0002910222600000031
wherein, the No. n array element coordinate (x) n ,y n ) Can be expressed as (i) n dx,k n dy)，
Figure BDA0002910222600000032
(i n ,k n ) Array element grid number;
Figure BDA0002910222600000033
is the off-axis angle and the rotation angle of the predetermined transmission beam, d is the array element spacing in the x-axis direction,
Figure BDA0002910222600000034
a predetermined direction is set for the emission beam, and lambda is the working wavelength;
the phase shift of the K-bit digital phase shifter is stepped to delta 2 pi/2 K The No.n array element theory phase-feed wave control code is as follows:
Figure BDA0002910222600000035
preferably, the actual phase feeding mode of the nth sub-array is sequentially determined from N-1 to N-N, the actual phase feeding mode of the 2N +1-N sub-arrays is determined according to the central symmetry characteristic of the array plane, and the iteration is performed for N times, so as to obtain the actual phase feeding wave control code of the full array:
step 4-1: calculating the off-axis angle and the rotation angle deviation caused by the carry and the truncation of the nth order feed phase, specifically as follows:
the quantization errors of the array element phases in the first n-1 sub-arrays and the central symmetrical sub-array thereof are determined by the first n-1 times of sequential phase feeding and are marked as delta phi tr,l (l is more than or equal to 0 and less than or equal to 2 n-3); for the quantization error of the phases of two array elements in the nth sub-array, respectively converting delta phi up,2n-1 +δφ up,2n-2 ，δφ dn,2n-1 +δφ dn,2n-2 Substituting delta phi of the formula 2n-1 +δφ 2n-2 Obtaining the carry phase feed angle deviation caused by the nth iteration
Figure BDA0002910222600000036
And phase feed angle deviation
Figure BDA0002910222600000037
Figure BDA0002910222600000041
Wherein, I n The excitation amplitude of the No.n array element is obtained; coefficient p 1 ,p 2 ,p 3 ,p 4 The expression is as follows,
Figure BDA0002910222600000042
step 4-2: calculating the carry and truncated beam pointing error cosine values of the nth order feed phase, specifically:
noting the actual beam pointing as
Figure BDA0002910222600000043
θ 1 ＝θ 0 +δθ,
Figure BDA0002910222600000044
The predetermined beam pointing unit vector is noted
Figure BDA0002910222600000045
The actual beam pointing unit vector is noted
Figure BDA0002910222600000046
Defining the angle between the actual beam pointing direction and the predetermined beam pointing direction as gamma, then
Figure BDA0002910222600000047
Figure BDA0002910222600000048
Feeding the carry phase to the angular deviation
Figure BDA0002910222600000049
Substituting into the above formula
Figure BDA00029102226000000410
Obtaining the cosine value cos gamma of the pointing error of the carry feed phase wave beam of the nth iteration up,n (ii) a Deviation of phase feeding angle of rounding
Figure BDA00029102226000000411
Substituting into the above formula
Figure BDA00029102226000000412
Obtaining the truncation phase-fed wave beam pointing error cosine value cos gamma of the nth iteration dn,n ；
Step 4-3: determining an actual phase feeding mode of an array element in the nth subarray, specifically:
comparing cosine value cos gamma of pointing error of carry and truncated phase-fed wave beam up,n And cos gamma down,n If cos γ up,n ≥cosγ dn,n If so, selecting carry feeding phase for two array elements No. (2n-1) and No. (2n-2) in the nth subarray; on the contrary, selecting a truncation phase feeding, and obtaining the wave control codes of No. (4N-2N) and No. (4N-2N +1) array elements according to the central symmetry characteristic of the array surface;
step 4-4: and (5) cycling for N times to obtain the actual phase-fed wave control code of the full array.
6. Preferably, the specific method of pre-quantizing the operating parameters and storing the operating parameters in the RAM, and reading the parametric quantization ROM according to the predetermined beam direction and the operating wavelength during calculation is as follows:
pointing to a beam
Figure BDA0002910222600000051
Quantification of the sine value, stepping at fixed angular intervals, quantification and amplification of N of 2 1 The power; quantizing the product of array element distance, wavelength and phase shifter digit, and amplifying N of 2 2 To the power, quantizing and then using lambda respectively x ,λ y Represents; the variables are quantized and stored in a ROM, and read enabling and reading addresses of the ROM are controlled according to subsequent calculation requirements, preset beam directions and working wavelengths, and corresponding parameter quantized values are output.
Compared with the prior art, the invention has the following remarkable advantages:
the invention adopts the hardware architecture of the FPGA, thus ensuring the real-time performance and the flexibility of the phase-feed calculation;
compared with the traditional phase feeding method, the invention obviously and stably improves the phase feeding efficiency by feeding the phases in sequence according to the subarrays
The phase feeding precision of the wave control system of the active phased array antenna;
by dividing the large array into subarrays, the phase feed calculation time is changed into 50% of the phase feed according to the array elements.
The present invention is described in further detail below with reference to the attached drawing figures.
Drawings
FIG. 1 is a flow chart of a high-precision sequential phase feeding method of a K-bit digital phase shifter based on an FPGA.
Fig. 2 is a schematic diagram of the array element arrangement and numbering of the active phased array antenna in the triangular arrangement.
FIG. 3 is an array element grid number (i) n ,k n ) Numbered scheme, wherein FIG. 3(a) is i n Numbered scheme, and k in FIG. 3(b) n And (4) numbering the drawings.
Fig. 4 is a diagram of spatial coordinate system definition and off-axis angle, rotation angle, beam pointing error definition.
Fig. 5 is a schematic diagram of dividing and numbering the sub-arrays of the active phased array antenna in a triangular arrangement.
FIG. 6 is a flow chart of a theoretical phase-fed wave control code and its rounding and carry phase-fed error calculation FPGA implementation.
Fig. 7 is a flow chart of an FPGA implementation of beam pointing angle deviation calculation.
FIG. 8 is a flow chart of a beam pointing error cosine value calculation FPGA implementation.
Fig. 9 is a plot comparison of beam pointing in azimuth, elevation (α, β) dimensions for the present invention and rounding feed method when the predetermined beam pointing is (20.4 ° ), where fig. 9(a) azimuth dimension plot comparison and fig. 9(b) elevation dimension plot comparison.
FIG. 10 is a comparison of the beam pointing error γ for the present invention and the rounding feed method at different beam scan angles, where the predetermined beam pointing is (θ) 0 ,φ 0 )，
Figure BDA0002910222600000065
And theta 0 0-40 degrees and 0.02 degrees as steps.
FIG. 11 is a graph of the results of the present invention in an FPGA implementation with a predetermined beam pointing direction set to (35, 40). FIG. 11(a) is a comparison graph of FPGA implementation and simulation phase feed wave control code; fig. 11(b) is a direction diagram comparison of azimuth dimension and pitch dimension after simulation and FPGA implementation.
Detailed Description
As shown in fig. 1, a high-precision sequential phase feeding method for a K-bit digital phase shifter based on an FPGA includes the following steps:
step 1, establishing a triangular-arrangement active phased array antenna consisting of 4N array elements with isotropy, wherein all the array elements are in central symmetry with respect to an original point. Neglecting the mutual coupling effect between the array elements, the array elements are numbered from No.0 to No. (4N-1).
And 2, carrying out subarray division on the array surface, wherein array elements No. (2N-2) and No. (2N-1) form a subarray (N is 1, 2N), and 2N subarrays are counted.
And 3, according to the preset beam direction and the working wavelength, taking the upper half array element, namely No. 0-No. (2N-1), calculating and quantizing to obtain a theoretical phase-fed wave control code, and carrying and truncating the theoretical phase-fed wave control code to obtain a carry phase-fed error and a truncating phase-fed error. The method specifically comprises the following steps:
step 3-1: and calculating and quantizing the upper half array element to obtain the theoretical phase-fed wave control code of the No.n array element. The method comprises the following specific steps:
assuming an array element spacing d in the x-axis direction, the transmit beam is intended to be directed at
Figure BDA0002910222600000061
The working wavelength is lambda, and the theoretical phase-feed value of the No.n array element is as follows:
Figure BDA0002910222600000062
wherein, No.n array element coordinate (x) n ,y n ) Is represented by (i) n dx,k n dy)，
Figure BDA0002910222600000063
(i n ,k n ) Array element grid number;
Figure BDA0002910222600000064
is the off-axis angle and the rotation angle of the predetermined transmit beam.
The phase shift of the K-bit digital phase shifter is stepped to delta 2 pi/2 K Therefore, the theoretical phase-fed wave control code of the no.n array element is:
Figure BDA0002910222600000071
step 3-2: and carrying out truncation processing and carry processing on the theoretical phase-fed wave control code of the No.n array element to obtain a carry phase-fed error and a truncation phase-fed error. The method specifically comprises the following steps:
because the phase shifter only provides integral multiple phase-feed value of delta, actual wave control code C of No.n array element n Phase feed value phi n And phase error delta phi n Comprises the following steps:
Figure BDA0002910222600000072
φ n ＝C n Δ
δφ n ＝δC n Δ
wherein, carry represents carry quantization, truncate represents truncation quantization; delta C n Error introduced for the rounding of the wave control code, | δ C n |＜1，2 K Is the maximum phase shift control word;
the actual phase-fed wave control code, phase-fed value and phase-fed error obtained by the theoretical phase-fed wave control code according to carry processing are respectively marked as C up,n ，φ up,n ，δφ up,n (ii) a The actual phase-fed wave control code, phase-fed value and phase-fed error obtained by truncation are respectively recorded as C dn,n ，φ dn,n ，δφ dn,n 。
And 4, taking the upper half array element, sequentially determining the actual phase feeding mode of the nth sub array from N to N, and determining the actual phase feeding mode of the 2N +1-N sub array according to the central symmetry characteristic of the array surface. And circulating for N times to obtain the actual phase-fed wave control code of the full array. The method specifically comprises the following steps:
step 4-1: calculating the off-axis angle and the rotation angle deviation caused by the carry and the truncation of the nth order feed phase, specifically as follows:
the quantization errors of the array element phases in the first n-1 sub-arrays and the central symmetrical sub-array are determined by the first n-1 times of sequential phase feeding and are marked as delta phi tr,l (l is more than or equal to 0 and less than or equal to 2 n-3); for the quantization error of the phases of two array elements in the nth sub-array, respectively converting delta phi up,2n-1 +δφ up,2n-2 ，δφ dn,2n-1 +δφ dn,2n-2 Substituting delta phi of the formula 2n-1 +δφ 2n-2 Obtaining the carry phase feed angle deviation caused by the nth iteration
Figure BDA0002910222600000073
And phase feed angle deviation
Figure BDA0002910222600000074
Figure BDA0002910222600000081
Wherein the content of the first and second substances,(x l ,y l ) Is No. l array element coordinate, I l The excitation amplitude of No.l array element; coefficient p 1 ,p 2 ,p 3 ,p 4 The expression is as follows,
Figure BDA0002910222600000082
step 4-2: and calculating the carry and truncated beam pointing error cosine values of the nth order feed phase. The method specifically comprises the following steps:
noting the actual beam pointing as
Figure BDA0002910222600000083
θ 1 ＝θ 0 +δθ,
Figure BDA0002910222600000084
For a predetermined beam pointing direction, δ θ is defined as the off-axis angular difference between the predetermined beam pointing direction and the actual beam pointing direction,
Figure BDA0002910222600000085
defined as the difference in rotation angle between the predetermined beam pointing direction and the actual beam pointing direction; the predetermined beam pointing unit vector is noted
Figure BDA0002910222600000086
The actual beam pointing unit vector is noted
Figure BDA0002910222600000087
Defining the angle between the actual beam pointing direction and the predetermined beam pointing direction as gamma, then
Figure BDA0002910222600000088
Figure BDA0002910222600000089
Feeding the carry phase to the angular deviation
Figure BDA00029102226000000810
Substituting into the above formula
Figure BDA00029102226000000811
Obtaining the cosine value cos gamma of the pointing error of the carry feed phase wave beam of the nth iteration up,n (ii) a Deviation of phase feeding angle of rounding
Figure BDA00029102226000000812
Substituting into the above formula
Figure BDA00029102226000000813
Obtaining the truncation phase-fed wave beam pointing error cosine value cos gamma of the nth iteration dn,n 。
Step 4-3: and determining the actual phase feeding mode of the array elements in the nth subarray. The method specifically comprises the following steps:
comparing cosine value cos gamma of pointing error of carry and truncated phase-fed wave beam up,n And cos gamma down,n If cos γ up,n ≥cosγ dn,n If so, selecting carry feeding phase for two array elements No. (2n-1) and No. (2n-2) in the nth sub-array; otherwise, the truncation feed is selected. And obtaining the wave control codes of No. (4N-2N) and No. (4N-2N +1) array elements according to the central symmetry characteristic of the array surface.
Step 4-4: and (4) cycling the steps 4-1 to 4-3N times when N is N +1 to obtain the actual phase-fed wave control code of the full array.
Step 5, the calculation of the final phase-fed wave control code of the full array is realized through the FPGA, and the method specifically comprises the following steps: quantizing working parameters in advance and storing the working parameters into an RAM (random access memory), and reading a parametric quantization ROM according to a preset beam direction and a working wavelength during calculation; and (4) calculating the carry and truncation phase feeding errors of the upper half array element according to the step 3 and the step 4, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method specifically comprises the following steps:
step 5-1: and quantizing the working parameters in advance and storing the working parameters into the RAM, and reading the parametric quantization ROM according to the preset beam direction and the working wavelength during calculation. The method specifically comprises the following steps:
pointing to a beam
Figure BDA0002910222600000091
The sine value is quantized, stepped at fixed angular intervals, and N of 2 is quantized and amplified 1 The power; quantizing the product of array element distance, wavelength and phase shifter digit, and amplifying N of 2 2 To the power, quantizing and then using lambda respectively x ,λ y And (4) showing. The above variables are quantized and stored in ROM. And controlling the read enable and read address of the ROM according to the subsequent calculation requirement, the preset beam direction and the working wavelength, and outputting the corresponding parameter quantization value.
Step 5-2: and (4) calculating the carry and truncation phase feeding errors of the upper half array element according to the step 3 and the step 4, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method comprises the following specific steps:
according to the parameter quantification mode in the step 5-1, the calculation formula of the No.n theoretical wave control code array element can be quantified to
Figure BDA0002910222600000092
Wherein N is 3 Is Q (C) theo,n ) The magnification factor. The wave control code is serially calculated by adopting the idea of changing resources by speed, namely, the quantized value Q (C) of the single array element theoretical wave control code is obtained by a two-stage multiplier and a one-stage adder theo,n ). Meanwhile, according to the corresponding relation between the actual feed phase and the theoretical feed phase in the step 3-2, Q (C) is taken theo,n ) Low N 3 Bits are taken as rounding phase-feeding error quantization results; to Q (C) theo,n ) Carry out right shift N 3 And taking the low K bits as truncation phase-fed wave control codes. In the same way, carry phase-feed parameters can be obtained. And circulating for 2N times, and calculating the carry and truncation phase-feeding parameters of the first 2N array elements. Finally, the wave control code and the phase feed error are buffered into the RAM.
For the nth iteration, according to the step 4-1, the feeding phase error accumulation can be realized by using an adder, and the input is the feeding phase error sum of two array elements in the nth sub-array and the feeding phase error accumulation sum of the array elements in the first n-1 sub-arrays respectively. Delta theta n And
Figure BDA0002910222600000101
the calculation formula has the same structure as the calculation formula,based on the purpose of reducing FPGA resource consumption, the carry feed phase-separated axis angle and the rotation angle deviation can be obtained in sequence through the same implementation framework
Figure BDA0002910222600000102
Deviation of phase departure axis angle and rotation angle of rounding feed
Figure BDA0002910222600000103
Step 5-3: and determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method specifically comprises the following steps:
according to the angle deviation, calculating a beam pointing off-axis angle trigonometric function value caused by phase feeding in the nth iteration; obtaining a cosine value cos gamma of the pointing error of the carry phase-fed wave beam according to the calculation formula in the step 4-2 up,n Cosine value cos gamma of pointing error of sum-truncated phase-fed wave beam dn,n . If cos gamma up,n ≥cosγ dn,n If so, selecting a carry feed phase in a feed phase mode of two array elements in the nth subarray; otherwise, the truncation feed is selected. And simultaneously, obtaining the wave control codes of No. (4N-2N) and No. (4N-2N +1) array elements according to the central symmetry characteristic of the array surface.
And (5) iterating for N times to obtain the wave control codes of all the array elements.
And 6, configuring a phase feed wave control code of the digital TR component according to the corresponding wave control time sequence to complete real-time phase feed of the phased array antenna.
The invention can ensure that the FPGA has moderate computation complexity and real-time phase feed under the condition of high beam pointing precision, and meets the requirements of rapid beam scanning and tracking in a phased array antenna system.
Examples
With reference to fig. 1, the high-precision sequential phase feeding method of the K-bit digital phase shifter based on the FPGA of the present invention comprises the following steps:
simulation conditions are as follows: as shown in fig. 2, an active phased array antenna is composed of 400(20 × 20) array elements having isotropy, all of which are centrosymmetric with respect to the origin. Neglecting the mutual coupling effect between array elements, the amplitude I of the exciting current of the array elements n The constant amplitude is 1, the spacing d between adjacent array elements is 0.525 lambda, and the digit of the digital phase shifterK is 6.
Step 1: and establishing a triangular active phased array antenna consisting of 200 isotropic antenna array elements, wherein all the array elements are in central symmetry with respect to the origin. Neglecting the mutual coupling effect between the array elements, the array elements are numbered from No.0 to No. 399. FIG. 3 is an array element grid number (i) n ,k n ) Numbered scheme, wherein FIG. 3(a) is i n Numbered scheme, and k in FIG. 3(b) n And (4) numbering the drawings. Fig. 4 is a diagram of spatial coordinate system definition and off-axis angle, rotation angle, beam pointing error definition.
Step 2: the array surface is divided into sub-arrays, array elements No. (2n-2) and No. (2n-1) form a sub-array (n is 1,2, 200), and 200 sub-arrays are counted. The schematic diagram of the numbering of the subarrays is shown in fig. 5.
And step 3: according to the preset beam direction and the working wavelength, the upper half array element, namely No. 0-No. 199, is taken, the theoretical phase-fed wave control code is obtained through calculation and quantization, and meanwhile, the theoretical phase-fed wave control code is carried and truncated to obtain a carry phase-fed error and a truncated phase-fed error. FIG. 6 is a flow chart of a theoretical phase-fed wave control code and its rounding and carry phase-fed error calculation FPGA implementation. The method specifically comprises the following steps:
step 3-1: and calculating and quantifying to obtain the theoretical phase-fed wave control code of the No.n array element. The formula is as follows:
Figure BDA0002910222600000111
step 3-2: and carrying out truncation processing and carry processing on the theoretical phase-fed wave control code of the No.n array element to obtain a carry phase-fed error and a truncation phase-fed error. In particular to
When processed according to carry, the carry phase-fed wave control code, the phase-fed value and the phase-fed error are
C up,n ＝mod(C theo,n +δC up,n ,2 6 ),0≤δC up,n ＜1
φ up,n ＝C up,n Δ
δφ up,n ＝δC up,n Δ
When processing according to the truncation, the truncation phase-fed wave control code, the phase-fed value and the phase-fed error are
C dn,n ＝mod(C theo,n +δC dn,n ,2 6 ),-1≤δC dn,n ＜0
φ dn,n ＝C dn,n Δ
δφ dn,n ＝δC dn,n Δ
And 4, taking the upper half array element, sequentially determining the actual phase feeding mode of the nth sub array from N to N, and simultaneously determining the actual phase feeding mode of the 201-nth sub array according to the central symmetry characteristic of the array surface. And circulating for 100 times to obtain the actual phase-fed wave control code of the full array. The method specifically comprises the following steps:
step 4-1: and calculating off-axis angle and rotation angle deviation caused by carry and truncation of the nth order feed phase. Fig. 7 is a flow chart of an FPGA implementation of beam pointing angle deviation calculation. The method specifically comprises the following steps:
the quantization errors of the array element phases in the first n-1 sub-arrays and the central symmetrical sub-array are determined by the first n-1 times of sequential phase feeding and are marked as delta phi tr,l (l is more than or equal to 0 and less than or equal to 2 n-3); for the quantization error of the phases of two array elements in the nth sub-array, respectively converting delta phi up,2n-1 +δφ up,2n-2 ，δφ dn,2n-1 +δφ dn,2n-2 Substituting the formula to obtain the carry phase feed angle deviation caused by the nth iteration
Figure BDA0002910222600000121
And phase feed angle deviation
Figure BDA0002910222600000122
Figure BDA0002910222600000123
Wherein the coefficient p 1 ,p 2 ,p 3 ,p 4 The expression is as follows,
Figure BDA0002910222600000124
step 4-2: and calculating the carry and truncated beam pointing error cosine values of the nth order feed phase. The formula is as follows:
Figure BDA0002910222600000125
feeding the carry phase to the angular deviation
Figure BDA0002910222600000126
Substituting into the above formula
Figure BDA0002910222600000127
Obtaining the cosine value cos gamma of the pointing error of the carry feed phase wave beam of the nth iteration up,n (ii) a Deviation of phase feeding angle of rounding
Figure BDA0002910222600000128
Substituting into the above formula
Figure BDA0002910222600000129
Obtaining the truncation phase-fed wave beam pointing error cosine value cos gamma of the nth iteration dn,n . Fig. 8 is a flow chart of the FPGA implementation for calculating the cosine value of the beam pointing error.
Step 4-3: and determining the actual phase feeding mode of the array elements in the nth subarray. The method specifically comprises the following steps:
comparing cosine value cos gamma of pointing error of carry and truncated phase-fed wave beam up,n And cos gamma down,n If cos γ up,n ≥cosγ dn,n If so, selecting carry feeding phase for two array elements No. (2n-1) and No. (2n-2) in the nth sub-array; otherwise, the truncation feed is selected. And obtaining the wave control codes of No. (400-2n) and No. (400-2n +1) array elements according to the central symmetry characteristic of the array surface.
Step 4-4: and (5) cycling 100 times to obtain the actual phase-fed wave control code of the full array.
And 5: when the method is realized on the FPGA, working parameters are quantized in advance and stored in the RAM, and the parameter quantization ROM is read according to the preset beam direction and the working wavelength during calculation; and (4) calculating the carry and truncation phase feeding errors of the upper half array element according to the step 3 and the step 4, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method specifically comprises the following steps:
step 5-1: when the method is realized on the FPGA, working parameters are quantized in advance and stored in the RAM, and the parameter quantization ROM is read according to the preset beam direction and the working wavelength during calculation. The method specifically comprises the following steps:
pointing to a beam
Figure BDA0002910222600000131
Quantizing the sine value, stepping at fixed angle intervals, and quantizing and amplifying the value to the 14 th power of 2; quantizing the product of the array element distance, the wavelength and the phase shifter digit, amplifying to the power of 9 of 2, and quantizing with lambda x ,λ y And (4) showing. The above variables are quantized and stored in ROM. And controlling the read enable and read address of the ROM according to the subsequent calculation requirement, the preset beam direction and the working wavelength, and outputting the corresponding parameter quantization value.
Step 5-2: and (4) calculating the carry and truncation phase feeding errors of the upper half array element according to the step 3 and the step 4, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method specifically comprises the following steps:
according to the parameter quantification mode in the step 5-1, the calculation formula of the No.n theoretical wave control code array element can be quantified
Figure BDA0002910222600000132
FIG. 6 is a flow chart of a theoretical phase-fed wave control code and its rounding and carry phase-fed error calculation FPGA implementation. The wave control code is serially calculated by adopting the idea of changing resources by speed, namely, the quantized value Q (C) of the single array element theoretical wave control code is obtained by a two-stage multiplier and a one-stage adder theo,n ). Meanwhile, according to the corresponding relation between the actual feed phase and the theoretical feed phase in the step 3-2, Q (C) is taken theo,n ) The lower 38 bits are used as the rounding phase-feeding error quantization result; to Q (C) theo,n ) Right shifting 38 bits, and taking the lower 6 bits as truncation phase-fed wave control code. In the same way, carry phase-feed parameters can be obtained.
And (5) circulating for 200 times, calculating the carry and truncation phase-feeding parameters of the first 200 array elements. Finally, the wave control code and the phase feed error are buffered into the RAM.
For the nth iteration, according to the step 4-1, the feeding phase error accumulation can be realized by using an adder, and the input is the feeding phase error sum of two array elements in the nth sub-array and the feeding phase error accumulation sum of the array elements in the first n-1 sub-arrays respectively. Delta theta n And
Figure BDA0002910222600000133
the calculation formulas have the same structure, and can pass through the same implementation framework based on the purpose of reducing the FPGA resource consumption.
As shown in fig. 7, the coefficient p is calculated in advance based on the predetermined beam direction and the array element coordinates 1 ,p 2 ,p 3 ,p 4 And p is 1 p 4 -p 2 p 3 . Controlling the phase error accumulation part output by the state machine, and the coefficient p 1 ,p 2 ,p 3 ,p 4 Multiplying, namely cutting the result of the adder according to the input requirement of a later-stage divider through a 1-stage multiplier and a 1-stage adder, and ensuring that the input bit width does not exceed 64 bits; meanwhile, in order to meet the IP core input precision of the subsequent cordic algorithm, the divider result is truncated to 32 bits, and delta theta is output serially up,n 、
Figure BDA0002910222600000141
δθ dn,n 、
Figure BDA0002910222600000142
And sequentially sending the angle deviation sine and cosine values to an IP core of a cordic algorithm, wherein the amplification factor is 30 times of 2.
Step 5-3: and determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array. The method specifically comprises the following steps:
a beam pointing error cosine value calculation FPGA implementation framework is shown in FIG. 8, and beam pointing off-axis angle trigonometric function values caused by phase feeding in the nth iteration are calculated according to the angle deviation; obtaining beam pointing error through a two-stage multiplier and a one-stage adder, delaying the output of the adder by one clock cycle, and ensuring that the cosine value cos gamma of the carry phase-fed beam pointing error is output at the same time up,n Cosine value cos gamma of pointing error of sum-truncated phase-fed wave beam dn,n . If cos gamma up,n ≥cosγ dn,n If so, selecting a carry feed phase in a feed phase mode of two array elements in the nth subarray; otherwise, the truncation feed is selected. And simultaneously, obtaining the wave control codes of No. (4N-2N) and No. (4N-2N +1) array elements according to the central symmetry characteristic of the array surface. And finally, iterating for N times to obtain the wave control codes of all array elements.
And 6, configuring a phase feed wave control code of the digital TR component according to the corresponding wave control time sequence to complete real-time phase feed of the phased array antenna.
By calculation, when the predetermined beam orientations are respectively configured to be (20.4 ° ), the beam orientation of the present invention is compared with the pattern of the beam orientation of the rounding feed phase method in the azimuth dimension and the pitch dimension (α, β) as shown in fig. 9, according to fig. 9 and fig. 9
Figure BDA0002910222600000143
Calculating the actual beam directions caused by the phase feeding of the two methods as (20.40 degrees, 20.41 degrees), (20.41 degrees, 20.22 degrees) respectively according to the conversion relation of (alpha, beta); the beam pointing errors are 0.0045 degrees and 0.0636 degrees respectively. It can be found that the beam pointing performance of the present invention is superior to that of the rounded fed phase method.
Assuming a predetermined beam pointing direction
Figure BDA0002910222600000144
Configuration of
Figure BDA0002910222600000145
θ 0 0-40 degrees and 0.02 degrees as steps. Simulations were performed on the antenna beam pointing within this scan range, and rounding the phase-fed and phase-fed beam pointing error curves of the present invention are shown in fig. 10. From fig. 10, the mean square errors of the beam pointing errors γ of the rounded fed phase and the fed phase of the present invention are calculated to be 0.0000658 and 0.0000026, respectively. It can be found that the beam pointing error of the rounding feed phase is obviously large and presents a periodic characteristic; compared with the phase-fed wave beam pointing error of the invention, the phase-fed wave beam pointing error is obviously smaller, and the error result is stable.
When the preset beam direction is set to be (35 degrees and 40 degrees), the FPGA calculates the full-array wave control code and compares the full-array wave control code with a simulation result. FIG. 11(a) shows the comparison of the 4 th row of primitive wave control codes, where the FPGA calculation result is basically error-free; fig. 11(b) is a comparison of beam pointing patterns after the simulation and the FPGA implementation of the present invention, which shows that the implementation process of the present invention on the FPGA is correct.

Claims (4)

1. A high-precision sequential phase feeding method for a K-bit digital phase shifter based on an FPGA is characterized by comprising the following steps:
step 1, establishing a triangularly-arranged active phased-array antenna consisting of 4N isotropic antenna array elements, wherein all the array elements are centrosymmetric about an origin, and the array elements are numbered from No.0 to No. (4N-1);
step 2, carrying out subarray division on the array surface, wherein array elements No. (2N-2) and No. (2N-1) form a subarray (N is 1,2, …, 2N), and 2N subarrays are counted;
step 3, according to the preset beam direction and the working wavelength, array element No. 0-No. (2N-1) is taken, a theoretical phase-fed wave control code is obtained through calculation and quantization, and carry and truncation processing is carried out on the theoretical phase-fed wave control code to obtain a carry phase-fed error and a truncation phase-fed error;
step 4, array element No. 0-No. (2N-1) is taken, the actual phase feeding mode of the nth sub-array is determined in sequence from N-1 to N-N, the actual phase feeding mode of the 2N +1-N sub-arrays is determined according to the central symmetry characteristic of the array surface, and the cycle is performed for N times to obtain the actual phase feeding wave control code of the full array;
step 5, the calculation of the final phase-fed wave control code of the full array is realized through the FPGA, and the method specifically comprises the following steps: quantizing working parameters in advance and storing the working parameters into an RAM (random access memory), and reading a parametric quantization ROM according to a preset beam direction and a working wavelength during calculation; according to the step 3 and the step 4, calculating the carry and truncation phase feeding errors of the upper half array element, determining the actual phase feeding mode of the full array and obtaining the final phase feeding wave control code of the full array;
the specific method for quantizing the working parameters in advance and storing the working parameters into the RAM comprises the following steps:
pointing to a beam
Figure FDA0003737261810000011
The sine value is quantized, stepped at fixed angular intervals, and N of 2 is quantized and amplified 1 Power of the second power(ii) a Quantizing the product of array element distance, wavelength and phase shifter digit, and amplifying N of 2 2 To the power of, respectively using λ after quantization x ,λ y Represents; the variables are quantized and stored in a ROM, read enabling and reading addresses of the ROM are controlled according to subsequent calculation requirements, preset beam directions and working wavelengths, and corresponding parameter quantization values are output;
and 6, configuring a phase feed wave control code of the digital TR component according to the corresponding wave control time sequence to complete real-time phase feed of the phased array antenna.
2. The FPGA-based high-precision sequential phase feeding method for the K-bit digital phase shifter as claimed in claim 1, wherein the specific method for obtaining the carry phase feeding error and the truncate phase feeding error according to the preset beam pointing direction and the working wavelength comprises the following steps:
step 3-1: calculating and quantizing to obtain a theoretical phase-fed wave control code of the No.n array element;
step 3-2: carrying out truncation processing and carry processing on the theoretical phase-fed wave control code of the No.n array element to obtain a carry phase-fed error and a truncation phase-fed error, and specifically comprising the following steps:
actual wave control code C of No. n array element n Phase feed value phi n And phase error delta phi n Comprises the following steps:
Figure FDA0003737261810000021
φ n ＝C n Δ
δφ n ＝δC n Δ
wherein, carry represents carry quantization, truncate represents truncation quantization; delta C n Error introduced for the rounding of the wave control code, | δ C n Phase shift step of digital phase shifter with less than 1 and K bits of delta, C theo，n Feeding a phase wave control code for theory;
the actual phase-fed wave control code, phase-fed value and phase-fed error obtained by the theoretical phase-fed wave control code according to carry processing are respectively marked as C up,n ，φ up,n ，δφ up,n (ii) a Actual phase feed wave control obtained by truncationThe code, phase feed value and phase feed error are respectively recorded as C dn,n ，φ dn,n ，δφ dn,n 。
3. The FPGA-based high-precision sequential phase feeding method for the K-bit digital phase shifter as claimed in claim 2, wherein the specific method for calculating and quantizing the theoretical phase feeding wave control code of the No.n array element comprises the following steps:
the theoretical phase-feed value of the No. n array element is as follows:
Figure FDA0003737261810000022
wherein, No.n array element coordinate (x) n ,y n ) Can be expressed as
Figure FDA0003737261810000023
Array element grid number; d is the element spacing in the x-axis direction,
Figure FDA0003737261810000024
a predetermined direction is set for the emission beam, and lambda is the working wavelength;
the phase shift of the K-bit digital phase shifter is stepped to delta 2 pi/2 K The No.n array element theory phase-feed wave control code is as follows:
Figure FDA0003737261810000031
4. the FPGA-based high-precision sequential phase feeding method for the K-bit digital phase shifter as claimed in claim 3, wherein the actual phase feeding mode of the nth sub-array is determined sequentially from N-1 to N-N, the actual phase feeding mode of the 2N +1-N sub-arrays is determined according to the central symmetry characteristic of the array surface, and the actual phase feeding wave control code of the full array is obtained by iterating N times:
step 4-1: calculating the off-axis angle and the rotation angle deviation caused by the carry and the truncation of the nth order feed phase, specifically as follows:
the quantization errors of the array element phases in the first n-1 sub-arrays and the central symmetrical sub-array are determined by the first n-1 times of sequential phase feeding and are marked as delta phi tr,l (l is more than or equal to 0 and less than or equal to 2 n-3); for the quantization error of the phases of two array elements in the nth sub-array, respectively converting delta phi up,2n-1 +δφ up,2n-2 ，δφ dn,2n-1 +δφ dn,2n-2 Substituting delta phi of the formula 2n-1 +δφ 2n-2 Obtaining the carry phase feed angle deviation caused by the nth iteration
Figure FDA0003737261810000032
And phase feed angle deviation
Figure FDA0003737261810000033
Figure FDA0003737261810000034
Wherein, I n The excitation amplitude of the No.n array elements is obtained; coefficient p 1 ,p 2 ,p 3 ,p 4 The expression is as follows,
Figure FDA0003737261810000035
step 4-2: calculating the carry and truncated beam pointing error cosine values of the nth order feed phase, specifically:
noting the actual beam pointing as
Figure FDA0003737261810000036
The predetermined beam pointing unit vector is noted
Figure FDA0003737261810000041
The actual beam pointing unit vector is noted
Figure FDA0003737261810000042
Defining actual beamsThe angle between the pointing direction and the predetermined beam is gamma, then
Figure FDA0003737261810000043
Figure FDA0003737261810000044
Feeding the carry phase to the angular deviation
Figure FDA0003737261810000045
Substituting into the above formula
Figure FDA0003737261810000046
Obtaining a carry phase feed wave beam pointing error cosine value cos gamma of the nth iteration up,n (ii) a Deviation of phase feeding angle of rounding
Figure FDA0003737261810000047
Substituting into the above formula
Figure FDA0003737261810000048
Obtaining the truncation phase-fed wave beam pointing error cosine value cos gamma of the nth iteration dn,n ；
Step 4-3: determining an actual phase feeding mode of an array element in the nth subarray, specifically:
comparing cosine value cos gamma of pointing error of carry and truncated phase-fed wave beam up,n And cos gamma down,n If cos γ up,n ≥cosγ dn,n If so, selecting carry feeding phase for two array elements No. (2n-1) and No. (2n-2) in the nth sub-array; on the contrary, selecting a truncation phase feeding, and obtaining the wave control codes of No. (4N-2N) and No. (4N-2N +1) array elements according to the central symmetry characteristic of the array surface;
step 4-4: and (5) cycling for N times to obtain the actual phase-fed wave control code of the full array.
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