CN112928131A - Array type detector and detection system using same - Google Patents
Array type detector and detection system using same Download PDFInfo
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Abstract
The invention discloses an array type detector which is characterized by comprising a detection module arranged in an array type, wherein the detection module comprises M x N pixel units, M and N are integers which are more than 2, and each pixel comprises a photodiode unit and is used for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; at least part of the pixel units share at least part of the transfer elements, and the occupied area when the pixel units are not shared originally can be reduced by sharing at least part of the transfer elements.
Description
Technical Field
The present disclosure relates to the field of detection technologies, and in particular, to an array type detector and a detection system using the same.
Background
As a method of measuring a distance from an object in a scene, a time of flight (TOF) technique is developed. Such TOF technology can be applied in various fields such as the automotive industry, human-machine interfaces, games, robotics, security, and the like. In general, TOF technology operates on the principle of illuminating a scene with modulated light from a light source and observing the reflected light reflected from objects in the scene. In order to ensure that a detection system has a wider field of view while obtaining higher detection efficiency in a detection process in the conventional detection system, an array-type receiving module is mostly adopted at present, the array-type receiving module may have thousands of pixel units, each pixel unit may be a diode of a charge-coupled semiconductor CCD or a complementary metal oxide semiconductor CMOS type, and the like, and the array-type receiving module is not limited to be formed by only the two types of diodes.
For example, a more typical array type receiving module, which is generally disposed on a focal plane of an optical (lens) system, is also referred to as a focal plane type array receiving module, and as the requirements for chip miniaturization and high integration are increasing, the reliability of the array type receiving module in the whole detection system is also facing higher challenges, in terms of light receiving area, it is required to ensure sufficient receiving area for returning light, in terms of charge transfer speed, it is required to ensure a larger influence range of a transfer gate to accelerate rapid transfer of photo-generated charges generated by a diode, the existing array type detection unit is especially directed to TOF ranging, and since an active light source used is mostly an infrared type laser light source, the wavelength of which is longer than the visible light wavelength, and therefore a photoelectric conversion unit is required to have a deeper absorption depth, and thus, although it is possible to apply a constant potential by means of the known transfer element structure, in practice the potential change is already weak at a large distance from the transfer element, so that the photo-generated electrons generated in the diode can only be diffused into the Floating Diffusion (FD) by thermal diffusion, the whole transfer process will be slow, for example, photo-generated electrons generated in a short integration time of typically 5 mus in a particular scenario require a transfer and readout time of about 20 mus, with the demand of array miniaturization, the pixel unit area will be smaller, even each pixel unit needs to be provided with sub-pixel units in some cases, so that the size of the transfer element will be smaller, in addition, the applied voltage may be increased in order to ensure the influence range of the transfer element, however, increasing the voltage of the transfer element will cause the influence of crosstalk and the like in the pixel unit with higher risk, and may cause the risk of lowering the reliability of the device.
Designing a new array pixel structure and the structure and arrangement of the transfer elements in the array in the above analysis would be a challenge.
Disclosure of Invention
The present application aims to provide a method for identifying abnormal pixels of a detector array, so as to solve the technical problem that an array type detection module in the prior art cannot efficiently identify abnormal pixels, which results in that unqualified products are used or accurate detection results cannot be accurately and constantly output in the use process, and the like.
In order to achieve the above purpose, the technical solutions adopted in the embodiments of the present application are as follows:
a first aspect of the embodiments of the present application provides a detection array type detector, including a detection module arranged in an array type, where the detection module includes M × N pixel units, where M and N are both integers greater than 2, and the pixel includes a photodiode unit, configured to acquire a return light signal and convert the return light signal into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; at least some of the pixel cells share at least some of the transfer elements.
Optionally, when any one of the at least transfer elements shared is in an operating state by an applied voltage, two pixel units sharing the transfer element simultaneously transfer the photo-generated charges to the charge storage units of the two pixel units.
Optionally, the photo-generated charges transferred simultaneously by the common transfer element are photo-generated charges converted by the same delay phase.
Optionally, each two adjacent pixel units of each of the M rows in the array-type detection unit share the transfer element, so that N pixel units of each row in the array include N +1 transfer elements.
Optionally, each two adjacent pixel units of each of the N columns in the array type detection unit share the transfer element, so that M pixel units of each column in the array include M +1 transfer elements.
Optionally, the transfer unit is disposed in the isolation portion of the pixel unit, and when the transfer element is in an operating state by applying a voltage, the surface and the surface vicinity area of the isolation portion are raised in voltage to form a charge transfer channel of two adjacent pixels.
Optionally, the isolation portion is a deep trench isolation portion, and the charge transfer channel simultaneously transfers the two adjacent photo-generated charges to the corresponding charge storage unit.
Optionally, the charge storage unit is contained within an adjustment region having a potential barrier.
In a second aspect, the invention provides a detection system using the array type detector of the first aspect, comprising a detection module arranged in an array type, wherein the detection module comprises M × N pixel units, wherein M and N are integers greater than 2, and the pixel comprises a photodiode unit for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; at least some of the pixel cells share at least some of the transfer elements.
Optionally, when any one of the at least transfer elements shared is in an operating state by an applied voltage, two pixel units sharing the transfer element simultaneously transfer the photo-generated charges to the charge storage units of the two pixel units.
Optionally, the photo-generated charges transferred simultaneously by the common transfer element are photo-generated charges converted by the same delay phase.
Optionally, each two adjacent pixel units of each of the M rows in the array-type detection unit share the transfer element, so that N pixel units of each row in the array include N +1 transfer elements.
Optionally, each two adjacent pixel units of each of the N columns in the array type detection unit share the transfer element, so that M pixel units of each column in the array include M +1 transfer elements.
Optionally, the transfer unit is disposed in the isolation portion of the pixel unit, and when the transfer element is in an operating state by applying a voltage, the surface and the surface vicinity area of the isolation portion are raised in voltage to form a charge transfer channel of two adjacent pixels.
Optionally, the isolation portion is a deep trench isolation portion, and the charge transfer channel simultaneously transfers the two adjacent photo-generated charges to the corresponding charge storage unit.
The beneficial effect of this application is:
the array type detector provided by the embodiment of the application comprises a detection module arranged in an array type, wherein the detection module comprises M x N pixel units, wherein M and N are integers which are more than 2, and the pixel comprises a photodiode unit and is used for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; according to the scheme of the invention, at least part of the pixel units share at least part of the transfer elements, on one hand, at least part of the transfer elements are shared by different pixels, so that the occupied area when the transfer elements are not shared can be released, and further, the photosensitive area can obtain enough area after the device is miniaturized, on the other hand, the used transfer elements can be arranged in the isolation parts of the existing pixels, so that the pixel isolation parts are ensured to have new functions, meanwhile, the influence range of the transfer elements is ensured through the sinking structure arrangement, the effect of quickly transferring electrons is obtained, and meanwhile, the occupied area of other areas is also saved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic diagram of an array type receiving module provided in the prior art;
FIG. 2 is a schematic diagram of a pixel circuit of a TOF ranging 4T structure provided in the prior art;
fig. 3 is a schematic diagram of a pixel layout structure according to an embodiment of the present application;
fig. 4 is a schematic longitudinal cross-sectional structure diagram of a pixel structure provided in an embodiment of the present application;
FIG. 5 is a schematic diagram illustrating the operation of a device according to an embodiment of the present disclosure;
fig. 6 is a schematic circuit diagram of a circuit structure of a common transfer element for different pixel units according to an embodiment of the present disclosure;
FIG. 7 is a schematic diagram of a component array structure provided in an embodiment of the present application;
FIG. 8 is a schematic diagram of another exemplary array structure provided in the embodiments of the present application;
fig. 9 is a schematic view of another layout structure of a pixel unit according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The light receiving module may be an array type receiving module as shown in fig. 1, the array type receiving module includes a pixel unit 110 composed of diodes, in an actual implementation, M × N pixel units may be used to form an active area of the array type receiving module, the pixel units may be in the order of tens of thousands to hundreds of thousands, and the like, and the array type receiving module is not limited herein, and may include a lens portion 101 and a detection unit base portion 102, the lens portion includes a plurality of lens units, the lens units may be composed of micro lens units having a predetermined curvature, and in order to ensure that the lens portion may also include more than 1 layer structure for maximum utilization of the return light, a specific implementation scheme is not limited herein, and in a more preferable case, the base portion 102 may be disposed at a focal plane position corresponding to the lens portion 101, so that the detection pixel unit can maximally acquire accurate return light information, in this case, the lens of the lens portion 101 can construct a light channel so that the signal received by the photosensitive portion of the detection unit is in the vicinity of the corresponding focal position, the detection unit base portion 102 includes therein an array-type arrangement of photosensitive pixels that can form a CCD or CMOS type photosensitive unit by doping on the semiconductor base portion 102, while the semiconductor base portion 102 can further include all analog signal processing circuits used in the readout of the pixel unit, a pixel level control circuit and an analog-to-digital conversion circuit (ADC), and the like, when the circuits are arranged in a positional relationship with the photosensitive unit, a front illumination process of arranging a circuit layer upstream of the photosensitive unit in the direction of propagation of the return light or a back illumination process of arranging a circuit layer downstream of the photosensitive unit in the direction of propagation of the return light can be employed, and here, of course, the specific implementation is not limited, and the photosensitive unit and a part of the circuits can be provided on different semiconductor layers, and the stacking process is used for realizing higher integration design, and the specific implementation scheme is not limited herein.
The detection systems currently used basically comprise: an ITOF ranging module, a processing module, and a light receiving module, where the ITOF ranging module is taken as an example for illustration, the light emitting module includes but is not limited to a semiconductor laser, a solid-state laser, and may also include other types of lasers, when the semiconductor laser is used as a light source, a Vertical-cavity surface-emitting laser (VCSEL) or an edge-emitting semiconductor laser (EEL) may be used, which is only exemplary and not specific, the light emitting module emits a sine wave, a square wave, a triangle wave, etc., in the ranging application, most of the lasers with a certain wavelength, such as 950nm infrared laser (preferably near infrared laser), are emitted light projected into a field of view, and an object to be detected in the field of view may reflect the projected laser to form a return light, and the return light enters the detecting system and is captured by the light receiving module, the light receiving module may include a photoelectric conversion portion, such as an array type sensor composed of CMOS, CCD, etc., and may further include a plurality of lenses that may form more than one image plane, that is, the receiving module includes more than one image plane, the photoelectric conversion portion of the receiving module is located at one of the image planes, and may receive the signals in the most common four-phase scheme to obtain delayed received signals of 0 °, 90 °, 180 °, and 270 °, and the four-phase distance calculation scheme is used to illustrate the sine wave method, and the amplitude of the received signals is measured at four equidistant points (e.g., at intervals of 90 ° or 1/4 λ):
the ratio of the difference between a1 and A3 to the difference between a2 and a4 is equal to the tangent of the phase angle. ArcTan is in fact a bivariate arctangent function, which can be mapped to the appropriate quadrant, defined as 0 ° or 180 ° when a2 ═ a4 and a1> A3 or A3> a1, respectively.
The distance to the target is determined by the following formula:
the distance measurement is carried out by determining the frequency of the emitted laser, where c is the speed of light,is the phase angle (measured in radians) and f is the modulation frequency. The scheme can realize the effect of detecting the distance of the detected object in the field of view, the scheme is called as a four-phase delay scheme to obtain a detection result, the receiving module generates different information through photoelectric conversion, the information acquisition of the detected object is realized by using a 0-degree and 180-degree two-phase scheme under certain conditions, three-phase schemes of 0 degree, 120 degrees and 240 degrees are disclosed in documents to obtain target information, even a five-phase delay scheme is disclosed in documents.
A common scheme for a pixel unit in four-phase detection is a circuit structure diagram in fig. 2, in which a photodiode is connected to two transfer elements, here, it is illustrated by taking transfer transistors TX1 and TX2 as an example, when return light or background light irradiates the photodiode, it can generate photo-generated charges, and after a certain integration time, a certain amount of photo-generated charges are generated in the diode, the two transfer transistors can transfer the generated photo-generated charges with complementary delay phases, such as 0 ° and 180 °, 90 ° and 270 °, wherein FD1 and FD2 floating diffusion nodes include MOS transistor type capacitors, so that the two nodes can store photo-generated charges converted with different delay phases, and then the photo-generated charges are converted into corresponding information in the above distance calculation expression through a digital circuit by subsequent column readout, thereby obtaining distance information of a detected object, the scheme adopts a relatively classic 4T structure type as an example for explanation, and certainly is not limited to be realized by adopting a 3T structure, a 5T structure and the like.
As described above, on the premise that the prior art scheme and the pixel structure cannot meet the requirement of miniaturization and integration, the area of the pixel unit is smaller, even a sub-pixel unit needs to be arranged in each pixel unit under partial conditions, so the size of the transfer element is smaller, in addition, the applied voltage can be increased in order to ensure the influence range of the transfer element, however, increasing the voltage of the transfer element will cause higher risk of crosstalk and the like in the pixel unit, and the risk of reducing the reliability of the device can also be generated.
Fig. 3 is a schematic diagram of an improved pixel unit according to the present invention, which is illustrated by taking a structure composed of four pixels as an example, first, in order to ensure that the transfer element can be at least partially shared, so that, relatively speaking, each pixel unit in the prior art needs two transfer units, and the gate of the transfer element is generally fabricated by surface deposition, etc., the influence range of the transfer unit thus formed will be small, the scheme of fig. 3 is adopted, the transfer elements of at least some pixel units in the array type detection module are shared, and the charge storage units of two adjacent pixel units on the pixel architecture store the photo-generated charges received with the same phase delay, while the two charge storage units far away store the photo-generated charges received with complementary phase delay with the adjacent storage units, in terms of the structural design of the transfer unit, the transfer element is disposed in the isolation part between the existing pixels, and a sunk design is adopted, namely, the transfer element is set to be a trench gate structure, so that the influence range of the transfer gate can be enhanced, and the quick transfer of the photo-generated charges is realized.
FIG. 4 is a schematic longitudinal cross-sectional view of a pixel structure according to the present invention, wherein a photoelectric conversion region PD is disposed under a microlens, a transfer element is a transfer gate disposed in an isolation portion of a pixel, the isolation portion further includes an oxide layer surrounding the transfer gate, also referred to as a gate oxide layer, which can ensure that the isolation portion still performs an isolation function between pixels, a side oxide layer connected to the transfer gate needs to have a thinner thickness for ensuring the transfer of photo-generated charges, and a bottom oxide layer connected to the bottom of the transfer gate needs to have a thicker thickness, the side oxide layer has a certain thickness to ensure reliable isolation between pixels, the thinner thickness can ensure that the potential of a larger area can be changed when a voltage is applied to the transfer gate, and the thickness of the bottom oxide layer can be designed to be several times or ten times of the thickness of the side oxide layer to ensure that the photo-generated charges between different pixels cannot be applied by the gate voltage when the transfer gate is in an operating state And further to ensure the influence range of the transfer gate and more thorough transfer of photo-generated charges generated in the integration time to achieve a more efficient distance detection effect, the filling depth of the transfer gate of the present invention is optimally 3/4 greater than the PD depth of the photoelectric conversion portion, and more optimally, the filling depth of the transfer gate may be substantially similar to or even exceed the PD depth, and the transfer gate is formed by filling polysilicon in the trench.
To further explain the principle of the present invention, referring to fig. 4 and fig. 5, the potential distribution characteristics between the PD and the periphery of the transfer gate and the charge storage unit in fig. 4 are as described in the right diagram, and the potential variation at the position of a-B-C-D in fig. 4 is taken as an example to illustrate, when the transfer gate is in the non-operating state, a potential barrier exists at the periphery of the transfer gate, the charge cannot cross the potential barrier, and therefore the PD and the charge storage unit cannot communicate with each other, and the charge storage unit is disposed in the adjustment region with the potential barrier, here, taking the P-type doped region with a certain doping concentration as an example, and other transfer paths of photo-generated charge are also surrounded by the potential barrier, so that accurate acquisition of charge in the integration time can be ensured. The lowering of the potential barrier when it is in the working state builds up a channel between the PD and the charge storage unit, fig. 5 clearly shows that under the structure of the present invention, when the shared transfer gate is in the working state by the applied voltage, two pixels sharing the transfer gate build up a transfer channel between the PD and the charge storage unit, the surface and surface adjacent area of the isolation portion are raised in voltage to form the charge transfer channels of two adjacent pixels, two pixel units sharing the transfer element transfer the photo-generated charges to the charge storage units of the two pixel units simultaneously, and the photo-generated charges transferred by the shared transfer element receive the converted photo-generated charges for the same delay phase, while the non-closely adjacent transfer gate is in the non-working state at this time, and the signals corresponding to the delay phase are not accumulated, at least part of the transmission gates are shared, so that the number of components of the whole array is reduced, more area can be saved and reserved for a photosensitive area or other devices, the transmission gates are further arranged in an isolation part such as a deep groove isolation part, and the new purpose and new function in the isolation part region can be exerted by utilizing the existing structure.
Fig. 6 illustrates a circuit diagram of three pixels, in which one transfer gate 1011 of the pixel 100 is shared with the pixel 300, and the other transfer gate 1012 is shared with the pixel 200, so that in the solution that 6 transfer gates are originally needed to implement, only 4 transfer gates are needed at present, thereby saving the area occupied by a part of the transfer gates, and further the remaining transfer gates can be disposed in the deep trench isolation between the pixels, thereby occupying no extra area, and since the influence range of the transfer gates disposed in the deep trench during operation will be increased, the speed of charge transfer is increased, and other elements are similar to the functions of fig. 2, and will not be described in detail herein.
Fig. 7 is a schematic diagram of an array structure configured by the scheme of the present invention, in which pixel units of the array are arranged in M × N rows and columns, adjacent pixel units in each two adjacent columns share a transfer gate, and each two adjacent pixel units in each M rows of the array-type detection unit share the transfer element, so that N pixel units in each row of the array include N +1 transfer elements, so that 2N transfer gates are required in each row according to the prior art, the present invention only needs N +1, when calculating M rows, the total number of transfer gates can be reduced from 2N × M in the prior art to (N +1) × M, for example, when M is 128 and N is 256, the total number of transfer gates is reduced from 2N × 128 to 65536, and is reduced to 257 × 128 to 32896, which is reduced by half, thereby releasing a considerable area occupied in the array, the actual number of rows and columns of the array is not limited to this, and in addition, the area can be further saved by arranging the used transmission gate in the deep trench isolation part, a larger influence range can also be generated, excessive voltage does not need to be applied, and the reliability of the device is also greatly improved.
Fig. 8 is a schematic diagram of another array structure configured by the scheme of the present invention, in which pixel units of the array are arranged in M × N rows and columns, adjacent pixel units in each two adjacent rows share a transfer gate, and each two adjacent pixel units in each N columns of the array type detection unit share the transfer element, so that M pixel units in each column of the array include M +1 transfer elements, and thus 2M transfer gates are required in each column according to the prior art, the present invention only needs M +1, and when the total N columns are calculated, the total number of transfer gates can be reduced from 2M × N of the prior art to (M +1) N, and also when the array units M × 128 and N × 256 are arranged, the total number of transfer gates can be reduced from 2 128 × 256 to 65536, to 129 × 256, 33024, which is also reduced to about half the number, and the effect is similar to that of the structure of fig. 7, and will not be described in detail herein.
Fig. 9 is another schematic structural diagram provided in an embodiment of the present invention, and is different from the structure of fig. 3 in that an unused isolation portion is designed to accommodate a MOS-type capacitor except for a transmission gate disposed in a part of the isolation portion, that is, the isolation portion sandwiched by a P + region in fig. 9 is set as a trench capacitor, so that on one hand, the isolation function is exerted and the capacity of the FD is further increased, and the similar design is not repeated in detail.
It is to be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (15)
1. An array-type detector, comprising a detection module arranged in an array, wherein the detection module comprises M × N pixel units, wherein M and N are integers greater than 2, and the pixel comprises a photodiode unit for acquiring a return light signal and converting the return light signal into photo-generated charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; at least some of the pixel cells share at least some of the transfer elements.
2. The array-type detector of claim 1, wherein when any one of the at least transfer elements shared is in operation by an applied voltage, two pixel cells sharing the transfer element simultaneously transfer the photo-generated charge to the charge storage units of the two pixel cells.
3. The array-type detector of claim 2, wherein said photo-generated charges simultaneously transferred by said common transfer element are photo-generated charges received and converted at the same time delay phase.
4. The array-type detector of claim 1, wherein each two adjacent pixel cells of each of the M rows of the array-type detector cells share the transfer element, such that N pixel cells of each row of the array comprise N +1 transfer elements.
5. The array-type detector of claim 1, wherein each two adjacent pixel cells of each of the N columns of the array-type detection unit share the transfer element, such that M pixel cells of each column of the array contain M +1 transfer elements.
6. The array type detector of claim 1, wherein the transfer unit is disposed in the isolation portion of the pixel unit, and when the transfer element is applied with a voltage in an operation state, a surface and a surface vicinity area of the isolation portion are raised in voltage to form a charge transfer channel of two adjacent pixels.
7. The array-type detector of claim 6, wherein the isolation is a deep trench isolation, and the charge transfer channel simultaneously transfers the two adjacent photo-generated charges to corresponding charge storage cells.
8. The array-type detector of claim 1, wherein the charge storage unit is contained within a tuning region having a potential barrier.
9. A detection system using the array-type device of claim 1, comprising a detection module arranged in an array-type, said detection module comprising M x N pixel cells, wherein M and N are each an integer greater than 2, said pixels comprising photodiode cells for capturing return optical signals and converting them into photo-generated electrical charges; a transfer element for transferring photo-generated charges generated in the photodiode; a charge storage unit for receiving the photo-generated charge transferred by the transfer element; at least some of the pixel cells share at least some of the transfer elements.
10. A detection system according to claim 9 wherein when any one of the at least transfer elements that are shared is in operation with an applied voltage, two pixel cells that share that transfer element simultaneously transfer the photo-generated charge to the charge storage units of the two pixel cells.
11. A detection system according to claim 10, wherein the photo-generated charges simultaneously transferred by the common transfer element are photo-generated charges that are converted by the same delayed phase reception.
12. A detection system according to claim 9 wherein each two adjacent pixel cells of each of the M rows of the array-type detection unit share the transfer element such that the N pixel cells of each row of the array comprise N +1 transfer elements.
13. The detection system according to claim 9, wherein each two adjacent pixel cells of each of the N columns of the array-type detection unit share the transfer element, such that M pixel cells of each column of the array contain M +1 transfer elements.
14. The detection system according to claim 9, wherein the transfer unit is disposed in an isolation portion of the pixel unit, and when the transfer element is in an operation state by applying a voltage, a surface and a surface vicinity area of the isolation portion are raised in voltage to form a charge transfer channel of two adjacent pixels.
15. The detection system of claim 14, wherein the isolation portion is a deep trench isolation portion, the charge transfer channel simultaneously transferring the two adjacent photo-generated charges to corresponding charge storage cells.
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