CN112910891A - Network security interconnection system based on FPGA high-speed encryption and decryption - Google Patents
Network security interconnection system based on FPGA high-speed encryption and decryption Download PDFInfo
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- CN112910891A CN112910891A CN202110129787.1A CN202110129787A CN112910891A CN 112910891 A CN112910891 A CN 112910891A CN 202110129787 A CN202110129787 A CN 202110129787A CN 112910891 A CN112910891 A CN 112910891A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
- H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/06—Network architectures or network communication protocols for network security for supporting key management in a packet data network
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Abstract
The invention discloses a network security interconnection system based on FPGA high-speed encryption and decryption, which comprises the steps of firstly, obtaining an interconnection request and a transmission data packet sent by a protection interconnection device, then, utilizing the FPGA encryption and decryption device to select a corresponding encryption key which accords with the transmission data packet from a key management server for encryption, then, transmitting the encryption key to a decryption module in the FPGA encryption and decryption device at one end of interconnection, sending a path release signal to the encryption module to remove the current path occupation after completely receiving the encryption data packet, simultaneously, obtaining the corresponding decryption key to decrypt the encryption data packet, transmitting the decryption key to the protection interconnection device at one end of interconnection, sending an interconnection completion signal to a transmission module, removing transmission waiting, and realizing the security interconnection of a network.
Description
Technical Field
The invention relates to the technical field of network security, in particular to a network security interconnection system based on FPGA high-speed encryption and decryption.
Background
At present, the use of the network is distributed in every corner of the body, and although the existing network technology is mature, the vulnerability exists, and especially in the connection process of two network devices, the security problem is easy to occur.
Disclosure of Invention
The invention aims to provide a network security interconnection system based on FPGA high-speed encryption and decryption, which realizes the security interconnection of networks.
In order to achieve the purpose, the invention provides a network security interconnection system based on FPGA high-speed encryption and decryption, which comprises a plurality of protection interconnection devices, a plurality of FPGA encryption and decryption devices and a key management server, wherein the protection interconnection devices are connected with the FPGA encryption and decryption devices, and the key management server is connected with the protection interconnection devices and the FPGA encryption and decryption devices;
the protection interconnection equipment is used for generating an interconnection request, transmitting a data table packet and receiving a decryption data packet;
the FPGA encryption and decryption equipment is used for encrypting and decrypting the received data packet by using the corresponding key to generate a corresponding encrypted data packet and the corresponding decrypted data packet;
and the key management server is used for transmitting a corresponding encryption key and a corresponding decryption key to the FPGA encryption and decryption equipment and updating the encryption key and the decryption key.
The FPGA encryption and decryption devices comprise encryption modules and decryption modules, the encryption modules and the decryption modules are respectively connected with the protection interconnection device, and the encryption modules are connected with the decryption modules;
the encryption module is used for encrypting the transmission data packet by using the corresponding encryption key according to the interconnection request to obtain the encrypted data packet;
and the decryption module is used for receiving the encrypted data packet, decrypting the encrypted data packet by using the corresponding decryption key and generating a corresponding decrypted data packet.
The encryption module comprises a feature extraction unit and an encryption unit, the feature extraction unit is connected with the protection interconnection equipment, and the encryption unit is connected with the feature extraction unit;
the characteristic extraction unit is used for extracting the encryption grade in the transmission data packet and sending an encryption signal to the encryption unit;
and the encryption unit is used for receiving the encrypted signal and acquiring the corresponding encryption key according to the encryption grade to encrypt the transmission data packet.
The decryption module comprises a release unit and a decryption unit, the release unit is connected with the encryption unit, and the decryption unit is connected with the release unit and the protection interconnection equipment;
the release unit is used for generating a corresponding path release signal according to the received encrypted data packet and transmitting the path release signal back to the encryption unit;
and the decryption unit is used for acquiring the corresponding decryption key to decrypt the encrypted data packet and generating a corresponding decrypted data packet.
The network security interconnection system based on FPGA high-speed encryption and decryption further comprises monitoring equipment, and the monitoring equipment is connected with the protection interconnection equipment and the FPGA encryption and decryption equipment;
and the monitoring equipment is used for sending an interconnection completion signal when monitoring that the protection interconnection equipment receives the decrypted data packet.
The encryption module further comprises a transmission unit, and the transmission unit is connected with the encryption unit;
and the transmission unit is used for transmitting the encrypted data packet and receiving the interconnection completion signal.
The key management server comprises a key management module and an updating module, wherein the key management module is connected with the encryption module and the decryption module, and the updating module is connected with the key management module;
the key management module is used for sending the corresponding encryption key and the decryption key to the encryption module and the decryption module;
and the updating module is used for acquiring an external key bank to update the key in the key management module.
The invention relates to a network security interconnection system based on FPGA high-speed encryption and decryption, which comprises the steps of firstly, obtaining an interconnection request and a transmission data packet sent by a protection interconnection device, then, utilizing the FPGA encryption and decryption device to select a corresponding encryption key which accords with the transmission data packet from a key management server for encryption, then, transmitting the encryption key to a decryption module in the FPGA encryption and decryption device at one end of interconnection, sending a path release signal to the encryption module to remove the current path occupation after completely receiving the encryption data packet, simultaneously, obtaining the corresponding decryption key to decrypt the encryption data packet, transmitting the decryption key to the protection interconnection device at one end of interconnection, sending an interconnection completion signal to a transmission module, removing transmission waiting, and realizing the security interconnection of a network.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a network security interconnection system based on FPGA high-speed encryption and decryption provided by the present invention.
Fig. 2 is a schematic structural diagram of the FPGA encryption and decryption device provided by the present invention.
1-protection interconnection equipment, 2-FPGA encryption and decryption equipment, 3-key management server, 21-encryption module,
22-decryption module, 211-feature extraction unit, 212-encryption unit, 213-transmission unit, 2121-inquiry request subunit, 2122-level encryption subunit, 221-release unit, 222-decryption unit, 223-counting unit, 4-monitoring device, 31-key management module and 32-updating module.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Referring to fig. 1 and 2, the present invention provides a network security interconnection system based on FPGA high-speed encryption and decryption, where the network security interconnection system based on FPGA high-speed encryption and decryption includes a plurality of protection interconnection devices 1, a plurality of FPGA encryption and decryption devices 2, and a key management server 3, the plurality of protection interconnection devices 1 are connected to the plurality of FPGA encryption and decryption devices 2, and the key management server 3 is connected to the plurality of protection interconnection devices 1 and the plurality of FPGA encryption and decryption devices 2;
the protection interconnection device 1 is used for generating interconnection requests, transmitting data table packets and receiving decryption data packets;
the FPGA encryption and decryption device 2 is used for encrypting and decrypting the received data packet by using the corresponding key to generate a corresponding encrypted data packet and the corresponding decrypted data packet;
and the key management server 3 is configured to transmit a corresponding encryption key and decryption key to the FPGA encryption and decryption device 2, and update the encryption key and the decryption key.
In this embodiment, first, an interconnection request and a transmission data packet sent by a protection interconnection device 1 are obtained, then, the FPGA encryption/decryption device 2 is used to select an encryption key corresponding to the transmission data packet from the key management server 3 for encryption, and then the encryption key is transmitted to the FPGA encryption/decryption device 2 at the interconnection end, after the encryption data packet is completely received, a path release signal is sent to the FPGA encryption/decryption device 2 which performs an encryption function, the current path occupation is removed, meanwhile, the corresponding decryption key is obtained to decrypt the encryption data packet, and the decryption data packet is transmitted to the protection interconnection device 1 which performs interconnection, and meanwhile, an interconnection completion signal is sent, so that the secure interconnection of a network is realized. When 2 or more protected interconnection devices 1 are interconnected, the outlet of each protected network is connected in series with the FPGA encryption and decryption device 2, the protected network sends data to another protected network through a tcp/ip protocol, when the data passes through the FPGA encryption and decryption device 2, the device encrypts and repacks the data by using a symmetric key algorithm (such as SM4, AES and the like) realized by FPGA hardware, and when the ciphertext data is sent to the FPGA encryption and decryption device 2 of a receiving network, the device performs corresponding inverse operation, thereby realizing the safe interconnection of the network.
Further, the plurality of FPGA encryption and decryption devices 2 include an encryption module 21 and a decryption module 22, the encryption module 21 and the decryption module 22 are respectively connected to the protection interconnection device 1, and the encryption module 21 is connected to the decryption module 22;
the encryption module 21 is configured to encrypt the transmission data packet by using the corresponding encryption key according to the interconnection request, so as to obtain the encrypted data packet;
the decryption module 22 is configured to receive the encrypted data packet, decrypt the encrypted data packet by using the corresponding decryption key, and generate a corresponding decrypted data packet.
In this embodiment, first, the encryption module 21 is used to receive the interconnection request and the data transmission data packet, then according to the information in the transmission data packet, the corresponding encryption key is selected from the key management server 3 to encrypt the transmission data packet, so as to obtain a corresponding encrypted data packet, then the encrypted data packet is transmitted to the decryption module 22 in the FPGA encryption and decryption device 2 interconnected therewith, the corresponding decryption key is used to decrypt the encrypted data packet, so as to obtain a decrypted data packet, and the decrypted data packet is transmitted to the corresponding protection interconnection device 1, when the protection interconnection device 1 receives the decrypted data packet, the network interconnection between the two protection interconnection devices 1 is completed, because the data packet in the interconnection process is encrypted and transmitted, and the corresponding key is used for decryption connection, so that the safety of data in the interconnection process is ensured, and the safe interconnection of the network is further realized.
Further, the encryption module 21 includes a feature extraction unit 211 and an encryption unit 212, where the feature extraction unit 211 is connected to the protection interconnection device 1, and the encryption unit 212 is connected to the feature extraction unit 211;
the feature extraction unit 211 is configured to extract an encryption level in the transmission data packet, and send an encryption signal to the encryption unit 212;
the encryption unit 212 is configured to receive the encrypted signal, and obtain the corresponding encryption key according to the encryption level to encrypt the transmission data packet.
In this embodiment, when the encryption module 21 receives the interconnection request and the transmission data packet, firstly, the feature extraction unit 211 extracts interconnection information, an encryption level, and the like in the transmission data packet, and then the encryption unit 212 acquires a corresponding encryption key from the key management server 3 according to the encryption level extracted by the feature extraction unit 211 to encrypt the transmission data packet, so as to obtain the encrypted data packet. The corresponding encryption transmission can be carried out according to the customized encryption grade, and the safety of data transmission is further ensured.
Further, the encryption unit 212 includes a challenge request sub-unit 2121 and the rank encryption sub-unit 2122, the challenge request sub-unit 2121 is connected to the feature extraction unit 211, and the rank encryption sub-unit 2122 is connected to the key management server 3 and the challenge request sub-unit 2121;
the inquiry request subunit 2121 is configured to determine an idle-busy state of the level encryption subunit 2122, and transmit the data in the feature extraction unit 211 through a corresponding open channel;
the level encryption subunit 2122 is configured to perform level encryption on the data transmitted by the inquiry request subunit 2121, and generate the corresponding encrypted data packet.
In this embodiment, in order to ensure the stability and the fluency of the encryption process, the query request unit is used to determine the idle/busy state of the level encryption subunit 2122 before encrypting each time, when the level encryption subunit 2122 is in the idle state, the query request subunit 2121 opens a data transmission channel, and then the data in the feature extraction unit 211 is transmitted to the level encryption subunit 2122 for level encryption, so as to generate the corresponding encrypted data packet. When the level encryption subunit 2122 is still performing the encryption process, the inquiry request subunit 2121 closes the data transmission channel, and queues up the data to be encrypted, so as to avoid data confusion and congestion during the encryption process.
Further, the decryption module 22 includes a release unit 221 and a decryption unit 222, the release unit 221 is connected to the encryption unit 212, and the decryption is connected to the release unit 221 and the protection interconnection device 1;
the release unit 221, configured to generate a corresponding path release signal according to the received encrypted data packet, and transmit the path release signal back to the encryption unit 212;
the decryption unit 222 is configured to obtain a corresponding decryption key to decrypt the encrypted data packet, and generate a corresponding decrypted data packet.
In this embodiment, after the encryption module 21 generates the encrypted data packet and transmits the encrypted data packet to the decryption module 22, firstly, after the release unit 221 receives the encrypted data packet, a path release signal is sent out and is reversely propagated to the encryption module 21, and after the encryption module 21 receives the path release signal, the current path occupation is removed, that is, the encryption module 21 is currently in an idle state; then, the decryption unit 222 receives the encrypted data packet, extracts the encryption level in the encrypted data packet, and then selects the corresponding decryption key from the key management server 3 to decrypt the encrypted data packet, so as to obtain the corresponding decrypted data packet, that is, the corresponding encryption and decryption process is implemented, and meanwhile, during decryption, the occupation of the encryption link in the previous encryption module 21 can be removed, which facilitates the next data encryption process, and improves the efficiency of data transmission.
Further, the decryption module 22 further includes a counting unit 223, and the counting unit 223 is connected to the releasing unit 221;
the counting unit 223 is configured to count and count data information in the encrypted data packet, and determine whether transmission of the encrypted data packet is completed.
In this embodiment, when the decryption module 22 receives the encrypted data packet, the counting unit 223 is used to count and count the data amount of the encrypted data packet transmitted by the encryption unit 212, first, according to the interconnection request, the data size in the encrypted data packet is determined, then the data size is compared with the data size in the received encrypted data packet, if the data size is the same as the data size in the received encrypted data packet, the receiving is successful, if the data size is not the same as the data size in the interconnection request, a period of time is waited for, if no data is received within a set time range, the counting unit 223 sends a request error signal to the FPGA encryption and decryption device 2, then the transmission data packet is obtained again for encrypted transmission, if other data is received within the time range, and all data and the data size are the same as the determined data size, the receiving is successful, the data can be completely transmitted, and interconnection errors are avoided.
Further, the network security interconnection system based on the FPGA high-speed encryption and decryption further comprises a monitoring device 4, and the monitoring device 4 is connected with the protection interconnection device 1 and the FPGA encryption and decryption device 2;
and the monitoring device 4 is configured to send an interconnection completion signal when it is monitored that the protection interconnection device 1 receives the decrypted data packet.
In this embodiment, when the protection interconnection device 1 at the receiving end receives the decrypted data packet, the monitoring device 4 sends an interconnection completion signal to the encryption module 21 to indicate that data transmission is completed, and if it is monitored that the protection interconnection device 1 does not receive the decrypted data packet, sends an interconnection failure signal to the protection interconnection device 1 at the requesting end to indicate interconnection failure, the protection interconnection device 1 at the requesting end sends the next interconnection request and performs interconnection operation with the transmitted data packet, so that interconnection conditions can be fed back in time, and interconnection efficiency is improved.
Further, the encryption module 21 further includes a transmission unit 213, and the transmission unit 213 is connected to the encryption unit 212;
the transmission unit 213 is configured to transmit the encrypted data packet and receive the interconnection completion signal.
In this embodiment, after the encryption unit 212 completes encryption, the transmission unit 213 transmits the encrypted data packet to the decryption module 22, and further receives the interconnection completion signal by using the transmission data packet, and after receiving the interconnection completion signal, the limitation on the transmission path is removed, so that normal data transmission between two interconnected networks is conveniently completed, and the interconnection effect is improved.
Further, the key management server 3 includes a key management module 31 and an update module 32, the key management module 31 is connected to the encryption module 21 and the decryption module 22, and the update module 32 is connected to the key management module 31;
the key management module 31 is configured to send the corresponding encryption key and decryption key to the encryption module 21 and the decryption module 22;
the updating module 32 is configured to obtain an external key store to update the key in the key management module 31.
In this embodiment, the key management module 31 manages the encryption key and the decryption key, so that the key can be conveniently output and received, the update module 32 mainly updates the key management module 31, and the update module 32 has a professional mode and a random mode, so that two modes of update can be performed, the richness of the key is increased, and the security of interconnection is further ensured.
The invention relates to a network security interconnection system based on FPGA high-speed encryption and decryption, which comprises the steps of firstly obtaining an interconnection request and a transmission data packet sent by a protection interconnection device 1, then selecting a corresponding encryption key which accords with the transmission data packet from a key management server 3 by utilizing the FPGA encryption and decryption device 2 for encryption, then transmitting the encryption key to a decryption module 22 in the FPGA encryption and decryption device 2 at one end of interconnection, sending a path release signal to the encryption module 21 for removing the current path occupation after completely receiving the encryption data packet, simultaneously obtaining the corresponding decryption key for decrypting the encryption data packet, transmitting the decryption data packet to the protection interconnection device 1 for interconnection, and simultaneously sending an interconnection completion signal to the transmission module for removing transmission waiting to realize the security interconnection of a network.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (7)
1. A network security interconnection system based on FPGA high-speed encryption and decryption is characterized in that,
the network security interconnection system based on FPGA high-speed encryption and decryption comprises a plurality of protection interconnection devices, a plurality of FPGA encryption and decryption devices and a key management server, wherein the protection interconnection devices are connected with the FPGA encryption and decryption devices, and the key management server is connected with the protection interconnection devices and the FPGA encryption and decryption devices;
the protection interconnection equipment is used for generating an interconnection request, transmitting a data table packet and receiving a decryption data packet;
the FPGA encryption and decryption equipment is used for encrypting and decrypting the received data packet by using the corresponding key to generate a corresponding encrypted data packet and the corresponding decrypted data packet;
and the key management server is used for transmitting a corresponding encryption key and a corresponding decryption key to the FPGA encryption and decryption equipment and updating the encryption key and the decryption key.
2. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 1,
the FPGA encryption and decryption devices comprise encryption modules and decryption modules, the encryption modules and the decryption modules are respectively connected with the protection interconnection device, and the encryption modules are connected with the decryption modules;
the encryption module is used for encrypting the transmission data packet by using the corresponding encryption key according to the interconnection request to obtain the encrypted data packet;
and the decryption module is used for receiving the encrypted data packet, decrypting the encrypted data packet by using the corresponding decryption key and generating a corresponding decrypted data packet.
3. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 2,
the encryption module comprises a feature extraction unit and an encryption unit, the feature extraction unit is connected with the protection interconnection equipment, and the encryption unit is connected with the feature extraction unit;
the characteristic extraction unit is used for extracting the encryption grade in the transmission data packet and sending an encryption signal to the encryption unit;
and the encryption unit is used for receiving the encrypted signal and acquiring the corresponding encryption key according to the encryption grade to encrypt the transmission data packet.
4. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 3,
the decryption module comprises a release unit and a decryption unit, the release unit is connected with the encryption unit, and the decryption unit is connected with the release unit and the protection interconnection equipment;
the release unit is used for generating a corresponding path release signal according to the received encrypted data packet and transmitting the path release signal back to the encryption unit;
and the decryption unit is used for acquiring the corresponding decryption key to decrypt the encrypted data packet and generating a corresponding decrypted data packet.
5. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 4,
the network security interconnection system based on the FPGA high-speed encryption and decryption further comprises monitoring equipment, and the monitoring equipment is connected with the protection interconnection equipment and the FPGA encryption and decryption equipment;
and the monitoring equipment is used for sending an interconnection completion signal when monitoring that the protection interconnection equipment receives the decrypted data packet.
6. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 5,
the encryption module further comprises a transmission unit, and the transmission unit is connected with the encryption unit;
and the transmission unit is used for transmitting the encrypted data packet and receiving the interconnection completion signal.
7. The FPGA-based high-speed encryption and decryption network security interconnection system of claim 3,
the key management server comprises a key management module and an updating module, the key management module is connected with the encryption module and the decryption module, and the updating module is connected with the key management module;
the key management module is used for sending the corresponding encryption key and the decryption key to the encryption module and the decryption module;
and the updating module is used for acquiring an external key bank to update the key in the key management module.
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