CN112910489A - Ethernet circuit based on W6100 chip - Google Patents
Ethernet circuit based on W6100 chip Download PDFInfo
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- CN112910489A CN112910489A CN202110236790.3A CN202110236790A CN112910489A CN 112910489 A CN112910489 A CN 112910489A CN 202110236790 A CN202110236790 A CN 202110236790A CN 112910489 A CN112910489 A CN 112910489A
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- 239000003990 capacitor Substances 0.000 claims abstract description 36
- 239000013078 crystal Substances 0.000 claims abstract description 7
- 238000001914 filtration Methods 0.000 claims description 5
- 230000006855 networking Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
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Abstract
The invention discloses an Ethernet circuit based on a W6100 chip, which belongs to the communication field, and comprises a processor, a clock circuit module, a filter circuit module, a configuration circuit module, an interface circuit module and an indicator light circuit module; the type of a chip adopted by the processor is W6100; the clock circuit module, the filter circuit module, the configuration circuit module, the interface circuit module and the indicator light circuit module are electrically connected with W6100 respectively; the clock circuit comprises a passive crystal oscillator X1, a first matching capacitor C1, a second matching capacitor C2 and a load resistor R5; w6100 is connected with two ends of a load resistor R5 through an XSCI pin and an XSCO pin, two ends of the load resistor R5 are also connected with one end of a first matching capacitor C1 and one end of a second matching capacitor C2, the circuit adopts a W6100 expansion Ethernet interface to be matched with any single chip microcomputer with a parallel bus interface and an SPI bus interface, the software writing is simple and convenient, and no special requirement is basically required for the performance of the single chip microcomputer.
Description
Technical Field
The invention relates to the field of communication, in particular to an Ethernet circuit based on a W6100 chip.
Background
W6100 is a new generation of all hardware TCP/IP protocol stack controller supporting IPv4/IPv6 dual cores. W6100 adds IPv6 on the basis of a hardware TCP/IP protocol stack IPv4 and supports protocols such as TCP, UDP, IPv6, IPv4, ICMPv6, ICMPv4, IGMP, ARP and PPPoE; also included are the 10/100M Ethernet data link layer (MAC) and the physical layer (PHY). The user can simply and quickly realize the networking function of the embedded device.
W6100 supports parallel bus interface and SPI bus interface, can conveniently carry out Ethernet interface expansion to the existing embedded system, and has wide application scene in the field of electric automobile networking and intelligent home networking.
The existing commonly used ethernet extension scheme is generally realized by adopting a method of matching an external physical layer chip with an ethernet protocol stack in a single chip microcomputer, the requirement on the performance of the single chip microcomputer is high, and many single chip microcomputers do not have the ethernet protocol stack at present.
Disclosure of Invention
According to the problems existing in the prior art, the invention discloses an Ethernet circuit based on a W6100 chip, which comprises a processor;
an Ethernet interface module which is communicated with the processor through a bus and is used for expanding an Ethernet communication interface;
the clock circuit module is electrically connected with the processor and used for providing a working clock signal;
the filter circuit module is electrically connected with the processor and used for filtering the internal power supply;
the configuration circuit module is electrically connected with the processor and used for designing the connection parameters of the Ethernet;
the indicator light circuit module is electrically connected with the processor and used for indicating the working state of the Ethernet;
the chip model adopted by the processor is W6100.
Further, the hour hand circuit comprises a first crystal oscillator, a first capacitor, a second capacitor and a fifth resistor; one end of the first capacitor and one end of the second capacitor are respectively connected with two ends of the first crystal oscillator, one end of the first capacitor and one end of the second capacitor are respectively connected with two ends of the first resistor, and the other end of the first capacitor and the other end of the second capacitor are both connected with the ground.
Further, the configuration circuit module comprises a first resistor, a second resistor, a third resistor and a fourth resistor; one end of the first resistor, one end of the second resistor and one end of the third resistor are all connected with the ground, the other end of the first resistor, the other end of the second resistor, the other end of the third resistor and the other end of the fourth resistor are all connected with the processor, and one end of the fourth resistor is connected with the 3.3V power supply.
Due to the adoption of the technical scheme, the Ethernet circuit based on the W6100 provided by the invention is based on the W6100 chip, a chip peripheral circuit is designed, the W6100 expansion Ethernet interface can be matched with any single chip microcomputer with a parallel bus interface and an SPI bus interface, the software compiling is simple and convenient, and no special requirement is basically required for the performance of the single chip microcomputer; a singlechip or a controller with a parallel bus interface can be adopted for control; the circuit is simple and reliable, and has wide application scenes in the fields of electric automobile networking and intelligent home networking.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a circuit diagram of the present invention.
Detailed Description
In order to make the technical solutions and advantages of the present invention clearer, the following describes the technical solutions in the embodiments of the present invention clearly and completely with reference to the drawings in the embodiments of the present invention:
fig. 1 is a circuit diagram of the present invention, which is composed of the following parts, an ethernet circuit based on W6100 chip includes a processor;
an Ethernet interface module which is communicated with the processor through a bus and is used for expanding an Ethernet communication interface;
the clock circuit module is electrically connected with the processor and used for providing a working clock signal;
the filter circuit module is electrically connected with the processor and used for filtering the internal power supply;
the configuration circuit module is electrically connected with the processor and used for designing the connection parameters of the Ethernet;
the indicator light circuit module is electrically connected with the processor and used for indicating the working state of the Ethernet;
the chip model adopted by the processor is W6100.
The clock circuit module comprises a passive crystal oscillator X1, a first matching capacitor C1, a second matching capacitor C2 and a load resistor R5;
the W6100 is connected with two ends of the load resistor R5 through an XSCI pin and an XSCO pin, two ends of the load resistor R5 are further connected with one end of the first matching capacitor C1 and one end of the second matching capacitor C2, the other end of the first matching capacitor C1 and the other end of the second matching capacitor C2 are both connected with the ground, and one end of the first matching capacitor C1 and one end of the second matching capacitor C2 are respectively connected with two ends of the passive crystal oscillator X1.
The values of the first matching capacitor C1 and the second matching capacitor C2 are 18 pf;
the value of the load resistor R5 is 1M ohm;
the Ethernet circuit also comprises a power circuit module which is electrically connected with the W6100;
the power circuit module adopts a 3.3V power supply and is connected to a digital power supply 3V3D and an analog power supply 3V3A of a chip W6100, the external 3.3V power supply is filtered by connecting 1 capacitor of 10uf and two capacitors of 100nf in parallel to supply power to the digital power supply 3V3D, and the 3V3D is filtered by 1 inductor to supply power to the analog power supply 3V 3A; A1.2V voltage-stabilized power supply is integrated in the W6100, 1.2V voltage can be output through 1V2O, the output 1.2V voltage is filtered by a 100nf capacitor, and the 1.2V analog power supply 1V2A is supplied with power by adopting an inductor and the 100nf capacitor after filtering. Meanwhile, the output 1.2V voltage adopts an inductor and 4 capacitors of 100nf to supply power to the 1.2V digital power supply 1V 2D.
The configuration circuit module comprises a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4; a MODE0 pin of the W6100 is connected with one end of the third resistor R3, a MODE1 pin of the W6100 is connected with one end of the second resistor R2, a MODE2 pin of the W6100 is connected with one end of the first resistor R1, and the other end of the first resistor R1, the other end of the second resistor R2 and the other end of the third resistor R3 are all connected with ground; the MODE3 pin of the W6100 is connected with one end of the fourth resistor, and the other end of the fourth resistor is connected with a 3.3V power supply.
The configuration circuit module adopts 4 10K resistors for configuration, wherein R1, R2 and R3 are connected to GND, W6100 is configured to an auto-negotiation (full/half duplex, 10/100M) mode, R4 is connected to GND, and W6100 is configured to a parallel data bus mode.
The interface circuit module adopts four 49.9R resistors and two capacitors for filtering processing.
The indicator lamp module comprises an indicator lamp D1, an indicator lamp D2, a resistor R10 and a resistor R11; the indicator light D1 is used to indicate the connection status of Ethernet, and D1 lights up when the connection is established with Ethernet. The indicator lamp D2 is used to indicate the data operation status of the ethernet, and D2 is lit when data transmission and reception are performed by the ethernet.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (3)
1. An Ethernet circuit based on W6100 chip is characterized in that: a processor;
an Ethernet interface module which is communicated with the processor through a bus and is used for expanding an Ethernet communication interface;
the clock circuit module is electrically connected with the processor and used for providing a working clock signal;
the filter circuit module is electrically connected with the processor and used for filtering the internal power supply;
the configuration circuit module is electrically connected with the processor and used for designing the connection parameters of the Ethernet;
the indicator light circuit module is electrically connected with the processor and used for indicating the working state of the Ethernet;
the chip model adopted by the processor is W6100.
2. An ethernet circuit based on W6100 chip as claimed in claim 1, wherein: the hour hand circuit comprises a first crystal oscillator, a first capacitor, a second capacitor and a fifth resistor; one end of the first capacitor and one end of the second capacitor are respectively connected with two ends of the first crystal oscillator, one end of the first capacitor and one end of the second capacitor are respectively connected with two ends of the first resistor, and the other end of the first capacitor and the other end of the second capacitor are both connected with the ground.
3. An ethernet circuit based on W6100 chip as claimed in claim 1, wherein: the configuration circuit module comprises a first resistor, a second resistor, a third resistor and a fourth resistor; one end of the first resistor, one end of the second resistor and one end of the third resistor are all connected with the ground, the other end of the first resistor, the other end of the second resistor, the other end of the third resistor and the other end of the fourth resistor are all connected with the processor, and one end of the fourth resistor is connected with the 3.3V power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110236790.3A CN112910489A (en) | 2021-03-03 | 2021-03-03 | Ethernet circuit based on W6100 chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110236790.3A CN112910489A (en) | 2021-03-03 | 2021-03-03 | Ethernet circuit based on W6100 chip |
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| Publication Number | Publication Date |
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| CN112910489A true CN112910489A (en) | 2021-06-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202110236790.3A Pending CN112910489A (en) | 2021-03-03 | 2021-03-03 | Ethernet circuit based on W6100 chip |
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| CN (1) | CN112910489A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114205773A (en) * | 2022-02-21 | 2022-03-18 | 成都农业科技职业学院 | 6LoWPAN gateway and application |
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2021
- 2021-03-03 CN CN202110236790.3A patent/CN112910489A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114205773A (en) * | 2022-02-21 | 2022-03-18 | 成都农业科技职业学院 | 6LoWPAN gateway and application |
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