CN112909120B - Improve Al 2 O 3 Method for passivation effect of coating film - Google Patents
Improve Al 2 O 3 Method for passivation effect of coating film Download PDFInfo
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- CN112909120B CN112909120B CN201911144238.0A CN201911144238A CN112909120B CN 112909120 B CN112909120 B CN 112909120B CN 201911144238 A CN201911144238 A CN 201911144238A CN 112909120 B CN112909120 B CN 112909120B
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- 238000000034 method Methods 0.000 title claims abstract description 66
- 229910018072 Al 2 O 3 Inorganic materials 0.000 title claims abstract description 43
- 238000002161 passivation Methods 0.000 title claims abstract description 28
- 230000000694 effects Effects 0.000 title claims abstract description 18
- 239000011248 coating agent Substances 0.000 title claims description 21
- 238000000576 coating method Methods 0.000 title claims description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 91
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 91
- 239000010703 silicon Substances 0.000 claims abstract description 91
- 238000010438 heat treatment Methods 0.000 claims abstract description 71
- 238000000151 deposition Methods 0.000 claims abstract description 48
- 235000012431 wafers Nutrition 0.000 claims description 78
- 238000005192 partition Methods 0.000 claims description 29
- 230000008021 deposition Effects 0.000 claims description 28
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 13
- 238000000231 atomic layer deposition Methods 0.000 claims description 9
- 238000001816 cooling Methods 0.000 claims description 8
- 238000007599 discharging Methods 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 8
- 238000004891 communication Methods 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 238000000926 separation method Methods 0.000 claims 1
- 239000011800 void material Substances 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 239000007888 film coating Substances 0.000 abstract 1
- 238000009501 film coating Methods 0.000 abstract 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 34
- 229910002804 graphite Inorganic materials 0.000 description 34
- 239000010439 graphite Substances 0.000 description 34
- 239000010408 film Substances 0.000 description 8
- 238000000137 annealing Methods 0.000 description 6
- 229910052799 carbon Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000005498 polishing Methods 0.000 description 6
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- 230000000052 comparative effect Effects 0.000 description 4
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- 238000005215 recombination Methods 0.000 description 4
- 238000006388 chemical passivation reaction Methods 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
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- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
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- 238000005485 electric heating Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- 229910052755 nonmetal Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1864—Annealing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
The invention discloses a method for improving Al 2 O 3 A method for film coating passivation effect relates to the technical field of solar cell production, and comprises the following steps: depositing Al on the surface of a silicon wafer 2 O 3 And then, carrying out infrared heating. The invention can induce a large amount of Al by using the instant heating function of infrared heating 3+ Void and gap O 2‑ Thereby Al 2 O 3 The amount of negative charge increases, similarly to Al 2 O 3 The interface in contact with silicon also has a reduced interface state density due to IR treatment, which improves passivation effect.
Description
Technical Field
The invention relates to the technical field of solar cell production, and relates to a method for improving Al content 2 O 3 A method for passivation effect of coating.
Background
Passivation, one is chemical passivation. The recombination rate at the surface of the bare silicon wafer is high because of the presence of a large number of dangling bonds (recombination centers). The chemical passivation is to coordinate and saturate through a dangling bond between nonmetal atoms such as H, O, N, C and the silicon surface, so as to achieve the purpose of reducing the defect state density. The other is field effect passivation. A layer of film carrying charges is deposited or grown on the surface of a battery piece to form a junction (a high-low junction of p +/p or n +/n or a p-n junction), an electric field with the direction parallel to the normal direction of the surface of the silicon piece is generated, a certain carrier on the surface is shielded, the concentration of one carrier is reduced, and the recombination rate is reduced because another carrier with opposite charges cannot find a recombination object.
Wherein, due to Al 2 O 3 The density of the carried negative charges is high and reaches 10 to 13 C/cm 2 The order of magnitude of the electron beam, so that the electron beam has extremely strong field passivation effect, can effectively shield electrons on the surface, and can also shield electrons even when the electrons are used as majority electrons. It can have so much negative charge, mainly due to the parameter in its passivation film, i.e. the gap O 2- Al3+ vacancies, etc., in the main, and in part, according to some statements in the literature,in Al 2 O 3 The surface in contact with Si forms SiO x The transition layer has better chemical passivation effect. For the above reasons, Al 2 O 3 Has excellent passivation effect and development prospect, and the photovoltaic industry aims at Al 2 O 3 Equipment for the preparation of passivation films is also becoming more and more robust.
CN 107623052A discloses Al for solar cell piece passivation 2 O 3 A coating system and method, the method comprising the steps of: 1) the carrier plate loaded with the silicon wafer to be coated enters the feeding table to complete a feeding state; 2) conveying the carrier plate loaded with the silicon wafer to be coated to an infrared heating cavity under the action of a transmission system, and preheating to 300-500 ℃; 3) conveying the infrared preheated silicon wafer to a buffer cavity, keeping the silicon wafer at a constant temperature of 300-500 ℃, and waiting for preheating of a subsequent carrier plate carrying the silicon wafer to be coated; 4) the silicon wafer enters a process cavity, plasma enhanced chemical vapor deposition is carried out at the constant temperature of 300-500 ℃ and in a vacuum state, and Al is formed on the surface of the silicon wafer 2 O 3 Film plating; 5) the silicon wafer coated by the plasma enhanced chemical vapor deposition is conveyed to the second buffer cavity, and the subsequent plasma enhanced chemical vapor deposition coating of the silicon wafer on the carrier plate is waited; 6) the carrier plate after the silicon chip is coated enters the unloading cavity and is transited from a vacuum state to an atmospheric state; 7) the atmospheric support plate enters the cache table to ensure the continuous operation of the equipment, and a plurality of support plates are stored for caching when the automatic loading and unloading device fails for a short time; 8) putting the support plate into the automatic loading and unloading device, putting the coated silicon wafer into a flower basket, and then putting a new silicon wafer to be coated on the support plate; 9) and the carrier plate provided with the silicon wafer to be coated is conveyed to the feeding table through a lower conveying device at the bottom of the coating system to realize a feeding state and realize circulation of the carrier plate. The method has the advantages of high film forming speed, low cost and high coating quality, but the equipment is connected with Al 2 O 3 Deposition chamber and SiN x In order to ensure that the temperature does not fall between the deposition chambers, continuous heating is required, the energy consumption is large, and in addition, Al deposited by the method is used 2 O 3 The thickness of SiN is larger x Deposited bySimultaneous annealing of SiN x The deposition time is long, and a better passivation effect can be achieved. And Al 2 O 3 The thicker and longer SiNx deposition time are very disadvantageous for some Al 2 O 3 Passivating the cells on the front side.
In view of the current mass production equipment, it is necessary to provide an improved scheme for improving Al 2 O 3 Annealing of thin films, and increasing Al 2 O 3 Method of thin film passivation effect.
Disclosure of Invention
In view of the above problems in the prior art, it is an object of the present invention to provide a method for improving Al 2 O 3 A method for passivation effect of coating.
In order to achieve the purpose, the invention adopts the following technical scheme:
improve Al 2 O 3 A method for passivation of a coating, the method comprising: depositing Al on the surface of a silicon wafer 2 O 3 Thereafter, a step of infrared heating (IR) is performed.
The invention deposits Al on the surface of the silicon chip 2 O 3 Then, by using the instant heating function of infrared heating (e.g. about 150-400 ℃ in 3-10 seconds), a large amount of Al can be induced 3+ Void and gap O 2- Thereby Al 2 O 3 The amount of negative charge increases, similarly to Al 2 O 3 The interface in contact with silicon is also treated by IR, the interface state density (Dit) is reduced, and the treatment is carried out towards the direction that the passivation J0 value is reduced, and the treatment mode is not replaced by the common resistance wire heating mode and has innovation.
General deposition of Al 2 O 3 Annealing treatment is required thereafter, specifically, Al 2 O 3 After the deposition is finished, Al is added 2 O 3 Annealing, SiNx film deposition, and IR Al treatment 2 O 3 There is also a large improvement for this step as well. For example, SiN can be deposited directly without annealing x Therefore, the process time is greatly shortened, and the process cost is reduced.
The method of the invention is not only suitable for Al of N-type piece 2 O 3 Passivation of Al also for P-type plates 2 O 3 Passivation, e.g. Al deposition, may be carried out after the wafer has been cleaned 2 O 3 And then the step of infrared heating is performed.
The following is a preferred technical solution of the present invention, but not a limitation to the technical solution provided by the present invention, and the technical objects and advantageous effects of the present invention can be better achieved and achieved by the following preferred technical solution.
Preferably, the infrared heating time is 3-10 seconds, such as 3 seconds, 5 seconds, 6 seconds, 7 seconds, 8 seconds or 10 seconds, and the maximum unit area power of the infrared heating is 31-41 kW/m 2 E.g. 31kW/m 2 、 33kW/m 2 、35kW/m 2 、36kW/m 2 、38kW/m 2 、40kW/m 2 Or 41kW/m 2 And so on.
Preferably, the infrared heating is carried out at a temperature of 150 to 400 ℃, for example, 150 ℃, 200 ℃, 210 ℃, 220 ℃, 240 ℃, 260 ℃, 280 ℃, 300 ℃, 320 ℃, 335 ℃, 350 ℃, 370 ℃, 380 ℃ or 400 ℃.
In the method of the invention, Al can be deposited on the surface of the silicon wafer by depositing Al on the surface of the silicon wafer 2 O 3 Then directly carrying out infrared heating treatment, and depositing Al on the surface of the silicon wafer 2 O 3 And then cooling and then carrying out infrared heating treatment.
Preferably, Al deposited on the surface of the silicon wafer at the beginning of the infrared heating treatment 2 O 3 The temperature of the layer is 30 to 250 ℃, for example, 30 ℃, 50 ℃, 60 ℃, 80 ℃, 100 ℃, 120 ℃, 130 ℃, 150 ℃, 175 ℃, 185 ℃, 200 ℃, 220 ℃, 235 ℃, or 240 ℃, preferably 100 to 150 ℃. The induction of a large amount of Al can be better realized in the preferred range 3+ Void and gap O 2- Further reacting Al 2 O 3 The effect of increasing the amount of negative charge carried.
As a preferred technical scheme of the method, Al is deposited on the surface of the silicon wafer 2 O 3 Comprises the following steps:
the silicon chip sequentially enters a first cavity for vacuumizing, a second cavity for preheating and a third cavity for Al 2 O 3 And (3) deposition, wherein the first chamber is communicated with the second chamber in a partition way, the second chamber is communicated with the third chamber, and the partition communication is as follows: adjacent chambers are independent and can be communicated by opening the partition.
Preferably, the first chamber is evacuated to 0.1-1 mbar, such as 0.1mbar, 0.5mbar, 0.6mbar, 0.8mbar or 1 mbar.
Preferably, the vacuum degree of the silicon wafer in the preheating of the second chamber is 3-10 mbar, such as 3mbar, 4mbar, 5mbar, 6mbar, 8mbar or 10mbar, and the like, and the silicon wafer is deposited with Al in the third chamber 2 O 3 The vacuum degree is 4-6 mbar, such as 4mbar, 5mbar or the like.
It should be noted that although the second chamber and the third chamber are the same, the vacuum degrees of the two chambers are not completely the same.
Preferably, the silicon wafer enters a third chamber for Al 2 O 3 Before deposition, SiO with the thickness of 0.3-1 nm is formed on the surface of the silicon wafer 2 Such as 0.3nm, 0.4nm, 0.5nm, 0.6nm, 0.7nm, 0.8nm, 1nm, or the like.
Preferably, the SiO x Is formed by natural oxidation in air.
The silicon chip enters the first cavity to be vacuumized, so that the vacuum degree is as close to that of the deposition cavity as possible, and meanwhile, the surface of the silicon chip is prevented from being oxidized by oxygen in the air for a long time to form SiO x Too high compactness is not good for Al 2 O 3 The silicon chip can be naturally oxidized in the air to form thinner SiO by the vacuum-pumping step x Layer of small amount of SiO x Is promoted with Al 2 O 3 And (4) combining.
Preferably, the second chamber is preheated at a temperature of 150 to 400 ℃, for example, 150 ℃, 200 ℃, 220 ℃, 230 ℃, 240 ℃, 260 ℃, 280 ℃, 300 ℃, 320 ℃, 335 ℃, 350 ℃, 370 ℃, 380 ℃ or 400 ℃. The deposition temperature is different for different deposition modes, and those skilled in the art can select the deposition temperature according to the needs.
The preheating mode of the second chamber is not limited, and the second chamber can be heated by electricity, infrared heating or a combination of the electricity and the infrared heating, preferably by a combination of the electricity and the infrared heating.
Preferably, the heating is performed by electrical heating, and then infrared heating is started, and the temperature is raised by 100 to 200 ℃ (e.g., 100 ℃, 120 ℃, 135 ℃, 150 ℃, 165 ℃, 180 ℃, or 200 ℃) within 3 to 10 seconds (e.g., 3 seconds, 4 seconds, 5 seconds, 6 seconds, 8 seconds, or 10 seconds), so that the second chamber reaches a preheating temperature of 150 to 400 ℃ (e.g., 100 ℃, 120 ℃, 135 ℃, 150 ℃, 165 ℃, 180 ℃, 200 ℃, 230 ℃, 360 ℃, 280 ℃, 300 ℃, 335 ℃, 360 ℃, 380 ℃, or 400 ℃). The mixed heating mode avoids the problems that the temperature rise of a single electric heating mode is too slow, and the service life of the infrared heating device is reduced due to the loss of the single infrared heating mode.
The invention carries out Al on the third chamber 2 O 3 The deposition method is not limited, and may be, for example, an Atomic Layer Deposition (ALD) method or a Plasma Enhanced Chemical Vapor Deposition (PECVD) method.
Preferably, Al is deposited 2 O 3 The thickness of the layer is 3 to 20nm, for example, 3nm, 5nm, 6nm, 8nm, 9nm, 10nm, 12nm, 14nm, 15nm, 17nm or 20 nm.
Al deposited under different deposition mode conditions 2 O 3 The layer can achieve a better passivation effect within a range of different thicknesses. Exemplarily, the following steps are carried out:
preferably, Al obtained by ALD mode deposition growth 2 O 3 The thickness of the layer is 3-10 nm, and 3-5 fA/cm can be achieved on the polishing sheet 2 J0 value of (a).
Preferably, the grown Al is deposited by PECVD 2 O 3 The thickness of the layer is 10-20 nm, and 3-5 fA/cm can be achieved on the polishing sheet 2 J0 value of (a).
Preferably, the silicon wafer is directly transferred to another chamber for infrared heating without cooling after the deposition in the third chamber is finished.
Or, the silicon wafer leaves the third chamber, enters the fourth chamber, is discharged and cooled, then is transferred to the fifth chamber for infrared heating, the third chamber and the fourth chamber are communicated in a partition mode, the fourth chamber and the fifth chamber are communicated in a partition mode, and the partition communication is as follows: adjacent chambers are independent and can be communicated by opening the partition. Namely, the first chamber, the second chamber, the third chamber, the fourth chamber and the fifth chamber are sequentially entered, the first chamber is also called a feeding chamber and mainly used for pretreatment, the second chamber is also called a preheating chamber and mainly used for preheating, the third chamber is also called a deposition chamber, the fourth chamber is also called a discharging chamber, and the fifth chamber is also called an infrared heating chamber. (Chamber connection figure see FIG. 2).
In the prior art, silicon wafers deposit Al 2 O 3 Then, the third chamber is taken out, and the next link is carried out, if only Al is made 2 O 3 And (3) passivating, namely directly cooling in the fourth cavity and then discharging, if the passivation is related to SiNx coating, namely entering the next SiNx deposition cavity through the fourth cavity, wherein no rapid infrared heating step is needed in the middle, namely entering a first cavity, a second cavity, a third cavity and a fourth cavity in sequence, wherein the first cavity is also called a feeding cavity and mainly used for pretreatment, the second cavity is also called a preheating cavity and mainly used for preheating, the third cavity is also called a deposition cavity and the fourth cavity is also called a discharging cavity. (Chamber connection figure see FIG. 1).
Preferably, the method further comprises reacting Al 2 O 3 After infrared heating of the layer, SiN is deposited x And (6) coating.
As a further preferred technical solution of the method of the present invention, the method comprises the steps of:
(1) sequentially enabling the silicon wafers to enter a first chamber for vacuumizing to 0.1-1 mbar;
(2) opening a door between the first chamber and the second chamber, and preheating the silicon wafer in the second chamber at the preheating temperature of 150-400 ℃;
(3) the silicon chip enters a third chamber for Al 2 O 3 Depositing;
al with the thickness of 3-10 nm is obtained by ALD deposition growth 2 O 3 Depositing and growing the layer or the layer in a PECVD mode to obtain Al with the thickness of 10-20 nm 2 O 3 A layer;
(4) a door between the third chamber and the fourth chamber is opened, the silicon wafer enters the fourth chamber, discharging is carried out, and the silicon wafer is gradually cooled in the discharging process;
(5) opening a door between the fourth chamber and the fifth chamber, allowing the silicon wafer to enter the fifth chamber, and carrying out infrared heating to raise the temperature to 150-400 ℃ within 3-10 seconds;
(6) al of silicon wafer 2 O 3 Deposition of SiN on the layer x Coating;
the first cavity is communicated with the second cavity in a partition mode, the second cavity is communicated with the third cavity in a partition mode, the third cavity is communicated with the fourth cavity in a partition mode, the fourth cavity is communicated with the fifth cavity in a partition mode, and the partition communication is as follows: adjacent chambers are independent and can be communicated by opening the partition.
Compared with the prior art, the invention has the following beneficial effects:
(1) the invention deposits Al on the surface of the silicon chip 2 O 3 Then, by using the instant heating function of infrared heating (e.g. about 150-400 ℃ in 3-10 seconds), a large amount of Al can be induced 3+ Void and gap O 2- Thereby Al 2 O 3 The amount of negative charge increases, similarly to Al 2 O 3 The interface contacting with silicon is processed by IR, the interface state density (Dit) is reduced, and the processing is carried out towards the direction that the passivation J0 value is reduced, and the processing mode is not the mode that the common resistance wire heating mode can replace.
(2) For the polishing piece, the method can ensure that the J0 value is from 3 to 5fA/cm 2 Reduced to 1 to 3fA/cm 2 (ii) a The advantages of the passivated suede are more obvious, and the J0 value is from 10 to 20fA/cm 2 Can be reduced to 10fA/cm 2 The following levels.
(3) The method of the invention has high feasibility, only needs to add one IR heating in the actual operation, has low cost and very controllable process on the whole, and if Al is used, the method has the advantages of high practicability 2 O 3 The annealing process is needed, so that the step can be completely omitted, the process time is reduced, and the productivity is increased.
Drawings
FIG. 1 is a schematic diagram of a chamber connection used in the preparation of an alumina passivation layer according to the present invention;
FIG. 2 is a schematic diagram of a chamber connection used in the prior art for preparing an alumina passivation layer;
wherein, 01-the first chamber, 02-the second chamber, 03-the third chamber, 04-the fourth chamber, 05-the fifth chamber.
Detailed Description
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
Example 1
This example provides an improved Al 2 O 3 The method for passivating the coating (the chamber connection diagram of the adopted device is shown in figure 1) comprises the following steps:
1) a clean silicon wafer (polished wafer) is automatically sucked and taken out through feeding and then is placed in a graphite carrying disc, and the coated surface faces upwards;
2) A door of the first chamber connected with the atmosphere is opened, a graphite carrying disc containing silicon wafers is placed into the first chamber through the door, the silicon wafers enter the first chamber, and the first chamber is vacuumized to 0.1mbar and is stabilized for 2 s;
3) opening a door connecting the first chamber and the second chamber, enabling the graphite carrying disc to enter the second chamber (the heating plate in the second chamber is always opened, the temperature is set at 180 ℃), after the graphite carrying disc is stopped stably in the second chamber, turning on an infrared lamp, and enabling the temperature of the silicon wafer to rise to 240 ℃ in 5 seconds by the two heating modes;
4) the second chamber is communicated with the third chamber, when the temperature of the silicon wafer reaches 240 ℃, the graphite carrying disc enters the third chamber, the heating plate keeps the heating process temperature of the set temperature of 240 ℃, and Al is deposited in an ALD mode 2 O 3 On the front surface of the silicon chip;
5)Al 2 O 3 depositing for 5nm, after the deposition is finished, opening partition doors of a third chamber and a fourth chamber, wherein the fourth chamber is not heated, namely, cooled, and performing the next step when the temperature is reduced to 120 ℃;
6) opening partition doors of the fourth chamber and the fifth chamber, enabling the graphite carrying disc to enter the fifth chamber, opening the infrared ray after the graphite carrying disc is stopped, and enabling the maximum unit area power of the infrared heating to be 36kW/m 2 And after 5 seconds of treatment, the infrared lamp is turned off, then the vacuum in the fifth chamber is broken, the graphite tray is taken out of the equipment, and the graphite tray returns to a feeding point for preparing blanking.
Example 2
This example provides an improved Al 2 O 3 The method for the passivation effect of the coating (the chamber connection diagram of the device adopted by the method is shown in figure 1) comprises the following steps:
1) a clean silicon wafer (polished wafer) is automatically sucked and taken out through feeding and then is placed in a graphite carrying disc, and the coated surface faces upwards;
2) the first chamber is connected with the atmosphere, a door of the atmosphere is opened, a graphite carrying disc containing silicon wafers is placed in the first chamber, the silicon wafers enter the first chamber through the door, and the silicon wafers are vacuumized to 0.5mbar in the first chamber and are stabilized for 3 s;
3) opening a door connecting the first chamber and the second chamber, enabling the graphite carrying disc to enter the second chamber (the heating plate in the second chamber is always opened, the temperature is set at 200 ℃), after the graphite carrying disc is stopped stably in the second chamber, turning on an infrared lamp, and enabling the temperature of the silicon wafer to rise to 350 ℃ in a 7-second time by the two heating modes;
4) the second chamber is communicated with the third chamber, when the temperature of the silicon wafer reaches 350 ℃, the graphite carrying disc enters the third chamber, the heating plate keeps the heating process temperature of 350 ℃, and Al is deposited in an ALD mode 2 O 3 On the front surface of the silicon chip;
5)Al 2 O 3 depositing 8nm, after depositing, opening a partition door of the third chamber and the fourth chamber, wherein the fourth chamber is not heated, namely, the temperature is reduced, when the temperature is reduced to 80 ℃,carrying out the next step;
6) opening partition doors of the fourth chamber and the fifth chamber, enabling the graphite carrying disc to enter the fifth chamber, opening the infrared ray after the graphite carrying disc is stopped, and enabling the maximum unit area power of the infrared heating to be 33kW/m 2 And after 8 seconds of treatment, the infrared lamp is turned off, then the vacuum in the fifth chamber is broken, the graphite tray is taken out of the equipment, and the graphite tray returns to a feeding point for preparing blanking.
Example 3
This example provides an improved Al 2 O 3 The method for the passivation effect of the coating (the chamber connection diagram of the device adopted by the method is shown in figure 1) comprises the following steps:
1) a clean silicon wafer (a velvet surface sheet) is automatically sucked and taken out through feeding and then is placed in a graphite carrying disc, and the coating surface faces upwards;
2) the first chamber is connected with the atmosphere, a door of the atmosphere is opened, a graphite carrying disc containing silicon wafers is placed in the first chamber, the silicon wafers enter the first chamber through the door, and the silicon wafers are vacuumized to 0.8mbar in the first chamber and can be stabilized for 2 s;
3) opening a door connecting the first chamber and the second chamber, enabling the graphite carrying disc to enter the second chamber, and enabling a heating plate in the second chamber to be opened all the time, wherein the temperature is set at 150 ℃, and enabling the temperature of the silicon wafer to rise to 150 ℃;
4) The second chamber is communicated with the third chamber, when the temperature of the silicon wafer reaches 150 ℃, the graphite carrying disc enters the third chamber, the heating plate keeps the heating process temperature of the set temperature of 150 ℃, and Al is deposited in a PECVD (plasma enhanced chemical vapor deposition) mode 2 O 3 On the front surface of the silicon chip;
5)Al 2 O 3 depositing for 15nm, after the deposition is finished, opening partition doors of a third chamber and a fourth chamber, wherein the fourth chamber is not heated, namely, cooled, and performing the next step when the temperature is reduced to 30 ℃;
6) opening partition doors of the fourth chamber and the fifth chamber, enabling the graphite carrying disc to enter the fifth chamber, opening the infrared ray after the graphite carrying disc is stopped, and enabling the maximum unit area power of the infrared heating to be 40kW/m 2 And after 3 seconds of treatment, the infrared lamp is turned off, then the fifth chamber breaks vacuum, the graphite tray is taken out of the equipment, returns to a feeding point and is dischargedAnd (4) preparing materials.
Example 4
This example provides an improved Al 2 O 3 The method for the passivation effect of the coating (the chamber connection diagram of the device adopted by the method is shown in figure 1) comprises the following steps:
1) a clean silicon wafer (a velvet surface sheet) is automatically sucked and taken out through feeding and then is placed in a graphite carrying disc, and the coating surface faces upwards;
2) the first chamber is connected with the atmosphere, a door of the atmosphere is opened, a graphite carrying disc containing silicon wafers is placed in the first chamber, the silicon wafers enter the first chamber through the door, and the silicon wafers are vacuumized to 1mbar in the first chamber and can be stabilized for 3 s;
3) Opening a door connecting the first chamber and the second chamber, enabling the graphite carrying disc to enter the second chamber (the heating plate in the second chamber is always opened, the temperature is set at 150 ℃), after the graphite carrying disc is stopped stably in the second chamber, turning on an infrared lamp, and enabling the temperature of the silicon wafer to rise to 400 ℃ in 10 seconds by the two heating modes;
4) the second chamber is communicated with the third chamber, when the temperature of the silicon wafer reaches 400 ℃, the graphite carrying disc enters the third chamber, the heating plate keeps the heating process temperature of 400 ℃, and Al is deposited in a PECVD mode 2 O 3 On the front surface of the silicon chip;
5)Al 2 O 3 depositing for 20nm, after depositing, opening a partition door of a third chamber and a fourth chamber, wherein the fourth chamber is not heated, namely, cooling is carried out, and when the temperature is reduced to 200 ℃, carrying out the next step;
6) opening partition doors of the fourth chamber and the fifth chamber, enabling the graphite carrying disc to enter the fifth chamber, opening the infrared ray after the graphite carrying disc is stopped, and enabling the maximum unit area power of the infrared heating to be 36kW/m 2 And after the treatment for 4 seconds, the infrared lamp is turned off, then the vacuum in the fifth chamber is broken, the graphite tray is taken out of the equipment, and the graphite tray returns to a feeding point for preparing the blanking.
Example 5
This example differs from example 1 in that:
Step 7) is carried out after step 6): and entering a next chamber for SiNx film deposition.
Comparative example 1
The procedure and conditions were the same as in example 1, except that step 6) was not carried out, but the temperature was lowered and discharged in step 5).
Comparative example 2
The procedure and conditions were the same as in example 3, except that step 6) was not carried out, but the temperature was lowered and discharged in step 5).
The wafers were tested for J0 performance using a WCT120(silicon wafer life tester, silicon Instruments) and the results are shown in Table 1.
TABLE 1
| Examples of the invention | Type of silicon wafer used | J0 value (fA/cm) 2 ) |
| Example 1 | Polishing sheet | 1<J0<2 |
| Example 2 | Polishing sheet | 2<J0<3 |
| Example 3 | Velvet piece | 8<J0<10 |
| Example 4 | Velvet piece | 5<J0<7 |
| Comparative example 1 | Polishing sheet | 3～5 |
| Comparative example 2 | Velvet piece | 10～20 |
As can be seen from the above, the method of the present invention can be used to adjust the J0 value to 3-5 fA/cm for the polished wafer 2 Reduced to 1 to 3fA/cm 2 (ii) a The advantages of the passivated suede are more obvious, and the J0 value is from 10 to 20fA/cm 2 Can be reduced to 10fA/cm 2 The following levels.
The applicant states that the present invention is illustrated in detail by the above examples, but the present invention is not limited to the above detailed methods, i.e. it is not meant that the present invention must rely on the above detailed methods for its implementation. It should be understood by those skilled in the art that any modification of the present invention, equivalent substitutions of the raw materials of the product of the present invention, addition of auxiliary components, selection of specific modes, etc., are within the scope and disclosure of the present invention.
Claims (16)
1. Improve Al 2 O 3 The method for the passivation effect of the coating is characterized by comprising the following steps: depositing Al on the surface of a silicon wafer 2 O 3 Then, directly carrying out infrared heating treatment, or depositing Al on the surface of the silicon wafer 2 O 3 Then, firstly cooling and then carrying out infrared heating treatment;
the infrared heating time is 3-10 seconds, and the maximum unit area power of the infrared heating is 31-41 kW/m 2 Infrared heating to a temperature of more than 150 ℃ and less than or equal to 400 ℃;
al deposited on the surface of the silicon wafer when the infrared heating treatment is started 2 O 3 Temperature of the layerThe temperature is 100-150 ℃;
the method also includes reacting Al 2 O 3 After infrared heating of the layer, SiN is deposited x And (6) coating.
2. The method of claim 1, wherein Al is deposited on the surface of the silicon wafer 2 O 3 Comprises the following steps:
the silicon chip sequentially enters a first cavity for vacuumizing, a second cavity for preheating and a third cavity for Al 2 O 3 Depositing;
wherein, first cavity cuts off the intercommunication with the second cavity, and the second cavity communicates with each other with the third cavity, cut off the intercommunication and be: adjacent chambers are independent and can be communicated by opening the partition.
3. The method of claim 2, wherein the first chamber is evacuated to a vacuum of 0.1 to 1 mbar.
4. The method of claim 2, wherein the degree of vacuum of the wafer in the preheating in the second chamber is 3 to 10mbar, and the wafer is deposited with Al in the third chamber 2 O 3 The vacuum degree is 4-6 mbar.
5. The method of claim 2, wherein the wafer is subjected to Al in a third chamber 2 O 3 Before deposition, SiO with the thickness of 0.3-1 nm is formed on the surface of the silicon wafer x 。
6. The method of claim 5, wherein the SiO x Is formed by natural oxidation in air.
7. The method of claim 2, wherein the second chamber is preheated to a temperature of 150-400 ℃.
8. The method of claim 2, wherein the second chamber is preheated by electrical heating, infrared heating, or a combination thereof.
9. The method of claim 8, wherein the second chamber is preheated by a combination of electrical heating and infrared heating.
10. The method of claim 9, wherein the heating is performed by electrical heating, and then the infrared heating is started to raise the temperature to 100-200 ℃ within 3-10 seconds, so that the second chamber reaches the preheating temperature of 150-400 ℃.
11. The method of claim 2, wherein the third chamber is subjected to Al 2 O 3 The deposition method includes an atomic layer deposition method or a plasma enhanced chemical vapor deposition method.
12. The method of claim 11, wherein the deposited Al is 2 O 3 The thickness of the layer is 3 to 20 nm.
13. The method of claim 11, wherein the grown Al is deposited by atomic layer deposition 2 O 3 The thickness of the layer is 3 to 10 nm.
14. The method of claim 11, wherein the grown Al is deposited by plasma enhanced chemical vapor deposition 2 O 3 The thickness of the layer is 10 to 20 nm.
15. The method according to claim 2, wherein the silicon wafer is directly transferred to another chamber for infrared heating without cooling after the deposition in the third chamber is finished;
or the silicon wafer leaves the third chamber and enters the fourth chamber for discharging and cooling, and then is transferred to the fifth chamber for infrared heating;
the third chamber and the fourth chamber are separated and communicated, the fourth chamber and the fifth chamber are separated and communicated, and the separation and communication is as follows: adjacent chambers are independent and can be communicated by opening the partition.
16. Method according to claim 1, characterized in that it comprises the following steps:
(1) sequentially enabling the silicon wafers to enter a first chamber for vacuumizing to 0.1-1 mbar;
(2) opening a door between the first chamber and the second chamber, and preheating the silicon wafer in the second chamber at the preheating temperature of 200-400 ℃;
(3) the silicon chip enters a third chamber for Al 2 O 3 Depositing;
depositing and growing in an atomic layer deposition mode to obtain Al with the thickness of 3-10 nm 2 O 3 Depositing and growing the layer or the layer by a plasma enhanced chemical vapor deposition method to obtain Al with the thickness of 10-20 nm 2 O 3 A layer;
(4) opening a door between the third chamber and the fourth chamber, feeding the silicon wafer into the fourth chamber, discharging, and gradually cooling the silicon wafer to 100-150 ℃ in the discharging process;
(5) a door between the fourth chamber and the fifth chamber is opened, the silicon wafer enters the fifth chamber to be subjected to infrared heating, and the temperature is increased to be more than 150 ℃ and less than or equal to 400 ℃ within 3-10 seconds;
(6) al on silicon wafer 2 O 3 Deposition of SiN on the layer x Coating;
the first cavity is communicated with the second cavity in a partition mode, the second cavity is communicated with the third cavity in a partition mode, the third cavity is communicated with the fourth cavity in a partition mode, the fourth cavity is communicated with the fifth cavity in a partition mode, and the partition communication is as follows: adjacent chambers are independent and can be communicated by opening the partition.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016019396A2 (en) * | 2014-08-01 | 2016-02-04 | Solexel, Inc. | Solar cell surface passivation using photo-anneal |
| CN107623052A (en) * | 2017-09-01 | 2018-01-23 | 常州比太科技有限公司 | A kind of solar battery sheet passivation Al2O3Coating system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016019396A2 (en) * | 2014-08-01 | 2016-02-04 | Solexel, Inc. | Solar cell surface passivation using photo-anneal |
| CN107623052A (en) * | 2017-09-01 | 2018-01-23 | 常州比太科技有限公司 | A kind of solar battery sheet passivation Al2O3Coating system and method |
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