CN112887212B - High-speed route searching method and device based on variable stride width trie tree - Google Patents
High-speed route searching method and device based on variable stride width trie tree Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/745—Address table lookup; Address filtering
- H04L45/748—Address table lookup; Address filtering using longest matching prefix
Abstract
The invention provides a high-speed route searching method and a device based on a variable stride width trie tree, wherein the method comprises the following steps: according to the routing tableConstructing at least one root node by all prefixes in the database; matching the next s-bit binary data of all prefixes according to the preset step width s corresponding to each root node to obtain 2sA child node; repeating the steps on the internal nodes until the child nodes are leaf nodes, and completing the establishment of the initial trie tree; according to the node types of the child nodes in the initial trie tree, leaf _ string corresponding to leaf nodes and inode _ string corresponding to internal nodes are constructed; and segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, and counting each segment data through a counter to obtain a corresponding counting result so as to inquire the route corresponding to the destination IP address according to the counting result. Therefore, on the basis of ensuring the searching efficiency, the flexibility of the algorithm is improved by supporting the variable step width.
Description
Technical Field
The invention relates to the technical field of computer application, in particular to a high-speed route searching method and device based on a variable stride width trie tree.
Background
The router needs to use a route lookup algorithm to perform longest prefix matching on the incoming IP address to determine the next hop of the corresponding packet. The Poptrie algorithm proposes a route lookup algorithm that uses bitmap to index child nodes to achieve high-speed lookup.
However, most existing route lookup algorithms, including poprie, rely on a relatively fixed data structure and cannot ensure that they remain efficient in routing tables with various distribution characteristics. Therefore, in order to adapt to the routing table with the growing scale in each scene, a routing lookup algorithm which is flexible and variable and can realize high-speed lookup is needed.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art.
Therefore, the first purpose of the invention is to provide a high-speed route searching method based on a variable stride width trie tree, so that variable stride width is supported by trie tree nodes while the bitmap is used for accelerating route searching, and the flexibility of the algorithm is obviously improved.
The second purpose of the invention is to provide a high-speed route searching device based on the variable step width trie tree.
A third object of the invention is to propose a computer device.
A fourth object of the invention is to propose a non-transitory computer-readable storage medium.
In order to achieve the above object, an embodiment of a first aspect of the present invention provides a high-speed route searching method based on a variable stride width trie tree, including the following steps: s1: constructing at least one root node according to all prefixes in the routing table; s2: matching the next s-bit binary data of all prefixes according to the preset step width s corresponding to each root node to obtain 2sA child node; s3: if the child node meets the preset condition of the leaf node, taking the corresponding child node as the leaf node; if the child node does not meet the preset conditions of the leaf node, taking the corresponding child node as an internal node; s4: performing the step S2 on the internal node until the child nodes complete the creation of an initial trie tree for the leaf node; s5: according to the node types of the child nodes in the initial trie tree, leaf _ string corresponding to leaf nodes and inode _ string corresponding to internal nodes are constructed; s6: and segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, and counting each segment data through a counter to obtain a corresponding counting result so as to inquire the route corresponding to the destination IP address according to the counting result.
In order to achieve the above object, a second embodiment of the present invention provides a high-speed route searching apparatus based on a variable stride width trie tree, including: the first building module is used for building at least one root node according to all prefixes in the routing table; a matching module, configured to match the s-bit binary data of all prefixes according to the preset step width s corresponding to each root node, so as to obtain 2sA child node; a node determining module, configured to use the corresponding child node as a leaf node when the child node satisfies a preset leaf node condition, and use the corresponding child node as an internal node when the child node does not satisfy the preset leaf node condition; a creation module for passing throughThe matching module matches the internal nodes with the preset step width s corresponding to each root node to the next s-bit binary data of all prefixes to obtain 2sThe child nodes, until the child nodes are all the leaf nodes, the initial trie tree is established; a second constructing module, configured to construct a leaf _ string corresponding to a leaf node and an inode _ string corresponding to an internal node according to the node type of the child node in the initial trie tree; and the query module is used for segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, and counting each segment data through a counter to obtain a corresponding counting result so as to query the route corresponding to the destination IP address according to the counting result.
To achieve the above object, a third embodiment of the present invention provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the processor implements the variable stride width trie tree-based high-speed route searching method as described in the first embodiment.
In order to achieve the above object, a fourth embodiment of the present invention provides a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the variable stride width trie tree-based high-speed route searching method as described in the first embodiment.
The embodiment of the invention at least has the following technical effects:
the invention improves the Poptrie algorithm, enables the trie tree node to support variable step width while using bitmap to accelerate route searching, and obviously improves the flexibility of the algorithm.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
The foregoing and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic flow chart of a variable stride width trie tree-based high-speed route searching method according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a variable stride width trie tree-based high-speed route lookup algorithm according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a routing prefix and a next hop list according to an embodiment of the present invention;
FIG. 4 is a multi-way trie topology according to an embodiment of the present invention; and
fig. 5 is a schematic structural diagram of a high-speed route lookup apparatus based on a variable stride width trie tree according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
In order to solve the technical problem, the invention provides a routing search algorithm based on a multi-path trie tree, and the flexibility of the algorithm is improved by supporting variable step width on the basis of ensuring the search efficiency. The algorithm uses the bitmap index child node to compress space to speed up search, and divides the bitmap of the node and stores the divided bitmap in the bit string sequence separately to realize quick search under different step widths.
The high-speed route searching method and device based on the variable stride width trie tree according to the embodiment of the invention are described below with reference to the attached drawings.
Fig. 1 is a schematic flow chart of a variable stride width trie tree-based high-speed route searching method according to an embodiment of the present invention.
As shown in fig. 1, the variable stride width trie tree-based high-speed route searching method includes the following steps:
s1: at least one root node is constructed from all prefixes in the routing table.
In this embodiment, the root node includes all prefixes in the routing table.
S2: matching the next s-bit binary data of all prefixes according to the preset step width s corresponding to each root node to obtain 2sAnd (4) a child node.
In this embodiment, according to the step width s of the current node, matching the next consecutive s bits of all the route prefixes in the node, and correspondingly obtaining 2sAnd (4) a child node.
S3: and if the child nodes meet the preset conditions of the leaf nodes, taking the corresponding child nodes as the leaf nodes.
If the child node does not meet the preset conditions of the leaf node, taking the corresponding child node as an internal node;
in an embodiment of the present invention, if the binary data corresponding to the child node reaches the upper limit value of the corresponding prefix length, or if the prefix of the child node does not have binary data that is not matched, the child node satisfies a preset condition of a leaf node, and if the prefix of the child node has binary data that is not matched, the child node does not satisfy the preset condition of the leaf node.
That is to say, in this embodiment, if all prefixes in one child node reach the prefix length in this matching, or there is no prefix in this child node, this node is a leaf node, and its corresponding next hop is the next hop determined by the longest prefix matching rule; if there is still a prefix in a child node that does not match the full, then this node is called an internal node.
S4: performing the step S2 on the internal node until the child nodes complete the creation of an initial trie tree for the leaf node;
in this embodiment, for the internal node, the matching start positions of all the unmatched prefixes are shifted to the right by S bits, and the operation of S2 is repeated for this node until all the child nodes are leaf nodes.
S5: according to the node types of the child nodes in the initial trie tree, leaf _ string corresponding to leaf nodes and inode _ string corresponding to internal nodes are constructed;
s6: and segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, and counting each segment data through a counter to obtain a corresponding counting result so as to inquire the route corresponding to the destination IP address according to the counting result.
In this embodiment, after all the child node types of a node are determined, two length-2 nodes are created in the nodesThe bitmap of (1), i.e. the in _ string and the leaf _ string, respectively correspond to the distribution of the internal nodes and the leaf nodes in the child nodes. For the inode _ string, if one child node is an internal node, the corresponding position of the inode _ string is 1. For leaf _ string, the start position in the leaf node that is consecutive and has the same next hop in the child node is set to 1. After setting two bitmaps, each bitmap is cut into segments of length w, which are denoted as inode _ vec [1 ]]、…、innode_vec[2s/w]And leaf _ vec [1 ]]、…、leaf_vec[2s/w]. Two sets of counters inode _ ctr [ 2 ] are also provided]And leaf _ ctr [ ]]For counting the number of 1's in all bit strings up to a certain segment. I.e. the operation of counting the number of 1's in a bit string is popcount, i.e.
innode_ctr[i]＝innode_ctr[i-1]+popcount(innode_vec[i-1])
leaf_ctr[i]＝leaf_ctr[i-1]+popcount(leaf_vec[i-1])
A corresponding set of inode _ vec [ i ], inode _ ctr [ i ], leaf _ vec [ i ], and leaf _ ctr [ i ] are combined together into one bit _ vec _ entry [ i ].
In one embodiment of the present invention, to facilitate subsequent route lookup, the internal nodes are sequentially stored in one sequence among all the child nodes of one internal node, the nodes corresponding to the initial positions of the leaf nodes having the same next hop in succession are stored in another sequence, and the starting addresses of the two sequences are respectively denoted as inode _ ptr and leaf _ ptr. The start address of the bit _ vec _ entry [ ] sequence representing the distribution of child nodes in S5 is denoted as bit _ vec _ ptr. Accordingly, the data structure of one internal node is composed of four parts of the step width, the inode _ ptr, the leaf _ ptr and the bit _ vec _ ptr, and only the corresponding next hop is stored in the data structure of one leaf node.
Further, for the destination IP address of an incoming packet, recursively going down from the root node until hitting a leaf node gets the corresponding next hop. Referring to fig. 2, the specific steps are as follows:
and (2.1) taking the step width s of the current node, and intercepting a binary string with the width s backwards from the destination IP address, wherein the value is idx.
And (2.2) taking idx/w as the index of the position of the bit string corresponding to the address value, and obtaining the corresponding bit _ vec _ entry according to the starting address bit _ vec _ ptr. It is determined whether or not the bit corresponding to (pos ═ idx mod w) in inode _ ptr is 1. If 1, it means that the corresponding child node is an internal node, and the index of the internal node is calculated as follows, where inode _ vec [0: pos ] represents the first pos +1 bit of inode _ vec.
innode_idx＝innode_ctr+popcount(innode_vec[0:pos])-1
After the index is calculated, the internal node corresponding to the next layer can be obtained according to the start address inode _ ptr of the internal node in the node, and the operation of (2.1) is repeated.
(2.3) if the corresponding bit in the inode _ ptr in (2.2) is 0, indicating that the corresponding child node is a leaf node, the index of the leaf node is calculated as follows.
leaf_idx＝leaf_ctr+popcount(leaf_vec[0:pos])–1
And obtaining a corresponding leaf node according to the index and the leaf node initial address leaf _ ptr stored in the node, and taking the next hop of the leaf node initial address leaf _ ptr as the next hop of the searched IP address, and finishing the searching.
In order to make the implementation process of the variable stride width trie tree-based high-speed route searching method more clear for those skilled in the art, the following description is made with reference to specific application scenarios:
firstly, prefixes in a routing table are shown in fig. 3, 5 prefixes exist, a trie topology constructed according to the longest matching principle is shown in fig. 4, wherein a circular node represents an internal node, a square node represents a leaf node, numbers in the square node represent corresponding to a next hop, the step width of a node a is 4, and the step width of a node B is 3.
The node a and node B data structures constructed from the trie tree topology are as follows.
(1) First, the inode _ string and leaf _ string of nodes A and B are constructed. Node A has only the 4 th child node as an internal node, and therefore its inode _ string is 0001000000000000, while the starting positions of consecutive identical leaf nodes in its leaf nodes are 1, 3, 5, 9, respectively, and therefore its leaf _ string is 1010100010000000. All nodes of the node B are leaf nodes, the inode _ string is 00000000, the starting positions of the continuous same leaf nodes are 1, 2, 3 and 5, and therefore the leaf _ string is 11101000.
(2) Dividing bit strings of nodes A and B by the length of 4, wherein inode _ vec of the node A is 0001, 0000 and 0000, leaf _ vec of the node A is 1010, 1000 and 0000, corresponding counters inode _ ctr are 0, 1 and 1, and leaf _ ctr of the nodes A is 0, 2, 3 and 4; node B's inode _ vec is 0000, leaf _ vec is 1110, 1000, the corresponding counter inode _ ctr is 0, leaf _ ctr is 0, 3.
(3) The internal nodes in the child nodes of the nodes A and B are respectively stored together, and the starting nodes of the continuous same leaf nodes are respectively stored together. The sub-internal node sequence of the node A is B, and the node B has no sub-internal node; the leaf node sequence of node a is 0, 2, 1, 0 and the leaf node sequence of node B is 2, 3, 2, 1.
For an incoming IP address 0011111, the lookup steps are as follows.
(1) Based on the root node a step width 4, the corresponding 4-bit string 0011 in the address is obtained, with a value of 3.
(2) The index of bit _ vec _ entry corresponding to 3 is 3/4 ═ 0. Get node a's bit _ vec _ entry number 0. The inode _ vec is 0001, the 4 th bit corresponding to 3 has a value of 1, and the lower layer is an internal node. The value of inode _ ctr is 0, and there are 1 in the first 4 bits of inode _ vec, so the child node index is 0+1-1 ═ 0, and the index gets the next level internal node B.
(3) Based on node B step width 3, the next 3-bit string 111 at the address is obtained, with a value of 7.
(4) The bit _ vec _ entry index corresponding to 7 is 7/4 ═ 1. Get node B's bit _ vec _ entry number 1. inode _ vec is 0000, and 7 corresponds to bit 4, with a value of 0, indicating that the lower layer is a leaf node. The value of leaf _ ctr is 3, 1 in the first 4 bits of leaf _ vec, so that the index of the child node is 3+ 1-3, the index obtains that the next hop corresponding to the leaf node is 1, and the search is completed.
In summary, the high-speed route searching method based on the variable stride width trie tree of the embodiment of the invention improves the flexibility of the algorithm by supporting the variable stride width on the basis of ensuring the searching efficiency.
In order to implement the above embodiment, the present invention further provides a high-speed route searching device based on the variable stride width trie tree.
Fig. 5 is a schematic structural diagram of a high-speed route lookup apparatus based on a variable stride width trie tree according to an embodiment of the present invention.
As shown in fig. 5, the high-speed route searching apparatus based on variable stride width trie tree includes: a first building module 510, a matching module 520, a node determination module 530, a creation module 540, a second building module 550, a query module 560.
The first constructing module 510 is configured to construct at least one root node according to all prefixes in the routing table;
a matching module 520, configured to match the next s-bit binary data of all prefixes by using the preset step width s corresponding to each root node to obtain 2sA child node;
a node determining module 530, configured to use the corresponding child node as a leaf node when the child node meets a preset leaf node condition, and use the corresponding child node as an internal node when the child node does not meet the preset leaf node condition;
a creating module 540, configured to match, by the matching module, the internal node with a preset step width s corresponding to each root node to s-bit binary data following all prefixes to obtain 2sChild nodes, up to all of which areThe leaf node completes the creation of an initial trie tree;
a second constructing module 550, configured to construct a leaf _ string corresponding to a leaf node and an inode _ string corresponding to an internal node according to the node type of the child node in the initial trie tree;
and the query module is used for segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, and counting each segment data through a counter to obtain a corresponding bit _ vec _ entry so as to query a route corresponding to the destination IP address according to the bit _ vec _ entry.
It should be noted that the foregoing explanation of the embodiment of the variable stride width trie tree-based high-speed route searching method is also applicable to the variable stride width trie tree-based high-speed route searching device of the embodiment, and details are not repeated here.
In order to implement the foregoing embodiment, the present invention further provides a computer device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the processor implements the variable stride width trie tree-based high-speed route lookup method described in the foregoing embodiment.
In order to implement the above embodiments, the present invention further proposes a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the variable stride width trie tree based high-speed route lookup method as described in the above embodiments.
In order to implement the above embodiments, the present invention further provides a computer program product, which when executed by an instruction processor in the computer program product, implements the variable stride width trie tree-based high-speed route searching method described in the above embodiments.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present invention in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present invention.
The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present invention may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc. Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (7)
1. A high-speed route searching method based on a variable stride width trie tree is characterized by comprising the following steps:
s1: constructing at least one root node according to all prefixes in the routing table;
s2: matching the next s-bit binary data of all prefixes according to the preset step width s corresponding to each root node to obtain 2sA child node;
s3: if the child node meets the preset condition of the leaf node, taking the corresponding child node as the leaf node;
if the child node does not meet the preset conditions of the leaf node, taking the corresponding child node as an internal node;
s4: performing the S2 on the internal node until the child nodes complete the creation of an initial trie tree for the leaf node;
s5: according to the node types of the child nodes in the initial trie tree, leaf _ string corresponding to leaf nodes and inode _ string corresponding to internal nodes are constructed, wherein the method comprises the following steps: determining the leaf _ string according to the starting positions of leaf nodes which are continuous in all the child nodes corresponding to the internal node and have the same next hop, wherein the starting positions of the leaf nodes which are continuous in all the child nodes corresponding to the internal node and have the same next hop are set to be 1; determining a binary number corresponding to each child node according to node types of all the child nodes corresponding to the internal node, and forming an inode _ string according to all the binary numbers, wherein if the node type of the child node corresponding to the internal node is an internal node, the binary number is determined to be 1, and if the node type of the child node corresponding to the internal node is a leaf node, the binary number is determined to be 0;
s6: segmenting the leaf _ string and the inode _ string respectively according to a preset segment length w to obtain a plurality of segment data, counting each segment data through a counter to obtain a corresponding counting result so as to query a route corresponding to a destination IP address according to the counting result, wherein segmenting the leaf _ string and the inode _ string respectively according to the preset segment length w to obtain a plurality of segment data, and counting each segment data through the counter to obtain a corresponding counting result, and the method comprises the following steps: sequencing all first segment data corresponding to the leaf _ string according to a segmentation sequence, counting the number of binary numbers of all first segment data in front of each sequenced first segment data as 1, and taking the number as a counting result leaf _ ctr corresponding to each first segment data; sorting all second segment data corresponding to the inode _ string according to a segment sequence, counting the number of binary numbers 1 contained in all second segment data in front of each sorted second segment data, and taking the number as a counting result inode _ ctr corresponding to each second segment data;
the querying a route corresponding to the destination IP address according to the counting result includes: intercepting a binary string idx with the width of s backwards from the destination IP address according to the step width s; calculating idx/w as a bit string corresponding to the address value as a position index; and searching a next child node corresponding to the position index according to the initial address of the next node in the data structure of the internal node until the next node is a leaf node, taking the next hop of the next node as the destination IP address, and finishing the searching.
2. The method of claim 1, wherein if the child node satisfies a predetermined condition of a leaf node, then using the corresponding child node as the leaf node comprises:
and if the binary data corresponding to the child node reaches the upper limit value of the corresponding prefix length, or the binary data which is not matched does not exist in the prefix of the child node, the child node meets the preset condition of the leaf node.
3. The method of claim 2, wherein the determining if the child node does not satisfy the predetermined leaf node condition comprises:
and if binary data which are not matched exist in the prefixes of the child nodes, the child nodes do not meet the preset conditions of the leaf nodes.
4. The method of claim 1, wherein before said querying the route corresponding to the destination IP address according to the counting result, further comprising:
s7: for all child nodes of the internal nodes in the initial trie tree, sequentially storing the internal nodes in one sequence, and storing nodes corresponding to the initial positions of leaf nodes with the same continuous next hop in another sequence;
determining start addresses inode _ ptr and leaf _ ptr of said one sequence and said another sequence of said internal nodes, respectively;
determining a starting address bit _ vec _ ptr of a bit _ vec _ entry [ ] sequence of the internal node;
storing a data structure of an internal node in the initial trie tree, wherein the data structure of the internal node comprises a preset step width, an inode _ ptr, a leaf _ ptr and a bit _ vec _ ptr of the corresponding internal node;
and storing a data structure of a leaf node in the initial trie tree, wherein the data structure of the leaf node stores corresponding next hop data.
5. A high-speed route searching device based on a variable stride width trie tree is characterized by comprising:
the first building module is used for building at least one root node according to all prefixes in the routing table;
a matching module, configured to match the s-bit binary data of all prefixes according to the preset step width s corresponding to each root node, so as to obtain 2sA child node;
a node determining module, configured to use the corresponding child node as a leaf node when the child node satisfies a preset leaf node condition, and use the corresponding child node as an internal node when the child node does not satisfy the preset leaf node condition;
a creating module, configured to match, by the matching module, the internal nodes with a preset step width s corresponding to each root node to s-bit binary data following the prefixes to obtain 2sThe child nodes, until the child nodes are all the leaf nodes, the initial trie tree is established;
a second constructing module, configured to construct a leaf _ string corresponding to a leaf node and an inode _ string corresponding to an internal node according to the node type of the child node in the initial trie tree, where the second constructing module includes: determining the leaf _ string according to the starting positions of leaf nodes which are continuous in all the child nodes corresponding to the internal node and have the same next hop, wherein the starting positions of the leaf nodes which are continuous in all the child nodes corresponding to the internal node and have the same next hop are set to be 1; determining a binary number corresponding to each child node according to node types of all the child nodes corresponding to the internal node, and forming an inode _ string according to all the binary numbers, wherein if the node type of the child node corresponding to the internal node is an internal node, the binary number is determined to be 1, and if the node type of the child node corresponding to the internal node is a leaf node, the binary number is determined to be 0;
the query module is configured to segment the leaf _ string and the inode _ string according to a preset segment length w to obtain a plurality of segment data, count each segment data through a counter to obtain a corresponding count result, so as to query a route corresponding to a destination IP address according to the count result, where the leaf _ string and the inode _ string are segmented according to the preset segment length w to obtain a plurality of segment data, and count each segment data through the counter to obtain a corresponding count result, including: sequencing all first segment data corresponding to the leaf _ string according to a segmentation sequence, counting the number of binary numbers of all first segment data in front of each sequenced first segment data as 1, and taking the number as a counting result leaf _ ctr corresponding to each first segment data; sorting all second segment data corresponding to the inode _ string according to a segment sequence, counting the number of binary numbers 1 contained in all second segment data in front of each sorted second segment data, and taking the number as a counting result inode _ ctr corresponding to each second segment data;
the querying a route corresponding to the destination IP address according to the counting result includes: intercepting a binary string idx with the width of s backwards from the destination IP address according to the step width s; calculating idx/w as a bit string corresponding to the address value as a position index; and searching a next child node corresponding to the position index according to the initial address of the next node in the data structure of the internal node until the next node is a leaf node, taking the next hop of the next node as the destination IP address, and finishing the searching.
6. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method of any one of claims 1-4 when executing the computer program.
7. A non-transitory computer-readable storage medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the method of any one of claims 1-4.
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