CN112886705A

CN112886705A - Controller of micro-grid fault recording device and fault recording method

Info

Publication number: CN112886705A
Application number: CN201911196221.XA
Authority: CN
Inventors: 张欢欢; 吴跃林; 郑德化; 张卫
Original assignee: Beijing Etechwin Electric Co Ltd
Current assignee: Beijing Etechwin Electric Co Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2021-06-01

Abstract

The disclosure provides a controller of a micro-grid fault recording device and a fault recording method. The controller includes: the first processor is used for receiving voltage and/or current data of a microgrid line, storing fault recording data in a physical memory of the first processor and sending a data frame to the second processor through a preset communication protocol when the microgrid line is determined to have a fault according to the voltage and/or current data; and the second processor is used for analyzing the data frame to obtain the fault recording data.

Description

Controller of micro-grid fault recording device and fault recording method

Technical Field

The disclosure relates to the technical field of intelligent micro-grids, in particular to a controller of a micro-grid fault recording device and a fault recording method.

Background

Fault protection, fault location and type analysis of the micro-grid are one of the key problems to be solved in the micro-grid development process.

The waveform recorded by the fault recording of the power system is very important for fault analysis, and can accurately reflect the fault type, phase, fault current and voltage values, the tripping and closing time of the circuit breaker, whether the reclosing is successful and the like, so that the working correctness of the relay protection device can be correctly evaluated or checked by utilizing fault recording data, the defects of a system device are found and eliminated in time, and the relay protection device is improved.

With the promulgation of the IEC61850 standard of the power system and the rapid development of computer technology, optical fiber and network communication technology, the automation technology of the transformer substation gradually develops from the traditional transformer substation to the digital transformer substation. In order to adapt to the rapid development of the power system, a high-reliability fault protection wave recording device with high-performance solid hardware, rich background software, a stable storage function, a powerful network function and a communication capability is needed, and fault wave recording files are transmitted to the background for further analysis according to the IEC61850 standard.

However, in the prior art, the relay protection device and the fault recording device are two independent devices, the two devices share the same data source or respectively collect data, and when a fault occurs, each device respectively acts. In this case, if two devices share the same data, the two devices may be affected by the network communication capability and may operate in a non-uniform manner.

In addition, although some relay protection devices have a wave recording function, the wave recording capability is weak, the capacity of a stored wave recording file is small, the collected data cannot be exported to other devices, and the system expansibility is poor. When the application program and the recording data are both stored in a disk, the physical medium is damaged due to frequent reading and writing of the disk, and the device is down.

Disclosure of Invention

Exemplary embodiments of the present disclosure provide a microgrid fault recording device controller and a fault recording method, which solve at least the above technical problems and other technical problems not mentioned above, and provide the following advantageous effects.

An aspect of the present disclosure is to provide a controller of a microgrid fault recording apparatus. The controller may include: the first processor is used for receiving voltage and/or current data of a microgrid line, storing fault recording data in a physical memory of the first processor and sending a data frame to the second processor through a preset communication protocol when the microgrid line is determined to have a fault according to the voltage and/or current data; and the second processor is used for analyzing the data frame to obtain the fault recording data.

And the first processor and the second processor realize data sharing according to the communication mode of the shared memory.

The data frame may include a frame header, a frame length, and a data portion, where the data portion includes a start time for generating first fault recording data, an end time for generating last fault recording data, and a first address of the physical memory.

And the second processor maps the fault recording data to a process address space of the second processor by using a mmap function according to the analyzed initial address of the physical memory so as to obtain the fault recording data.

The second processor may include a recording management module, wherein the recording management module stores the fault recording data in a database, and generates a recording file in a COMTRADE format according to the start time, the end time and the fault recording data.

The apparatus may further include: and a third processor for receiving the voltage signal and/or the current signal of the microgrid line from the transformer, sampling the voltage signal and/or the current signal, and transmitting the voltage and/or current data obtained by sampling the voltage signal and/or the current signal to the first processor through the data bus.

The first processor may include a protection identification module, wherein the protection identification module may determine whether the micro-point network line is malfunctioning using an over-voltage/over-current protection strategy based on the voltage and/or current data.

The first processor can further comprise a wave recording data processing module, wherein the wave recording data processing module can sequentially store the periodic wave data according to the time of the fault occurrence so as to complete splicing of the wave recording data before and after the fault occurrence.

The recording data processing module may store the specific cycle data after the failure occurs in the physical memory in a one-dimensional array, and copy the specific cycle data before the failure occurs in the circular queue in the one-dimensional array after the specific cycle data after the failure occurs is stored.

The wave recording management module of the second processor can send the wave recording file to the microgrid master station by using the IEC61850 standard, so that the microgrid master station can perform fault analysis according to the wave recording file.

Another aspect of the present disclosure is to provide a method for recording faults of a microgrid. The method is executed by a controller of a microgrid fault recording device, wherein the controller comprises a first processor and a second processor, and the method can comprise the following steps: receiving, by a first processor, voltage and/or current data of a microgrid line; when the micro-grid line is determined to have a fault according to the voltage and/or current data, the first processor stores fault recording data in a physical memory of the first processor and sends a data frame to the second processor through a preset communication protocol; and parsing the data frame by a second processor to obtain the fault recording data.

In the microgrid fault recording method, the first processor and the second processor can realize data sharing according to a communication mode of a shared memory.

In the microgrid fault recording method, the data frame may include a frame header, a frame length, and a data portion, where the data portion includes a start time for generating first fault recording data, an end time for generating last fault recording data, and a first address of the physical memory.

In the microgrid fault recording method, the fault recording data can be mapped to a process address space of the second processor by the second processor according to the analyzed first address of the physical memory by using a mmap function, so as to obtain the fault recording data.

In the microgrid fault recording method, the fault recording data can be stored in a database by a recording management module of a second processor, and a recording file in a COMTRADE format is generated according to the starting time, the ending time and the fault recording data.

In the microgrid fault recording method, a third processor of the controller may receive a voltage signal and/or a current signal of the microgrid line from a transformer, sample the voltage signal and/or the current signal, and transmit the voltage and/or current data obtained by sampling the voltage signal and/or the current signal to the first processor through a data bus.

In the microgrid fault recording method, an overvoltage/overcurrent protection strategy may be used by a protection identification module of a first processor to determine whether a fault occurs in the microgrid circuit according to the voltage and/or current data.

In the micro-grid fault recording method, the recording data processing module of the first processor can sequentially store the periodic wave data according to the time of the fault so as to complete splicing of the recording data before and after the fault.

In the microgrid fault recording method, the recording data processing module can store the specific cycle data after the fault occurs in the physical memory in a one-dimensional array, and after the specific cycle data after the fault occurs is stored, the specific cycle data before the fault occurs in the ring queue is copied in the one-dimensional array.

In the micro-grid fault recording method, the recording file can be sent to the micro-grid master station by the recording management module of the second processor by using the IEC61850 standard, so that the micro-grid master station performs fault analysis according to the recording file.

Based on the method and the device, the fault recording data are shared between the first processor and the second processor by adopting a preset communication protocol and a memory sharing mode, resources are reasonably distributed, and the fault recording data are generated into a COMTRADE file according to the requirement of a transient data exchange format of the power system, so that the problems of slow data processing and low expansibility of the relay protection device are solved. In addition, the COMTRADE data generation file is stored in the database, and the problem of fault recording data storage is solved.

Drawings

These and/or other aspects and advantages of the present disclosure will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:

fig. 1 is a block diagram of a controller of a microgrid fault logging apparatus according to an exemplary embodiment of the present disclosure;

FIG. 2 is a flowchart of a method of storing fault recording data according to an exemplary embodiment of the present disclosure;

FIG. 3 shows a schematic diagram of a data map according to an example embodiment of the present disclosure;

fig. 4 is a flowchart of a microgrid fault logging method according to an exemplary embodiment of the present disclosure.

Detailed Description

The following description with reference to the accompanying drawings is provided to assist in a comprehensive understanding of the embodiments of the disclosure as defined by the claims and their equivalents. Various specific details are included to aid understanding, but these are to be considered exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. In addition, descriptions of well-known functions and constructions are omitted for clarity and conciseness.

In the present disclosure, terms including ordinal numbers such as "first", "second", etc., may be used to describe various elements, but these elements should not be construed as being limited to only these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and vice-versa, without departing from the scope of the present disclosure.

Hereinafter, the apparatus and method of the present disclosure will be described with reference to the accompanying drawings, according to various embodiments of the present disclosure.

Fig. 1 is a block diagram of a controller of a microgrid fault logging apparatus according to an exemplary embodiment of the present disclosure.

Referring to fig. 1, a controller 100 of a microgrid fault recording apparatus according to an exemplary embodiment of the present disclosure may include a first processor 101, a second processor 102, and a third processor 103, where the first processor 101 may include a protection identification module 111 and a recording data processing module 112, and the second processor 102 may include a recording management module 121, a display control module 122, and a print management module 123. Each module in the controller 100 of the microgrid fault recording apparatus may be implemented by one or more modules, and the names of the corresponding modules may vary according to the types of the modules. In various embodiments, some modules in the controller 100 of the microgrid fault logging apparatus may be omitted, or additional modules may also be included. Furthermore, modules/elements according to various embodiments of the present disclosure may be combined to form a single entity, and thus the functions of the respective modules/elements may be equivalently performed prior to the combination.

As an example, the controller 100 of the microgrid fault recording apparatus may be implemented based on a ZYNQ chip, wherein the first processor 101 is implemented by a first ARM processor (such as a bare core) in the ZYNQ chip, the second processor 102 is implemented by a second ARM processor (such as a Linux core) in the ZYNQ chip, and the third processor 103 is implemented by an FPGA in the ZYNQ chip. The controller 100 of the micro-grid fault recording device performs allocation and Processing of data resources in a mode of an ARM dual-core processor and an FPGA, wherein the ARM dual-core processor is configured in an Asymmetric Multi-Processing (AMP) architecture, that is, each ARM processor runs an operating system and runs different tasks relatively independently, for example, a first ARM processor runs a bare machine program, and a second ARM processor runs a Linux operating system.

In the present disclosure, a preset communication protocol is used between the first processor and the second processor, so that effective information can be efficiently and conveniently transmitted, and meanwhile, excessive resources are not occupied, and the first processor and the second processor are used in cooperation with a shared memory technology to rapidly complete a wave recording function. As will be explained in detail below.

The voltage and/or current signals of the protected microgrid line are transmitted to the third processor 103 through the mutual inductor, and after receiving the voltage and/or current signals, the third processor 103 performs sampling processing on the received voltage and/or current signals. For example, the third processor 103 performs fast fourier transform, filtering, etc. on the received voltage and/or current signals to obtain corresponding discrete data. In the present disclosure, the transformer may be included in the controller of the fault recording apparatus, or may be independent of the controller of the fault recording apparatus.

After sampling processing the voltage and/or current signals received from the transformers, the third processor 103 transfers the sampled data to the first processor 101 via the high speed bus. For example, the third processor 103 and the first processor 101 may communicate via a high-speed AXI bus while running IEC61850 standard protocol programs.

After the first processor 101 obtains the sampled voltage and/or current signals of the microgrid line, the protection identification module 111 of the first processor 101 determines whether the microgrid line to be protected is faulty or not using an overvoltage/overcurrent protection strategy according to the received sampled voltage and/or current data. For example, the protection identification module 111 determines whether the voltage/current of the protected circuit is greater than the maximum steady-state voltage/current under normal operation, whether the voltage frequency/current frequency of the protected circuit belongs to an over-frequency or a low-frequency, and the like according to the over-voltage/over-current protection strategy. Whether the protected circuit fails may be determined according to a protection strategy corresponding to the protected microgrid line. Here, the microgrid line to be protected may be a medium-voltage or low-voltage class microgrid internal line, for example, a 10kV voltage class microgrid internal line.

When the protection identification module 111 determines that the protected microgrid line has a fault, the recording data processing module 112 of the first processor 101 first stores fault recording data in the physical memory of the first processor 101. When a fault occurs in a microgrid circuit, in order to analyze the fault after the fault, evaluate the performance of protection operation, and the like, it is necessary to record and store waveforms before and after the fault occurs in real time.

A method of storing fault recording data according to an exemplary embodiment of the present disclosure will be described in detail below with reference to fig. 2.

Fig. 2 is a flowchart of a method of storing fault recording data according to an exemplary embodiment of the present disclosure.

Referring to fig. 2, when it is determined in step S201 that the protected microgrid line is not faulty, the process proceeds to step S202, and the recording data processing module 112 of the first processor 101 stores data in real time in a circular queue according to a specific capacity size.

When it is determined in step S201 that the protected microgrid line has a fault, the recording data processing module 112 stores a specific amount of cycle data, for example, cycle data representing data values sampled at each sine wave cycle, in a circular queue form and a static one-dimensional array form, respectively. In step S203, the recording data processing module 112 determines whether a certain number of cycle data after the occurrence of the fault is stored. For example, the specific number of cycles may be 10 cycles.

When it is determined that the specific number of cycle wave data after the occurrence of the fault is stored, in step S204, the recording data processing module 112 copies the specific cycle wave data before the occurrence of the fault in the circular queue into the static one-dimensional array. When it is determined that the specific number of cycle data after the occurrence of the fault is not stored, in step S205, the recording data processing module 112 stores the specific number of cycle data again in the form of a circular queue, and in step S206, the recording data processing module 112 stores the specific number of cycle data after the occurrence of the fault in the physical memory of the first processor in the form of a one-dimensional array.

In step S207, the recording data processing module 112 determines whether to copy the specific number of cycle wave data before the failure occurs into the one-dimensional array, and if it is determined that the specific number of cycle wave data before the failure occurs is completely copied, in step S208, a recording end flag bit is set to notify the second processor 102 that the storage of the failure recording data is completed and data mapping is performed, otherwise, the step S204 is returned to continue copying the data. When specific number of cycle data before and after the fault occurs are stored in the one-dimensional array, the cycle data are sequentially stored according to the time of the fault occurrence, and therefore splicing of the recording data before and after the fault occurs is completed. Therefore, only one group of data can be stored when one-time sampling interruption occurs, and excessive data transmission is avoided during the interruption period.

After storing the recording data before and after the fault (i.e. the recording end flag bit), the first processor 101 sends a data frame to the second processor 102 through a preset communication protocol. The data frame with the self-defined format according to the preset communication protocol can comprise a frame header, a frame length, a data part and the like, wherein the data part comprises the starting time for generating the first fault recording data, the ending time for generating the last fault recording data and the head address of a physical memory for storing the fault recording data.

As an example, the format of the data frame of the present disclosure may be as follows:

as described above, Head1 and Head2 respectively indicate frame header 1 and frame header 2, SN indicates a frame number, Length indicates a frame Length, Func indicates a function code, DataNum indicates the number of Data, Data × DataNum indicates various detailed Data, where Type indicates a Data Type, Coef indicates a Data coefficient, and Value indicates a Data Value. However, the above data frame is only an example, and the present disclosure is not limited thereto.

The second processor 102 analyzes the received data frame, so as to obtain information such as a first address of a physical memory storing the fault recording data, fault trigger time and the like.

The second processor 102 uses the mmap function to map the fault recording data stored in the first processor 101 to the process address space of the second processor according to the analyzed first address of the physical memory, so as to completely acquire the fault recording data. The mmap function is a method for mapping a file in a memory, i.e. a file or other objects are mapped to an address space of a process, so as to realize the one-to-one mapping relation between a file disk address and a section of virtual address in the virtual address space of the process. After the mapping relation is realized, the process can read and write the memory section by adopting a pointer mode.

Fig. 3 shows a schematic diagram of a data mapping according to an exemplary embodiment of the present disclosure. As shown in fig. 3, the process address space is composed of a plurality of virtual memory regions. The virtual memory region is a homogeneous region in the process address space, i.e. a continuous address range with the same characteristics, while the address space serving the memory mapping is in the free part between the stacks. In fig. 3, parameter fd indicates the file descriptor to be mapped into the memory, parameter off indicates the offset of the file mapping, and parameter len indicates how large part of the file is mapped into the memory.

By using a preset communication protocol to transmit a command and short information such as a shared memory address between the first processor 101 and the second processor 102, a part of the physical memory of the first processor 101 and the second processor 102 used by the first processor 101 is mapped to a process space of the second processor 102, thereby breaking the limitation between the first processor 101 and the second processor 102, and realizing data sharing, so as to transmit a large amount of fault recording data from the first processor 101 to the second processor 102. By using a preset communication protocol and a shared memory mode to transmit information between the first processor 101 and the second processor 102, the processing operation of the fault recording device of the present disclosure is more efficient and flexible.

After the second processor 102 obtains the fault recording data, the recording management module 121 of the second processor 102 may store the fault recording data in a database, and generate a recording file in a COMTRADE format according to the analyzed start time and end time and the obtained fault recording data. The COMTRADE format is a common format for power system transient data exchange. For example, the recording management module 121 stores the acquired fault recording data in an SQLite database, and generates a COMTRADE recording file.

The wave recording management module 121 can send the generated wave recording file to the microgrid master station by using the IEC61850 standard, so that the microgrid master station performs fault analysis according to the wave recording file, and then triggers the protection execution device to perform corresponding actions to isolate a fault area.

In addition, the display control module 122 of the second processor 102 may display the recording waveform and the fault warning information in the local display according to the generated recording file. For example, the display control module 122 may open the generated recording file in standard software, that is, may display the fault recording waveform.

The print management module 123 of the second processor 102 may use the gnuplot tool to convert the data information in the generated recording file into visually displayed waveform information and send the waveform information to the network printer for remote printing. Specifically, after generating the COMTRADE file, the second processor 102 activates the print management module 123, and may first set the format of the output print result via the print management module 123, for example, the output print result may be set to a picture format such as png, jpg, or the like, or may be set to a pdf file format. Further, the display size and arrangement of the output waveforms may also be set via the print management module 123. After setting the output result and the display waveform, the print management module 123 reads the data in the COMTRADE file, performs the drawing processing on the data for generating the waveform in the COMTRADE file by using the gnuplot tool, and generates the waveform display file according to the set format. Here, the gnuplot tool is a small command line drawing tool, which runs on platforms such as Linux, OS/2, etc. The print management module 123 transmits the generated waveform display file to the network printer, thereby starting the network printer for remote printing.

According to the method, a series of drawing commands of the gnuplot tool are written into the gnuplot command file, when the printing management module 123 is started, the application program executes the command file to complete printing of wave recording data, and therefore remote workers can conveniently and quickly conduct visual analysis on the faults.

Further, the second processor 102 may communicate with the SCADA system and execute recording of related files, in addition to receiving the processing data of the first processor 101, while transmitting the SCADA system or local parameter settings and command settings to the first processor 101. The first processor 101 may operate and control corresponding protection execution devices such as relays, circuit breakers, etc. in real time in response to commands forwarded by the second processor 102 and parameter settings, in addition to running protection policies and storing fault recording data.

Fig. 4 is a flowchart of a microgrid fault logging method according to an exemplary embodiment of the present disclosure. The fault recording method of the present disclosure may be performed by the controller 100 of the aforementioned fault recording apparatus.

Referring to fig. 4, a voltage/current signal of a protected microgrid line is received by the third processor 103 of the controller 100 from a transformer at step S401. Here, the third processor 103 is implemented by an FPGA in a ZYNQ chip.

In step S402, the received voltage signal and/or current signal is subjected to sampling processing by the third processor 103. For example, the third processor 103 performs fast fourier transform, filtering, etc. on the received voltage and/or current signals to obtain corresponding discrete data.

In step S403, the data subjected to the sampling processing is transferred to the first processor 101 by the third processor 103 via the high-speed bus. For example, the third processor 103 and the first processor 101 may communicate with each other via a high-speed AXI bus.

In step S404, it is determined by the protection identification module 111 of the first processor 101 whether the protected microgrid line is faulty or not using an overvoltage/overcurrent protection strategy based on the received sampled processed voltage and/or current data. For example, the protection identification module 111 determines whether the voltage/current of the protected circuit is greater than the maximum steady-state voltage/current under normal operation, whether the voltage frequency/current frequency of the protected circuit belongs to an over-frequency or a low-frequency, and the like according to the over-voltage/over-current protection strategy. Here, whether the protected circuit is malfunctioning is determined according to a protection strategy corresponding to the protected microgrid line.

When the protection identification module 111 determines that the protected microgrid line has a fault, the operation proceeds to step S405, and the recording data processing module 112 of the first processor 101 stores the fault recording data in the physical memory of the first processor 101. Here, the method of storing the fault recording data is the same as the method shown in fig. 2, and is not described again. When the protection identification module 111 determines that the protected microgrid line has not failed, the process is ended.

After the recording data before and after the failure (i.e. the recording end flag) is stored, in step S406, the first processor 101 sends the data frame to the second processor 102 through the preset communication protocol. In the present disclosure, the first processor and the second processor may be configured in an AMP mode with an ARM dual-core processor, and data communication is performed between the first processor and the second processor using a preset dual-core protocol. The first processor and the second processor use a preset communication protocol, can efficiently and conveniently transmit effective information, simultaneously does not occupy excessive resources, and is matched with a shared memory technology for use so as to rapidly complete a wave recording function.

The data frame according to the present disclosure may include a frame header, a frame length, a data portion, and the like, where the data portion includes a start time for generating first fault recording data, an end time for generating last fault recording data, and a head address of a physical memory for storing the fault recording data. However, the above examples are merely exemplary, and the content of the data frame may be modified according to actual needs.

In step S407, the second processor 102 parses the received data frame, so as to obtain information such as a first address of a physical memory storing the fault recording data, and a fault trigger time (such as a start time of generating the first fault recording data and an end time of generating the last fault recording data).

In step S408, the second processor 102 maps the fault recording data stored in the first processor 101 to the process address space of the second processor by using the mmap function according to the parsed first address of the physical memory, so as to completely acquire the fault recording data. By using a preset communication protocol to transmit a command and short information such as a shared memory address between the first processor 101 and the second processor 102, a part of the physical memory of the first processor 101 and the second processor 102, which is used by the first processor 101, is mapped to a process space of the second processor 102, so that the limitation between the first processor 101 and the second processor 102 is broken, data sharing is realized, a large amount of fault recording data is transmitted from the first processor 101 to the second processor 102, and the fault recording processing is more efficient and flexible.

In step S409, the recording management module 121 of the second processor 102 stores the fault recording data obtained through memory sharing in the database, and generates a recording file in the COMTRADE format according to the analyzed start time and end time and the obtained fault recording data. For example, storing the acquired fault recording data in an SQLite database, and generating a COMTRADE recording file.

In step S410, the wave recording management module 121 sends the generated wave recording file to the microgrid master station by using the IEC61850 standard, so that the microgrid master station performs fault analysis according to the wave recording file, and triggers the protection execution device to perform corresponding actions to isolate a fault area. Alternatively, in step S410, the print management module 123 of the second processor 102 uses the gnuplot tool to convert the data information in the generated recording file into visually displayed waveform information, and sends the waveform information to the network printer for remote printing. For example, the print management module 123 may utilize a gnuplot command file composed of a gnuplot series of drawing commands, execute the command file when the print module is started, perform drawing processing on data in the COMTRADE file, complete printing of the recording data, and output a print result in a picture format such as png and jpg, or in a pdf file format.

In addition, the display control module 122 of the second processor 102 may also display the recording waveform and the fault warning information in the local display according to the generated recording file.

The fault recording device and the fault recording method can be realized in an AMP mode based on a ZYNQ chip, an ARM dual-core processor is used in a PS part of the ZYNQ chip, and a preset communication protocol and a memory sharing mode are applied between the dual-core processors to realize data sharing, so that fault recording data can be transmitted quickly and efficiently. In addition, this disclosure can turn into directly perceived waveform and directly carry out remote printing with trouble record ripples data fast to make things convenient for the distal end staff to carry out visual analysis to the trouble that takes place fast.

While the disclosure has been shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims and their equivalents.

Claims

1. A controller of a micro-grid fault recording device, the controller comprising:

the first processor is used for receiving voltage and/or current data of a microgrid line, storing fault recording data in a physical memory of the first processor and sending a data frame to the second processor through a preset communication protocol when the microgrid line is determined to have a fault according to the voltage and/or current data; and

and the second processor is used for analyzing the data frame to obtain the fault recording data.

2. The controller of claim 1, wherein the first processor comprises a protection identification module,

wherein a protection identification module determines whether the microgrid line is malfunctioning using an overvoltage/overcurrent protection strategy based on the voltage and/or current data.

3. The controller of claim 1, wherein the first processor comprises a recording data processing module,

and the wave recording data processing module sequentially stores the periodic wave data according to the time of the fault so as to complete the splicing of the wave recording data before and after the fault.

4. The controller according to claim 3, wherein the recording data processing module stores the specific cycle data after the occurrence of the fault in a one-dimensional array in the physical memory, and copies the specific cycle data before the occurrence of the fault in the ring queue in the one-dimensional array after the specific cycle data after the occurrence of the fault is stored.

5. The controller of claim 1, wherein the first processor and the second processor implement data sharing in accordance with a shared memory communication.

6. The controller of claim 1, wherein the data frame comprises a frame header, a frame length, and a data portion,

the data part comprises the starting time of generating the first fault recording data, the ending time of generating the last fault recording data and the first address of the physical memory.

7. The controller according to claim 5 or 6, wherein the second processor uses a mmap function to map the fault recording data to a process address space of the second processor according to the parsed first address of the physical memory to obtain the fault recording data.

8. The controller of claim 6, wherein the second processor comprises a recording management module,

the recording management module stores the fault recording data in a database, and generates a recording file in a COMTRADE format according to the starting time, the ending time and the fault recording data.

9. The controller of claim 1, wherein the controller further comprises:

and a third processor for receiving the voltage signal and/or the current signal of the microgrid line from the transformer, sampling the voltage signal and/or the current signal, and transmitting the voltage and/or current data obtained by sampling the voltage signal and/or the current signal to the first processor through the data bus.

10. The controller of claim 8, wherein the wave recording management module transmits the wave recording file to a microgrid master station using the IEC61850 standard.

11. A microgrid fault recording method is characterized in that the method is executed by a controller of a microgrid fault recording device, wherein the controller comprises a first processor and a second processor, and the microgrid fault recording method comprises the following steps:

receiving, by a first processor, voltage and/or current data of a microgrid line;

when the micro-grid circuit is determined to have a fault according to the voltage and/or current data, storing fault recording data in a physical memory of a first processor by the first processor and sending a data frame to a second processor through a preset communication protocol;

and analyzing the data frame by a second processor to obtain the fault recording data.

12. The microgrid fault recording method of claim 11, wherein the method comprises:

determining, by a protection identification module of a first processor, whether the microgrid wire is malfunctioning using an overvoltage/overcurrent protection strategy based on the voltage and/or current data.

13. The microgrid fault recording method of claim 11, wherein the method comprises:

and sequentially storing the periodic wave data by a wave recording data processing module of the first processor according to the time of the fault so as to complete the splicing of the wave recording data before and after the fault.

14. The microgrid fault recording method of claim 13, further comprising:

storing the specific cycle data after the fault occurs in the physical memory in a one-dimensional array by a recording data processing module, and copying the specific cycle data before the fault occurs in a ring queue in the one-dimensional array after the specific cycle data after the fault occurs is stored.

15. The microgrid fault recording method of claim 11, wherein the first processor and the second processor implement data sharing in a shared memory communication manner.

16. The microgrid fault recording method of claim 11, wherein the data frame includes a frame header, a frame length and a data portion,

17. The microgrid fault recording method of claim 15 or 16, wherein the step of acquiring the fault recording data comprises:

and mapping the fault recording data to a process address space of the second processor by using a mmap function according to the analyzed initial address of the physical memory by the second processor so as to obtain the fault recording data.

18. The microgrid fault recording method of claim 16, further comprising:

and storing the fault recording data in a database by a recording management module of the second processor, and generating a recording file in a COMTRADE format according to the starting time, the ending time and the fault recording data.

19. The microgrid fault recording method of claim 11, wherein the method comprises:

receiving, by a third processor of the controller, a voltage signal and/or a current signal of the microgrid line from a transformer, sampling the voltage signal and/or the current signal, and transmitting the voltage and/or current data obtained by sampling the voltage signal and/or the current signal to a first processor through a data bus.

20. The microgrid fault recording method of claim 18, further comprising:

and the wave recording management module sends the wave recording file to the micro-grid main station by using the IEC61850 standard.