CN112885933B - Deep ultraviolet light-emitting diode and preparation method thereof - Google Patents
Deep ultraviolet light-emitting diode and preparation method thereof Download PDFInfo
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Abstract
The invention relates to a deep ultraviolet light-emitting diode and a preparation method thereof. The diode sequentially comprises the following structures along the epitaxial growth direction: the device comprises a substrate, a buffer layer, an N-type semiconductor transmission layer, a multi-quantum well layer, a P-type current barrier layer, a P-type semiconductor transmission layer, a P-type heavily doped semiconductor transmission layer and a P-type ohmic electrode; wherein, the N-type semiconductor transmission layer is partially exposed, and the surface is distributed with bulges distributed in a pattern or pits distributed in a pattern; the exposed part of the N-type semiconductor transmission layer is also covered with an N-type ohmic electrode; on one hand, the contact area of the N electrode and the N-AlGaN layer is increased, and the contact resistance is reduced; on the other hand, the scattering effect of light on the surface of the N-AlGaN layer is improved, the optical waveguide effect of the N-AlGaN layer is broken, the light emitting efficiency of the device is improved, the light extraction efficiency is improved, and therefore the external quantum efficiency of the device is improved.
Description
Technical Field
The invention relates to the technical field of light-emitting diode semiconductors, in particular to a preparation method of a deep ultraviolet light-emitting diode.
Background
AlGaN-based deep ultraviolet light emitting diodes (DUV LEDs) not only have the advantages of low working voltage, stability, durability and the like, but also are energy-saving, environment-friendly and nuisanceless to human bodies and environments, so that the DUV LEDs are gradually replacing the traditional mercury lamps and are widely applied to the fields of sterilization, disinfection, anti-counterfeiting detection, display communication and the like.
Although AlGaN-based DUV LEDs have a wide application prospect, AlGaN-based DUV LEDs have an External Quantum Efficiency (EQE) of only about 10% at the current stage, which greatly limits their large-scale commercial applications. One of the main reasons for the low EQE of current AlGaN-based DUV LEDs is their low Light Extraction Efficiency (LEE). For AlGaN-based DUV LEDs, the light emitted from the active region is predominantly polarized in TM mode, and the extraction efficiency of TM mode polarized light is less than one tenth of that of TE mode, which fundamentally limits the light extraction efficiency of the device. On the other hand, with the increase of Al component, the acceptor activation energy of P-AlGaN is greatly increased, so that the doping efficiency of P-AlGaN is extremely low, and P-type heavy doping is difficult to realize. Therefore, in order to reduce the P-type contact resistance of the device, a P-GaN material is introduced to replace P-AlGaN as the P-type ohmic contact layer, but the P-GaN layer absorbs photons, thereby further reducing the light extraction efficiency of the device. Therefore, the AlGaN-based DUV LED generally adopts a flip-chip structure with bottom light emission. However, with the flip-chip configuration, light emitted from the active region must pass through the bottom N-AlGaN layer before exiting the device. After the mesa is etched, the N-AlGaN layer at the bottom of the device can form an optical waveguide for light emitted from the active region, so that part of light with a fixed angle cannot be emitted from the bottom of the device, and the improvement of the light extraction efficiency of the AlGaN-based DUV LED is further limited. For example, chinese patent No. CN201510786400.4 provides a method for manufacturing an LED patterned substrate having a double-layer micro-nano array structure, which patterns a substrate on the basis of a standard device, increases scattering of light at the substrate interface, changes the exit angle of totally reflected light, and increases the probability of light from a sapphire substrate for flip-chip DUV LEDs, thereby increasing the light extraction efficiency of the device. Although the bottom light-emitting efficiency of the flip-chip AlGaN-based DUV LED is improved to a certain extent by the method, the refractive index difference between the sapphire material and the AlN material of the patterned substrate is not large, so that the scattering effect is not obvious, and the patterned substrate can scatter part of light which can escape from the device and return to the inside of the device, so that the light is absorbed by the P-GaN layer, so that the method still cannot solve the problem of reflection of the surface of the N-AlGaN layer exposed after the mesa is etched on the light with a fixed angle, the light extraction efficiency is difficult to effectively improve, the process of the patterned substrate is too complex, and the process cost is also improved.
Disclosure of Invention
The invention aims to provide a deep ultraviolet light-emitting diode and a preparation method thereof, aiming at the defects in the prior art. After the N-AlGaN layer is exposed on the table top after the etching, the N electrode is not directly covered, the exposed N-AlGaN layer is patterned by etching and then covered with metal, so that the phenomenon that light is reflected back and forth in the N-AlGaN layer and cannot be emitted is avoided, and the light extraction efficiency is improved. On one hand, the contact area of the N electrode and the N-AlGaN layer is increased, and the contact resistance is reduced; on the other hand, the scattering effect of light on the surface of the N-AlGaN layer is improved, the optical waveguide effect of the N-AlGaN layer is broken, the light extraction efficiency at the bottom of the device is improved, and therefore the external quantum efficiency of the device is improved.
The technical scheme adopted by the invention is as follows:
a deep ultraviolet light emitting diode comprises the following structures along the epitaxial growth direction: the semiconductor device comprises a substrate, a buffer layer, an N-type semiconductor transmission layer, a multi-quantum well layer, a P-type electronic barrier layer, a P-type semiconductor transmission layer, a P-type heavily doped semiconductor transmission layer and a P-type ohmic electrode;
wherein, the N-type semiconductor transmission layer is partially exposed, and the surface is distributed with bulges distributed in a pattern or pits distributed in a pattern; the exposed part of the N-type semiconductor transmission layer is also covered with an N-type ohmic electrode;
the proportion of the area of the exposed part of the N-type semiconductor transmission layer to the total area of the N-type semiconductor transmission layer is 5-90%; the area of the N-type ohmic electrode is 5-95% of the exposed part of the N-type semiconductor transmission layer; the sum of the projection areas of the bumps or the pits is 5 to 95 percent of the area of the exposed part of the N-type semiconductor transmission layer 103;
the distribution of the graph is regular or irregular;
when the pattern is a regular pattern, the pattern is distributed in an array with equal intervals or unequal intervals;
the regular equidistant patterns are circular, rectangular, triangular, elliptical or circular.
The protrusions are hemispherical, cylindrical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the interval is 1-900 nm, and the height is 2-500 nm;
the pits are hemispherical, conical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the distance is 1-900 nm, and the depth is 2-500 nm;
the substrate is one of sapphire, SiC, Si, AlN, GaN or quartz glass; the difference of the substrate along the epitaxial growth direction can be classified into a polar plane [0001] substrate or a negative plane [000-1] substrate.
The buffer layer is made of Al x1 Ga 1-x1 N; wherein x1 is more than or equal to 0 and less than or equal to 1, x1 is more than or equal to 0 and less than or equal to 1, and the thickness is 10～50nm。
The N-type semiconductor transmission layer is made of Al x2 Ga 1-x2 N; wherein x2 is more than or equal to 0 and less than or equal to 1, x2 is more than or equal to 0 and less than or equal to 1, and the thickness is 1-5 mu m; the proportion of the area of the exposed part to the total area of the N-type semiconductor transmission layer is 5% -90%, and the thickness range is 1-5 mu m.
The material of the multi-quantum well layer is Al x3 Ga 1-x3 N/Al x4 Ga 1-x4 N; wherein x3 is more than or equal to 0 and less than or equal to 1, x3 is more than or equal to 0 and less than or equal to 1, x4 is more than or equal to 0 and less than or equal to 1, 1-x4 is more than or equal to 1, the forbidden bandwidth of the quantum barrier is higher than that of the quantum well, and the number of the quantum wells is more than or equal to 1; quantum well Al x3 Ga 1-x3 N is 0.5-5 nm thick and quantum barrier Al x4 Ga 1-x4 The thickness of N is 3-50 nm.
The P-type electron blocking layer is made of Al x5 Ga 1-x5 N; wherein x5 is more than or equal to 0 and less than or equal to 1, x5 is more than or equal to 0 and less than or equal to 1, and the thickness is 10-100 nm.
The P-type semiconductor transmission layer is made of Al x6 Ga 1-x6 N; wherein x6 is more than or equal to 0 and less than or equal to 1, x6 is more than or equal to 0 and less than or equal to 1, and the thickness is 50-250 nm.
The P-type heavily doped semiconductor transmission layer is made of Al x7 Ga 1-x7 N; wherein x7 is more than or equal to 0 and less than or equal to 1, x7 is more than or equal to 0 and less than or equal to 1, the material doping is P-type heavy doping, and the thickness is 10-50 nm.
The P-type ohmic electrode is made of Ni/Au, Cr/Au, Pt/Au or Ni/Al, wherein the projection area of the P-type ohmic electrode is 5-100% of the area of the current expansion layer.
The N-type ohmic electrode is made of Al/Au, Cr/Au or Ti/Al/Ti/Au.
The preparation method of the deep ultraviolet light-emitting diode comprises the following steps:
firstly, utilizing MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) to epitaxially grow a buffer layer on the surface of a substrate; epitaxially growing an N-type semiconductor transmission layer on the obtained buffer layer; then epitaxially growing a multi-quantum well layer on the N-type semiconductor transmission layer; epitaxially growing a P-type electron barrier layer on the multi-quantum well layer obtained in the last step; then, continuing to grow a P-type semiconductor hole transport layer; and secondly, continuously growing a P-type heavily doped semiconductor hole transport layer.
Secondly, manufacturing a mesa mask on the P-type heavily doped semiconductor transmission layer obtained in the first step through a photoetching process;
thirdly, etching and manufacturing a step by using a dry etching process on the basis of the second step to expose part of the N-type semiconductor transmission layer;
fourthly, on the basis of the third step, etching the N-type semiconductor transmission layer by using the nanosphere or the anodic alumina hole as a mask, wherein the etching depth is 2-500 nm;
and fifthly, removing the nano sphere or anodized aluminum hole mask and the table mask by the processes of removing the photoresist, ultrasonic cleaning and the like on the basis of the fourth step.
And sixthly, evaporating and photoetching to form an N-type ohmic electrode and a P-type ohmic electrode.
Thus, the preparation of the deep ultraviolet light emitting diode of the present invention is completed.
The raw materials involved in the preparation method of the deep ultraviolet light-emitting diode can be obtained through a general approach, and the operation process in the preparation method is possessed by the technical personnel in the technical field.
The invention has the beneficial effects that:
(1) according to the preparation method of the deep ultraviolet light-emitting diode, the patterned etching treatment is carried out on the surface of the N-AlGaN layer exposed after the mesa is etched, so that the scattering effect of light on the surface of the N-AlGaN layer is improved, the situation that a part of light with a fixed angle emitted from an active region is limited in N-AlGaN layer waveguide when being emitted from the bottom of a device is avoided, the light emitting efficiency of the bottom of the device is improved, and the light extraction efficiency is improved. Through calculation, compared with the traditional standard devices, the TM and TE mode polarized light extraction efficiencies of the device prepared by the method are respectively improved by 7.0% and 10.7%.
(2) According to the preparation method of the deep ultraviolet light-emitting diode, the patterned etching treatment is carried out on the surface of the N-AlGaN layer exposed after the mesa is etched, so that the contact area of N electrode metal and the N-AlGaN layer can be greatly increased, the contact resistance of a device is reduced, and the forward working voltage of the device is reduced.
(3) The preparation method of the deep ultraviolet light-emitting diode improves the light extraction efficiency of the device by patterning the surface of the N-AlGaN layer through an etching technology, and has the advantages of mature process, strong repeatability, small process realization difficulty and low production cost.
Drawings
The invention will be further described with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a standard deep ultraviolet light emitting diode in the prior art.
FIG. 2 is a schematic diagram of a deep ultraviolet light emitting diode prepared by the method of the present invention.
Fig. 3 is a schematic structural diagram of a mesa manufactured by etching the deep ultraviolet light emitting diode epitaxial structure with a mesa mask in the embodiment of fig. 2 and exposing the N-type electron transport layer.
Fig. 4 is a schematic illustration of the article of fig. 3 after nanosphere application.
Fig. 5 is the product of fig. 4 after etching the N-type semiconductor transmission layer using nanosphere as a mask.
Fig. 6 is the article of fig. 5 after removal of the nanospheres and the mesa mask.
FIG. 7 is a graph comparing the extraction efficiency of TM and TE mode polarized light of the deep ultraviolet light emitting diode prepared by the method of the present invention and the standard deep ultraviolet light emitting diode in example 1.
The high-power-density optical waveguide comprises a substrate 101, a buffer layer 102, a 103-N-type semiconductor transmission layer, a 104-multi-quantum well layer, a 105-P-type electron blocking layer, a 106-P-type semiconductor transmission layer, a 107-P-type heavily doped semiconductor transmission layer, a 108-P-type ohmic electrode, a 109-N-type ohmic electrode, a 110-mesa mask and a 111-nanosphere.
Detailed Description
The present invention is further described with reference to the following examples and drawings, but the scope of the claims of the present application is not limited thereto.
The embodiment shown in fig. 1 is a standard led device structure in the prior art, and its structure along the epitaxial growth direction is as follows: the transistor comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron barrier layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107 and a P-type ohmic electrode 108; wherein the N-type semiconductor transport layer 103 is partially exposed and the exposed portion is covered with the N-type ohmic electrode 109.
Fig. 2 shows an embodiment 1 of a schematic structural diagram of an embodiment prepared by a deep ultraviolet light emitting diode preparation method according to the present invention, and the structure along the epitaxial growth direction sequentially includes: the semiconductor device comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron barrier layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107 and a P-type ohmic electrode 108;
wherein, the N-type semiconductor transmission layer 103 is partially exposed, and the bulges distributed in the pattern are prepared by a nanosphere photoetching technology and an etching technology; or preparing pits with pattern distribution by using an alumina hole mask technology and an etching technology; the N-type ohmic electrode 109 is then covered on the exposed portion of the N-type semiconductor transport layer 103.
The proportion of the area of the exposed part of the N-type semiconductor transmission layer 103 to the total area of the N-type semiconductor transmission layer is 5-90%; the area of the N-type ohmic electrode 109 is 5-95% of the exposed part of the N-type semiconductor transmission layer 103; the sum of the projection areas of the bumps or the pits is 5 to 95 percent of the area of the exposed part of the N-type semiconductor transmission layer 103;
the graph is regular or irregular; when the pattern is a regular pattern, the pattern is distributed in an array with equal intervals or unequal intervals;
the regular equidistant patterns are circular, rectangular, triangular, elliptical or circular.
The protrusions are hemispherical, cylindrical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the interval is 1-900 nm, and the height is 2-500 nm;
the pits are hemispherical, conical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the distance is 1-900 nm, and the depth is 2-500 nm;
fig. 3 is a schematic diagram of a mesa of a device obtained by etching the epitaxial structure of the deep ultraviolet light emitting diode in example 1. The mesa mask 110 is first covered by glue, exposure, development, etc. And then, carrying out selective etching by using dry etching, so that the region which is not covered by the mesa mask 110 is etched away, part of the N-type semiconductor transmission layer 103 is exposed to obtain a mesa, and the height of the exposed part is 1% -50% of the original height. As shown, the structure along the epitaxial growth direction is: the semiconductor device comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron blocking layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107 and a mesa mask 110.
Fig. 4 is a schematic illustration of nanosphere application to the structure of fig. 3. When the ball is spread, the prepared nanosphere solution is used for uniformly or non-uniformly spreading the nanospheres 111 on the surface of the device in a single layer mode by using a rotary coating mode, a lifting coating mode or a gravity settling mode. As shown, the structure along the epitaxial growth direction is: the semiconductor device comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron blocking layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107, a mesa mask 110 and nanospheres 111.
Fig. 5 is a schematic diagram of etching the structure of fig. 4 using nanospheres as a mask. Before etching, the nanospheres can be optionally shrunk or not shrunk. As shown, the structure along the epitaxial growth direction is: the semiconductor device comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron blocking layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107, a mesa mask 110 and nanospheres 111. This etching process has no effect on the P-type heavily doped semiconductor transport layer 107 since the mesa is protected by the mesa mask 110 which is still covered over the mesa.
Fig. 6 is a schematic diagram of the structure of fig. 5 with the mesa mask and nanospheres removed. First, the nanospheres are removed by ultrasonic cleaning, and then the nanospheres are sequentially cleaned by the degumming solution, acetone, ethanol and deionized water, and the mesa mask 110 is removed. As shown, the structure along the epitaxial growth direction is: the semiconductor device comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron blocking layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107, a mesa mask 110 and nanospheres 111.
FIG. 7 is a graph comparing the extraction efficiency of TM and TE mode polarized light of the deep ultraviolet light emitting diode prepared by the method of the present invention and the standard deep ultraviolet light emitting diode in example 1. As shown in the figure, the deep ultraviolet light-emitting diode prepared by the method improves the scattering effect of the N-AlGaN layer on light, breaks the waveguide effect of the N-AlGaN layer on light with a fixed angle emitted from an active region and greatly improves the light-emitting efficiency of a device by performing patterning etching treatment on the N-AlGaN layer exposed after the mesa is etched, so that the light efficiency of the device prepared by the method is respectively improved by 7.0 percent and 10.7 percent compared with TM and TE mode polarized light of the traditional standard device.
Example 1
As shown in fig. 2, the deep ultraviolet light emitting diode device in this embodiment sequentially includes, along an epitaxial growth direction, a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron blocking layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107, and a P-type ohmic electrode 108; wherein the N-type semiconductor transport layer 103 is partially exposed; the surface of the exposed part of the N-type semiconductor transmission layer 103 is distributed with bulges distributed in a pattern; the exposed portion is also covered with an N-type ohmic electrode 109.
In the above, the substrate 101 is a sapphire substrate, and the epitaxial growth of the structure is along [0001]]Direction; the buffer layer 102 is made of AlN and has a thickness of 15 nm; the material of the N-type semiconductor transmission layer 103 is Al 0.60 Ga 0.40 N, the thickness is 3.8 μm; the material of the MQW layer 104 is Al with 5 periods 0.45 Ga 0.55 N/Al 0.55 Ga 0.45 N layer, wherein quantum barrier Al 0.55 Ga 0.45 N is 10nm thick, quantum well Al 0.45 Ga 0.55 The thickness of N is 2 nm; the P-type electron blocking layer 105 is made of Al 0.65 Ga 0.35 N, the thickness is 10 nm; the P-type semiconductor hole transport layer 106 is made of Al 0.40 Ga 060 N, the thickness is 50 nm; p-type heavyThe doped semiconductor hole transport layer 107 is made of GaN and has a thickness of 50 nm; the P-type ohmic electrode 108 is made of Ni/Au, and the N-type ohmic electrode 109 is made of Cr/Au;
the preparation method of the deep ultraviolet light-emitting diode comprises the following steps:
firstly, epitaxially growing a buffer layer 102 on the surface of a substrate 101 by using an MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) reaction furnace; epitaxially growing an N-type semiconductor transmission layer 103 on the obtained buffer layer 102; then epitaxially growing a multi-quantum well layer 104 on the N-type semiconductor transmission layer; epitaxially growing a P-type electron blocking layer 105 on the multi-quantum well layer 104 obtained in the previous step; then, the P-type semiconductor hole transport layer 106 continues to be grown; secondly, continuously growing a P-type heavily doped semiconductor hole transport layer 107;
secondly, on the P-type heavily doped semiconductor transmission layer 107 obtained in the first step, a mesa mask 110 is manufactured by utilizing photoetching processes of gluing, exposure, development and the like;
thirdly, etching a 700nm step by using a dry etching process on the basis of the second step to expose the N-type semiconductor transmission layer 103; the proportion of the area of the exposed part of the N-type semiconductor transmission layer 103 to the total N-type semiconductor transmission layer area is 20%;
fourthly, on the basis of the third step, a single-layer nanosphere 111 is paved by using a method of pulling a coating film; performing ball shrinking by using dry etching, and performing dry etching on the N-type semiconductor transmission layer 103 by using the nanospheres 111 as masks, wherein the etching depth is 100nm, the distance is 10nm, the diameter is 15nm, and the protrusions are cylindrical; the cylindrical bumps are distributed in a rectangular shape, and the sum of the projection areas of the cylindrical bumps is 60% of the area of the exposed part of the N-type semiconductor transmission layer 103.
Fifthly, on the basis of the fourth step, firstly removing the nanospheres 111 by utilizing processes such as ultrasonic cleaning and the like; then, washing by using a degumming solution, acetone, ethanol and deionized water, and removing the mesa mask 110;
sixthly, evaporating and photoetching to form an N-type ohmic electrode 109 and a P-type ohmic electrode 108; the area of the N-type ohmic electrode 109 is 40% of the exposed part of the N-type semiconductor transmission layer 103;
thus, the deep ultraviolet light emitting diode structure in the invention is prepared.
According to the deep ultraviolet light-emitting diode prepared by the method, the N-AlGaN layer exposed after the mesa is etched is subjected to patterning etching treatment, so that the scattering effect of the N-AlGaN layer on light is improved, the waveguide effect of the N-AlGaN layer on light with a fixed angle is broken, the light extraction efficiency at the bottom of the device is greatly improved, and the external quantum efficiency of the device is greatly improved.
Example 2
The deep ultraviolet light emitting diode device structure in the embodiment sequentially comprises a substrate 101, a buffer layer 102, an N-type semiconductor transmission layer 103, a multi-quantum well layer 104, a P-type electron barrier layer 105, a P-type semiconductor transmission layer 106, a P-type heavily doped semiconductor transmission layer 107 and a P-type ohmic electrode 108 along an epitaxial growth direction; wherein the N-type semiconductor transmission layer 103 is partially exposed, and pits are distributed on the surface of the exposed part of the N-type semiconductor transmission layer 103 in a pattern; the exposed portion is also covered with an N-type ohmic electrode 109.
In the above, the substrate 101 is a sapphire substrate, and the epitaxial growth of the structure is along [0001]]Direction; the buffer layer 102 is made of AlN and has a thickness of 15 nm; the material of the N-type semiconductor transmission layer 103 is Al 0.60 Ga 0.40 N, the thickness is 3.8 μm; the MQW layer 104 is made of 5 periods of Al 0.45 Ga 0.55 N/Al 0.55 Ga 0.45 N layer, wherein quantum barrier Al 0.55 Ga 0.45 N is 10nm thick, quantum well Al 0.45 Ga 0.55 The thickness of N is 2 nm; the P-type electron blocking layer 105 is made of Al 0.65 Ga 0.35 N, the thickness is 10 nm; the P-type semiconductor hole transport layer 106 is made of Al 0.40 Ga 060 N, the thickness is 50 nm; the P-type heavily doped semiconductor hole transport layer 107 is made of GaN and has a thickness of 50 nm; the P-type ohmic electrode 108 is made of Ni/Au, and the N-type ohmic electrode 109 is made of Cr/Au;
the preparation method of the deep ultraviolet light-emitting diode comprises the following steps:
firstly, epitaxially growing a buffer layer 102 on the surface of a substrate 101 by using an MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) reaction furnace; epitaxially growing an N-type semiconductor transmission layer 103 on the obtained buffer layer 102; then epitaxially growing a multi-quantum well layer 104 on the N-type semiconductor transmission layer; epitaxially growing a P-type electron blocking layer 105 on the multi-quantum well layer 104 obtained in the previous step; then, the P-type semiconductor hole transport layer 106 continues to be grown; secondly, continuously growing a P-type heavily doped semiconductor hole transport layer 107;
secondly, on the P-type heavily doped semiconductor transmission layer 107 obtained in the first step, a mesa mask 110 is manufactured by utilizing photoetching processes of gluing, exposure, development and the like;
thirdly, etching a 800nm step by using a dry etching process on the basis of the second step to expose the N-type semiconductor transmission layer 103; the proportion of the area of the exposed part of the N-type semiconductor transmission layer 103 to the total N-type semiconductor transmission layer area is 20%;
fourthly, on the basis of the third step, firstly making anodic alumina pores; then, etching the exposed N-type semiconductor transmission layer 103 by using the anodic aluminum oxide hole as a mask, wherein the etching depth is 20nm, the interval is 100nm, the diameter is 15nm, and the pit is hemispherical; the hemispherical pits are distributed in a rectangular shape, and the sum of the projected areas of the hemispherical pits is 60% of the area of the exposed part of the N-type semiconductor transmission layer 103.
Fifthly, removing the anodic alumina hole mask by using alkaline corrosive liquid on the basis of the fourth step, and cleaning by using deionized water; then, washing by using a degumming solution, acetone, ethanol and deionized water, and removing the mesa mask 110;
sixthly, evaporating and photoetching to form an N-type ohmic electrode 109 and a P-type ohmic electrode 108; the area of the N-type ohmic electrode 109 is 40% of the exposed part of the N-type semiconductor transmission layer 103;
thus, the deep ultraviolet light emitting diode structure in the invention is prepared.
Example 3
The other steps of this embodiment are the same as those of embodiment 1, except that the etching depth of the N-type semiconductor transmission layer 103 using the nanospheres 111 as the mask is changed to 10 nm.
Example 4
The other steps of this embodiment are the same as embodiment 2, except that the diameter of the hemispherical pits in this embodiment is 50nm, the pitch is 50nm, and the depth is 50 nm. The sum of projected areas of the pits is 80% of the area of the exposed portion of the N-type semiconductor transmission layer 103.
The above examples are only preferred embodiments of the present invention, it should be noted that: for those skilled in the art, without departing from the principle of the present invention, several equivalents may be made, and all technical solutions obtained by making equivalents to the claims of the present invention fall within the scope of the present invention.
The invention is not the best known technology.
Claims (2)
1. A deep ultraviolet light-emitting diode is characterized in that the diode sequentially comprises the following structures along the epitaxial growth direction: the semiconductor device comprises a substrate, a buffer layer, an N-type semiconductor transmission layer, a multi-quantum well layer, a P-type electronic barrier layer, a P-type semiconductor transmission layer, a P-type heavily doped semiconductor transmission layer and a P-type ohmic electrode;
wherein, the N-type semiconductor transmission layer is partially exposed, and the surface is distributed with bulges distributed in a pattern or pits distributed in a pattern; the exposed part of the N-type semiconductor transmission layer is also covered with an N-type ohmic electrode;
the proportion of the area of the exposed part of the N-type semiconductor transmission layer to the total area of the N-type semiconductor transmission layer is 5-90%; the area of the N-type ohmic electrode is 5-95% of the exposed part of the N-type semiconductor transmission layer; the sum of the projection areas of the bulges or the pits is 5 to 95 percent of the area of the exposed part of the N-type semiconductor transmission layer;
the distribution of the graph is regular or irregular;
when the pattern distribution is regular, the pattern distribution is in equal-interval or unequal-interval array distribution;
when the patterns are distributed at equal intervals, the patterns are circular, rectangular, triangular, elliptical or circular;
the protrusions are hemispherical, cylindrical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the interval is 1-900 nm, and the height is 2-500 nm;
the pits are hemispherical, conical, triangular prism or quadrangular prism shaped, the diameter is 1-900 nm, the distance is 1-900 nm, and the depth is 2-500 nm;
the substrate is one of sapphire, SiC, Si, AlN, GaN or quartz glass; the difference of the substrate along the epitaxial growth direction can be divided into a polar plane [0001] substrate or a negative polar plane [000-1] substrate;
the buffer layer is made of Al x1 Ga 1-x1 N; wherein x1 is more than or equal to 0 and less than or equal to 1, x1 is more than or equal to 0 and less than or equal to 1, and the thickness is 10-50 nm;
the N-type semiconductor transmission layer is made of Al x2 Ga 1-x2 N; wherein x2 is more than or equal to 0 and less than or equal to 1, x2 is more than or equal to 0 and less than or equal to 1, and the thickness is 1-5 mu m; the proportion of the area of the exposed part to the total area of the N-type semiconductor transmission layer is 5% -90%, and the thickness range is 1-5 mu m;
the material of the multi-quantum well layer is Al x3 Ga 1-x3 N/Al x4 Ga 1-x4 N; wherein x3 is more than or equal to 0 and less than or equal to 1, 1-x3 is more than or equal to 0 and less than or equal to 1, x4 is more than or equal to 0 and less than or equal to 1, 1-x4 is more than or equal to 0 and less than or equal to 1, the forbidden bandwidth of the quantum barrier is higher than that of the quantum well, and the number of the quantum wells is more than or equal to 1; quantum well Al x3 Ga 1-x3 N is 0.5-5 nm thick and quantum barrier Al x4 Ga 1-x4 The thickness of N is 3-50 nm;
the P-type electron blocking layer is made of Al x5 Ga 1-x5 N; wherein x5 is more than or equal to 0 and less than or equal to 1, x5 is more than or equal to 0 and less than or equal to 1, and the thickness is 10-100 nm;
the P-type semiconductor transmission layer is made of Al x6 Ga 1-x6 N; wherein x6 is more than or equal to 0 and less than or equal to 1, x6 is more than or equal to 0 and less than or equal to 1, and the thickness is 50-250 nm;
the P-type heavily doped semiconductor transmission layer is made of Al x7 Ga 1-x7 N; wherein x7 is more than or equal to 0 and less than or equal to 1, x7 is more than or equal to 0 and less than or equal to 1, the material doping is P-type heavy doping, and the thickness is 10-50 nm;
the P-type ohmic electrode is made of Ni/Au, Cr/Au, Pt/Au or Ni/Al, wherein the projection area of the P-type ohmic electrode is 5-100% of the area of the current expansion layer;
the N-type ohmic electrode is made of Al/Au, Cr/Au or Ti/Al/Ti/Au.
2. The method for preparing a deep ultraviolet light emitting diode according to claim 1, comprising the steps of:
firstly, utilizing MOCVD (metal organic chemical vapor deposition) or MBE (molecular beam epitaxy) to epitaxially grow a buffer layer on the surface of a substrate; epitaxially growing an N-type semiconductor transmission layer on the obtained buffer layer; then epitaxially growing a multi-quantum well layer on the N-type semiconductor transmission layer; epitaxially growing a P-type electron barrier layer on the multi-quantum well layer obtained in the last step; then, continuing to grow a P-type semiconductor hole transport layer; secondly, continuously growing a P-type heavily doped semiconductor hole transport layer;
secondly, manufacturing a mesa mask on the P-type heavily doped semiconductor transmission layer obtained in the first step through a photoetching process;
thirdly, etching and manufacturing a step by using a dry etching process on the basis of the second step to expose part of the N-type semiconductor transmission layer;
fourthly, on the basis of the third step, etching the N-type semiconductor transmission layer by using the nanosphere or the anodic alumina hole as a mask, wherein the etching depth is 2-500 nm;
fifthly, removing photoresist and ultrasonically cleaning on the basis of the fourth step, and removing the nanosphere or anodized aluminum hole mask and the table-board mask;
and sixthly, evaporating and photoetching to form an N-type ohmic electrode and a P-type ohmic electrode.
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