CN112884153A - Method and related device for processing data - Google Patents

Method and related device for processing data Download PDF

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CN112884153A
CN112884153A CN201911208970.XA CN201911208970A CN112884153A CN 112884153 A CN112884153 A CN 112884153A CN 201911208970 A CN201911208970 A CN 201911208970A CN 112884153 A CN112884153 A CN 112884153A
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quantum
initial state
target
data
computer
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龙桂鲁
周增荣
陈迪青
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization

Abstract

The application relates to the field of quantum computers, and provides a method for processing data and a related device, wherein the method comprises the following steps: the quantum computer generates an initial state corresponding to the first part of data of the target task through a first quantum circuit; the quantum computer performs unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, wherein the target operator corresponds to a second part of data of the target task, and the target operator comprises a first diagonal matrix and a second diagonal matrix; the quantum computer measures the first part of the target quantum state to obtain a measurement result; and under the condition that the measurement result meets a preset condition, the quantum computer measures the second part of the target quantum state by using a Hermite operator to obtain the result of the target task. The technical scheme can quickly require the result of the processed task and has low implementation complexity.

Description

Method and related device for processing data
Technical Field
The present application relates to the field of quantum computers, and more particularly, to methods of processing data and related apparatus.
Background
Artificial Intelligence (AI) is a theory, method, technique and application system that uses a digital computer or a machine controlled by a digital computer to simulate, extend and expand human Intelligence, perceive the environment, acquire knowledge and use the knowledge to obtain the best results. In other words, artificial intelligence is a branch of computer science that attempts to understand the essence of intelligence and produce a new intelligent machine that can react in a manner similar to human intelligence. Artificial intelligence is the research of the design principle and the realization method of various intelligent machines, so that the machines have the functions of perception, reasoning and decision making. Research in the field of artificial intelligence includes robotics, natural language processing, computer vision, decision and reasoning, human-computer interaction, recommendation and search, AI basic theory, and the like.
Machine learning is a means to implement artificial intelligence. The general process of machine learning is to first obtain a model by using training data, and then input the data to be processed into the model to obtain the processing result. However, in general, the amount of training data is very large, requiring a large amount of computing resources to process, and consuming a long time.
The quantum computation is a novel computation mode for regulating and controlling quantum information units to perform computation according to a quantum mechanics law. Compared with the traditional general computer, the theoretical model of the computer is a general turing machine; the theory model of the general quantum computer is a general turing machine which is re-explained by the quantum mechanics law. From the point of view of computability, quantum computers can only solve the problems that can be solved by traditional computers, but from the point of efficiency of computation, due to the existence of quantum mechanics superposition, the speed of some known quantum algorithms is faster than that of traditional general computers when the problems are processed.
Disclosure of Invention
The application provides a method and a related device for processing data, which can quickly obtain a task result and have low implementation complexity.
In a first aspect, an embodiment of the present application provides a method for processing data, including: the quantum computer generates an initial state corresponding to the first part of data of the target task through a first quantum circuit; the quantum computer performs unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, wherein the target operator corresponds to a second part of data of the target task, and the target operator comprises a first diagonal matrix and a second diagonal matrix; the quantum computer measures the first part of the target quantum state to obtain a measurement result; and under the condition that the measurement result meets a preset condition, the quantum computer measures the second part of the target quantum state by using a Hermite operator to obtain the result of the target task.
According to the technical scheme, the quantum computer is used for processing the data, and the task result can be quickly obtained. In addition, the quantum computer includes a diagonal matrix in an operator for performing unitary transformation in processing the data. Therefore, the quantum circuit can be simplified, the complexity of quantum computation is low, and the workload of a quantum computer is reduced.
With reference to the first aspect, in a possible implementation manner of the first aspect, the second part of data is a sparse matrix. In the case that the second part of data is a sparse matrix, the above technical solution can obtain the result of the target task more quickly.
With reference to the first aspect, in a possible implementation manner of the first aspect, the initial state includes a first initial state element, a second initial state element, and a third initial state element, where the first initial state element is a constant term | b > determined according to the first part of data, the second initial state element corresponds to the first diagonal matrix, and the third initial state element corresponds to the second diagonal matrix.
With reference to the first aspect, in a possible implementation manner of the first aspect, the initial state is
Figure BDA0002297614930000021
Wherein | b>Is the first initial state element and is a second initial state element,
Figure BDA0002297614930000022
is the second initial state element and is a second initial state element,
Figure BDA0002297614930000023
is the third initial state element, wherein m represents the serial number of the vector corresponding to the second initial state element, m' represents the serial number of the vector corresponding to the third initial state element, L is the power P of 2, T is the power Q of 2, and P and Q are positive integers greater than or equal to 1.
With reference to the first aspect, in a possible implementation manner of the first aspect, the target operator is
Figure BDA0002297614930000024
Where j denotes an imaginary unit, γ denotes a calculation parameter,
Figure BDA0002297614930000025
is the square of the second portion of data,
Figure BDA0002297614930000026
representing a kronecker product, the first diagonal matrix is a 2L +1 square matrix and the second diagonal matrix is a 2T +1 square matrix.
With reference to the first aspect, in one possible implementation manner of the first aspect,
Figure BDA0002297614930000027
Figure BDA0002297614930000028
with reference to the first aspect, in one possible implementation manner of the first aspect, the target quantum state is
Figure BDA0002297614930000029
Where L is the power P of 2, T is the power Q of 2, P and Q are positive integers greater than or equal to 1, gamma denotes a calculation parameter, and lambdaiI-th eigenvalue representing the second part of data, biRepresents a constant term | b determined from the first partial data>The ith element in (1), eiDenotes the ith basis vector, and m denotes the corresponding relationThe sequence number of the vector of the second initial state element in the initial state, m' represents the sequence number of the vector corresponding to the third initial state element in the initial state, i is a positive integer greater than or equal to 1 and less than or equal to W, | b>Comprises W elements, wherein W is a positive integer which is greater than or equal to 1.
With reference to the first aspect, in one possible implementation manner of the first aspect, the measurement results Φ and γ λ satisfying the preset conditioniT and L have the following relationships:
Figure BDA0002297614930000031
with reference to the first aspect, in a possible implementation manner of the first aspect, the measuring a second portion of the target quantum state by using the hermitian to obtain a result of the target task includes: and measuring the second part of the target quantum state for multiple times by using the hermitian operator to obtain a result of the target task, wherein the result of the target task is an average value of the multiple measurements, and the hermitian operator is easy to compare with the second part of the data.
In a second aspect, embodiments of the present application provide a quantum computer, which includes a module for implementing the first aspect or any one of the possible manners of the first aspect.
In a third aspect, an embodiment of the present application provides a computer system, where the computer system includes a quantum computer and a classical computer, and the classical computer is used to control the quantum computer, so that the quantum computer implements the method of the first aspect or any possible implementation manner of the first aspect.
In a fourth aspect, an embodiment of the present application provides a chip, including: logic circuitry for coupling with an input/output interface through which data is transferred to perform the method of the first aspect or the method of any one of the possible implementations of the first aspect.
In a fifth aspect, embodiments of the present application provide a computer-readable medium, which stores program code, and when the computer program code runs on a computer, causes the computer to execute the method of the first aspect or the method of any possible implementation manner of the first aspect.
Drawings
FIG. 1 is a schematic diagram of a computing system for performing quantum computations.
Fig. 2 is a schematic diagram of an application scenario of a method for processing data according to an embodiment of the present application.
Fig. 3 is a schematic flow diagram of a typical quantum computation.
Fig. 4 is a schematic diagram of a quantum wire used to generate an initial state.
FIG. 5 is a diagram of a corresponding target operator
Figure BDA0002297614930000034
Schematic diagram of a quantum wire of (1).
Fig. 6 is a schematic diagram of a quantum wire for obtaining the result of the target task.
Fig. 7 is a schematic diagram of a quantum wire for determining a target task.
Fig. 8 is a schematic diagram of another sub-quantum wire for preparing an initial state.
Fig. 9 is a schematic diagram of another sub-quantum wire for preparing an initial state.
FIG. 10 is another example of a corresponding target operator
Figure BDA0002297614930000032
Schematic diagram of a quantum wire of (1).
FIG. 11 is another example of a corresponding target operator
Figure BDA0002297614930000033
Schematic diagram of a quantum wire of (1).
Fig. 12 is a schematic structural block diagram of a quantum computer.
Detailed Description
The technical solution in the present application will be described below with reference to the accompanying drawings.
This application is intended to present various aspects, embodiments or features around a system that may include a number of devices, components, modules, and the like. It is to be understood and appreciated that the various systems may include additional devices, components, modules, etc. and/or may not include all of the devices, components, modules etc. discussed in connection with the figures. Furthermore, a combination of these schemes may also be used.
In addition, in the embodiments of the present application, words such as "exemplary", "for example", etc. are used to mean serving as examples, illustrations or explanations. Any embodiment or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or designs. Rather, the term using examples is intended to present concepts in a concrete fashion.
In the embodiments of the present application, "corresponding" and "corresponding" may be sometimes used in a mixed manner, and it should be noted that the intended meaning is consistent when the difference is not emphasized.
In the examples of the present application, the subscripts are sometimes as W1It may be mistaken for a non-subscripted form such as W1, whose intended meaning is consistent when the distinction is de-emphasized.
The network architecture and the service scenario described in the embodiment of the present application are for more clearly illustrating the technical solution of the embodiment of the present application, and do not form a limitation on the technical solution provided in the embodiment of the present application, and as a person of ordinary skill in the art knows that along with the evolution of the network architecture and the appearance of a new service scenario, the technical solution provided in the embodiment of the present application is also applicable to similar technical problems.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
In the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
FIG. 1 is a schematic diagram of a computing system for performing quantum computations. The system 100 as shown in fig. 1 may be divided into a quantum computer portion 110 and a classical computer portion 120. The quantum computer portion 110 includes a quantum processor 111, a measurement device 112, and a peripheral controller 113. Classic computer portion 1200 includes classic processor 121 and memory 122. Memory 122 is used to store instructions and/or code and classical processor 121 is used to execute instructions and/or code executed in memory 122, implementing quantum computing in conjunction with quantum computer components.
Fig. 2 is a schematic diagram of an application scenario of a method for processing data according to an embodiment of the present application. As shown in fig. 2, the application scenario can be divided into three layers, namely an application layer, an algorithm layer and a physical layer.
The application layer represents some fields to which the method for processing data provided by the embodiment of the present application can be applied. The method for processing data can be applied to the field of machine learning. For example, the method for processing data provided by the present application can be used for determining a Support Vector Machine (SVM) model. SVM models can be used to solve problems such as image processing (e.g., image recognition, image classification, etc.) or speech processing (e.g., semantic recognition, emotion analysis, etc.).
The algorithm layer is used for determining a strategy for solving the task, processing the data of the task according to the determined strategy and determining an algorithm for processing the task data.
Different tasks may correspond to different policies. The policy matching module in the algorithm layer may determine a policy that can solve a task according to the task to be solved. The strategy can be a mathematical model or a method. For example, if the task to be solved is pattern recognition, the corresponding policy may be a support vector machine model.
The algorithm design module in the algorithm layer can process the task data according to the strategy of the task to be solved.
Taking supervised learning as an example, if the task to be solved is according to the training data, determining an image classification model by adopting a supervised learning mode. The training data set used to train the image classification model may include a plurality of training data, each of which may include an image data and label information corresponding to the image data. The algorithm design module can divide the training data set into two parts: the first portion includes label information in the training data set and the second portion includes image data in the training data set. The label information of the first part corresponds to the image data of the second part one by one. For example, assuming that the training data set includes W pieces of training data in total, in this case, the first part of data of the training data set may be represented as a column vector, and the column vector includes W elements in total, and the W elements are in one-to-one correspondence with the labels of the W pieces of training data. For convenience of description, it is assumed that the image data in each training data includes W vectors. In this case, the second part of the training data set may be a W × W matrix. For convenience of description, a may be used to represent the second partial data, and b may represent the first partial data. In this case, a and b may be represented as … …
Figure BDA0002297614930000051
Wherein [ a ]11,a12,…,a1w]Is the image data in the first training data of the set of training data, b1Is the label in the first training data, [ a ]21,a22,…,a2w]Is the image data in the second training data of the set of training data, b2Is the label in the second training data and so on.
Besides being used for training image classification models, the technical scheme of the application can also be used for training other types of models in image processing and voice processing, such as image recognition models, semantic recognition models, emotion analysis models and the like.
The quantum computation simulator module in the algorithm layer can be used to determine the parameters needed to solve the algorithm and send the parameters to the classical computer of the physical layer.
For example, the input information input into the quantum computing simulator module may include processed task data (e.g., first portion data and/or second portion data). The input information input into the quantum computing simulation module may also include an algorithm determined by an algorithm design module for processing the first portion of data and the second portion of data.
Optionally, in some embodiments, the quantum computing simulator may verify the algorithm. The verification here means that the determined success probability of the algorithm is analyzed and counted, and the algorithm is optimized according to the statistical result. And finally, obtaining an optimal algorithm for solving the task, and inputting the optimal algorithm into the quantum computation simulator. The quantum computation simulator may determine the parameters required by the algorithm from the optimization algorithm and send the parameters to the classical computer.
The physical layer processes the first portion of data and the second portion of data according to the parameters determined by the quantum computation simulator to determine an optimal output, which is the result of the task.
The classical computer (which may also be referred to as a classical tuning computer) may determine the corresponding quantum wire according to the acquired parameters. The classical computer can control a peripheral controller in the quantum computer to generate control signals such as microwaves or lasers according to a determined quantum circuit, operate on the quantum processor, realize the quantum gate operation of the quantum processor, and control a measuring device in the quantum computer to measure the quantum state generated by the quantum processor.
Alternatively, in some embodiments, a classical computer may perform a classical optimization algorithm (e.g., gradient descent) to obtain an optimal output. The classical computer needs to obtain the measurement results of the quantum computer before executing the optimization algorithm and determine the optimal output according to the measurement results.
Optionally, in other embodiments, the quantum computer may perform optimization using the prepared quantum states, execute a quantum gradient descent equal quantum optimization algorithm, and determine the optimal output.
The optimal output obtained with a classical computer or a quantum computer can be fed back to the application layer.
Fig. 3 is a schematic flow diagram of a typical quantum computation. As shown in fig. 3, quantum computation typically includes the following steps:
an initial state corresponding to the first part of data of the target task is generated by the first quantum wire 301.
And 302, performing unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, wherein the target operator corresponds to a second part of data of the target task, and the target operator comprises a first diagonal matrix and a second diagonal matrix.
The target task may be to determine a machine learning model (e.g., an image classification model, a semantic recognition model, an image recognition model, an emotion analysis model, etc.) based on supervised learning. The second part of data of the target task may be training data in a training data set, and the first part of data may be a label corresponding to the training data.
303, measuring the first part of the target quantum state to obtain a measurement result.
And 304, determining whether the measurement result meets a preset condition.
If the measurement result satisfies the predetermined condition, step 305 is executed.
If the measurement result does not satisfy the predetermined condition, the steps 301 to 304 are executed again until the measurement result satisfies the predetermined condition.
Optionally, in some embodiments, in the process of re-executing step 302, the target operator in step 302 may be an updated target operator.
305, measuring a second portion of the target quantum state using the Hermite operator
And 306, determining the result of the target task according to the measurement result.
Alternatively, in some embodiments, as shown in fig. 3, step 301, step 302, step 303, and step 305 may be implemented by the quantum computer 110 in the system 100 shown in fig. 1. Step 304 and step 306 may be implemented by classical computer 120 in system 100 as shown in fig. 1.
Alternatively, in other embodiments, step 301, step 302, step 303, and step 305 shown in fig. 3 may be implemented by the quantum computer 110 in the system 100 shown in fig. 1. Step 304 and/or step 306 may also be implemented by the quantum computer 110 in the system 100 as shown in fig. 1.
For convenience of description, the first partial data and the second partial data of the target task may be described in the form of a linear equation system. The first part data b and the second part data A can be expressed as a linear equation system
Figure BDA0002297614930000061
The embodiments of the present application will be described in detail with reference to the steps shown in fig. 3.
System of linear equations
Figure BDA0002297614930000062
Can be represented as
Figure BDA0002297614930000063
Wherein symbol->The right-hand vector is represented as the right-hand vector,
Figure BDA0002297614930000064
(i.e., the second portion of data for the target task) is the coefficient matrix of the system of linear equations, | b>(i.e., the first portion of data for the target task) is a constant term of the system of linear equations, | b>Is a column vector, | x>Representing a solution to the system of linear equations.
Alternatively, in some embodiments,
Figure BDA0002297614930000065
(i.e., the second portion of data for the target task) is a sparse matrix.
Alternatively, in some embodiments,
Figure BDA0002297614930000066
is less than or equal to
Figure BDA0002297614930000067
Wherein N represents a coefficient matrix
Figure BDA0002297614930000068
Of (c) is calculated. In other words, the matrix
Figure BDA0002297614930000071
Only one row with the most non-zero elements
Figure BDA0002297614930000072
A non-zero element.
The initial state corresponding to the target task is the state corresponding to the linear equation set
Figure BDA0002297614930000073
And (4) corresponding to an initial state.
Optionally, in some embodiments, the initial state may include three initial state elements, which are a first initial state element, a second initial state element, and a third initial state element. The first initial state element may be | b>. Suppose | b>Comprises W elements (W is a positive integer greater than 1), and the first initial state element can pass through log2W quantum ratio specially madeAnd (4) preparing.
Optionally, in some embodiments, the second initial state element may be
Figure BDA0002297614930000074
The third initial state element may be
Figure BDA0002297614930000075
The number of components of the quantum state of the second initial state element is 2L +1, the number of components of the quantum state of the third initial state element is 2T +1, m denotes the number of the vector corresponding to the second initial state element, and m' denotes the number of the vector corresponding to the third initial state element. In other words, | m>Is the m-th qubit, | m'>Is the m' th qubit in the third initial state element of the initial state. L is a power of 2 to P, T is a power of 2 to Q, and P and Q are positive integers greater than or equal to 1. Optionally, in some embodiments, P and Q are positive integers greater than or equal to 4.
In this case, the initial state | Ψ0>Can be expressed as:
Figure BDA0002297614930000076
fig. 4 is a schematic diagram of a quantum wire used to generate an initial state. A classical computer can generate a quantum wire as shown in fig. 4 according to equation 1.1 and control the quantum computer to implement the gate operation in the quantum wire as shown in fig. 4. For convenience of description, the quantum wire shown in fig. 4 will be referred to as a first quantum wire hereinafter.
First quantum wire 400 shown in fig. 4 may be divided into sub-quantum wire 410, sub-quantum wire 420, and sub-quantum wire 430.
The sub-Quantum circuit 410 includes a Quantum Random Access Memory (QRAM) 411. QRAM 411 is used to implement the preparation of the first initial state element | b > of the initial state.
The sub-quantum wire 420 includes a Hadamard gate (also referred to as H-gate) 421, an H-gate 422, a phase flip gate (also referred to as Z-gate) 423, an H-gate 424 and a measurement port 425.
log2(L) +1 qubit |0>The following quantum states can be prepared by the action of the H-gate 421:
Figure BDA0002297614930000077
if will | ψ1>Component |1 in>|0>The following quantum states can be obtained by flipping:
Figure BDA0002297614930000078
qubit |0>The following quantum states can be prepared by the action of the H-gate 422
Figure BDA0002297614930000079
Z gate 423 for quantum state | ψ1>And
Figure BDA00022976149300000710
acting to obtain the following quantum states:
|0>|ψ1>+|1>|ψ2>(formula 1.3).
|0>|ψ1>+|1>|ψ2>Through the action of the H-gate 425, the following quantum states can be prepared:
|0>(|ψ1>+|ψ2>)+|1>(|ψ1>-|ψ2>) (equation 1.4).
At measurement port 425 for quantum state |0>(|ψ1>+|ψ2>)+|1>(|ψ1>-|ψ2>) The measurement is performed. If the measured result is |0>Then, it means that the sub-quantum wire 420 realizes the second initial state element of the initial state
Figure BDA0002297614930000081
And (4) preparing. If the measured result is |1>Then it means that the sub-quantum wire 420 has not realized the initialSecond initial state element of state
Figure BDA0002297614930000082
And (4) preparing. In this case, the measurement continues at measurement port 425 until measurement |0 is obtained>。
The sub-quantum wire 430 includes an H gate 431, an H gate 432, a Z gate 433, an H gate 434, and a measurement port 435.
The sub-quantum circuit 430 implements the third element of the initial state
Figure BDA0002297614930000083
Is similar to the process of the sub-quantum wire 420 implementing the second initial state element, except that |0 is input to the H-gate 431>Is log2(T) +1, which will not be described herein for brevity.
In the initial state | Ψ0>Then, the initial state | Ψ0>And (5) carrying out evolution to obtain a target quantum state. Specifically, the target quantum state may be obtained by performing unitary transformation on the initial state using a target operator.
The target operator corresponds to the target task. The target operator may comprise a second part of the data of the target task, i.e. a coefficient matrix in a system of linear equations
Figure BDA0002297614930000084
The target operator may also include a first diagonal matrix and a second diagonal matrix. The first diagonal matrix corresponds to the second initial state element. The first diagonal matrix corresponds to the third initial state element.
The first diagonal matrix
Figure BDA0002297614930000085
May be a square matrix of 2L + 1.
Optionally, in some embodiments, the first diagonal matrix
Figure BDA0002297614930000086
Can be expressed as:
Figure BDA0002297614930000087
it can be seen that this first diagonal matrix
Figure BDA0002297614930000088
The elements on the main diagonal are [ -L, -L +1, …, -1,0,1, …, L-1, L]。
Equation 1.5 is the first diagonal matrix for m over a range of values from-L to L
Figure BDA0002297614930000089
If m ranges from L to-L, the first diagonal matrix
Figure BDA00022976149300000810
Can be expressed as:
Figure BDA00022976149300000811
it can be seen that this first diagonal matrix
Figure BDA0002297614930000091
The elements on the main diagonal are [ L, L-1, …,1,0, -1, …, -L +1, -L]。
The second diagonal matrix
Figure BDA0002297614930000092
May be a square matrix of 2T + 1.
Optionally, in some embodiments, the second diagonal matrix
Figure BDA0002297614930000093
Can be expressed as:
Figure BDA0002297614930000094
can seeOut of the second diagonal matrix
Figure BDA0002297614930000095
The elements on the main diagonal are [ -T, -T +1, …, -1,0,1, …, T-1, T]。
Equation 1.5 is a second diagonal matrix in the case where m' has a value ranging from-T to T
Figure BDA0002297614930000096
If m' has a value ranging from L to-L, the second diagonal matrix
Figure BDA0002297614930000097
Can be expressed as:
Figure BDA0002297614930000098
it can be seen that this second diagonal matrix
Figure BDA0002297614930000099
The elements on the main diagonal are [ T, T-1, …,1,0, -1, …, -T +1, -T]。
Alternatively, in some embodiments, the target operator may be
Figure BDA00022976149300000910
Wherein j represents an imaginary unit, γ represents a calculation parameter,
Figure BDA00022976149300000911
the coefficient matrix representing the system of linear equations (i.e. the second part of the data of the target task),
Figure BDA00022976149300000912
the square of the matrix is represented as,
Figure BDA00022976149300000913
the first diagonal matrix is represented by a matrix of,
Figure BDA00022976149300000914
the second diagonal matrix is represented by a matrix of,
Figure BDA00022976149300000915
representing the kronecker product.
Using target operators
Figure BDA00022976149300000916
For the initial state | Ψ as in equation 1.10>Performing a unitary transformation, a target quantum state can be obtained as follows:
Figure BDA00022976149300000917
wherein L, T, m and m' have the same meanings as above, gamma denotes a calculation parameter, and lambdaiCoefficient matrix of representation
Figure BDA00022976149300000918
I-th eigenvalue of, biRepresents | b>The ith element in (1), eiDenotes the ith basis vector. i is a positive integer greater than or equal to 1 and less than or equal to W, the constant term | b of the system of linear equations>(i.e., the first portion of data of the target task) includes W elements, W being a positive integer greater than or equal to 1.
FIG. 5 is a diagram of a corresponding target operator
Figure BDA00022976149300000919
Schematic diagram of a quantum wire of (1). Classic computer can be based on target operators
Figure BDA00022976149300000920
A quantum wire as shown in fig. 5 is generated, and a quantum computer is controlled to implement the gate operation in the quantum wire as shown in fig. 5. For convenience of description, the quantum wire shown in fig. 5 will be referred to as a second quantum wire hereinafter. The second quantum wire may be divided into log2(L)×log2(T) a sub-quantum wire.
Second quantity as shown in fig. 5Subline 500 shows only log2(L)×log2Three of (T) sub-quantum wires, sub-quantum wire 510, sub-quantum wire 520, and sub-quantum wire 530, respectively, where sub-quantum wire 510 is log2(L)×log2(T) the first of the sub-quantum-wires, sub-quantum-wire 520 is log2(L)×log2(n) th sub-quantum line in (T) th sub-quantum line1+1)×(n2+1) sub-quantum wire, sub-quantum wire 530 being the log2(L)×log2Log of (T) sub-quantum wires2(L)×log2(T) sub-quantum wires. log (log)2(L)×log2The operators of the intermediate control U-gates (513, 523, 533) in different ones of the (T) sub-quantum wires are different.
As shown in fig. 5, a sub-quantum-line 510 includes four bit-flipping gates (also referred to as X-gates), X-gate 511, X-gate 512, X-gate 514, and X-gate 515. Sub-quantum-line 510 also includes a control U-gate 513. The operator in controlling the U-gate 513 as shown in FIG. 5 is U20+0。
Sub-quantum wire 520 includes four X-gates, X-gate 521, X-gate 522, X-gate 524, and X-gate 525, respectively. Sub-quantum wire 520 also includes a control U-gate 523. The operator in the control U gate 523 shown in FIG. 5 is U
Figure BDA0002297614930000104
In which the qubits in the middle set of lines in the wiring diagram (i.e., the set of lines connected to the sub-quantum-line 420) except for the first sign bit are expressed in {0,1,2,', log }2(L) -1} order, n1Indicating the permutation number of the control bits, n2Indicating the sequence number of the qubits in the set of lines connected to sub-quantum-line 430.
The sub-quantum-line 530 includes four X-gates, X-gate 531, X-gate 532, X-gate 534, and X-gate 535, respectively. Sub-quantum-line 510 also includes a control U-gate 533. The operator in controlling the U gate 533 as shown in FIG. 5 is UL+TL and T have the same meanings as those of L and T described above.
U of the control U gate 513, the control U gate 523 and the control U gate 533 is
Figure BDA0002297614930000103
As shown in fig. 5, the four X gates in each sub-quantum wire are symmetric with respect to the control U gate. Taking sub-quantum-line 510 as an example, X-gate 511 and X-gate 515 controlled by 516 quantum-line in 0 state and 517 quantum-line in 1 state, X-gate 512 and X-gate 514 controlled by 516 quantum-line in 1 state and 517 quantum-line in 0 state, both act on a set of lines connected to sub-quantum-line 410.
The input of the second quantum wire as shown in fig. 5 is the initial state | Ψ as in equation 1.10>The output is the target quantum state as shown in equation 2.1. The unitary transformation of the initial state to obtain the target quantum state is realized by a second quantum circuit as shown in fig. 5.
After the target quantum state shown in equation 2.1 is obtained, a first portion of the target quantum state may be measured to determine whether the measurement result satisfies a predetermined condition. For example, in some embodiments, it may be determined whether the measured measurement φ, which measures the first portion of the target quantum state, satisfies the following condition:
Figure BDA0002297614930000101
if the measurement result φ satisfies equation 3.1, a second portion of the target quantum state may be determined. If the measurement result phi does not satisfy formula 3.1, steps 301 to 303 may be repeated until the measurement result phi of step 303 satisfies formula 3.1. Optionally, in some embodiments, the target operator is updated during the process of repeating steps 301 to 303
Figure BDA0002297614930000102
The initial state shown in the formula 1.1 is subjected to unitary conversion again by using the quantum circuit corresponding to the updated target operator to obtain an updated target quantum state, and the first part of the updated target quantum state is continuously measured until the measurement result phi meets the formula3.1。
Optionally, in some embodiments, the target operator is updated
Figure BDA0002297614930000111
The calculation parameter γ in (1) can be an estimation of an eigenvalue range of an adjustment coefficient matrix of the current measurement success probability, and then the success probability after the final improvement of the magnitude of γ is optimized by the constraint of formula 3.1.
The result of the target task may be obtained using a quantum wire as shown in fig. 6. Quantum wire 600 shown in fig. 6 may be divided into three sub-quantum wires, sub-quantum wire 601, sub-quantum wire 602, and sub-quantum wire 603, respectively. The sub-quantum line 601 is used for measuring a target quantum state and outputting a measurement result. If the measurement result satisfies the predetermined condition, ρ output from sub-quantum line 601 is the second part of the target quantum state, and output from sub-quantum line 603 is the third part of the target quantum state.
The sub-quantum wires 602 as shown in fig. 6 include a Quantum Fourier Transform (QFT) module and a plurality of measurement ports.
After the second portion of the target quantum state is obtained, the second portion of the target quantum state may be measured using the Hermite operator. The measurement result is Tr [ rho M [ ]]Where Tr represents a trace, M represents the Hermite operator, and ρ represents a second portion of the target quantum state. And measuring the second part of the target quantum state for multiple times by using the Hermite operator, wherein the average value of the multiple measurements is the result of the target task. The result of the target task may be expressed as xTMx. The Hermitian operator and
Figure BDA0002297614930000112
to change the principle of
Figure BDA0002297614930000113
The second portion of the target quantum state may be represented as:
Figure BDA0002297614930000114
by working up the molecular part in equation 3.2, one can obtain:
Figure BDA0002297614930000115
the second fraction ρ of the target quantum state may be expressed as:
Figure BDA0002297614930000116
symbol ≧ represents a proportional ratio.
It can be demonstrated that:
Figure BDA0002297614930000117
the sign-indicates an approximate proportion.
Based on equation 3.5, using
Figure BDA0002297614930000118
Alternative to that in equation 3.4
Figure BDA0002297614930000119
Obtaining:
Figure BDA00022976149300001110
the number of quantum gates and the number of quantum bits of the second quantum wire shown in fig. 5 are in a polynomial relationship. Therefore, the complexity of the result of solving the target task by using the technical scheme is
Figure BDA00022976149300001111
Where e represents the operating accuracy of U in the second quantum wire,
Figure BDA0002297614930000121
representing by vectors
Figure BDA0002297614930000122
Is a characteristic polynomial of the equation being solved.
Fig. 7 is a quantum wire for determining a target task. Quantum wire 700 shown in fig. 7 includes first quantum wire 400 shown in fig. 4, second quantum wire 500 shown in fig. 5, and third quantum wire 600 shown in fig. 6.
Those skilled in the art will appreciate that equation 1.1 shows only one representation of the initial state. Alternatively, in other embodiments, the initial state can also be expressed as
Figure BDA0002297614930000123
Accordingly, in the case where the generated initial state is formula 4.1, the target operator for performing the unitary transformation on the initial state is
Figure BDA0002297614930000124
Wherein U isaIs a random unitary matrix under the dimension of the quantum state space.
Accordingly, the quantum wire shown in fig. 4 is one possible quantum wire corresponding to the initial state of equation 1.1. It will be appreciated by those skilled in the art that other quantum wires may be used to generate the initial state based on the equation 1.1. For example, sub-quantum wire 420 and/or sub-quantum wire 430 shown in fig. 4 may be replaced with a quantum wire as shown in fig. 8. As another example, sub-quantum wire 420 and/or sub-quantum wire 430 shown in fig. 4 may be replaced with a quantum wire as shown in fig. 9.
Similarly, at the target operator
Figure BDA0002297614930000125
In the case of (3), in addition to obtaining the target quantum state by using the quantum wire pair initial state unitary transformation shown in fig. 5, it is also possible to determine that the target quantum state is obtained by other quantum wire pair initial state unitary transformations. For example, the initial state shown in equation 1.1 may be unitary transformed by using quantum wires as shown in fig. 10, resulting in the initial state shown in equation 2.1The target quantum state of (1). For another example, the quantum line shown in fig. 11 may be used to perform unitary transformation on the initial state shown in equation 1.1, so as to obtain the target quantum state shown in equation 2.1.
The target task in the above embodiment is a machine learning model obtained by a supervised learning manner, and the data of the corresponding task is a training data set.
Optionally, the embodiment of the present application may also be used for multimedia data decoding. In this case, the first part of the task data is data to be decoded (or may be referred to as encoded data), and the second part of the task data is a transformation matrix corresponding to the encoding method.
Optionally, the embodiment of the present application may also be applied to a statistical or machine learning problem that can be based on a least squares method. In this case, the task data is a plurality of sets of observed data. Each of the plurality of sets of data may be divided into two parts, a first part of the task data is composed of a first part of the plurality of sets of data, and a second part of the task data is composed of a second part of the plurality of sets of data. For example, the first portion of data may include a score of the image, and the second portion of data may include a size of the image, a contrast of the image, a resolution of the image, and so forth. As another example, the first portion of data may include a voice score, and the second portion of data may include a frequency range of the voice, a highest frequency of the voice, a lowest frequency of the voice, and so on.
Fig. 12 is a schematic structural block diagram of a quantum computer provided according to an embodiment of the present application. As shown in fig. 12, the quantum computer 1200 includes an initial state preparation module 1201, a unitary transformation module 1202, and a measurement module 1203.
And an initial state preparation module 1201, configured to generate an initial state corresponding to the first part of data of the target task through the first quantum wire.
The unitary transformation module 1202 is configured to perform unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, where the target operator corresponds to a second part of data of the target task, and the target operator includes a first diagonal matrix and a second diagonal matrix.
A measuring module 1203 is configured to measure the first portion of the target quantum state to obtain a measurement result.
The measuring module 1203 is further configured to measure the second part of the target quantum state by using a hermitian to obtain a result of the target task, if the measurement result satisfies a predetermined condition.
The initial state preparation module 1201, the unitary transformation module 1202, and the measurement module 1203 may be implemented by a throughput processor. For the specific functions and benefits of the initial state preparation module 1201, the unitary transformation module 1202, and the measurement module 1203, reference may be made to the above embodiments, and for brevity, detailed descriptions are omitted.
The chip in this embodiment of the application may be a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), a system on chip (SoC), a Central Processing Unit (CPU), a Network Processor (NP), a digital signal processing circuit (DSP), a Microcontroller (MCU), a programmable logic controller (PLD), other programmable logic devices, a discrete gate or transistor logic device, a discrete hardware component, or other integrated chips.
In implementation, the steps of the above method may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The steps of a method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware processor, or may be implemented by a combination of hardware and software modules in a processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor. To avoid repetition, it is not described in detail here.
It should be noted that the processor in the embodiments of the present application may be an integrated circuit chip having signal processing capability. In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in a memory, and a processor reads information in the memory and completes the steps of the method in combination with hardware of the processor.
It will be appreciated that the memory in the embodiments of the subject application can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. The non-volatile memory may be a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can be Random Access Memory (RAM), which acts as external cache memory. By way of example, but not limitation, many forms of RAM are available, such as Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate SDRAM, enhanced SDRAM, SLDRAM, Synchronous Link DRAM (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.
According to the method provided by the embodiment of the present application, the present application further provides a computer program product, which includes: computer program code which, when run on a computer, causes the computer to perform the method of any of the embodiments shown in fig. 3.
According to the method provided by the embodiment of the present application, the present application also provides a computer readable medium, which stores program code, and when the program code runs on a computer, the computer is caused to execute the method of any one of the embodiments shown in fig. 3.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (20)

1. A method of processing data, comprising:
the quantum computer generates an initial state corresponding to the first part of data of the target task through a first quantum circuit;
the quantum computer performs unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, wherein the target operator corresponds to a second part of data of the target task, and the target operator comprises a first diagonal matrix and a second diagonal matrix;
the quantum computer measures a first part of the target quantum state to obtain a measurement result;
and under the condition that the measurement result meets a preset condition, the quantum computer measures the second part of the target quantum state by using a Hermite operator to obtain the result of the target task.
2. The method of claim 1, wherein the second portion of data is a sparse matrix.
3. The method of claim 1 or 2, wherein the initial state comprises a first initial state element, a second initial state element and a third initial state element, the first initial state element being a constant term | b > determined from the first portion of data, the second initial state element corresponding to the first diagonal matrix, and the third initial state element corresponding to the second diagonal matrix.
4. The method of claim 3, wherein the initial state is
Figure FDA0002297614920000011
Wherein | b>Is the first initial-state element and the second initial-state element,
Figure FDA0002297614920000012
is the second initial state element and is a second initial state element,
Figure FDA0002297614920000013
is the element in the third initial state,
where m denotes the number of the vector corresponding to the second initial state element, m' denotes the number of the vector corresponding to the third initial state element, L is the power P of 2, T is the power Q of 2, and P and Q are positive integers greater than or equal to 1.
5. The method of any one of claims 1 to 4, wherein the target operator is
Figure FDA0002297614920000014
Where j denotes an imaginary unit, γ denotes a calculation parameter,
Figure FDA0002297614920000015
is the square of the second portion of data,
Figure FDA0002297614920000016
representing a kronecker product, the first diagonal matrix is a 2L +1 square matrix, and the second diagonal matrix is a 2T +1 square matrix.
6. The method of claim 5,
Figure FDA0002297614920000017
Figure FDA0002297614920000021
7. the method of any one of claims 1 to 6, wherein the target quantum state is
Figure FDA0002297614920000022
Where L is the power P of 2, T is the power Q of 2, P and Q are positive integers greater than or equal to 1, gamma denotes a calculation parameter, and lambdaiI-th eigenvalue representing said second part of data, biRepresenting a constant term | b determined from the first partial data>The ith element in (1), eiRepresents the ith basis vector, m represents the serial number of the vector corresponding to the second initial state element in the initial state, m' represents the serial number of the vector corresponding to the third initial state element in the initial state, i is a positive integer greater than or equal to 1 and less than or equal to W, | b>Comprises W elements, wherein W is a positive integer which is greater than or equal to 1.
8. The method of claim 7, wherein the measurement results φ and γ λ satisfying the predetermined conditioniT and L have the following relationships:
Figure FDA0002297614920000023
9. the method of any one of claims 1 to 8, wherein the measuring a second portion of the target quantum state with the Hermite operator to obtain the result of the target task comprises:
and measuring the second part of the target quantum state for multiple times by using the hermitian operator to obtain a result of the target task, wherein the result of the target task is an average value of the multiple measurements, and the hermitian operator and the second part of data are relatively easy.
10. A quantum computer, comprising:
the initial state preparation module is used for generating an initial state corresponding to the first part of data of the target task through the first quantum circuit;
the unitary transformation module is used for performing unitary transformation on the initial state through a second quantum circuit corresponding to a target operator to obtain a target quantum state, wherein the target operator corresponds to a second part of data of the target task, and the target operator comprises a first diagonal matrix and a second diagonal matrix;
the measurement module is used for measuring the first part of the target quantum state to obtain a measurement result;
and the measuring module is further used for measuring the second part of the target quantum state by utilizing the Hermite operator under the condition that the measuring result meets a preset condition to obtain the result of the target task.
11. The quantum computer of claim 10, wherein the second portion of data is a sparse matrix.
12. The quantum computer of claim 10 or 11, wherein the initial state comprises a first initial state element, a second initial state element, and a third initial state element, the first initial state element being a constant term | b > determined from the first portion of data, the second initial state element corresponding to the first diagonal matrix, and the third initial state element corresponding to the second diagonal matrix.
13. The quantum computer of claim 12, wherein the initial state is
Figure FDA0002297614920000031
Wherein | b>Is the first initial-state element and the second initial-state element,
Figure FDA0002297614920000032
is the second initial state element and is a second initial state element,
Figure FDA0002297614920000033
is the element in the third initial state,
where m denotes the number of the vector corresponding to the second initial state element, m' denotes the number of the vector corresponding to the third initial state element, L is the power P of 2, T is the power Q of 2, and P and Q are positive integers greater than or equal to 1.
14. The quantum computer of any of claims 10 to 13, wherein the target operator is
Figure FDA0002297614920000034
Where j denotes an imaginary unit, γ denotes a calculation parameter,
Figure FDA0002297614920000035
representing the square of the second portion of data,
Figure FDA0002297614920000036
representing a kronecker product, the first diagonal matrix is a 2L +1 square matrix, and the second diagonal matrix is a 2T +1 square matrix.
15. The quantum computer of claim 14,
Figure FDA0002297614920000037
Figure FDA0002297614920000038
16. the quantum computer of any of claims 10 to 15, wherein the target quantum state is
Figure FDA0002297614920000039
Where L is the power P of 2, T is the power Q of 2, P and Q are positive integers greater than or equal to 1, gamma denotes a calculation parameter, and lambdaiI-th eigenvalue representing said second part of data, biRepresenting a constant term | b determined from the first partial data>The ith element in (1), eiRepresents the ith basis vector, m represents the serial number of the vector corresponding to the second initial state element in the initial state, m' represents the serial number of the vector corresponding to the third initial state element in the initial state, i is a positive integer greater than or equal to 1 and less than or equal to W, | b>Comprises W elements, wherein W is a positive integer which is greater than or equal to 1.
17. The quantum computer of claim 16, wherein the measurement results Φ and γ λ satisfying the preset conditioniT and L have the following relationships:
Figure FDA0002297614920000041
18. the quantum computer of any one of claims 10 to 17, wherein the measurement module is specifically configured to perform a plurality of measurements on the second part of the target quantum state using the hermitian to obtain the result of the target task, wherein the result of the target task is an average of the plurality of measurements, and the hermitian is reciprocal to the second part of data.
19. A chip, comprising: logic circuitry for coupling with an input/output interface through which data is transferred to perform the method of any one of claims 1-9.
20. A computer-readable medium, characterized in that the computer-readable medium has stored program code which, when run on a computer, causes the computer to perform the method according to any one of claims 1-9.
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CN113902118A (en) * 2021-09-29 2022-01-07 北京百度网讯科技有限公司 Quantum measurement equipment calibration method and device, electronic equipment and medium
CN115511094A (en) * 2021-06-23 2022-12-23 合肥本源量子计算科技有限责任公司 Quantum line execution result determining method and device and quantum computer operating system
WO2023061441A1 (en) * 2021-10-13 2023-04-20 合肥本源量子计算科技有限责任公司 Text quantum circuit determination method, text classification method, and related apparatus
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CN115511094A (en) * 2021-06-23 2022-12-23 合肥本源量子计算科技有限责任公司 Quantum line execution result determining method and device and quantum computer operating system
CN115511094B (en) * 2021-06-23 2023-06-02 合肥本源量子计算科技有限责任公司 Quantum circuit execution result determining method and device and quantum computer operating system
CN113902118A (en) * 2021-09-29 2022-01-07 北京百度网讯科技有限公司 Quantum measurement equipment calibration method and device, electronic equipment and medium
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