CN112882654B - Method, device, storage medium and computer equipment for prolonging EEPROM writing life - Google Patents
Method, device, storage medium and computer equipment for prolonging EEPROM writing life Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0616—Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a method, a device, a storage medium and computer equipment for prolonging the writing life of EEPROM, which comprises the following steps: presetting a space of a designated byte for cyclic storage, and marking each storage address; acquiring bit number information of recorded data, marking a first designated bit number as a high-order array, and sequentially storing data corresponding to each bit number in the high-order array at different storage addresses; setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and bit positions; data is written according to the memory matrix and the high-order array. Compared with the prior art, through the scheme, the matrix data type is provided, the storage address in the high-order array can write 1000 ten thousand times of data, meanwhile, the rule that the read operation does not lose the service life of the EEPROM is reasonably utilized, and the writing service life of the EEPROM can be prolonged from 10 ten thousand times to 1000 ten thousand times.
Description
Technical Field
The present invention relates to the field of storage devices, and in particular, to a method, an apparatus, a storage medium, and a computer device for extending the write lifetime of an EEPROM.
Background
In embedded system designs, counting or timing applications, such as electricity meter number, water meter number, sensor usage time, etc., are often encountered, and these data are required to be recorded and stored in real time, and are becoming larger and larger. But EEPROM (Electrically Erasable Programmable read only memory), charged EEPROM, has a life-time limit of typically 10 tens of thousands of times. Therefore, how to solve the technical problem that the hardware requirement exceeds the hardware life limit is very important.
Disclosure of Invention
The invention mainly aims to provide a method for prolonging the writing life of an EEPROM, which aims to solve the technical problem of prolonging the service life of the EEPROM.
The invention provides a method for prolonging the writing life of EEPROM, comprising the following steps:
presetting a space of a designated byte for cyclic storage, and marking each storage address;
the method comprises the steps of obtaining bit number information of recorded data, marking a first designated bit number as a high-order array, and sequentially storing data corresponding to each bit number in the high-order array at different storage addresses, wherein when the data is written, after the number of times of writing the data reaches the number corresponding to the first designated bit number, the data of the first designated bit number is added by one;
setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and bit positions;
and writing data according to the storage matrix and the high-order array, wherein the first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing the bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by ten-bit data.
The invention also provides a device for prolonging the writing life of the EEPROM, which comprises:
the first setting module is used for presetting a space of a designated byte for cyclic storage and marking each storage address;
the system comprises an acquisition module, a storage module and a storage module, wherein the acquisition module is used for acquiring bit number information of recorded data, marking a first designated bit number as a high bit array, sequentially storing data corresponding to each bit number in the high bit array in different storage addresses, and adding one to the data of the first designated bit number after the data writing times reach the times corresponding to the first designated bit number when the data is written;
the second setting module is used for setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and one bit;
the storage module is used for writing data according to the storage matrix and the high-order array, wherein a first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing the bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by ten-bit data.
The present invention also provides a storage medium which is a computer readable storage medium having a computer program stored thereon, the computer program when executed implementing a method of extending EEPROM write life as described above.
The invention also provides a computer device comprising a processor, a memory and a computer program stored on the memory and operable on the processor, the processor implementing a method of extending EEPROM write life as described above when executing the computer program.
The invention has the beneficial effects that: data is written through the memory matrix and the high order array. When the memory address in the memory matrix is used up, data is written in the high-order array, hundred bits are written once every 100 times, kilobits are written once every 1000 times, and so on, to ten-thousand bits are written once every 10000000, and then the data in the memory matrix is erased. Through the scheme, the matrix data type is provided, the storage address in the high-order array can write 1000 ten thousand times of data, meanwhile, the rule that the read operation does not lose the service life of the EEPROM is reasonably utilized, and the writing service life of the EEPROM can be prolonged from 10 ten thousand times to 1000 ten thousand times.
Drawings
FIG. 1 is a flow chart of a first embodiment of a method for extending EEPROM write life of the present invention;
FIG. 2 is a schematic diagram of the high-order array of FIG. 1;
FIG. 3 is a schematic diagram of the memory matrix of FIG. 1;
FIG. 4 is a schematic diagram of a first embodiment of an apparatus for extending EEPROM write life in accordance with the present invention;
FIG. 5 is a block diagram illustrating an embodiment of a storage medium provided herein;
fig. 6 is a block diagram of an embodiment of a computer device provided in the present application.
Description of the reference numerals:
1. a first setting module; 2. an acquisition module; 3. a second setting module; 4. a storage module;
100. a storage medium; 200. a computer program; 300. a computer device; 400. a processor.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1 to 3, the present invention provides a method of extending the write life of an EEPROM, comprising:
s1: presetting a space of a designated byte for cyclic storage, and marking each storage address;
s2: the method comprises the steps of obtaining bit number information of recorded data, marking a first designated bit number as a high-order array, and sequentially storing data corresponding to each bit number in the high-order array at different storage addresses, wherein when the data is written, after the number of times of writing the data reaches the number corresponding to the first designated bit number, the data of the first designated bit number is added by one;
s3: setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and bit positions;
s4: and writing data according to the storage matrix and the high-order array, wherein the first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing the bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by ten-bit data.
In the embodiment of the present invention, for example, there is a decimal number of 8 digits, the initial value is 0, and if the number of recordings per second is increased by 1, the data writing process is as follows: the space of 116 bytes is preset for cyclic storage, and the index of the storage address is from 0 to 115. The recorded data is a decimal number of 8 bits, the number of bits including tens of millions, hundred thousand, tens, and bits. In the embodiment of the invention, tens of millions to hundreds of bits are marked as the high-order digit group, the data from tens of millions to hundreds of bits are sequentially stored in the 0 th to 5 th storage addresses, the corresponding bits have carry at each time, the corresponding addresses of the EEPROM are written once, the hundreds of bits can be calculated to be written once every 100 times, the thousands of bits are written once every 1000 times, and the like, and the writing time of the tens of millions of bits is up to 10000000 times, so the writing life of the EEPROM storage address unit used by the high-order digit group is long enough. In the embodiment of the invention, ten bits and bit bits open up a 10 x 11 memory matrix, corresponding to addresses from 6 th to 115 th, each row of the memory matrix has 11 memory addresses, the first memory address of each row is used for storing ten bits of data, and the next 10 memory addresses are used for storing bit bits of data. In the embodiment of the invention, the storage address of the ten bits is specified according to the hundred-bit data, namely, the storage pointer of the ten bits is the hundred bits, and the storage address of the bits is specified according to the ten-bit data, namely, the storage pointer of the bits is the ten bits.
Referring to FIG. 3, by way of example, if the hundred bits are 0 in this example, ten bits are stored into the first row; if the hundred bits are 1 in this example, ten bits are stored to the second row. And so on. Under the condition that the hundred bits are unchanged, if the ten bits are changed, the data are changed at the original position, and the data positions of the ten bits are not required to be changed. Under the condition that the hundred bits are changed, the ten bits are replaced to corresponding line number storage data according to the changed hundred bits.
Likewise, if ten bits are 0 in this example, then the first column of the number of bit columns is stored; if ten bits are 1 in this example, the second column of the number of bit columns is stored. And so on. Under the condition that ten bits are unchanged, if the bits are changed, the data are changed at the original positions, and the data positions of the bits are not required to be changed. In the case of a ten bit change, then the bit is changed to the corresponding column number to store data.
If the recorded data is a decimal number 2345805, the upper bits have 5 bits, the hundred bits are 8, the ten bits are 0, and the bit is 5, the ten bits of data are stored in row 9 in the memory matrix address. Since ten bits are 0, bit data is stored to 1 st column among the bit columns.
For another example, the existing data changes from decimal 2345805 to 2345806. Under the condition that the ten-bit data is unchanged, only the single-bit data is changed, the storage position of the single-bit data is unchanged, and the number is changed from original 5 to 6.
For another example, the existing data changes from a decimal number 2345805 to 2345815. When the ten-bit data is changed, the position where the single-bit data is stored is changed from the original 1 st column of the number of bit columns to the 2 nd column of the number of bit columns, and the number is still the original 5.
For another example, if the record data is a decimal number 2345382, the upper bits have 5 bits, the hundred bits have 3, the ten bits have 8, and the bit has 2, the ten bits 8 are stored in the 4 th row of the memory matrix. Bit data 2 is stored in row 3, column 9 of the bit column in the memory matrix.
To sum up, data is written by storing the matrix and the high-order array. When the memory address in the memory matrix is used up, data is written in the high-order array, hundred bits are written once every 100 times, kilobits are written once every 1000 times, and so on, to ten-thousand bits are written once every 10000000, and then the data in the memory matrix is erased. Through the scheme, the matrix data type is provided, the storage address in the high-order array can write 1000 ten thousand times of data, meanwhile, the rule that the read operation does not lose the service life of the EEPROM is reasonably utilized, and the writing service life of the EEPROM can be prolonged from 10 ten thousand times to 1000 ten thousand times.
Referring to fig. 4, the present invention also provides an apparatus for extending the write life of an EEPROM, comprising:
a first setting module 1, configured to preset a space of a specified byte for cyclic storage, and mark each storage address;
the acquisition module 2 is used for acquiring bit number information of the recorded data, marking a first designated bit number as a high bit array, and sequentially storing data corresponding to each bit number in the high bit array at different storage addresses, wherein when the data is written, after the number of times of writing the data reaches the number corresponding to the first designated bit number, the data of the first designated bit number is added by one;
a second setting module 3, configured to set a storage matrix according to a second specified number of bits, where the second specified number of bits is different from the first specified number of bits, and the second specified number of bits includes ten bits and one bit;
and the storage module 4 is used for writing data according to the storage matrix and the high-order array, wherein the first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing the bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by ten-bit data.
In the embodiment of the present invention, for example, there is a decimal number of 8 digits, the initial value is 0, and if the number of recordings per second is increased by 1, the data writing process is as follows: the space of 116 bytes is preset for cyclic storage, and the index of the storage address is from 0 to 115. The recorded data is a decimal number of 8 bits, the number of bits including tens of millions, hundred thousand, tens, and bits. In the embodiment of the invention, tens of millions to hundreds of bits are marked as the high-order digit group, the data from tens of millions to hundreds of bits are sequentially stored in the 0 th to 5 th storage addresses, the corresponding bits have carry at each time, the corresponding addresses of the EEPROM are written once, the hundreds of bits can be calculated to be written once every 100 times, the thousands of bits are written once every 1000 times, and the like, and the writing time of the tens of millions of bits is up to 10000000 times, so the writing life of the EEPROM storage address unit used by the high-order digit group is long enough. In the embodiment of the invention, ten bits and bit bits open up a 10 x 11 memory matrix, corresponding to addresses from 6 th to 115 th, each row of the memory matrix has 11 memory addresses, the first memory address of each row is used for storing ten bits of data, and the next 10 memory addresses are used for storing bit bits of data. In the embodiment of the invention, the storage address of the ten bits is specified according to the hundred-bit data, namely, the storage pointer of the ten bits is the hundred bits, and the storage address of the bits is specified according to the ten-bit data, namely, the storage pointer of the bits is the ten bits.
Referring to FIG. 3, by way of example, if the hundred bits are 0 in this example, ten bits are stored into the first row; if the hundred bits are 1 in this example, ten bits are stored to the second row. And so on. Under the condition that the hundred bits are unchanged, if the ten bits are changed, the data are changed at the original position, and the data positions of the ten bits are not required to be changed. Under the condition that the hundred bits are changed, the ten bits are replaced to corresponding line number storage data according to the changed hundred bits.
Likewise, if ten bits are 0 in this example, then the first column of the number of bit columns is stored; if ten bits are 1 in this example, the second column of the number of bit columns is stored. And so on. Under the condition that ten bits are unchanged, if the bits are changed, the data are changed at the original positions, and the data positions of the bits are not required to be changed. In the case of a ten bit change, then the bit is changed to the corresponding column number to store data.
If the recorded data is a decimal number 2345805, the upper bits have 5 bits, the hundred bits are 8, the ten bits are 0, and the bit is 5, the ten bits of data are stored in row 9 in the memory matrix address. Since ten bits are 0, bit data is stored to 1 st column among the bit columns.
For another example, the existing data changes from decimal 2345805 to 2345806. Under the condition that the ten-bit data is unchanged, only the single-bit data is changed, the storage position of the single-bit data is unchanged, and the number is changed from original 5 to 6.
For another example, the existing data changes from a decimal number 2345805 to 2345815. When the ten-bit data is changed, the position where the single-bit data is stored is changed from the original 1 st column of the number of bit columns to the 2 nd column of the number of bit columns, and the number is still the original 5.
For another example, if the record data is a decimal number 2345382, the upper bits have 5 bits, the hundred bits have 3, the ten bits have 8, and the bit has 2, the ten bits 8 are stored in the 4 th row of the memory matrix. Bit data 2 is stored in row 3, column 9 of the bit column in the memory matrix.
To sum up, data is written by storing the matrix and the high-order array. When the memory address in the memory matrix is used up, data is written in the high-order array, hundred bits are written once every 100 times, kilobits are written once every 1000 times, and so on, to ten-thousand bits are written once every 10000000, and then the data in the memory matrix is erased. Through the scheme, the matrix data type is provided, the storage address in the high-order array can write 1000 ten thousand times of data, meanwhile, the rule that the read operation does not lose the service life of the EEPROM is reasonably utilized, and the writing service life of the EEPROM can be prolonged from 10 ten thousand times to 1000 ten thousand times.
Referring to fig. 5, the present application also provides a storage medium 100, in which a computer program 200 is stored which, when run on a computer, causes the computer to perform the method of extending EEPROM write life described in the above embodiments.
Referring to fig. 6, the present application also provides a computer device 300 containing instructions that, when run on the computer device 300, cause the computer device 300, via its internally disposed processor 400, to perform the method of extending EEPROM write life described in the above embodiments.
Those skilled in the art will appreciate that the multi-card terminal file downloading method and apparatus described above for performing one or more of the methods described herein. These devices may be specially designed and constructed for the required purposes, or may comprise known devices in general purpose computers. These devices have computer programs or applications stored therein that are selectively activated or reconfigured. Such a computer program may be stored in a device (e.g., a computer) readable medium or any type of medium suitable for storing electronic instructions and respectively coupled to a bus, including, but not limited to, any type of disk (including floppy disks, hard disks, optical disks, CD-ROMs, and magneto-optical disks), ROMs (Read-Only memories), RAMs (Random Access Memory, random access memories), EPROMs (Erasable Programmable Read-Only memories), EEPROMs (Electrically Erasable Programmable Read-Only memories), flash memories, magnetic cards, or optical cards. That is, a readable medium includes any medium that stores or transmits information in a form readable by a device (e.g., a computer).
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes using the descriptions and drawings of the present invention or directly or indirectly applied to other related technical fields are included in the scope of the invention.
Claims (4)
1. A method of extending the write life of an EEPROM comprising:
presetting a space of a designated byte for cyclic storage, and marking each storage address;
the method comprises the steps of obtaining bit number information of recorded data, marking a first designated bit number as a high-order array, and sequentially storing data corresponding to each bit number in the high-order array at different storage addresses, wherein when the data is written, after the number of times of writing the data reaches the number corresponding to the first designated bit number, the data of the first designated bit number is added by one;
setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and bit bits;
and writing data according to the storage matrix and the high-order array, wherein a first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by the ten-bit data.
2. An apparatus for extending the write life of an EEPROM comprising:
the first setting module is used for presetting a space of a designated byte for cyclic storage and marking each storage address;
the data storage device comprises an acquisition module, a storage address and a storage module, wherein the acquisition module is used for acquiring bit number information of recorded data, marking a first designated bit number as a high bit array, sequentially storing data corresponding to each bit number in the high bit array at different storage addresses, and adding one to the data of the first designated bit number after the data writing times reach the times corresponding to the first designated bit number when the data is written;
the second setting module is used for setting a storage matrix according to a second designated bit number, wherein the second designated bit number is different from the first designated bit number, and the second designated bit number comprises ten bits and bit positions;
the storage module is used for writing data according to the storage matrix and the high-order array, wherein a first storage address of each row of the storage matrix is used for storing ten-bit data, the rest is used for storing the bit data, the storage address of the ten-bit data is designated by hundred-bit data, and the storage address of the bit data is designated by the ten-bit data.
3. A storage medium, characterized in that it is a computer-readable storage medium, on which a computer program is stored, which computer program, when executed, implements the method of extending the write life of an EEPROM according to claim 1.
4. A computer device comprising a processor, a memory, and a computer program stored on the memory and executable on the processor, the processor implementing the method of extending EEPROM write life of claim 1 when the computer program is executed by the processor.
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| JP2848119B2 (en) * | 1992-03-31 | 1999-01-20 | 日本精機株式会社 | Electronic odometer |
| JP2012226621A (en) * | 2011-04-20 | 2012-11-15 | Panasonic Corp | Measuring device, watt-hour meter, and writing method |
| CN103487619B (en) * | 2013-07-16 | 2016-09-07 | 深圳市航天泰瑞捷电子有限公司 | electric energy data storage method |
| US20160110113A1 (en) * | 2014-10-17 | 2016-04-21 | Texas Instruments Incorporated | Memory Compression Operable for Non-contiguous write/read Addresses |
| CN106647699B (en) * | 2016-12-08 | 2019-03-22 | 中国北方发动机研究所(天津) | A kind of engine hour recording method and device based on non-volatile storage |
| CN107861687B (en) * | 2017-10-13 | 2020-09-11 | 华立科技股份有限公司 | Method for realizing bit-by-bit storage of electric quantity decimal of electric meter on FLASH memory |
| CN110827440A (en) * | 2018-08-10 | 2020-02-21 | 苏州欧菲光科技有限公司 | Driving mileage recording method, driving mileage recording system and automobile |
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