CN112865749A - Design method of variable fractional delay filter with symmetric coefficients - Google Patents

Design method of variable fractional delay filter with symmetric coefficients Download PDF

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CN112865749A
CN112865749A CN202110060819.7A CN202110060819A CN112865749A CN 112865749 A CN112865749 A CN 112865749A CN 202110060819 A CN202110060819 A CN 202110060819A CN 112865749 A CN112865749 A CN 112865749A
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filter
fractional delay
coefficient
design method
coefficients
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邹正
李全越
赵紫稷
廖卫东
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724th Research Institute of CSIC
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks

Abstract

The invention relates to a design method of a variable fractional delay filter with symmetric coefficients, which is particularly suitable for the field of broadband phased array signal processing. Aiming at the defect that the filter has higher order when certain performance is realized by the existing design method, so that the resource consumption is higher, the invention provides the method for realizing the filter with higher order by only half of coefficients with the same performance, so that the resource consumption for realizing the filter is reduced, and the performance is improved. The symmetrical application not only greatly reduces the computational complexity in the digital signal processing process, but also realizes low-cost application.

Description

Design method of variable fractional delay filter with symmetric coefficients
Technical Field
The invention belongs to the field of passive detection signal processing.
Background
The fractional delay filter, also called as a continuous variable digital delay unit, is a digital filter with non-integer sample delay, and is widely applied to the fields of speech coding and synthesis, digital communication, delay estimation, sampling rate conversion, and the like. At present, there are mature basic design methods, such as a polynomial-based design method (Farrow structure), a lagrange interpolation-based design method, and a least square-based design method.
A repetitive control fractional delay filter design method based on Taylor series expansion (CN201810759864.X) belongs to the field of fractional delay filters. The present invention converts the fractional delay filter design problem to a differentiator sub-filter design using a taylor series expansion method, which provides an efficient on-line tuning capability, i.e., when the delay parameter changes, the fractional delay filter can easily generate any desired fractional delay without having to redesign the filter. A fractional delay optimization method suitable for multiple Nyquist zones and an implementation structure thereof (CN107342750) belong to the field of digital signal processing. The invention relates to the field of digital signal processing, and provides a fractional delay optimization method suitable for multiple Nyquist zones, so that a fractional delay filter can work in a frequency band range of fs/2 or more, and can be applied to design of the fractional delay filter of the multiple Nyquist zones. "cochlear electron fractional delay filter construction method, storage medium and cochlear electron" (CN110266287A) relates to a cochlear electron fractional delay filter construction method, apparatus, computer readable storage medium and cochlear electron. The method determines a frequency band of a fractional delay filter bank of the cochlear implant; dividing each sub-band from the frequency band of the fractional delay filter bank; respectively determining the preferred fractional delay filter of each sub-band, wherein the preferred fractional delay filter of the ith sub-band is the fractional delay filter which enables the ith sub-band to obtain the minimum error, i is more than or equal to 1 and less than or equal to n, and n is the number of the sub-bands; and combining the preferred fractional delay filters of the sub-bands to construct a fractional delay filter bank of the electronic cochlea.
The analysis of the prior art can find that the prior art improves the original mature design method and expands the technical field and technical premise applicable to the fractional delay filter. However, if these patents are applied to the phased array field, the problem that the filter order is high, which results in high resource consumption, cannot be solved.
Disclosure of Invention
In order to solve the problem of high resource consumption of the existing variable fractional filter, the invention provides a design method of a variable fractional delay filter with symmetric coefficients.
The invention is realized as follows:
step 1: the filter order N and polynomial order M are set as required. Establishing frequency vectors c and s and delay vector P according to N and MeAnd Po。
Step 2: with c, s, PeAnd PoFour variables, calculating the coefficients A of the error function matrix1，A2，A3，A4，A5，A6。
And step 3: calculating a coefficient matrix A2，A3，A4，A5Cholesky decomposition U of2，U3，U4And U5。
And 4, step 4: according to U2，U3，U4、U5、A1And A6Calculating the final optimal solution matrix BeAnd Bo。
And 5: according to BeAnd BoConversion of the filter coefficients hnAnd (p) setting the specifically required delay time p to obtain the filter coefficient.
Step 6: according to hn(p) designing a variable fractional delay filter structure.
Aiming at the condition that the existing variable fractional delay filter has higher order and more resource consumption, the filter design is optimized by improving the filter coefficient calculation method, and the variable fractional delay filter with symmetrical coefficients is realized by adopting a WLS method. The filter only needs half of coefficients to realize the filter with higher order, thus reducing the resource consumption for realizing the filter and improving the performance. The symmetry application not only greatly reduces the computational complexity in the digital signal processing process, but also realizes the application with low cost, and is particularly suitable for being used in the broadband phased array signal processing.
The invention is further described below with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of a coefficient symmetric variable fractional delay filter.
Fig. 2 shows a filter design flow.
Figure 3 simulation of filter delay error performance.
Detailed Description
The invention provides a design method of a coefficient-symmetric variable fractional delay filter, which mainly comprises a plurality of steps as shown in figure 2.
Assuming ω is the normalized angular frequency and p is the desired variable fractional group delay, more than four two variable correlation vectors can be constructed, where:
c ═ 1 cos (ω) cos (2 ω) … cos (N ω) ] formula 1
s ═ sin (ω) sin (2 ω) … sin (N ω) ] formula 2
Pe＝[1 p2 p4 … pM-1]tEquation 3
Po＝[p p3 p5 … pM]tEquation 4
The subscript e represents an even number and the subscript o represents an odd number.
Constructed vector formula 1-4 constructs error function coefficient matrix A1，A2，A3，A4，A5，A6As follows:
Figure BDA0002902276620000021
Figure BDA0002902276620000031
Figure BDA0002902276620000032
Figure BDA0002902276620000033
Figure BDA0002902276620000034
wherein
Figure BDA0002902276620000035
A better approximation can be achieved assuming a smaller value of K, e.g., K10.
Figure BDA0002902276620000036
Wherein
Figure BDA0002902276620000037
A better approximation can be achieved assuming a smaller value of K, e.g., K10.
It can be assumed that W2(p) and W1(ω) is 1, A is calculated1，A2，A3，A4，A5，A6And (4) matrix.
Considering the matrix A2，A3，A4，A5Is a Hermite positive definite matrix and therefore it can be subjected to Cholesky decomposition as follows:
Figure BDA0002902276620000038
Figure BDA0002902276620000039
Figure BDA00029022766200000310
Figure BDA00029022766200000311
wherein U is2，U3，U4And U5Is an upper triangular matrix.
The main benefit of decomposing the coefficient matrix is that the condition number of the triangular matrix is much smaller than the matrix before decomposition, so its inverse can be computed accurately and without ill-conditioned solutions.
U calculated according to equations 11-142，U3，U4And U5The optimal solution matrix can be obtained by substituting the equation below.
Figure BDA00029022766200000312
Figure BDA00029022766200000313
Figure BDA00029022766200000314
Figure BDA0002902276620000041
From the calculation result of the optimal solution matrix, and from the conclusions of equation 17 and equation 18, the value of b (n, m) can be calculated, and from equation 19 below, the value of a (n, m) can be calculated, and the filter coefficient can be calculated in combination with equation 20.
Figure BDA0002902276620000042
Figure BDA0002902276620000043
Setting M to 7, K to 18, and N to 30, calculating the filter coefficients according to the above steps, and calculating the error of the variable fractional delay, and obtaining a Matlab simulation thereof, as shown in fig. 3. Analyzing the simulation diagram, the following conclusions can be drawn.
1. The delay error increases with increasing delay p.
2. The delay error fluctuates within a small range as the frequency changes, and the error tends to become larger as the frequency becomes smaller.
After the filter coefficient is calculated, the filter structure is designed according to the characteristics of the filter coefficient as shown in fig. 1, and according to the symmetrical characteristics of the filter coefficient, the multiplexing of the multiplier is realized, and the hardware realization resources are saved. From the calculation formula 20, it can be found that the coefficients of the filter can be changed by changing the value of the delay value p without re-performing complicated operations. This feature is also present in the filter structure of fig. 1.

Claims (2)

1. A design method of a coefficient symmetric variable fractional delay filter is characterized in that:
step 1: setting filter order N and polynomial order M, and establishing frequency vectors c and s and delay vector PeAnd Po；
Step 2: according to c, s, PeAnd PoFour variables, calculating the coefficients A of the error function matrix1，A2，A3，A4，A5，A6；
And step 3: calculating a coefficient matrix A2，A3，A4，A5Cholesky decomposition U of2，U3，U4And U5；
And 4, step 4: according to U2，U3，U4、U5、A1And A6Calculating the final optimal solution matrix BeAnd Bo；
And 5: according to BeAnd BoConversion of the filter coefficients hn(p) setting a specifically required delay time p to obtain a filter coefficient;
step 6: according to hn(p) designing a variable fractional delay filter structure.
2. A method of designing a coefficient-symmetric variable fractional delay filter according to claim 1, wherein: the frequency vector c, s, P in the step 1eAnd PoThe values are:
c＝[1 cos(ω) cos(2ω) … cos(Nω)]；
s＝[sin(ω) sin(2ω) … sin(Nω)]；
Pe＝[1 p2 p4 … pM-1]t，Po＝[p p3 p5 … pM]t；
the error function coefficient matrix formula in the step 2 is as follows:
Figure FDA0002902276610000011
Figure FDA0002902276610000012
Figure FDA0002902276610000013
Figure FDA0002902276610000014
Figure FDA0002902276610000015
wherein
Figure FDA0002902276610000016
Figure FDA0002902276610000017
Wherein
Figure FDA0002902276610000018
In the step 3, U is obtained2，U3，U4And U5Wherein:
Figure FDA0002902276610000019
the optimal solution matrix formula calculated in the step 4 is as follows:
Figure FDA00029022766100000110
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060701A1 (en) * 1998-05-18 1999-11-25 Technische Universiteit Delft Method and device for filtering a digital signal with fractional delay
US20110274210A1 (en) * 2010-05-04 2011-11-10 Samsung Electronics Co. Ltd. Time alignment algorithm for transmitters with eer/et amplifiers and others
CN102624357A (en) * 2012-03-19 2012-08-01 上海交通大学 Implementation structure of fractional delay digital filter
CN109188345A (en) * 2018-08-27 2019-01-11 电子科技大学 Coherent signal source DOA estimation method based on structure when removing predelay sky
CN111327382A (en) * 2020-02-25 2020-06-23 东南大学 Channel simulation architecture with variable amplitude, time delay bandwidth and delay and method thereof
CN111327297A (en) * 2020-03-09 2020-06-23 华北电力大学 Self-adaptive resampling method based on window function design

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060701A1 (en) * 1998-05-18 1999-11-25 Technische Universiteit Delft Method and device for filtering a digital signal with fractional delay
US20110274210A1 (en) * 2010-05-04 2011-11-10 Samsung Electronics Co. Ltd. Time alignment algorithm for transmitters with eer/et amplifiers and others
CN102624357A (en) * 2012-03-19 2012-08-01 上海交通大学 Implementation structure of fractional delay digital filter
CN109188345A (en) * 2018-08-27 2019-01-11 电子科技大学 Coherent signal source DOA estimation method based on structure when removing predelay sky
CN111327382A (en) * 2020-02-25 2020-06-23 东南大学 Channel simulation architecture with variable amplitude, time delay bandwidth and delay and method thereof
CN111327297A (en) * 2020-03-09 2020-06-23 华北电力大学 Self-adaptive resampling method based on window function design

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
TIAN-BO DENG，YONG LIAN: "Symmetry-Based Analytically Closed-Form Design of Variable Fractional-Delay FIR Digital Filters", 《2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS》, pages 2004 - 2007 *
TIAN-BO DENG，YONG LIAN: "Weighted-Least-Squares Design of Variable Fractional-Delay FIR Filters Using Coefficient Symmetry", 《IEEE TRANSACTIONS ON SIGNAL PROCESSING》, pages 3023 - 3038 *
TIAN-BO DENG: "Symmetry-Based Low-Complexity Variable Fractional-Delay FIR Filters", 《INTERNATIONAL SYMPOSIUM ON COMMUNICATIONS AND INFORMATION TECHNOLOGIES 2004(ISCIT 2004)》, pages 194 - 199 *
印茂伟;唐斌;伍春;龙柯宇;: "可变分数延时FIR滤波器的WLS优化设计", 微计算机信息, no. 18, pages 257 - 258 *

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