CN112860591B - Method for sequential addressing of RS485 bus by signal relay - Google Patents
Method for sequential addressing of RS485 bus by signal relay Download PDFInfo
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- CN112860591B CN112860591B CN202110113481.7A CN202110113481A CN112860591B CN 112860591 B CN112860591 B CN 112860591B CN 202110113481 A CN202110113481 A CN 202110113481A CN 112860591 B CN112860591 B CN 112860591B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
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Abstract
The invention discloses a system and a method for sequentially addressing an RS485 bus by using signal relays, wherein the system comprises an upper computer and a plurality of nodes, the nodes are sequentially connected with the upper computer through the RS485 bus, a relay is respectively arranged in each node, the upper computer locally stores and maintains an equipment list, each node has a specific SN number stored in the equipment, and an addressing status bit storage unit is arranged for recording whether the current node is addressed. The method adopts a mode of closing the bus step by step through the signal relay to achieve sequential traversal, and ensures that node information reaches the upper computer certainly through a mode of 2 times of response. The system and the method can record the relative position of each lower position in the bus by using the upper computer for addressing once, the addressing is quick, 5 nodes can be addressed within 1 second, the labor cost is effectively saved, the error rate is effectively reduced, and the problem of recording errors can not occur theoretically.
Description
Technical Field
The invention relates to a method for sequentially addressing an RS485 bus by using a signal relay.
Background
Because the 485 adopts a bus communication scheme, for the devices on the RS485 bus, the upper computer cannot know the relative position of the lower computer in the line. The corresponding position of the host computer is recorded in a manual mode of inputting in advance, so that the workload is high, or the probability of errors is high. As shown in fig. 1, 31 nodes are mounted under the controller, and the 31 nodes communicate with the controller through a common bus. As each node is randomly installed during installation construction, for the nodes 1-31, the corresponding SN number of each device cannot correspond to the SN number of each device. This causes the later maintenance to have great difficulty, needs the artificial mode to record the SN number that every equipment number corresponds in advance.
Disclosure of Invention
The invention provides a method for sequentially addressing an RS485 bus by using signal relays, which can record the relative position of each lower position in the bus by using an upper computer for addressing at one time by using a mode that the signal relays open and close the bus.
In order to achieve the purpose, the invention adopts the following technical scheme:
the utility model provides a RS485 bus utilizes signal relay order addressing system, includes host computer, a plurality of node, the node passes through the RS485 bus and is connected with the host computer in proper order, and each node is inside to be equipped with a relay respectively, and host computer local storage maintains an equipment list.
Preferably, there are 2 interfaces of RS485 in and out on each node, and each node has its own specific SN number stored in the device.
Preferably, each node is provided with an addressing status bit storage unit for recording whether the current node is addressed.
A sequential addressing method for an RS485 bus by using signal relays comprises the following steps:
s1, after the upper computer and the nodes are normally installed in the equipment, relays of all the nodes are set to be in a closed state, all the nodes are connected to an RS485 bus, and instructions sent by the upper computer can reach all the nodes;
s2, the upper computer initiates addressing, which specifically comprises:
s21, the upper computer sends a reset instruction, all the nodes receive the reset instruction at the moment, the relays of all the nodes are disconnected at the same time, the addressing state position stored by the node is set to be 0, in the state, the instruction sent by the upper computer can be received by only the first node, and meanwhile, the upper computer clears the equipment list;
s22, the upper computer sends an addressing request instruction, when the node receives the addressing instruction, the current addressing status bit is judged, if the current addressing status bit is 0, the SN of the node is sent to the RS485 bus, and the upper computer receives the SN information and stores the SN information in the position of the equipment list 1;
s23, the upper computer sends addressing response information to the bus, at the moment, the node 1 receives the addressing response, the addressing state position is set to 1, and the relay is closed;
s24, after the upper computer sends the response information, the upper computer continues to send the next addressing request instruction, at this time, because the relay of the node 1 is closed in the step S23, the node 1 and the node 2 receive the addressing request at the same time, but because the node 1 judges that the addressing status bit is 1, namely the node is addressed, the node does not send SN to the RS485 bus any more, and the node 2 judges that the addressing status bit is 0, the SN is sent to the RS485 bus, at this time, the upper computer receives the SN information of the 2 nd node, and the upper computer stores the second device SN at the position of the device list 2;
and S25, the upper computer can store all the equipment SN on the RS485 bus in an equipment list in a traversing mode by repeatedly sending the addressing instruction, and an equipment information table completely consistent with the wiring diagram is established.
Preferably, only one message is allowed to be sent by the RS485 bus at the same time, otherwise, a message storm is caused, and the message cannot be received.
Due to the structure, the invention has the advantages that:
this application utilizes the mode that signal relay opened and shut the bus, can use the host computer once to address just can take notes the relative position of each next in the bus, and the addressing is quick, and 1 second addressable 5 nodes effectively save the human cost, effectively reduce the error rate simultaneously, can not appear in theory and type wrong problem.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below.
FIG. 1 is a schematic diagram of a prior art addressing system architecture;
FIG. 2 is a schematic structural diagram of relays of all nodes of the present invention in a closed state;
FIG. 3 is a schematic structural diagram of relays of all nodes in an off state according to the present invention;
FIG. 4 is a schematic structural diagram of the node 1 receiving an address response status according to the present invention;
FIG. 5 is a schematic structural diagram of the node 2 receiving an address acknowledgement status according to the present invention;
FIG. 6 is a schematic structural diagram of the present invention when all nodes receive an address response status;
FIG. 7 is a flow chart of the addressing state of the present invention.
Detailed Description
The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2 to 7, the present embodiment provides a system for sequentially addressing an RS485 bus by using signal relays, including an upper computer and a plurality of nodes, where the nodes are sequentially connected to the upper computer through the RS485 bus, each node is internally provided with a relay, and the upper computer locally stores and maintains an equipment list.
In this embodiment, there are 2 interfaces RS485 in and out on each node, and each node has its own specific SN number stored in the device.
In this embodiment, an addressing status bit storage unit is disposed in each node for recording whether the current node is addressed.
In this embodiment, the relay inside the node can cut off the connection from the node at the later stage to the upper computer.
The embodiment also provides a sequential addressing method of an RS485 bus by using signal relays, which comprises the following steps:
s1, after the upper computer and the nodes are normally installed in the equipment, the relays of all the nodes are set to be in a closed state, all the nodes are connected to the RS485 bus, and the instructions sent by the upper computer can reach all the nodes;
s2, the upper computer initiates addressing, which specifically comprises:
s21, the upper computer sends a reset instruction, all the nodes receive the reset instruction at the moment, the relays of all the nodes are disconnected at the same time, the addressing state position stored by the node is set to be 0, in the state, the instruction sent by the upper computer can be received by only the first node, and meanwhile, the upper computer clears the equipment list;
s22, the upper computer sends an addressing request instruction, when the node receives the addressing instruction, the current addressing state bit is judged, if the current addressing state bit is 0, the device SN of the node is sent to the RS485 bus, and the upper computer receives the SN information and stores the SN information in the position of the device list 1;
s23, the upper computer sends addressing response information to the bus, at the moment, the node 1 receives the addressing response, the addressing state position is set to 1, and the relay is closed; after one addressing response, the SN information of the first node can be guaranteed to be recorded by the upper level. If the addressing response message is not received by the node 1 due to the line abnormality, the node 1 continues to keep the unaddressed state;
s24, after the upper level sends the response information, the upper level continues to send the next addressing request instruction, at this time, because the relay of the node 1 is closed in the step S23, the node 1 and the node 2 receive the addressing request at the same time, but because the node 1 judges that the addressing status bit is 1, namely the addressing is performed, the node 1 does not send SN to the RS485 bus any more, and the node 2 judges that the addressing status bit is 0, the SN is sent to the RS485 bus, at this time, the upper level receives the SN information of the 2 nd node, and the upper level stores the second device SN at the position of the device list 2;
and S25, the upper computer can store all the equipment SN on the RS485 bus in an equipment list in a traversing mode by repeatedly sending the addressing instruction, and an equipment information table completely consistent with the wiring diagram is established.
In this embodiment, only one piece of information is allowed to be sent by the RS485 bus at the same time, otherwise, an information storm is caused and the information storm cannot be received.
According to the system and the method, the purpose of sequential traversal is achieved by means of opening and closing of the signal relay, the node information is guaranteed to reach the upper computer in a mode of 2 times of response, the relative position of each lower node in the bus can be recorded by the aid of the upper computer through one-time addressing, the addressing is fast, 5 nodes can be addressed within 1 second, labor cost is effectively saved, meanwhile, the error rate is effectively reduced, and the problem of entry errors can be avoided theoretically.
The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes will occur to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (4)
1. An addressing method of an RS485 bus system sequentially addressing by using signal relays is characterized in that the system comprises an upper computer and a plurality of nodes, wherein the nodes are sequentially connected with the upper computer through the RS485 bus, a relay is respectively arranged in each node, and the upper computer locally stores and maintains an equipment list;
the method comprises the following steps:
s1, after the upper computer and the nodes are normally installed in the equipment, the relays of all the nodes are set to be in a closed state, all the nodes are connected to the RS485 bus, and the instructions sent by the upper computer can reach all the nodes;
s2, the upper computer initiates addressing, which specifically comprises:
s21, the upper computer sends a reset instruction, all the nodes receive the reset instruction at the moment, the relays of all the nodes are disconnected at the same time, the addressing state position stored by the node is set to be 0, in the state, the instruction sent by the upper computer can be received by only the first node, and meanwhile, the upper computer clears the equipment list;
s22, the upper computer sends an addressing request instruction, when the node receives the addressing instruction, the current addressing state bit is judged, if the current addressing state bit is 0, the device SN of the node is sent to the RS485 bus, and the upper computer receives the SN information and stores the SN information in the position of the device list 1;
s23, the upper computer sends addressing response information to the bus, at the moment, the node 1 receives the addressing response, the addressing state position is set to 1, and the relay is closed;
s24, after the upper computer sends the response information, the upper computer continues to send the next addressing request instruction, at this time, because the relay of the node 1 is closed in the step S23, the node 1 and the node 2 receive the addressing request at the same time, but because the node 1 judges that the addressing state bit is 1, namely the addressing is carried out, the node 1 does not send SN to the RS485 bus any more, and the node 2 judges that the addressing state bit is 0, the SN is sent to the RS485 bus, at this time, the upper computer receives the SN information of the 2 nd node, and the upper computer stores the second device SN at the position of the device list 2;
and S25, the upper computer can store all the equipment SN on the RS485 bus in an equipment list in a traversing mode by repeatedly sending the addressing instruction, and an equipment information table completely consistent with the wiring diagram is established.
2. The addressing method of an RS485 bus system using signal relay sequential addressing as claimed in claim 1, wherein there are 2 RS485 in and out interfaces on each node, each node has its own specific SN number stored in the device.
3. The addressing method of the RS485 bus sequential addressing system using the signal relay as claimed in claim 1, wherein an addressing status bit storage unit is disposed in each node for recording whether the current node is addressed.
4. The addressing method of the RS485 bus system using the signal relay as claimed in claim 1, wherein only one message is allowed to be sent by the RS485 bus at the same time, otherwise, a message storm is caused and the message is not received.
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