CN112838573A - High-power multi-path series-parallel voltage-sharing voltage surge suppression circuit - Google Patents

High-power multi-path series-parallel voltage-sharing voltage surge suppression circuit Download PDF

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Publication number
CN112838573A
CN112838573A CN202110211346.6A CN202110211346A CN112838573A CN 112838573 A CN112838573 A CN 112838573A CN 202110211346 A CN202110211346 A CN 202110211346A CN 112838573 A CN112838573 A CN 112838573A
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electrically connected
voltage
resistor
capacitor
circuit
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王勇
王磊
齐福淼
胡江曼
岳坤
李小强
韩苏林
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Xi'an Xinleineng Electronic Technology Co ltd
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Xi'an Xinleineng Electronic Technology Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/005Emergency protective circuit arrangements for limiting excess current or voltage without disconnection avoiding undesired transient conditions
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

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Abstract

The invention belongs to the technical field of circuits, and relates to a high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit which comprises an external input end, wherein the external input end is electrically connected with one end of a first capacitor, and the other end of the first capacitor is grounded; the external output end is electrically connected with one end of the second capacitor, and the other end of the second capacitor is grounded; and the clamping circuit is connected between the external input end and the external output end in series. According to the invention, through the multi-tube series current sharing and multi-tube parallel voltage sharing circuit of the clamping MOSFET, the linear overvoltage surge suppression power and the overvoltage grade are greatly improved, the use range of the surge suppression is expanded, meanwhile, the multi-stage series and parallel power MOSFET can be realized according to the actual requirement, the use of higher voltage grade and higher power grade is realized, the practicability is strong, and the clamping MOSFET is worthy of popularization.

Description

High-power multi-path series-parallel voltage-sharing voltage surge suppression circuit
Technical Field
The invention belongs to the technical field of circuits, and particularly relates to a high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit.
Background
With the improvement of various performances of semiconductors, the requirements on a system power supply are higher and higher, the stable front end voltage of the power supply is the main flow direction of the existing system power supply, and a linear overvoltage surge suppression circuit becomes the first choice of a front end preprocessing module due to good electromagnetic compatibility.
As the power of a power supply is higher and higher, and the traditional linear overvoltage surge suppression circuit is provided with a clamping power MOSFET (metal oxide semiconductor field effect transistor) which is mainly a single MOSFET, the overcurrent capacity of the single clamping power MOSFET is limited due to process limitation, so that the output power is limited, and the application range of the linear overvoltage surge suppression circuit is severely limited.
Disclosure of Invention
In view of the above, the present invention provides a high-power multi-channel series-parallel voltage-sharing voltage surge suppression circuit to solve the above mentioned technical problems.
The technical scheme of the invention is as follows:
a voltage surge suppression circuit of high-power multichannel series-parallel voltage sharing includes:
the external input end is electrically connected with one end of a first capacitor CA, and the other end of the first capacitor CA is grounded;
the external output end is electrically connected with one end of a second capacitor CB, and the other end of the second capacitor CB is grounded;
the clamping circuit is connected between the external input end and the external output end in series, the clamping circuit comprises at least two stages of clamping modules which are connected in series in sequence, each clamping module comprises at least two clamping units which are connected in parallel, and each clamping unit comprises:
the source electrode of the MOSFET is electrically connected with the external input end, the drain electrode of the MOSFET is electrically connected with the rear-stage clamping module, the gate electrode of the MOSFET is electrically connected with one end of a third capacitor C2, the other end of the third capacitor C2 is grounded, one end of the third capacitor C2, which is far away from the ground end, is electrically connected with one end of a first resistor R2, and the other end of the first resistor R2 is electrically connected with the drain electrode of the MOSFET;
further comprising:
the power supply circuit is used for ensuring normal power supply of a post-stage line, and the input end of the power supply circuit is connected with the external input end;
the oscillating circuit is used for providing square waves with set frequency for a rear-stage circuit, and the input end of the oscillating circuit is connected with the output end of the power supply circuit;
the bootstrap circuit is used for providing a grid driving voltage for the clamping unit, and the output end of the oscillating circuit is connected with the input end of the bootstrap circuit;
the voltage equalizing circuit is used for equalizing the clamping voltage of the MOSFET of the clamping unit;
the output voltage regulating circuit is used for setting output voltage, the input end of the output voltage regulating circuit is electrically connected with the external input end, and the output end of the output voltage regulating circuit is electrically connected with the external output end.
Preferably, the power supply circuit comprises a second resistor R1, a first triode VT1, a first diode D1, a first voltage regulator DZ1 and a fourth capacitor C1, one end of the second resistor R1 is electrically connected to the external input end, the other end of the second resistor R1 is electrically connected to the anode of the first diode D1, the cathode of the first diode D1 is electrically connected to the cathode of the first voltage regulator DZ1, and the anode of the first voltage regulator DZ1 is grounded; the anode of the first diode D1 is electrically connected to the base of the first transistor VT1, the emitter of the first transistor VT1 is electrically connected to one end of the fourth capacitor C1, the other end of the fourth capacitor C1 is grounded, and the collector of the first transistor VT1 is electrically connected to the external input terminal.
Preferably, the oscillator circuit includes:
the triangular wave generating circuit comprises a pulse wave and a square wave output circuit for converting the triangular wave generating circuit into square wavesA pulse width modulator IC1, wherein the pulse width modulator IC1 is UCC2813-5, an FB port, a CS port and a GND port of the UCC2813-5 are all grounded, a COMP port is electrically connected with one end of a fifth capacitor C11, the other end of the fifth capacitor C11 is grounded, an R/C port is electrically connected with one end of a sixth capacitor C10, the other end of the sixth capacitor C10 is grounded, and V is connected with the groundccPort electric connection power supply, VrefThe port is electrically connected with one end of the fifth capacitor C11, which is far away from the ground end, and one end of the sixth capacitor C10, which is far away from the ground end, is electrically connected with one end of a third resistor R10;
the square wave output circuit comprises a comparator IC2, wherein the non-inverting input end of the comparator IC2 is electrically connected with one end of the sixth capacitor C10, which is away from the ground, the inverting input end of the comparator IC2 is electrically connected with one ends of a fourth resistor R11 and a fifth resistor R12, respectively, the other end of the fourth resistor R11 is electrically connected with the other end of the third resistor R10, the other end of the fifth resistor R12 is grounded, the positive power port of the comparator IC2 is electrically connected with a power supply and one end of a seventh capacitor C12, the other end of the seventh capacitor C12 is grounded, the negative power port of the comparator IC2 is grounded, the output end of the comparator IC2 is electrically connected with one ends of the sixth resistor R13 and the seventh resistor R14, the other end of the sixth resistor R13 is electrically connected with the power supply, and the other end of the seventh resistor R14 is electrically connected with the bases VT2 and the VT3, the emitter of the second triode VT2 is electrically connected with the emitter of the third triode VT3, the collector of the second triode VT2 is grounded, and the collector of the third triode VT3 is electrically connected with a power supply.
Preferably, the bootstrap circuit includes at least two bootstrap units, each bootstrap unit includes a seventh capacitor C13 having one end electrically connected to an emitter of the third transistor VT3, the other end of the seventh capacitor C13 is electrically connected to an anode of the second diode D2 and a cathode of the third diode D3, respectively, an anode of the third diode D3 is electrically connected to one end of an eighth capacitor C14, the other end of the eighth capacitor C14 is electrically connected to a cathode of the second diode D2, a cathode of the second diode D2 is further electrically connected to one end of an eighth resistor R15, the other end of the eighth resistor R15 is electrically connected to a cathode of the second regulator DZ2, and an anode of the second regulator DZ2 is electrically connected to an anode of the third diode D3; the cathode of the second voltage-regulator tube DZ2 is electrically connected with the grid of the MOSFET tube, and the anode of the second voltage-regulator tube DZ2 is electrically connected with the drain of the MOSFET tube.
Preferably, the voltage-sharing circuit comprises at least two voltage-sharing units which are sequentially connected in series, each voltage-sharing unit comprises a ninth resistor R24, one end of the ninth resistor R24 is electrically connected with one end of a tenth resistor R17, the other end of the tenth resistor R17 is electrically connected with the gate of the MOSFET, the external input end is electrically connected with the cathode of a fifth voltage-stabilizing tube DZ5, and the anode of the fifth voltage-stabilizing tube DZ5 is electrically connected with one end of the ninth resistor R24, which is far away from the external input end.
Preferably, the voltage regulator further comprises a fourth diode D7, wherein an anode of the fourth diode D7 is electrically connected to the external input terminal, and a cathode of the fourth diode D7 is electrically connected to a cathode of the fifth voltage regulator tube DZ 5.
Preferably, the output voltage regulating circuit comprises an eleventh resistor R19, a twelfth resistor R20 and a thirteenth resistor R21 which are sequentially connected in series, the eleventh resistor R19 is electrically connected with an external output end, the thirteenth resistor R21 is grounded, one end of the thirteenth resistor R21 departing from the ground end is electrically connected with a base of a fourth triode VT4, a collector of the fourth triode VT4 is electrically connected with the external output end, an emitter of the fourth triode VT4 is electrically connected with an emitter of a fifth triode VT5, a collector of the fifth triode VT5 is electrically connected with a power supply, and a base of the fifth triode VT5 is electrically connected with a V of the UCC2813-5refAnd an emitter of the fifth triode VT5 is electrically connected with one end of a fourteenth resistor R21, and the other end of the fourteenth resistor R21 is grounded.
According to the voltage surge suppression circuit for the high-power multi-path series-parallel voltage sharing, under the condition of normal power supply, an MOSFET (metal oxide semiconductor field effect transistor) in a clamping circuit is completely conducted, the circuit is in a micro-power consumption working state, when the input voltage is higher than the amplitude limiting voltage or the overvoltage surge comes, the clamping circuit limits the output voltage within a set voltage range, and at the moment, a module is in a linear voltage-stabilizing working mode, so that the rear-stage circuit is not influenced by voltage transient.
Compared with the prior art, the invention greatly improves the linear overvoltage surge suppression power and overvoltage level and expands the use range of surge suppression through the clamping MOSFET multi-tube series current sharing and multi-tube parallel voltage sharing circuit, and simultaneously can realize the use of higher voltage level and higher power level according to the actual requirement of multi-stage series-parallel power MOSFET tubes, thereby having strong practicability and being worth popularizing.
Drawings
FIG. 1 is an overall circuit diagram of the present invention;
FIG. 2 is a power supply circuit of the present invention;
FIG. 3 is a diagram of an oscillator circuit according to the present invention;
FIG. 4 is a square wave output circuit of the present invention;
FIG. 5 is a clamp circuit of the present invention;
FIG. 6 is a bootstrap circuit of the present invention;
FIG. 7 is a voltage equalizer circuit of the present invention;
fig. 8 is an output regulator circuit of the present invention.
Detailed Description
The invention provides a high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit, which is described below with reference to the structural schematic diagrams of fig. 1 to 8.
Example 1
A high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit is shown in a circuit diagram of fig. 1 and comprises an external input end, wherein the external input end is electrically connected with one end of a first capacitor CA, and the other end of the first capacitor CA is grounded;
the external output end is electrically connected with one end of a second capacitor CB, and the other end of the second capacitor CB is grounded;
the clamping circuit is used for restraining voltage surge and is connected in series between the external input end and the external output end, the clamping circuit comprises at least two stages of clamping modules which are sequentially connected in series, each clamping module comprises at least two clamping units which are connected in parallel, and each clamping unit comprises:
the source electrode of the MOSFET is electrically connected with the external input end, the drain electrode of the MOSFET is electrically connected with the rear-stage clamping module, the gate electrode of the MOSFET is electrically connected with one end of a third capacitor C2, the other end of the third capacitor C2 is grounded, one end of the third capacitor C2, which is far away from the ground end, is electrically connected with one end of a first resistor R2, and the other end of the first resistor R2 is electrically connected with the drain electrode of the MOSFET; the first resistor R2 is a discharge resistor between the gate of the MOSFET and the drain of the MOSFET, and the third capacitor C2 is used for temporarily suppressing the spike voltage due to the voltage surge.
Further comprising:
the power supply circuit is used for ensuring normal power supply of a post-stage line, and the input end of the power supply circuit is connected with the external input end;
the oscillating circuit is used for providing square waves with set frequency for a rear-stage circuit, and the input end of the oscillating circuit is connected with the output end of the power supply circuit;
the bootstrap circuit is used for providing a grid driving voltage for the clamping unit, and the output end of the oscillating circuit is connected with the input end of the bootstrap circuit;
the voltage equalizing circuit is used for equalizing the clamping voltage of the MOSFET of the clamping unit;
the output voltage regulating circuit is used for setting output voltage, the input end of the output voltage regulating circuit is electrically connected with the external input end, and the output end of the output voltage regulating circuit is electrically connected with the external output end.
Under the normal power supply condition, MOSFET pipe switches on completely in the clamp circuit, and this circuit is in little consumption operating condition, and when input voltage was higher than amplitude limiting voltage or excessive pressure wave was shone temporarily, the clamp circuit restricted output voltage within the settlement voltage range, and the module was in linear steady voltage operating mode this moment, and the guarantee back stage circuit is not influenced by the voltage transient.
As shown in fig. 2, the power supply circuit is used for providing a stable voltage for the rear-stage circuit and ensuring the normal power supply of the rear-stage circuit, and the power supply circuit is composed of a second resistor R1, a first triode VT1, a first diode D1, a first voltage regulator DZ1 and a fourth capacitor C1. The second resistor R1 is a base current limiting resistor of the first transistor VT1, the first voltage regulator DZ1 is used for limiting the output voltage of the base of the first transistor VT1, and the first diode D1 is used for high and low temperature compensation.
The power supply circuit comprises a second resistor R1, a first triode VT1, a first diode D1, a first voltage-regulator tube DZ1 and a fourth capacitor C1, wherein one end of the second resistor R1 is electrically connected with the external input end, the other end of the second resistor R1 is electrically connected with the anode of the first diode D1, the cathode of the first diode D1 is electrically connected with the cathode of the first voltage-regulator tube DZ1, and the anode of the first voltage-regulator tube DZ1 is grounded; the anode of the first diode D1 is electrically connected to the base of the first transistor VT1, the emitter of the first transistor VT1 is electrically connected to one end of the fourth capacitor C1, the other end of the fourth capacitor C1 is grounded, and the collector of the first transistor VT1 is electrically connected to the external input terminal.
The oscillating circuit comprises a triangular wave generating circuit and a square wave output circuit for converting the triangular wave generating circuit into square waves.
The triangular wave generating circuit is shown in fig. 3, and has a function of generating a triangular wave, in the figure, IC1 is an integrated circuit chip with a model number of UCC2813-5, which provides the triangular wave, the output frequency can be changed by changing a sixth capacitor C10 and a third resistor R10, and a fifth capacitor C11 is an energy storage capacitor of a reference VREF.
The triangular wave generating circuit comprises a pulse width modulator IC1, wherein the pulse width modulator IC1 is UCC2813-5, an FB port, a CS port and a GND port of the UCC2813-5 are all grounded, a COMP port is electrically connected with one end of a fifth capacitor C11, the other end of the fifth capacitor C11 is grounded, an R/C port is electrically connected with one end of a sixth capacitor C10, the other end of the sixth capacitor C10 is grounded, and V is a positive integerccPort electric connection power supply, VrefThe port is electrically connected with one end of the fifth capacitor C11, which is far away from the ground end, and one end of the sixth capacitor C10, which is far away from the ground end, is electrically connected with one end of a third resistor R10;
in the square wave output circuit shown in fig. 4, in the graph, the fourth resistor R11 and the fifth resistor R12 divide the voltage of the reference voltage and then compare the divided voltage with a triangular wave (RT), the comparator outputs the square wave through the comparator IC2, the comparator IC2 supplies power to the energy storage capacitor of the comparator, the sixth resistor R13, the seventh resistor R14, the second triode VT2 and the third triode VT3 form a power amplification circuit, the driving capability of the square wave is enhanced, and the square wave is output through the FB.
The square wave output circuit comprises a comparator IC2, wherein the non-inverting input end of the comparator IC2 is electrically connected with one end of the sixth capacitor C10, which is away from the ground, the inverting input end of the comparator IC2 is electrically connected with one ends of a fourth resistor R11 and a fifth resistor R12, respectively, the other end of the fourth resistor R11 is electrically connected with the other end of the third resistor R10, the other end of the fifth resistor R12 is grounded, the positive power port of the comparator IC2 is electrically connected with a power supply and one end of a seventh capacitor C12, the other end of the seventh capacitor C12 is grounded, the negative power port of the comparator IC2 is grounded, the output end of the comparator IC2 is electrically connected with one ends of the sixth resistor R13 and the seventh resistor R14, the other end of the sixth resistor R13 is electrically connected with the power supply, and the other end of the seventh resistor R14 is electrically connected with the bases VT2 and the VT3, the emitter of the second triode VT2 is electrically connected with the emitter of the third triode VT3, the collector of the second triode VT2 is grounded, and the collector of the third triode VT3 is electrically connected with a power supply.
The clamp circuit shown in fig. 5 is a non-isolated linear suppression circuit, and the clamp circuit has a function of suppressing voltage surge, and clamping an output voltage to a set voltage, and redundant voltage is uniformly distributed in a multi-stage series-parallel MOSFET of the clamp circuit and is finally consumed in a thermal form.
Fig. 5 includes two stages of clamping, each with 4 clamping units connected in parallel.
Under the condition of normal power supply, the MOSFET tubes of the first stage Q1A-Q4A and the second stage Q2B-Q4B are completely conducted, and the power consumption is low because the internal resistance of the MOSFET tubes is low.
When the surge voltage comes, the input is assumed to be 80V/50ms surge voltage, the output voltage is set to be 38V, at this time, the first-stage output voltage is 59V, the second-stage output voltage is 38V, the voltages on the two stages of MOSFET tubes are both 21V, the two-stage clamping circuit can effectively reduce the voltage between the source (D) and the drain (S) of the MOSFET tubes, the overcurrent capacity of the MOSFET tubes is enhanced, and the reliability of the MOSFET tubes is improved.
The bootstrap circuit shown in fig. 6 functions to provide the gate driving voltage for the clamp circuit. The square wave output circuit sends a square wave to a seventh capacitor C13 and a ninth capacitor C15 through FB, wherein VTH2 and VO1 are shown as the grid electrode and the drain electrode of a MOSFET tube in the second stage clamping circuit, and VTH1 and VS1 are shown as the grid electrode and the drain electrode of the MOSFET tube in the first stage clamping circuit. The square wave raises the voltage to the voltage for starting the clamping MOSFET by a seventh capacitor C13 and a ninth capacitor C15 by utilizing the one-way conduction principle of diodes, wherein the eighth capacitor C14 and the tenth capacitor C16 are filter capacitors, the eighth resistor R15 and the fifteenth resistor R16 are current-limiting resistors, and the second voltage-regulator tube DZ2 and the fourth voltage-regulator tube DZ4 are voltage-regulator diodes between the grid and the drain of the MOSFET, so that the clamping MOSFET is prevented from being damaged due to the over-high voltage.
The bootstrap circuit comprises at least two bootstrap units, each bootstrap unit comprises a seventh capacitor C13, one end of each seventh capacitor C13 is electrically connected with an emitter of the third transistor VT3, the other end of each seventh capacitor C13 is electrically connected with an anode of the second diode D2 and a cathode of the third diode D3, an anode of the third diode D3 is electrically connected with one end of an eighth capacitor C14, the other end of the eighth capacitor C14 is electrically connected with a cathode of the second diode D2, a cathode of the second diode D2 is further electrically connected with one end of an eighth resistor R15, the other end of the eighth resistor R15 is electrically connected with a cathode of the second regulator DZ2, and an anode of the second regulator DZ2 is electrically connected with an anode of the third diode D3; the cathode of the second voltage-regulator tube DZ2 is electrically connected with the grid of the MOSFET tube, and the anode of the second voltage-regulator tube DZ2 is electrically connected with the drain of the MOSFET tube.
The voltage equalizing circuit shown in fig. 7 has the function of equalizing the voltage of the clamping voltage of the multi-stage main power MOSFET of the clamping circuit, so that the power grade of the clamping circuit and the reliability of the MOSFET are effectively improved.
The voltage-sharing circuit comprises at least two voltage-sharing units which are sequentially connected in series, each voltage-sharing unit comprises a ninth resistor R24, one end of each ninth resistor R24 is electrically connected with the external input end, the other end of each ninth resistor R24 is electrically connected with one end of a tenth resistor R17, the other end of each tenth resistor R17 is electrically connected with the grid electrode of an MOSFET, the external input end is electrically connected with the cathode of a fifth voltage-stabilizing tube DZ5, and the anode of the fifth voltage-stabilizing tube DZ5 is electrically connected with one end, deviating from the external input end, of the ninth resistor R24.
In the voltage equalizing circuit, VTH2 is a second-stage grid (G), VTH1 is a first-stage grid (G), a third voltage-regulator tube DZ3 is a second-stage clamping diode, a fifth diode D4 is a temperature drift suppression diode, a fifth voltage-regulator tube DZ5 is a first-stage clamping diode, and a fourth diode D7 is a temperature drift suppression diode. The sixteenth resistor R22 and the tenth resistor R17 are current limiting resistors, and the seventeenth resistor R23 and the ninth resistor R24 are voltage dividing resistors.
If the MOSFET is a multi-stage MOSFET which is connected in series, the number of the MOSFET is increased on the basis. In practical application, the power can be divided into 6-8 stages at most according to the power condition, and the series connection is divided into four MOSFET tubes which are connected in series.
The output voltage regulating circuit shown in fig. 8 has a function of setting an output voltage. In the figure, an eleventh resistor R19, a twelfth resistor R20 and a thirteenth resistor R21 are resistors for setting output voltage and dividing voltage, a fourth triode VT4 and a fifth triode VT5 form a constant current source, and an eighteenth resistor R18 is a current-limiting resistor.
When the output voltage is less than the set voltage, the fourth triode VT4 is not conducted, the output of the Vo1 is not clamped, when the output voltage is greater than the set voltage, the fourth triode VT4 is conducted, the voltage of the Vo1 is clamped to the set voltage, and the voltage surge suppression function is realized because the Vo1 is the drain electrode of the second-stage clamping MOSFET.
The output voltage regulating circuit comprises an eleventh resistor R19, a twelfth resistor R20 and a thirteenth resistor R21 which are sequentially connected in series, the eleventh resistor R19 is electrically connected with an external output end, the thirteenth resistor R21 is grounded, and one end of the thirteenth resistor R21 departing from the ground end and a fourth triode VThe base electrode of the T4 is electrically connected, the collector electrode of the fourth triode VT4 is electrically connected with the external output end, the emitter electrode of the fourth triode VT4 is electrically connected with the emitter electrode of the fifth triode VT5, the collector electrode of the fifth triode VT5 is electrically connected with a power supply, and the base electrode of the fifth triode VT5 is electrically connected with the V2813-5 of the UCC2813refAnd an emitter of the fifth triode VT5 is electrically connected with one end of a fourteenth resistor R21, and the other end of the fourteenth resistor R21 is grounded.
Example 2
In order to improve the voltage sharing accuracy, a diode is added on the basis of using resistor voltage sharing in fig. 7, specifically, the voltage sharing circuit further includes a fourth diode D7, an anode of the fourth diode D7 is electrically connected to the external input end, and a cathode of the fourth diode D7 is electrically connected to a cathode of the fifth voltage regulator tube DZ 5.
The high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit provided by the invention has the advantages of low power consumption, high precision and long working time, effectively breaks monopoly of western countries in the field, has strong practicability and is worthy of popularization.
The above disclosure is only for the preferred embodiments of the present invention, but the embodiments of the present invention are not limited thereto, and any variations that can be made by those skilled in the art are intended to fall within the scope of the present invention.

Claims (7)

1. A voltage surge suppression circuit of high-power multichannel series-parallel voltage sharing, characterized by, includes:
the external input end is electrically connected with one end of a first capacitor CA, and the other end of the first capacitor CA is grounded;
the external output end is electrically connected with one end of a second capacitor CB, and the other end of the second capacitor CB is grounded;
the clamping circuit is connected between the external input end and the external output end in series, the clamping circuit comprises at least two stages of clamping modules which are connected in series in sequence, each clamping module comprises at least two clamping units which are connected in parallel, and each clamping unit comprises:
the source electrode of the MOSFET is electrically connected with the external input end, the drain electrode of the MOSFET is electrically connected with the rear-stage clamping module, the gate electrode of the MOSFET is electrically connected with one end of a third capacitor C2, the other end of the third capacitor C2 is grounded, one end of the third capacitor C2, which is far away from the ground end, is electrically connected with one end of a first resistor R2, and the other end of the first resistor R2 is electrically connected with the drain electrode of the MOSFET;
further comprising:
the power supply circuit is used for ensuring normal power supply of a post-stage line, and the input end of the power supply circuit is connected with the external input end;
the oscillating circuit is used for providing square waves with set frequency for a rear-stage circuit, and the input end of the oscillating circuit is connected with the output end of the power supply circuit;
the bootstrap circuit is used for providing a grid driving voltage for the clamping unit, and the output end of the oscillating circuit is connected with the input end of the bootstrap circuit;
the voltage equalizing circuit is used for equalizing the clamping voltage of the MOSFET of the clamping unit;
the output voltage regulating circuit is used for setting output voltage, the input end of the output voltage regulating circuit is electrically connected with the external input end, and the output end of the output voltage regulating circuit is electrically connected with the external output end.
2. The voltage surge suppression circuit for high-power multi-path series-parallel voltage sharing according to claim 1, wherein the power supply circuit comprises a second resistor R1, a first triode VT1, a first diode D1, a first voltage regulator DZ1 and a fourth capacitor C1, one end of the second resistor R1 is electrically connected to the external input terminal, the other end of the second resistor R1 is electrically connected to the anode of the first diode D1, the cathode of the first diode D1 is electrically connected to the cathode of the first voltage regulator DZ1, and the anode of the first voltage regulator DZ1 is grounded; the anode of the first diode D1 is electrically connected to the base of the first transistor VT1, the emitter of the first transistor VT1 is electrically connected to one end of the fourth capacitor C1, the other end of the fourth capacitor C1 is grounded, and the collector of the first transistor VT1 is electrically connected to the external input terminal.
3. A high power multi-path series-parallel voltage-sharing voltage surge suppression circuit according to claim 1, wherein said oscillator circuit comprises:
the triangular wave generating circuit comprises a pulse width modulator IC1, the pulse width modulator IC1 is UCC2813-5, an FB port, a CS port and a GND port of the UCC2813-5 are all grounded, a COMP port is electrically connected with one end of a fifth capacitor C11, the other end of the fifth capacitor C11 is grounded, an R/C port is electrically connected with one end of a sixth capacitor C10, the other end of the sixth capacitor C10 is grounded, and V is converted into square wavesccPort electric connection power supply, VrefThe port is electrically connected with one end of the fifth capacitor C11, which is far away from the ground end, and one end of the sixth capacitor C10, which is far away from the ground end, is electrically connected with one end of a third resistor R10;
the square wave output circuit comprises a comparator IC2, wherein the non-inverting input end of the comparator IC2 is electrically connected with one end of the sixth capacitor C10, which is away from the ground, the inverting input end of the comparator IC2 is electrically connected with one ends of a fourth resistor R11 and a fifth resistor R12, respectively, the other end of the fourth resistor R11 is electrically connected with the other end of the third resistor R10, the other end of the fifth resistor R12 is grounded, the positive power port of the comparator IC2 is electrically connected with a power supply and one end of a seventh capacitor C12, the other end of the seventh capacitor C12 is grounded, the negative power port of the comparator IC2 is grounded, the output end of the comparator IC2 is electrically connected with one ends of the sixth resistor R13 and the seventh resistor R14, the other end of the sixth resistor R13 is electrically connected with the power supply, and the other end of the seventh resistor R14 is electrically connected with the bases VT2 and the VT3, the emitter of the second triode VT2 is electrically connected with the emitter of the third triode VT3, the collector of the second triode VT2 is grounded, and the collector of the third triode VT3 is electrically connected with a power supply.
4. A high-power multi-path series-parallel voltage-sharing voltage surge suppressing circuit as claimed in claim 3, wherein said bootstrap circuit includes at least two bootstrap units, said bootstrap unit includes a seventh capacitor C13 having one end electrically connected to the emitter of said third transistor VT3, the other end of said seventh capacitor C13 is electrically connected to the anode of the second diode D2 and the cathode of the third diode D3, respectively, the anode of said third diode D3 is electrically connected to one end of an eighth capacitor C14, the other end of said eighth capacitor C14 is electrically connected to the cathode of said second diode D2, the cathode of said second diode D2 is also electrically connected to one end of an eighth resistor R15, the other end of said eighth resistor R15 is electrically connected to the cathode of the second regulator DZ2, the anode of said second regulator DZ2 is electrically connected to the anode of said third diode D3; the cathode of the second voltage-regulator tube DZ2 is electrically connected with the grid of the MOSFET tube, and the anode of the second voltage-regulator tube DZ2 is electrically connected with the drain of the MOSFET tube.
5. The high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit according to claim 4, wherein the voltage-sharing circuit comprises at least two voltage-sharing units connected in series in sequence, the voltage-sharing unit comprises a ninth resistor R24 electrically connected with the external input end at one end, the other end of the ninth resistor R24 is electrically connected with one end of a tenth resistor R17, the other end of the tenth resistor R17 is electrically connected with the gate of the MOSFET, the external input end is electrically connected with the cathode of a fifth voltage-regulator tube DZ5, and the anode of the fifth voltage-regulator tube DZ5 is electrically connected with one end of the ninth resistor R24 away from the external input end.
6. The high-power multi-path series-parallel voltage-sharing voltage surge suppression circuit according to claim 5, further comprising a fourth diode D7, wherein an anode of the fourth diode D7 is electrically connected to the external input terminal, and a cathode of the fourth diode D7 is electrically connected to a cathode of the fifth voltage regulator tube DZ 5.
7. A high power multi-way series-parallel connection as claimed in claim 3The voltage-sharing voltage surge suppression circuit is characterized in that the output voltage regulation circuit comprises an eleventh resistor R19, a twelfth resistor R20 and a thirteenth resistor R21 which are sequentially connected in series, the eleventh resistor R19 is electrically connected with an external output end, the thirteenth resistor R21 is grounded, one end of the thirteenth resistor R21 departing from the ground end is electrically connected with a base electrode of a fourth triode VT4, a collector electrode of the fourth triode VT4 is electrically connected with the external output end, an emitter electrode of the fourth triode VT4 is electrically connected with an emitter electrode of a fifth triode VT5, a collector electrode of the fifth triode VT5 is electrically connected with a power supply, and a base electrode of the fifth triode VT5 is electrically connected with a V of UCC2813-5refAnd an emitter of the fifth triode VT5 is electrically connected with one end of a fourteenth resistor R21, and the other end of the fourteenth resistor R21 is grounded.
CN202110211346.6A 2021-02-25 2021-02-25 High-power multi-path series-parallel voltage-sharing voltage surge suppression circuit Pending CN112838573A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023071096A1 (en) * 2021-11-01 2023-05-04 宁德时代新能源科技股份有限公司 Bleeder circuit, battery management system, battery, protection method, and electronic apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023071096A1 (en) * 2021-11-01 2023-05-04 宁德时代新能源科技股份有限公司 Bleeder circuit, battery management system, battery, protection method, and electronic apparatus

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