CN112818375B - Encryption system for recording information transmission - Google Patents
Encryption system for recording information transmission Download PDFInfo
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- CN112818375B CN112818375B CN202110248781.6A CN202110248781A CN112818375B CN 112818375 B CN112818375 B CN 112818375B CN 202110248781 A CN202110248781 A CN 202110248781A CN 112818375 B CN112818375 B CN 112818375B
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- 230000005540 biological transmission Effects 0.000 title claims abstract description 17
- 238000000034 method Methods 0.000 abstract description 11
- 238000005336 cracking Methods 0.000 abstract 1
- 101100524644 Toxoplasma gondii ROM4 gene Proteins 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/60—Protecting data
- G06F21/602—Providing cryptographic facilities or services
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
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Abstract
The invention discloses an encryption system for recording information transmission, which comprises a recording module, a processor module, a memory and a configurable encryption and decryption chip, wherein the processor module is used for storing the encryption and decryption chip; the recording module, the memory and the configurable encryption and decryption chip are all connected with the processor module; the processor module acquires the recording data of the recording module, selects recording data with specific length at random positions, analyzes a mel cepstrum coefficient according to the recording data with specific length, and combines the mel cepstrum coefficient with personal characteristic parameters to form configuration parameters; generating an original binary file which can be configured to a configurable encryption and decryption chip by the configuration parameters and the encryption and decryption algorithm; the configurable encryption and decryption chip can be controlled by the processor to reconfigure and realize encryption and decryption operation on the recording data in the memory. The invention improves the data acquisition process and the data safety degree after data acquisition, and also improves the cracking difficulty.
Description
Technical Field
The invention relates to the field of information security, in particular to an encryption system for recording information transmission.
Background
In international business negotiations, english is used as a general language, and often as a communication language in negotiations of parties. However, in international business negotiations, in order to maintain the interests of each party, it is necessary to record the contents of the conversation in the business negotiations and then transmit the recorded voice to the headquarters of the company for analysis and judgment to perform the next business activities better. However, how to ensure the security of information is a very important issue in the recording and transmitting process.
Digital recording refers to the process of recording an analog audio signal to a digital storage device via an analog-to-digital converter, and converting the digital signal to an analog signal when audio playback is desired. In the prior art, the encryption equipment is adopted to encrypt and store the recording data, and the encryption algorithm of a fixed key or a variable key is adopted to encrypt the data and then transmit the data. However, the method is easy to crack, and can be uploaded locally only after complex encryption and decryption are performed, so that online encryption and decryption real-time transmission cannot be realized.
Disclosure of Invention
The invention provides an encryption system for recording information transmission, which aims at solving the problems in the background technology, wherein one technical scheme is as follows:
an encryption system for recording information transmission comprises a recording module, a processor module, a memory and a configurable encryption and decryption chip;
the recording module, the memory and the configurable encryption and decryption chip are all connected with the processor module;
the processor module acquires the recording data of the recording module, selects recording data with specific length at random positions, analyzes a mel cepstrum coefficient according to the recording data with specific length, and combines the mel cepstrum coefficient with personal characteristic parameters to form configuration parameters; generating an original binary file which can be configured to a configurable encryption and decryption chip by the configuration parameters and the encryption and decryption algorithm;
the configurable encryption and decryption chip can be controlled by the processor to reconfigure and realize encryption and decryption operation on the recording data in the memory.
Further, a second memory is further connected between the processor and the configurable encryption and decryption chip, and is used for storing the original binary file.
Further, the configurable encryption and decryption chip is an FPGA chip, the FPGA chip is configured into a passive configuration mode, and the processor module controls the FPGA chip to read the original binary file in the second memory and realize online reconfiguration of the FPGA chip.
Furthermore, the memory is also connected with the FPGA chip and used for storing encrypted recording data.
Furthermore, the memory is a dual-port ROM and is used for temporarily storing the recording data of the recording module and the encrypted data of the FPGA, and the FPGA covers the encrypted recording data with the original recording data acquired by the recording module.
Further, the second memory is a FLASH memory, and the FLASH memory is only used for storing configuration files configuring the FPGA.
Further, the processor module takes STM32 series processors as cores.
Further, the recording module comprises a controller and a dual-port SRAM connected with the controller, the controller is stored in the dual-port SRAM after acquiring digital audio data, and the processor module is connected with the dual-port SRAM and acquires the digital audio data stored in the dual-port SRAM; the controller is simultaneously connected with the dual-port ROM and simultaneously stores the digital audio data on the dual-port ROM for the FPGA to encrypt and cover the data.
The invention also discloses a recording encryption and decryption method, which comprises the following steps:
s1, selecting recording data with specific length at a random position;
s2, analyzing characteristic parameters of the recording data;
s3, generating encryption and decryption algorithm configuration parameters according to the characteristic parameters and the personal secret key;
s4, combining the configuration parameters and the encryption and decryption algorithm to generate an original binary file, and configuring the original binary file into a configurable encryption and decryption chip;
s5, the configurable encryption and decryption chip completes encryption and decryption operation on the recording data.
Preferably, the selecting method in S1 is as follows: and reading the recording time length, randomly selecting the recording time, and determining the recording data with a specific length according to the intermittent time of the recording strength.
Preferably, the analysis method in S2 specifically includes: and calculating the mel-frequency cepstrum coefficient of the recording data in the step S1 as a characteristic parameter.
Preferably, the generating step of the configuration parameter in S3 is as follows: taking personal characteristic parameters of a record equipment holder read in advance, such as fingerprint data or a set password, as a personal secret key; reading the mel-frequency coefficient in the step S2; and combining the personal secret key and the mel-frequency spectrum combination to form a configuration sequence, wherein the sequence order or the reverse sequence of the configuration sequence is used as the configuration parameter of the encryption and decryption algorithm.
Preferably, the encryption and decryption algorithm in S3 may be an AES encryption and decryption algorithm (AES encryption and decryption), the configuration parameter is a key used as the AES encryption and decryption algorithm, and the key length is 192 bits or 256 bits.
Preferably, the configurable encryption and decryption chip in S4 is an FPGA chip, and the original binary file is generated by software used in cooperation with the FPGA chip and used for reconfiguring the FPGA chip.
Preferably, after the encryption and decryption operation in S5 is completed, the data after the encryption and decryption operation is stored in the memory.
The invention adopts the personal characteristic and the recording data characteristic as keys of the data encryption and decryption algorithm, adopts the reconfigurable encryption and decryption algorithm, timely covers the original data after the encryption and decryption operation is carried out on the data, prevents the recording data from being stolen, adopts the encryption and decryption algorithm capable of reconfiguring the keys and takes the randomly selected recording data characteristic as the key, improves the data acquisition process and the data safety degree after the data acquisition, improves the decryption difficulty, and realizes the online encryption and decryption real-time transmission.
The technical scheme of the invention is not only suitable for encrypting the transmission of English recording information, but also suitable for encrypting the transmission of other voice information.
Drawings
FIG. 1 is a flow chart of a recording encryption and decryption method.
Fig. 2 is a configuration step of the encryption and decryption algorithm in step S3.
FIG. 3 is a block diagram of a recording encryption and decryption system.
Fig. 4 is a diagram of a hardware architecture for encrypting and decrypting a recording.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
As shown in fig. 1-2, a recording encryption and decryption method comprises the following steps:
s1, selecting recording data with specific length at a random position;
s2, analyzing characteristic parameters of the recording data;
s3, generating encryption and decryption algorithm configuration parameters according to the characteristic parameters and the personal secret key;
s4, combining the configuration parameters and the encryption and decryption algorithm to generate an original binary file, and configuring the original binary file into the configurable encryption and decryption chip 3;
s5, the configurable encryption and decryption chip 3 completes encryption and decryption operation on the recording data.
As a preferred embodiment, the selecting method in S1 is as follows: and reading the recording time length, randomly selecting the recording time, and determining the recording data with a specific length according to the intermittent time of the recording strength.
As a preferred embodiment, the analysis method in S2 specifically includes: and calculating the mel-frequency cepstrum coefficient of the recording data in the step S1 as a characteristic parameter.
As a preferred embodiment, the generating step of the configuration parameter in S3 is as follows: taking personal characteristic parameters of a record equipment holder read in advance, such as fingerprint data or a set password, as a personal secret key; reading the mel-frequency coefficient in the step S2; and combining the personal secret key and the mel-frequency spectrum combination to form a configuration sequence, wherein the sequence order or the reverse sequence of the configuration sequence is used as the configuration parameter of the encryption and decryption algorithm.
As a preferred embodiment, the encryption and decryption algorithm in S3 may be an AES encryption and decryption algorithm (AES encryption and decryption), and the configuration parameter is a key used as the AES encryption and decryption algorithm, and the key length is 192 bits or 256 bits.
As a preferred embodiment, the configurable encryption/decryption chip 3 in S4 is an FPGA chip 3', and the original binary file is generated by software used with the FPGA chip 3' and used to reconfigure the FPGA chip 3'.
As a preferred embodiment, after the encryption and decryption operations in S5 are completed, the data after the encryption and decryption operations are stored in the memory 4.
Example 2
As shown in fig. 3-4, the invention also provides an encryption system for recording information transmission, which comprises a recording module 1, a processor module 2, a memory 4 and a configurable encryption and decryption chip 3;
the recording module 1, the memory 4 and the configurable encryption and decryption chip 3 are all connected with the processor module 2;
the processor module 2 acquires the recording data of the recording module 1, selects recording data with specific length at random positions, analyzes a mel cepstrum coefficient according to the recording data with specific length, and combines the mel cepstrum coefficient with personal characteristic parameters to form configuration parameters; generating an original binary file which can be configured to the configurable encryption and decryption chip 3 by the configuration parameters and the encryption and decryption algorithm;
the configurable encryption and decryption chip 3 can be reconfigured under the control of the processor, and the encryption and decryption operation on the recording data in the memory 4 is realized.
As a preferred embodiment, a second memory 5 is further connected between the processor and the configurable encryption/decryption chip 3, for storing the original binary file.
As a preferred embodiment, the configurable encryption/decryption chip 3 is an FPGA chip 3', the FPGA chip 3' is configured in a passive configuration mode, and the processor module 2 controls the FPGA chip 3 'to read the original binary file in the second memory 5, and realizes online reconfiguration of the FPGA chip 3'.
As a preferred embodiment, the memory 4 is also connected to the FPGA chip 3' for storing encrypted recording data.
As a preferred embodiment, the memory 4 is a dual-port ROM4' for temporarily storing the recording data of the recording module 1 and the encrypted data of the FPGA chip 3', and the FPGA chip 3' covers the encrypted recording data with the original recording data obtained by the recording module 1.
As a preferred embodiment, the second memory 5 is a FLASH5' memory 4, and the FLASH5' memory 4 is only used for storing a configuration file for configuring the FPGA chip 3'.
As a preferred embodiment, the processor module 2 is implemented with an STM32 processor 2' as a core;
as a preferred implementation manner, the recording module 1 includes a controller 1-1 and a dual-port SRAM1-2 connected to the controller 1-1, the controller is stored in the dual-port SRAM1-2 after acquiring digital audio data, and the STM32 processor 2' is connected to the dual-port SRAM1-2 and acquires the digital audio data stored in the dual-port SRAM 1-2; the controller 1-1 is simultaneously connected with the dual-port ROM4' and simultaneously stores digital audio data on the dual-port ROM4' for the FPGA chip 3' to encrypt and cover the data.
The invention adopts the personal characteristic and the recording data characteristic as keys of the data encryption and decryption algorithm, adopts the reconfigurable encryption and decryption algorithm, timely covers the original data after the encryption and decryption operation is carried out on the data, prevents the recording data from being stolen, adopts the encryption and decryption algorithm capable of reconfiguring the keys and takes the randomly selected recording data characteristic as the key, improves the data acquisition process and the data safety degree after the data acquisition, improves the decryption difficulty, and realizes the online encryption and decryption real-time transmission.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1. An encryption system for transmission of recorded information, which is characterized in that: the encryption system comprises a recording module, a processor module, a memory and a configurable encryption and decryption chip;
the recording module, the memory and the configurable encryption and decryption chip are all connected with the processor module;
the processor module acquires the recording data of the recording module, selects recording data with specific length at random positions, analyzes a mel cepstrum coefficient according to the recording data with specific length, and combines the mel cepstrum coefficient with personal characteristic parameters to form configuration parameters; generating an original binary file which can be configured to a configurable encryption and decryption chip by the configuration parameters and the encryption and decryption algorithm;
the configurable encryption and decryption chip can be controlled by the processor to reconfigure and realize encryption and decryption operation on recording data in the memory;
the recording module comprises a controller and a dual-port SRAM connected with the controller, wherein the controller is stored in the dual-port SRAM after acquiring digital audio data, and the processor module is connected with the dual-port SRAM and acquires the digital audio data stored in the dual-port SRAM; the controller is simultaneously connected with the dual-port ROM and simultaneously stores the digital audio data on the dual-port ROM for the FPGA to encrypt and cover the data.
2. The encryption system for transmission of recorded information according to claim 1, wherein: and a second memory is also connected between the processor and the configurable encryption and decryption chip and is used for storing the original binary file.
3. The encryption system for transmission of recorded information according to claim 1, wherein: the configurable encryption and decryption chip is an FPGA chip, the FPGA chip is configured into a passive configuration mode, and the processor module controls the FPGA chip to read the original binary file in the second memory and realize online reconfiguration of the FPGA chip.
4. An encryption system for transmission of recorded information according to claim 3, wherein: the storage is a dual-port ROM and is used for temporarily storing the recording data of the recording module and the encrypted data of the FPGA, and the FPGA covers the encrypted recording data with the original recording data acquired by the recording module.
5. An encryption system for transmission of recorded information according to claim 3, wherein: the processor module takes STM32 series processors as cores.
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