CN112817548A

CN112817548A - Electronic device, display control method, display apparatus, and storage medium

Info

Publication number: CN112817548A
Application number: CN202110117276.8A
Authority: CN
Inventors: 刘洪高
Original assignee: Zhejiang Dahua Technology Co Ltd
Current assignee: Zhejiang Dahua Technology Co Ltd
Priority date: 2021-01-28
Filing date: 2021-01-28
Publication date: 2021-05-18
Anticipated expiration: 2041-01-28
Also published as: CN112817548B

Abstract

The application discloses an electronic device, a display control method, a display device and a storage medium. The method is used for solving the problem that the output of the collected pictures is not synchronous. In the embodiment of the application, a sub-graph sent by appointed acquisition port acquisition equipment is adopted and transmitted to a corresponding sub-card, the sub-card performs image quality analysis on the sub-graph sent by the appointed acquisition port, and when the image quality analysis result meets the appointed image quality requirement, a quality qualified notice is sent to a main control module; the main control module responds to the condition that the subgraph homogeneity quantity acquired by each appointed acquisition port is qualified, and controls each appointed acquisition port to perform synchronous processing so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time; and the daughter card sends the subgraph acquired by the appointed acquisition port to the corresponding display equipment.

Description

Electronic device, display control method, display apparatus, and storage medium

Technical Field

The present application relates to the field of image processing technologies, and in particular, to an electronic device, a display control method, a display apparatus, and a storage medium.

Background

The resolution ratio of the front-end acquisition equipment and the resolution ratio of the rear-end display equipment in the security scene have no rigid requirements. Therefore, the problems of high resolution of the front-end acquisition device and low resolution of the back-end display device often occur. In this case, either the display is scaled or multiple back end display devices are used. In the field of mosaic control, most of the pictures are acquired by dividing a frame of collected picture and distributing the divided picture to different screens for display.

However, the inventor finds that the resolution of the input source in this way is limited, and the maximum resolution of the image acquired by one acquisition port depends on the performance of the chip, so that there is no way to acquire the picture with ultra-high definition or even larger resolution by one acquisition port, or the acquisition cost is very high, which severely limits the use scene; on the other hand, the definition of the single-port acquired picture after zooming and dividing is reduced. In the reality scene, the signal source of collection and the display device of demonstration are various, can touch the inconsistent condition of signal source and display device frame rate many times, for example the collection is 60 Hertz (Hz), but the display end is specific 30Hz certainly, just need take out the frame with the adaptation demonstration to the signal source under this condition, but when taking out the frame operation, different collection mouths are independent each other, therefore take out the frame cadence and can't accomplish unanimously, will exert an influence to the demonstration, cause the picture after the collection asynchronous.

Disclosure of Invention

An object of the present application is to provide an electronic device, a control method, an apparatus, an electronic device, and a storage medium, which are used to solve the following problems: the output of the collected pictures is asynchronous.

In a first aspect, an embodiment of the present application provides an electronic device, where the electronic device is provided with a main control module and a plurality of designated acquisition ports, and each of the designated acquisition ports is disposed on a corresponding daughter card, where:

each appointed acquisition port is used for acquiring a sub-image sent by image acquisition equipment and transmitting the acquired sub-image to a corresponding sub-card, the image acquisition equipment is used for recording an image and dividing each recorded frame of image into a plurality of sub-images, and different appointed acquisition ports are used for acquiring different sub-images of the same frame of image;

the daughter card is used for carrying out image quality analysis on the subgraph sent by the appointed acquisition port which is arranged in the daughter card, and sending a quality qualified notice to the main control module when the image quality analysis result meets the appointed image quality requirement;

the main control module is used for controlling each appointed acquisition port to carry out synchronous processing in response to the fact that the subgraph homogeneity quantity acquired by each appointed acquisition port is qualified, so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time;

and the daughter card is also used for sending the sub-image collected by the specified collection port built in the daughter card to the corresponding display equipment.

In one embodiment, a chip and a field programmable gate array FPGA corresponding to the designated acquisition port are arranged on the daughter card of each designated acquisition port.

In an embodiment, the daughter card is specifically configured to, for each designated acquisition port built in the daughter card, perform image quality analysis on a sub-image sent by the designated acquisition port by using the chip corresponding to the designated acquisition port.

In one embodiment, the electronic device is further provided with:

and the shared cache is used for storing the working state of each specified acquisition port.

In one embodiment, the electronic device further includes a locking channel corresponding to each of the designated acquisition ports, where the locking channel is used to store an image quality state in a working state of the designated acquisition port, where:

the daughter card is specifically configured to, for any one of the designated acquisition ports built in the daughter card, respond that the sub-image acquired by the designated acquisition port satisfies the designated image quality requirement, and update the image quality state of the designated acquisition port in the shared cache to be a quality-qualified state;

the main control module is specifically configured to, for any one of the designated acquisition ports, determine to acquire the quality-qualified notification of the designated acquisition port in response to detecting that the image quality state of the designated acquisition port is a quality-qualified state in the shared cache.

In one embodiment, the electronic device further includes a usage channel corresponding to each of the designated acquisition ports, wherein:

the sub card is further used for updating the working state of the use channel of the specified acquisition port to be a use state by the shared cache aiming at any specified acquisition port built in the sub card and the sub card;

the main control module is further configured to obtain a working state of the use channel of each specified acquisition port from the shared cache.

In one embodiment, each of the designated acquisition ports is further provided with at least one buffer address, wherein:

the daughter card is specifically configured to, for any one of the designated acquisition ports built in the daughter card, store the subgraph acquired by the designated acquisition port in a storage space corresponding to the buffer address.

In one embodiment, the main control module is specifically configured to, in response to that the subgraph homogeneity quantity acquired by each of the designated acquisition ports is qualified, send a synchronization instruction to the daughter card in which each of the designated acquisition ports is located;

and the daughter card is also used for modifying the storage address of the sub-graph into a designated address according to the synchronous indication and numbering each frame of acquired sub-graphs in sequence from the designated address.

In one embodiment, each daughter card is further configured to discard the sub-graph collected before the storage address of the sub-graph is modified to the designated address.

In a second aspect, an embodiment of the present application provides a display control method applied to an electronic device, where the method includes:

acquiring the image quality of sub-images acquired by each appointed acquisition port of the electronic equipment; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

and in response to that the image quality of the subgraph acquired by each appointed acquisition port meets the appointed image quality requirement, performing synchronous processing on each appointed acquisition port so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time.

In one embodiment, the obtaining the image quality of the subgraph acquired by each designated acquisition port of the electronic device includes:

and acquiring the image quality of each appointed acquisition port from a shared cache, wherein for each appointed acquisition port, the image quality of the appointed acquisition port in the shared cache is written into the shared cache by a daughter card where the appointed acquisition port is located.

In one embodiment, each of the designated acquisition ports corresponds to a usage channel, and the method further includes:

detecting the states of the use channels of all the acquisition ports in the shared cache; for each designated acquisition port, the state of a channel used by the designated acquisition port in the shared cache is written into the shared cache by a daughter card where the designated acquisition port is located;

and if the using channel is detected to be in the using state, determining the acquisition port corresponding to the using channel as the appointed acquisition port.

In one embodiment, the performing synchronization processing on the designated acquisition ports includes:

and sending a synchronous indication to a daughter card where each appointed acquisition port is located, so that the memory address of the daughter card for modifying the sub-graph is an appointed address, and numbering each frame of acquired sub-graphs in sequence from the appointed address.

In a third aspect, an embodiment of the present application provides a display method of an electronic device, where the method includes:

performing image quality analysis on the subgraph acquired by the appointed acquisition port to obtain a quality analysis result; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

and if the subgraph acquired by the appointed acquisition port meets the quality requirement of the appointed image, sending a quality qualified notice to a main control module, so that the main control module synchronously processes each appointed acquisition port according to the quality qualified notice to enable each appointed acquisition port to acquire different subgraphs of the same frame of image at the same time.

In one embodiment, the sending the quality-qualified notification to the main control module includes:

and updating the image quality state of the specified acquisition port into a quality qualified state in a shared cache, so that the main control module determines the image quality of the subgraph acquired by the specified acquisition port based on the shared cache.

In one embodiment, the method further comprises:

and responding to a synchronous instruction sent by a main control module, modifying the storage address of the sub-graph collected by the specified collection port to be a specified address, and numbering the collected sub-graphs of each frame in sequence from the specified address.

In a fourth aspect, an embodiment of the present application provides a display control apparatus applied to an electronic device, where the apparatus includes:

the acquisition module is used for acquiring the image quality of the subgraph acquired by each appointed acquisition port of the electronic equipment; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

and the synchronous processing module is used for responding that the image quality of the subgraph acquired by each appointed acquisition port meets the appointed image quality requirement, and then synchronously processing each appointed acquisition port so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time.

In one embodiment, the obtaining module includes:

and the image quality acquisition module is used for acquiring the image quality of each appointed acquisition port from a shared cache, wherein for each appointed acquisition port, the image quality of the appointed acquisition port in the shared cache is written into the shared cache by a daughter card where the appointed acquisition port is located.

In one embodiment, each of the designated collection ports corresponds to a usage channel, and the apparatus further includes:

a used channel state detection module for detecting the states of the used channels of all the acquisition ports in the shared cache; for each designated acquisition port, the state of a channel used by the designated acquisition port in the shared cache is written into the shared cache by a daughter card where the designated acquisition port is located;

and the appointed acquisition port determining module is used for determining the acquisition port corresponding to the using channel as the appointed acquisition port if the using channel is detected to be in the using state.

In one embodiment, the synchronization processing module includes:

and the synchronous indication sending module is used for sending a synchronous indication to the daughter card where each appointed acquisition port is located so that the storage address of the daughter card modification sub-graph is an appointed address and numbering each acquired sub-graph in sequence from the appointed address.

In a fifth aspect, an embodiment of the present application provides a display device of an electronic device, where the display device includes:

the image quality analysis module is used for carrying out image quality analysis on the subgraph acquired by the appointed acquisition port to obtain a quality analysis result; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

and the quality qualification notification sending module is used for sending a quality qualification notification to the main control module when the subgraph acquired by the appointed acquisition port meets the quality requirement of the appointed image, so that the main control module synchronously processes the appointed acquisition ports according to the quality qualification notification to enable the appointed acquisition ports to acquire different subgraphs of the same frame of image at the same time.

In one embodiment, the quality-qualified-notification sending module includes:

and the state updating module is used for updating the image quality state of the specified acquisition port into a quality qualified state in the shared cache, so that the main control module determines the image quality of the subgraph acquired by the specified acquisition port based on the shared cache.

In one embodiment, the apparatus further comprises:

and the address modification module is used for responding to the synchronous instruction sent by the main control module, modifying the storage address of the sub-graph acquired by the appointed acquisition port into an appointed address, and numbering each acquired frame of sub-graph in sequence from the appointed address.

In a sixth aspect, another embodiment of the present application further provides an electronic device, including at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform any one of the methods provided by the embodiments of the first aspect of the present application.

In a seventh aspect, another embodiment of the present application further provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program, and the computer program is configured to cause a computer to execute any one of the methods provided in the first aspect of the present application.

According to the embodiment of the application, a sub-graph sent by appointed acquisition port acquisition equipment is adopted and transmitted to a corresponding sub-card, the sub-card carries out image quality analysis on the sub-graph sent by the appointed acquisition port, and when the image quality analysis result meets the appointed image quality requirement, a quality qualified notice is sent to a main control module; the main control module responds to the condition that the subgraph homogeneity quantity acquired by each appointed acquisition port is qualified, and controls each appointed acquisition port to perform synchronous processing so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time; and the daughter card sends the subgraph acquired by the appointed acquisition port to the corresponding display equipment. Therefore, the application provides the electronic equipment and the control method for synchronizing the image output.

Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the application. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is an application scenario diagram of an electronic device according to an embodiment of the present application;

fig. 2a is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

fig. 2b is a schematic diagram of a display daughter card of an electronic device according to an embodiment of the present disclosure;

fig. 3 is a schematic diagram of an apparatus for designating a collection port of an electronic device according to an embodiment of the present disclosure;

fig. 4 is a schematic diagram illustrating an update of a channel of a collection port in a shared cache of an electronic device according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of an electronic device updating a usage channel in a shared cache according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of a buffer address of a collection port of an electronic device according to an embodiment of the present disclosure;

fig. 7 is a schematic diagram of a mark frame number of an electronic device according to an embodiment of the present disclosure;

fig. 8 is a flowchart of a display control method applied to an electronic device according to an embodiment of the present disclosure;

fig. 9 is a flowchart of a display method applied to an electronic device according to an embodiment of the present disclosure;

fig. 10 is a device diagram of a display control method applied to an electronic device according to an embodiment of the present application;

fig. 11 is a schematic device diagram of a display method applied to an electronic device according to an embodiment of the present application;

fig. 12 is a schematic view of an electronic device and a display control method applied to the electronic device according to an embodiment of the present disclosure.

Detailed Description

In the embodiment of the present application, the term "and/or" describes an association relationship of associated objects, and means that there may be three relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

In the embodiments of the present application, the term "plurality" means two or more, and other terms are similar thereto.

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The inventor researches and discovers that most of synchronization schemes in the field of splicing control are based on the fact that an acquired picture is displayed on different screens after being segmented, but the resolution of an input source in the mode is limited, the maximum resolution of single-port acquisition depends on the performance of a chip, the cost of acquisition of pictures with ultrahigh definition and even larger resolution is very high without a method, and the use scene is severely limited; on the other hand, the definition of the single-port acquired picture after zooming and dividing is reduced. Therefore, the technology that the large-scale picture is divided by the display card and then is collected by the plurality of collecting ports and displayed is increasingly applied.

The inventor researches and discovers that in a real scene, collected signal sources and display devices are various, the situation that frame rates of a source and a destination are inconsistent can be met many times, for example, collection is 60Hz, but a display end is special 30Hz, under the situation, frame extraction is needed to be carried out on the source to be adaptive to display, but different collection ports for frame extraction are independent, so that frame extraction pace cannot be consistent, display is affected, and pictures after collection are asynchronous.

In view of the above, the present application provides an electronic device, a control method, an apparatus, an electronic device, and a storage medium to solve the above problems.

The invention conception of the application is as follows: the sub-image sent by the appointed acquisition port acquisition equipment is adopted and transmitted to the corresponding sub-card, the sub-card carries out image quality analysis on the sub-image sent by the appointed acquisition port, and when the image quality analysis result meets the appointed image quality requirement, the sub-card sends a quality qualified notice to the main control module; the main control module responds to the condition that the subgraph homogeneity quantity acquired by each appointed acquisition port is qualified, and controls each appointed acquisition port to perform synchronous processing so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time; and the daughter card sends the subgraph acquired by the appointed acquisition port to the corresponding display equipment.

The electronic device and the control method in the embodiments of the present application are described in detail below with reference to the accompanying drawings.

As shown in fig. 1, an application scenario diagram of an electronic device and a control method provided in the embodiment of the present application is shown, where the application scenario diagram includes: high speed bus 10, electronics 20, display device 30, and image capture device 40.

The image acquisition equipment 40 records images and divides each recorded frame of image into a plurality of sub-images, a sub-card is arranged on the electronic equipment 20, the sub-images sent by the image acquisition equipment 40 are acquired through an appointed acquisition port arranged in the sub-card, different appointed acquisition ports acquire the plurality of sub-images through the high-speed bus 10, and the acquired sub-images are transmitted to the corresponding sub-cards; the electronic equipment 20 performs image quality analysis on the subgraph sent by the appointed acquisition port, and sends a quality qualified notice to a main control module arranged in the electronic equipment 20 when the quality of an image quality analysis result is qualified; the main control module controls each appointed acquisition port to carry out synchronous processing when the subgraph acquired by each appointed acquisition port is qualified in quality; after the synchronization process is completed, the electronic device 20 sends the sub-graphs collected by the designated collection ports of the built-in sub-card and the sub-card to the corresponding display device 30 through the high-speed bus 10 for synchronous display.

For convenience of understanding, the following describes a flow of the electronic device and the display control method provided in the embodiments of the present application.

As shown in fig. 2a, a schematic structural diagram of an electronic device provided in an embodiment of the present application is shown, where the electronic device is provided with: the system comprises a main control module 201 and a plurality of acquisition sub-cards 202, wherein the acquisition sub-cards are also provided with appointed acquisition ports 203;

wherein: each appointed acquisition port 203 is arranged on a chip 204 internally arranged on the acquisition daughter card and used for acquiring a sub-image sent by image acquisition equipment and transmitting the acquired sub-image to the corresponding daughter card 202, the image acquisition equipment is used for recording an image and dividing each recorded frame of image into a plurality of sub-images, wherein different appointed acquisition ports 203 are used for acquiring different sub-images of the same frame of image;

the daughter cards include an acquisition daughter card and a display daughter card, in the embodiment of the present application, the daughter card shown in fig. 2a is the acquisition daughter card, and the daughter card shown in fig. 2b is the display daughter card.

The daughter card 202 is used for performing image quality analysis on a sub-image sent by a designated acquisition port 203 of the built-in daughter card, and sending a quality qualified notification to the main control module 201 when an image quality analysis result meets a designated image quality requirement;

before synchronous processing is carried out on the appointed acquisition ports, in order to ensure that all the acquisition ports are in a stable state, image quality detection needs to be carried out on the acquired images.

A chip 204 is also arranged on the daughter card and used for carrying out image quality analysis on the subgraph sent by the appointed acquisition port 203;

and also updates the operating status of the designated acquisition port 203 in the shared cache 206. The working state can comprise whether the acquisition port is started or not and whether the quality of the subgraph acquired by the acquisition port is qualified or not under the starting condition.

The main control module 201 is used for controlling each appointed acquisition port 203 to perform synchronous processing in response to the fact that the subgraph homogeneity quantity acquired by each appointed acquisition port 203 is qualified, so that each appointed acquisition port 203 acquires different subgraphs of the same frame of image at the same time;

the daughter card 202 is further configured to send the sub-images collected by the designated collection port 203 of the built-in and daughter card 202 to the corresponding display device;

the electronic device provided by the embodiment of the application is further provided with a shared cache 206, which is used for storing the working state of each designated acquisition port 203.

As shown in fig. 3, in an embodiment, each designated acquisition port corresponds to a locked channel 301, and the locked channel is used for storing an image quality state in the working state of the designated acquisition port.

Wherein: when the daughter card 202 executes updating of the image quality state in the shared cache, the updating may be implemented such that, for any designated acquisition port 203 built in the daughter card 202, in response to a sub-image acquired by the designated acquisition port 203 meeting a designated image quality requirement, the image quality state of the designated acquisition port 203 in the shared cache is updated to be an image qualified state;

in one embodiment, 1 bit or more bits may be used in the shared buffer 206 to store the state of image quality, and in the embodiment of the present application, 1 bit is taken as an example for illustration, for example: as shown in fig. 4, the locked channel of the designated acquisition port is updated from the state of 0 to the state of 1 in the shared buffer, and the image quality state of the designated acquisition port 203 in the shared buffer is updated to be the quality-qualified state.

In one embodiment, the working state of the acquisition ports can be maintained in a hard disk and stored as a state table, and the working state of each acquisition port can be known automatically by looking up the state table correspondingly.

When acquiring the quality-qualified notification, the main control module 201 may be implemented to determine, for any specified acquisition port 203, that the quality-qualified notification acquired to the specified acquisition port 203 is acquired in response to detecting that the image quality state of the specified acquisition port 203 is the quality-qualified state in the shared cache 206.

In an embodiment, as shown in fig. 3, the electronic device further includes a used channel 302 corresponding to each designated acquisition port;

when the daughter card updates the state of the use channel of the designated acquisition port in the shared cache, the method can be implemented as that aiming at any one designated acquisition port built in the daughter card, the FPGA205 corresponding to the designated acquisition port is controlled to update the working state of the use channel of the designated acquisition port of the shared cache to be the use state;

the state of the appointed acquisition card in the shared cache is updated to be the use state, and only the acquisition port in the use state can be monitored when the image quality acquired by the acquisition port is monitored to be qualified, so that the detection of all the acquisition ports is avoided, and the resources are saved.

In one embodiment, 1 bit or more bits may be used in the shared cache 206 to store the state of the used channel, and in the embodiment of the present application, 1 bit is taken as an example for illustration, for example: as shown in fig. 5, the FPGA205 updates the state of the usage channel of the designated acquisition port from 0 to 1 in the shared cache, that is, the FPGA205 updates the shared cache to update the working state of the usage channel of the designated acquisition port to the usage state.

In one embodiment, updating the status of the used channel in the shared cache may also be performed by looking up fields, for example: the FPGA205 updates the used channel of the designated acquisition port from an unused state to a used state in the shared cache.

After the state of the use channel is updated in the shared cache, the main control module needs to execute an operation of acquiring the working state of the use channel of each designated acquisition port from the shared cache.

In an embodiment, as shown in fig. 6, each designated acquisition port is further provided with at least one buffer address, and in this application, taking the example that the designated acquisition port is provided with 6 buffer addresses, for any designated acquisition port built in the daughter card, the daughter card stores the subgraph acquired by the designated acquisition port in the storage space corresponding to the buffer address.

In one embodiment, the specified collection port stores collected subgraphs in 6 storage spaces circularly when storing the subgraphs into the storage spaces corresponding to the buffer addresses.

In one embodiment, the circular storage is a round-robin storage in 6 storage spaces, for example: after the storage space corresponding to buf _1 is full, the storage space corresponding to buf _2 is stored.

In one embodiment, the main control module detects in the shared cache, and when detecting that all locking channels corresponding to the acquisition ports corresponding to the use channels in the use state are in a quality qualified state, that is, when the quality of sub-images acquired by each specified acquisition port is qualified, the main control module sends a synchronization instruction to the sub-card in which each specified acquisition port is located;

and the daughter card modifies the storage address of the sub-graph as a designated address according to the synchronization instruction, and numbers the acquired sub-graphs of each frame in sequence from the designated address to complete the synchronization processing.

In one embodiment, in response to the synchronization instruction of the master control module, the embodiment in which the FPGA205 modifies the storage address of the sub-diagram to the designated address is as follows: resetting the buffer area address of the appointed acquisition port corresponding to the FPGA205 as an appointed address so that the subgraph acquired by the appointed acquisition port starts to be stored from the storage space corresponding to the appointed buffer area address; for example, the acquisition port 1 stores the buffer address buf _3 before reset, the acquisition port 2 stores the buf _2 before reset, and the designated address is buf _0, after reset, the acquisition port 1 and the acquisition port 2 both start to store at buf _ 0.

When the FPGA205 performs sequential numbering on each frame of collected subgraphs from the designated address, the specific implementation is as follows: sequentially marking frame numbers for subgraphs of storage spaces corresponding to the buffer zone addresses sequentially by adopting the FPGA205 corresponding to each appointed acquisition port according to an appointed marking rule, wherein the frame numbers marked by the subgraphs of the storage spaces corresponding to the same buffer zone address by different FPGAs 205 are the same; based on the same frame number, to realize the synchronization at the display end.

As shown in fig. 7, after reset, acquisition port 1 and acquisition port 2 both start to store acquired subgraphs at buf _0, and FPGA205 marks the first frame for the subgraphs acquired by acquisition port 1 and acquisition port 2 at the same time.

Because different acquisition ports acquire images in different time periods, some acquisition port data arrive first, and some acquisition port data arrive later, it is necessary to wait for the stabilization of the images acquired by all the designated acquisition ports and then perform synchronization processing, and therefore, in one embodiment, the daughter card is further configured to discard the sub-images acquired before the storage address of the modified sub-image is the designated address.

In one embodiment, in a real-world scene, the signal source to be acquired and the display device to be displayed are various, and a situation that the frame rates of the signal source and the display device are inconsistent is often encountered, for example, the acquisition is 60Hz, but the display end is 30Hz, in this situation, frame extraction is required to be performed on the signal source to perform adaptive display, however, since different acquisition ports are independent from each other, the frame extraction cannot be consistent in step, the display is affected, and the acquired pictures are not synchronous.

The following description takes an example of sampling 60 frames to 30 frames from a signal source, that is, discarding one frame every two consecutive frames, but because the times of quality qualification of the collected images of each channel are different, the lost/taken frame cadence may be inconsistent, therefore, after the specified collection port collects the subgraphs sent by the image collection device, the image quality of the subgraphs collected by all the specified detection ports needs to be detected, when it is detected that the quality of the images collected by all the specified collection ports is qualified, the subgraphs collected by the specified collection ports are synchronized in response to the synchronization instruction of the main control device, and the subgraphs after the synchronization processing are lost/taken frames, so that the frame numbers of the subgraphs collected by all the collection ports are kept consistent, and further, the related screen pictures are controlled to be consistent when being output.

After the electronic device provided in the embodiment of the present application is introduced, based on the same inventive concept, a display control method applied to the electronic device is further provided in the embodiment of the present application, and the display control method applied to the electronic device provided in the embodiment of the present application is described in detail below with reference to the accompanying drawings.

As shown in fig. 8, the display control method applied to the electronic device according to the embodiment of the present application includes the following specific implementation steps when the main body is the main control module:

in step 801: acquiring the image quality of sub-images acquired by each appointed acquisition port of the electronic equipment;

the image acquisition equipment is used for recording images and dividing each recorded frame of image into a plurality of sub-images, wherein different designated acquisition ports are used for acquiring different sub-images of the same frame of image;

in one embodiment, the image quality of each designated acquisition port is obtained from a shared cache, wherein for each designated acquisition port, the image quality of the designated acquisition port in the shared cache is written into the shared cache by a daughter card where the designated acquisition port is located.

In one embodiment, each designated acquisition port corresponds to a use channel, and the states of the use channels of all the acquisition ports are detected in a shared cache; for each designated acquisition port, the state of a use channel of the designated acquisition port in the shared cache is written into the shared cache by a daughter card where the designated acquisition port is located;

The resources can be solved by detecting the image quality of the acquisition port after the channel is determined to be the use channel.

In step 802: and in response to the image quality of the subgraph acquired by each appointed acquisition port meeting the appointed image quality requirement, carrying out synchronous processing on each appointed acquisition port so that each appointed acquisition port acquires different subgraphs of the same frame of image at the same time.

In one embodiment, the implementation of the synchronization processing for each designated acquisition port is as follows: and sending a synchronous indication to the daughter card where each appointed acquisition port is located, so that the storage address of the daughter card for modifying the sub-graph is the appointed address, and numbering each acquired sub-graph in sequence from the appointed address.

As shown in fig. 9, the display method applied to the electronic device according to the embodiment of the present application includes the following specific implementation steps when the main body is the daughter card:

in step 901: performing image quality analysis on the subgraph acquired by the appointed acquisition port to obtain a quality analysis result;

the sub-images collected by the appointed collecting port are sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of sub-images, wherein different appointed collecting ports are used for collecting different sub-images of the same frame of image;

in step 902: and if the subgraph acquired by the appointed acquisition port meets the quality requirement of the appointed image, sending a quality qualification notice to the main control module, so that the main control module synchronously processes each appointed acquisition port according to the quality qualification notice to enable each appointed acquisition port to acquire different subgraphs of the same frame of image at the same time.

In step 903: and in response to a synchronous instruction sent by the main control module, modifying the storage address of the sub-graph collected by the specified collection port into a specified address, and numbering the collected sub-graphs of each frame in sequence from the specified address.

In one embodiment, the sending the quality-qualified notification to the main control module is implemented as: and updating the image quality state of the specified acquisition port into a quality qualified state in the shared cache, so that the main control module determines the image quality of the subgraph acquired by the specified acquisition port based on the shared cache.

Based on the same inventive concept, an embodiment of the present application further provides a display control apparatus applied to an electronic device, as shown in fig. 10, which is a schematic structural diagram of the apparatus, and the apparatus includes:

an obtaining module 10001, configured to obtain image quality of a sub-image acquired by each designated acquisition port of the electronic device; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

the synchronous processing module 10002 is configured to, in response to that the image quality of the sub-image acquired by each designated acquisition port meets a designated image quality requirement, perform synchronous processing on each designated acquisition port, so that each designated acquisition port acquires different sub-images of the same frame of image at the same time.

In one embodiment, the obtaining module includes:

In one embodiment, the synchronization processing module includes:

Based on the same inventive concept, an embodiment of the present application further provides a display device applied to an electronic device, as shown in fig. 11, which is a schematic structural diagram of the display device, and the display device includes:

the image quality analysis module 11001 is used for carrying out image quality analysis on the subgraph acquired by the appointed acquisition port to obtain a quality analysis result; the subgraph collected by the appointed collecting port is sent by image collecting equipment, the image collecting equipment is used for recording images and dividing each recorded frame of image into a plurality of subgraphs, and different appointed collecting ports are used for collecting different subgraphs of the same frame of image;

and a quality qualification notification sending module 11002, configured to send a quality qualification notification to the main control module if it is determined that the sub-images acquired by the designated acquisition ports meet the quality requirement of the designated image, so that the main control module performs synchronous processing on each designated acquisition port according to the quality qualification notification, so that each designated acquisition port acquires different sub-images of the same frame of image at the same time.

In one embodiment, the quality-qualified-notification sending module includes:

In one embodiment, the apparatus further comprises:

Having described a display control method applied to an electronic device, and a display method and apparatus applied to an electronic device of exemplary embodiments of the present application, next, an electronic device according to another exemplary embodiment of the present application is described.

As will be appreciated by one skilled in the art, aspects of the present application may be embodied as a system, method or program product. Accordingly, various aspects of the present application may be embodied in the form of: an entirely hardware embodiment, an entirely software embodiment (including firmware, microcode, etc.) or an embodiment combining hardware and software aspects that may all generally be referred to herein as a "circuit," module "or" system.

In some possible implementations, an electronic device according to the present application may include at least one processor, and at least one memory. The memory stores therein program code, which, when executed by the processor, causes the processor to perform the steps of the display control method applied to the electronic device and the display method applied to the electronic device according to various exemplary embodiments of the present application described above in the present specification.

The electronic device 130 according to this embodiment of the present application is described below with reference to fig. 12. The electronic device 130 shown in fig. 12 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.

The memory 132 may include readable media in the form of volatile memory, such as Random Access Memory (RAM)1321 and/or cache memory 1322, and may further include Read Only Memory (ROM) 1323.

Memory 132 may also include a program/utility 1325 having a set (at least one) of program modules 1324, such program modules 1324 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.

The electronic device 130 may also communicate with one or more external devices 134 (e.g., keyboard, pointing device, etc.), with one or more devices that enable a user to interact with the electronic device 130, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 130 to communicate with one or more other electronic devices. Such communication may occur via input/output (I/O) interfaces 135. Also, the electronic device 130 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 136. As shown, network adapter 136 communicates with other modules for electronic device 130 over bus 133. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with electronic device 130, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.

In some possible embodiments, various aspects of a display control method applied to an electronic device and a display method applied to an electronic device provided by the present disclosure may also be implemented in the form of a program product including program code for causing a computer device to execute steps of a display control method applied to an electronic device and a display method applied to an electronic device according to various exemplary embodiments of the present disclosure described above in this specification when the program product is run on the computer device.

The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

A program product for a positioning method of an embodiment of the present disclosure may employ a portable compact disc read only memory (CD-ROM) and include program code, and may be run on an electronic device. However, the program product of the present disclosure is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.

A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.

Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

Program code for carrying out operations for the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the consumer electronic device, partly on the consumer electronic device, as a stand-alone software package, partly on the consumer electronic device and partly on a remote electronic device, or entirely on the remote electronic device or server. In the case of remote electronic devices, the remote electronic devices may be connected to the consumer electronic device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external electronic device (e.g., through the internet using an internet service provider).

It should be noted that although several units or sub-units of the apparatus are mentioned in the above detailed description, such division is merely exemplary and not mandatory. Indeed, the features and functions of two or more units described above may be embodied in one unit, in accordance with embodiments of the present disclosure. Conversely, the features and functions of one unit described above may be further divided into embodiments by a plurality of units.

Further, while the operations of the disclosed methods are depicted in the drawings in a particular order, this does not require or imply that these operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. The utility model provides an electronic equipment, its characterized in that, electronic equipment is provided with host system and a plurality of appointed collection mouth, and each appointed collection mouth sets up on corresponding daughter card, wherein:

2. The electronic device according to claim 1, wherein a chip and a Field Programmable Gate Array (FPGA) corresponding to the designated acquisition port are arranged on the daughter card where each designated acquisition port is located.

3. The electronic device of claim 2, wherein:

the daughter card is specifically configured to, for each designated acquisition port built in the daughter card, perform image quality analysis on a sub-image sent by the designated acquisition port by using the chip corresponding to the designated acquisition port.

4. The electronic device according to any one of claims 1-3, wherein the electronic device further comprises:

5. The electronic device according to claim 4, further comprising a locking channel corresponding to each of the designated capture ports, wherein the locking channel is configured to store an image quality status in an operating status of the designated capture port, and wherein:

6. The electronic device of claim 4, further comprising a usage channel corresponding to each of the designated acquisition ports, wherein:

7. The electronic device of claim 2, wherein each of the designated acquisition ports is further provided with at least one buffer address, wherein:

8. The electronic device of claim 4, wherein:

the main control module is specifically used for responding to the fact that the subgraph homogeneous quantity acquired by each appointed acquisition port is qualified, and sending a synchronous instruction to the daughter card where each appointed acquisition port is located;

9. The electronic device of claim 8, wherein each of the daughter cards is further configured to discard a sub-graph collected before modifying a storage address of the sub-graph to a designated address.

10. A display control method applied to an electronic device, the method comprising:

11. The method of claim 10, wherein the obtaining the image quality of the sub-image captured by each of the designated capture ports of the electronic device comprises:

12. The method of claim 11, wherein each of the designated acquisition ports respectively corresponds to a usage channel, the method further comprising:

13. The method of claim 10, wherein said synchronizing said designated acquisition ports comprises:

14. A display method of an electronic device, the method comprising:

15. The method of claim 14, wherein sending the quality-qualified notification to the master module comprises:

16. The method of claim 14, further comprising:

17. A display control apparatus applied to an electronic device, the apparatus comprising:

18. The apparatus of claim 17, wherein the obtaining module comprises:

19. The device of claim 18, wherein each of the designated collection ports respectively corresponds to a usage channel, the device further comprising:

20. The apparatus of claim 17, wherein the synchronization processing module comprises:

21. A display apparatus of an electronic device, the apparatus comprising:

22. The apparatus of claim 21, wherein the quality eligibility notification sending module comprises:

23. The apparatus of claim 21, further comprising:

24. A computer-readable storage medium, in which a computer program is stored, which, when executed by a processor of an electronic device, enables the electronic device to execute the display control method according to any one of claims 10 to 16.