CN112805938B - Signal amplification circuit and terminal equipment - Google Patents

Abstract

A signal amplification circuit and a terminal device are provided, wherein an adjustable high-gain directional antenna is integrated in the signal amplification circuit, the current situation that a radio frequency cable is required to be connected between a TBOX and the signal amplification circuit is avoided, the performance is improved, and the cost and the assembly difficulty are reduced. The signal amplification circuit includes: the device comprises a directional antenna, a gain control circuit and a microprocessor; the directional antenna is connected with the gain control circuit, the microprocessor is connected with the directional antenna, and the microprocessor is connected with the gain control circuit; the directional antenna is used for receiving an uplink signal sent by the vehicle-mounted communication terminal TBOX and sending a downlink signal to the TBOX; detecting the signal intensity of an uplink signal and the signal intensity of a downlink signal; the microprocessor is used for determining a gain parameter according to the signal intensity of the uplink signal and the signal intensity of the downlink signal and sending a gain instruction to the gain control circuit according to the gain parameter; the gain control circuit is used for processing signals according to the gain instruction.

Description

Signal amplification circuit and terminal equipment

Technical Field

The application relates to the field of communication, in particular to a signal amplification circuit and terminal equipment.

Background

In the process of realizing a wireless communication function in a vehicle-mounted communication Terminal (TBOX), due to the shielding effect of vehicle body metal, an external antenna is generally required to be used, and the antenna is arranged outside a vehicle to obtain a stronger signal and better antenna directivity. However, the radio frequency coaxial cable connecting the TBOX and the external antenna is limited by wiring in the vehicle, and the length of the radio frequency coaxial cable can reach 5m or more, so that the introduced loss can cause the reduction of the wireless communication performance of the whole vehicle, especially high frequency.

In the prior art, a wireless terminal couples an uplink transmitting signal to a relay amplifier for amplification through a coupling plate and a radio frequency cable, and then transmits the uplink transmitting signal to an external antenna through the radio frequency cable and radiates outwards; and conversely, the external antenna receives an external downlink signal, transmits the external downlink signal to the relay amplifier through the radio frequency cable for amplification, and transmits the external downlink signal to the wireless terminal through the radio frequency cable and the coupling plate.

However, this method requires a radio frequency cable and a coupling board as a transmission medium between the wireless terminal and the relay amplifier, and the system cost is high, and the wiring of the radio frequency cable in the vehicle is still complicated.

Disclosure of Invention

The embodiment of the application provides a signal amplification circuit and terminal equipment, and an adjustable high-gain directional antenna is integrated in the signal amplification circuit, so that the current situation that a radio frequency cable is required to be connected between a TBOX and the signal amplification circuit is avoided, the performance problem is solved, the cost and the assembly difficulty of the whole vehicle are reduced, an automatic gain control scheme is matched, the automatic adaptation of the signal transmission path loss between the signal amplification circuit and the TBOX and the gain of a relay amplifier is completed, different relay amplifiers are not required to be configured for different application scenes, and the signal amplification circuit and the terminal equipment have universality.

In order to achieve the above purpose, the embodiments of the present application provide the following technical solutions:

the first aspect of the present application provides a signal amplification circuit, which can be applied to a vehicle-mounted communication terminal and other mobile devices requiring a relay amplification function, and a signal amplification circuit device involved in an operation process of the signal amplification circuit corresponds to a corresponding functional entity in the vehicle-mounted communication terminal and other mobile devices requiring the relay amplification function. The circuit may include: a signal amplification circuit, comprising: the device comprises a directional antenna, a gain control circuit and a microprocessor; the directional antenna is connected with the gain control circuit, the microprocessor is connected with the directional antenna, and the microprocessor is connected with the gain control circuit; the directional antenna is used for receiving an uplink signal sent by a vehicle-mounted communication terminal TBOX and sending a downlink signal to the TBOX; detecting the signal intensity of an uplink signal and the signal intensity of a downlink signal; the microprocessor is used for determining a gain parameter according to the signal intensity of the uplink signal and the signal intensity of the downlink signal and sending a gain instruction to the gain control circuit according to the gain parameter; the gain control circuit is used for processing signals according to the gain instruction. It can be seen from this possible implementation that the conventional complicated scheme of passing through a complicated radio frequency cable is replaced by receiving and transmitting a TBOX wireless signal through a directional antenna, and further, dynamic gain for uplink/downlink signals is realized by detecting a signal and transmitting a related instruction through a microprocessor, automatic adaptation of signal transmission path loss and relay amplifier gain between a relay amplifier and a TBOX is completed, different relay amplifiers do not need to be configured for different application scenarios, and adaptation universality in actual application scenarios is improved.

Optionally, in some embodiments of the present application, the directional antenna includes a coupler, a detector, and at least two sub-antenna modules; the at least two sub-antenna modules are connected with the microprocessor, the at least two sub-antenna modules are connected with the coupler, the coupler is connected with the detector, the coupler is connected with the gain control circuit, and the detector is connected with the microprocessor; the coupler is used for acquiring first signals of the at least two sub-antenna modules within a preset time period; the detector is used for detecting the signal intensity of the first signal; the microprocessor is used for traversing the position information of the at least two sub-antenna modules; acquiring the corresponding relation between the signal intensity of the first signal and the position information; and when the signal intensity of the first signal is greater than a first threshold value, the position information of the at least two sub-antenna modules is controlled according to the position information to acquire a second signal. It can be seen from this possible implementation manner that a directional antenna composed of at least two sub-antenna modules can receive and transmit signals well, and further, a phase delay combination with good performance is obtained by obtaining the phase delay characteristics of at least two sub-antenna modules, so as to improve the signal strength received or transmitted by the directional antenna.

Optionally, in some embodiments of the present application, the coupler is specifically configured to periodically acquire the first signals of the at least two sub-antenna modules within a preset time period. It can be seen from this possible implementation manner that, because the change in the position of the at least two sub-antenna modules may cause the change in performance, and the at least two sub-antenna modules may be in an unstable environment, for example, the jitter of a vehicle, and the interference of an external signal may affect the performance, the stability of the sub-antenna modules may be improved by periodically acquiring the position information of the first signal, and the quality of the signals received by the sub-antenna modules is ensured.

Optionally, in some embodiments of the present application, the signal amplifying circuit further includes a first synchronization unit; the first synchronization unit is connected with the directional antenna, the first synchronization unit is connected with the automatic gain control circuit, and the first synchronization unit is connected with the microprocessor; the first synchronization unit is configured to couple the downlink signal; detecting the signal strength of the downlink signal; outputting the signal intensity of the downlink signal to the microprocessor; when the microprocessor detects that the signal intensity of the downlink signal is greater than the signal intensity of the uplink signal detected by the directional antenna, a downlink channel is connected; when the microprocessor detects that the signal intensity of the downlink signal is smaller than the signal intensity of the uplink signal detected by the directional antenna, an uplink channel is switched on; the first synchronization unit is used for switching on a downlink channel when the microprocessor detects that the signal intensity of the downlink signal is greater than the signal intensity of the uplink signal detected by the directional antenna; and when the microprocessor detects that the signal intensity of the downlink signal is less than that of the uplink signal detected by the directional antenna, the uplink channel is switched on. It can be seen from this possible implementation manner that, through the coupling detection of the first synchronization unit for the downlink signal and the comparison with the signal strength of the uplink signal, the uplink/downlink state at this time can be obtained, and the corresponding channel is selected, thereby improving the accuracy of the signal amplification circuit and avoiding the occurrence of redundancy of the uplink/downlink signal.

Optionally, in some embodiments of the present application, the microprocessor is further configured to calculate an absolute value of a difference between the signal strength of the uplink signal and the signal strength of the downlink signal; if the absolute value is less than or equal to the second threshold, relay failure information is generated. It can be seen from this possible implementation manner that, since the relay amplifier amplifies the signal with a certain power, when the absolute value of the difference between the uplink signal strength and the downlink signal strength is too small, it indicates that the relay amplifier has a fault and cannot normally amplify the signal to a certain strength, and this determination method improves the identifiability of the signal amplification circuit, i.e. the working state or fault condition of the circuit at this time can be better understood.

Optionally, in some embodiments of the present application, the microprocessor is specifically configured to calculate a difference between the signal strength of the uplink signal and the signal strength of the downlink signal; if the difference is less than or equal to a third threshold, the microprocessor generates relay failure information. According to the possible implementation mode, the working condition of the signal amplification circuit can be obtained by calculating the difference value of the uplink signal and the downlink signal, and the identifiability of the signal amplification circuit is improved.

Optionally, in some embodiments of the present application, the microprocessor is specifically configured to calculate a difference between the signal strength of the downlink signal and the signal strength of the uplink signal; if the difference is less than or equal to the fourth threshold, the microprocessor generates directional antenna fault information. It can be seen from this possible implementation that the working condition of the directional antenna can be obtained by calculating the difference between the downlink signal and the uplink signal, and the identifiability of the signal amplification circuit is improved.

Optionally, in some embodiments of the present application, the signal amplifying circuit further includes a second synchronizing unit, where the second synchronizing unit is configured to couple the gain-controlled uplink signal; detecting the signal intensity of the uplink signal after the gain control; outputting the signal intensity of the uplink signal after the gain control to the microprocessor; the first synchronization unit is also used for coupling the downlink signals after gain control; detecting the signal intensity of the downlink signal after the gain control; outputting the signal intensity of the downlink signal after the gain control to the microprocessor; the microprocessor is used for obtaining uplink output power according to the signal intensity of the uplink signal after the gain control and the signal intensity of the uplink signal; and the downlink output power is obtained according to the signal strength of the downlink signal after the gain control and the signal strength of the downlink signal. According to the possible implementation mode, the strength of the uplink/downlink signal after gain control is detected and fed back to the microprocessor, so that the real-time power monitoring can be performed on the signal amplification circuit, and the stability of the signal amplification circuit is improved.

Optionally, in some embodiments of the present application, the gain control circuit includes: a variable gain amplifier and an adjustable attenuator; the variable gain amplifier is used for performing gain operation when the microprocessor detects that the uplink output power is smaller than a first preset power; the microprocessor is also used for carrying out switching operation when detecting that the downlink output power is greater than a second preset power; the adjustable attenuator is used for performing attenuation operation when the microprocessor detects that the uplink output power is greater than the first preset power; and the microprocessor is also used for carrying out attenuation operation when detecting that the downlink output power is greater than the second preset power. According to the possible implementation mode, the up/down signal strength after the gain control is detected and fed back to the microprocessor, so that the gain process can be automatically and dynamically processed, namely, the gain is carried out according to the preset gain power, manual monitoring and regulation are not needed, and the stability of the signal amplification circuit is improved.

Optionally, in some embodiments of the application, the variable gain amplifier is specifically configured to adjust the variable gain amplifier from a first gain state to a second gain state when the microprocessor detects that the downlink output power is greater than a preset power, where a gain amount corresponding to the first gain state is greater than a gain amount corresponding to the second gain state. It can be seen from this possible implementation that the attenuation effect can be achieved by changing the gain state of the variable gain amplifier, thereby simplifying the design of the circuit and saving the cost.

Optionally, in some embodiments of the present application, the gain control circuit further includes a switching device; the switching device is connected with the variable gain amplifier in parallel; the switching device is used for switching the variable gain amplifier to the bypass when the microprocessor detects that the downlink output power is greater than the preset power, and recovering the connection after the second preset duration. It can be seen from this possible implementation that, by the design of the bypass, the attenuation effect can be achieved under the condition of only using the variable gain amplifier, thereby simplifying the design of the circuit and saving the cost.

Optionally, in some embodiments of the present application, the signal amplifying circuit further includes a power divider and a synchronous demodulation unit; the power divider is connected with the TBOX through a radio frequency cable, the power divider is connected with the synchronous demodulation unit, the power divider is connected with the gain control circuit, and the synchronous demodulation unit is connected with the microprocessor; the power divider is used for separating a second signal sent by the TBOX, wherein the second signal comprises a radio frequency signal and a power supply modulation signal; the synchronous demodulation unit is used for acquiring the transmission direction information of the second signal according to the power supply modulation signal and sending the transmission direction information to the microprocessor; the microprocessor is used for generating the gain instruction according to the transmission direction information; the gain control circuit is used for executing gain control corresponding to the transmission direction according to the gain instruction. It can be seen from this possible implementation that the uplink and downlink state information can be obtained by demodulation of the power supply voltage, which simplifies the transmission path and avoids signal interference in the uplink and downlink processes in some possible scenarios.

Optionally, in some embodiments of the present application, the synchronous demodulation unit is specifically configured to obtain a first voltage according to the power supply modulation signal, where the first voltage is an output voltage of TBOX; comparing the first voltage with a preset voltage, wherein the preset voltage is used for indicating the transmission direction information; if the first voltage is greater than the preset voltage, generating uplink transmission information and sending the uplink transmission direction information to the microprocessor; and if the first voltage is less than the preset voltage, generating downlink transmission information and sending the uplink transmission direction information to the microprocessor. It can be seen from this possible implementation manner that by setting the preset voltage and comparing the demodulation voltage with the preset voltage, the uplink and downlink state information can be obtained, and in some possible scenarios, the transmission path is simplified, and signal interference in the uplink and downlink processes is avoided.

Optionally, in some embodiments of the present application, the signal amplifying circuit further includes: a temperature sensor; the temperature sensor is connected with the microprocessor; the temperature sensor is used for acquiring the temperature variation of the signal amplification circuit, and if the temperature variation is larger than a second threshold value, temperature compensation is carried out. It can be seen from this possible implementation manner that, since the signal amplification circuit is accompanied by the temperature change during the operation process, and the temperature change will affect the performance of the circuit, the stability of the circuit and the accuracy of the amplification process can be improved by detecting the temperature change amount and performing temperature compensation on the circuit.

A second aspect of the embodiments of the present application provides a vehicle-mounted communication terminal TBOX, including: the device comprises a wireless communication unit, a combiner and a synchronous modulation unit; the wireless communication unit is connected with the combiner, the combiner is connected with the synchronous modulation unit, and the synchronous modulation unit is connected with the wireless communication unit; the wireless communication unit is used for transmitting radio frequency signals; the synchronous modulation unit is used for generating a power supply modulation signal; the combiner is used for transmitting the power supply modulation signal and the radio frequency signal. It can be seen from this possible implementation that different transmission states are identified by modulating the voltage, which simplifies the transmission path and avoids signal interference in the uplink and downlink processes in some possible scenarios.

Optionally, in some embodiments of the present application, the synchronous modulation unit is specifically configured to output a first voltage according to the radio frequency signal, and generate the power modulation signal according to the first voltage, where the first voltage is used to indicate that the radio frequency signal is an uplink control signal; and the power supply modulation circuit is further configured to output a second voltage according to the radio frequency signal, generate the power supply modulation signal according to the second voltage, and indicate that the radio frequency signal is a downlink control signal by the second voltage.

A third aspect of an embodiment of the present application provides a terminal device, where the terminal device includes: the relay amplifier, the processor, the memory, the bus and the input/output interface; the relay amplifier comprises the signal amplifying circuit in any one of the possible implementation manners of the first aspect; the memory has program codes stored therein; and the processor sends a control signal to the signal amplification circuit when calling the program code in the memory, wherein the control signal is used for controlling the signal amplification circuit to amplify the uplink signal or the downlink signal.

In a fourth aspect, embodiments of the present application provide a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to perform the method as described in the first aspect and any one of the optional implementation manners.

The computer storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.

In a fifth aspect, embodiments of the present application provide a computer program product, which when run on a computer, causes the computer to perform the method as described in the first aspect and any one of the alternative implementations.

In a sixth aspect, the present application provides a chip system comprising a processor for enabling an optimization device to implement the functions referred to in the above aspects, e.g. to send or process data and/or information referred to in the above methods. In one possible design, the system-on-chip further includes a memory for storing program instructions and data necessary for the signal amplification circuit. The chip system can be a signal amplifying circuit, and can also be a system chip which is applied to the signal amplifying circuit and executes corresponding functions.

According to the technical scheme, the embodiment of the application has the following advantages:

according to the embodiment of the application, the adjustable high-gain directional antenna is integrated in the relay amplifier, the current situation that a radio frequency cable is required to be connected between the TBOX and the relay amplifier is avoided, the performance problem is solved, the cost of the whole vehicle and the assembly difficulty are reduced, the automatic adaptation of the signal transmission path loss between the relay amplifier and the TBOX and the gain of the relay amplifier is completed by matching with an automatic gain control scheme, different intermediate-stage amplifiers do not need to be configured for different application scenes, and the universality is realized.

Drawings

Fig. 1 is a diagram of a prior art wireless terminal amplified by a relay amplifier;

FIG. 2 is a schematic diagram of a scenario in which an embodiment of the present application is applied;

fig. 3 is a schematic diagram of a signal amplifying circuit according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of a directional antenna provided in an embodiment of the present application;

FIG. 5 is a schematic diagram of another signal amplifying circuit provided in the embodiments of the present application;

fig. 6 is a circuit diagram of a synchronization unit according to an embodiment of the present application;

fig. 7 is a schematic diagram of a real-time status detection result provided in an embodiment of the present application;

FIG. 8 is a schematic diagram of another signal amplifying circuit provided in an embodiment of the present application;

fig. 9 is a schematic diagram of a fault detection result provided in an embodiment of the present application;

FIG. 10 is a schematic diagram of an automatic gain control circuit according to an embodiment of the present application;

FIG. 11 is a schematic diagram of another signal amplifying circuit provided in the embodiments of the present application;

fig. 12 is a circuit diagram of a synchronous demodulation unit according to an embodiment of the present application;

fig. 13 is a circuit diagram of a synchronous modulation unit according to an embodiment of the present application;

FIG. 14 is a schematic diagram of another signal amplifying circuit provided in an embodiment of the present application;

fig. 15 is a schematic diagram of a terminal device according to an embodiment of the present application.

Detailed Description

The embodiment of the application provides a signal amplification circuit and terminal equipment, an adjustable high-gain directional antenna is integrated in a relay amplifier, the current situation that a radio frequency cable is required to be connected between a vehicle-mounted communication Terminal (TBOX) and the relay amplifier is avoided, the performance problem is solved, the cost and the assembly difficulty of the whole vehicle are reduced, the automatic gain control scheme is matched, the automatic adaptation of the signal transmission path loss between the relay amplifier and the TBOX and the gain of the relay amplifier is completed, different intermediate amplifiers are not required to be configured for different application scenes, and the universality is achieved.

For a person skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. The embodiments in the present application shall all belong to the protection scope of the present application.

In the process of realizing the wireless communication function in the TBOX, due to the shielding influence of vehicle body metal, an external antenna is usually required to be used, and the antenna is arranged outside a vehicle to obtain stronger signals and better antenna directivity. However, the radio frequency coaxial cable connecting the TBOX and the external antenna is limited by wiring in the vehicle, and the length of the radio frequency coaxial cable can reach 5m or more, so that the introduced loss can cause the reduction of the wireless communication performance of the whole vehicle, especially high frequency.

As shown in fig. 1, which is a scene diagram of a wireless terminal amplifying through a relay amplifier in the prior art, the wireless terminal couples an uplink transmission signal to the relay amplifier for amplification through a coupling plate and a radio frequency cable, and transmits the uplink transmission signal to an external antenna through the radio frequency cable and radiates outwards; in turn, the external antenna receives an external downlink signal, transmits the external downlink signal to the relay amplifier through the radio frequency cable for amplification, and transmits the external downlink signal to the wireless terminal through the radio frequency cable and the coupling plate. However, this method requires a radio frequency cable and a coupling board as a transmission medium between the wireless terminal and the relay amplifier, and the system cost is high, and the wiring of the radio frequency cable in the vehicle is still complicated.

In another prior art, different modulation frequencies are used to distinguish signals to be relay-amplified, detection signals after relay amplification, and control signals, so as to achieve the purpose of multiplexing radio frequency cables. The amplified detection signal is transmitted back to the wireless terminal for adjusting the output power of the terminal, so as to ensure that the relay amplifier has stable and accurate output power. However, since the detection signal is an analog signal that changes continuously, it is necessary to perform processing such as encoding and decoding, up-down conversion, and the like to multiplex the rf cable. However, this method requires signals of multiple frequencies to be superimposed on the rf line, which greatly increases the risk of mutual interference between the signals, and a complex modem system is required to relay the amplified detection signal back to the wireless terminal, which still results in high system cost.

In order to solve the above problem, an embodiment of the present application provides a method for amplifying a signal, and in one possible scenario, the method of the embodiment of the present application may be applied in the following scenario, as shown in fig. 2, which is a schematic view of the scenario applied in the embodiment of the present application. The scene comprises the following steps: the vehicle-mounted communication terminal is communicated with the relay amplifier through a wireless signal, and the relay amplifier amplifies the signal and radiates the signal outwards through an external antenna.

The technical solution of the present application is further described below by way of an embodiment, and as shown in fig. 3, is a schematic diagram of a signal amplifying circuit provided in the embodiment of the present application, where the signal amplifying circuit includes, but is not limited to, the following modules: a directional antenna 301, a gain control circuit 302 and a microprocessor 303.

The directional antenna 301 is connected to the gain control circuit 302, the microprocessor 303 is connected to the directional antenna 301, and the microprocessor 303 is connected to the gain control circuit 302.

The directional antenna 301 is configured to receive an uplink signal sent by a signal source TBOX, send a downlink signal to the TBOX, and detect a signal strength of the uplink signal and a signal strength of the downlink signal.

It is understood that the directional antenna 301 may be an antenna device or an outline of a device having a wireless signal transceiving function, and the directional antenna 301 is a representative name for such a functional device and is not limited herein.

The microprocessor 303 is configured to determine a gain parameter according to the signal strength of the uplink signal and the signal strength of the downlink signal, and send a gain instruction to the gain control circuit 302 according to the gain parameter, where it may be understood that, in this embodiment, the gain parameter may be a specific number, and is directly transmitted to the gain control circuit 302 through the microprocessor 303 for identification operation, or may be a code symbol, and is written into the gain instruction after being analyzed by the microprocessor 303, where a specific scenario is determined by an actual situation, and is not limited herein.

The gain control circuit 302 is configured to process a signal according to the gain instruction, and it can be understood that the signal gain process may be amplification of the uplink/downlink signal or attenuation of the uplink/downlink signal, and a specific scenario is determined by an actual situation and is not limited herein.

In this embodiment, through the mode that directional antenna received wireless signal, solved cable performance poor, the installation is difficult and the problem that system cost is high, and through the linkage of microprocessor and gain control circuit, can carry out reasonable amplification or decay to the signal to reach the effect of good propagation.

It can be understood that the directional antenna is one of the keys of the scheme for receiving the wireless signal, and in an alternative possible design, as shown in fig. 4, is a schematic structural diagram of a directional antenna provided in the embodiment of the present application, and the directional antenna includes a coupler, a detector, and at least two sub-antenna modules.

For convenience of understanding, the present embodiment is described by taking 4 sub-antenna modules as an example, and it should be understood that this example is only a logical description, and the number of the sub-antenna modules is not limited herein.

The 4 sub-antenna modules are connected with the microprocessor, the 4 sub-antenna modules are connected with the coupler, the coupler is connected with the detector, the coupler is connected with the gain control circuit, and the detector is connected with the microprocessor.

In order to achieve a good signal receiving effect, the microprocessor may traverse the position information of the at least two sub-antenna modules; acquiring the corresponding relation between the signal intensity of the first signal and the position information; and when the signal intensity of the first signal is greater than a first threshold value, the position information of the at least two sub-antenna modules is controlled to acquire a second signal according to the position information.

In one possible scenario, at initial power up, the microprocessor may traverse all of the position combinations of the 4 sub-antenna modules, which may be understood to indicate phase delay combinations, such as: the position pattern of each sub-antenna module has three patterns of 30 ° offset, 45 ° offset, and 60 ° offset, and there is a possible combination manner in 3 × 3=81 for these 4 sub-antenna modules, it should be noted that, in this embodiment, the position pattern of each sub-antenna module is only an example, and the specific position pattern is determined according to actual situations, and is not limited here.

After traversing all the phase delay combinations of the 4 sub-antenna modules, the microprocessor acquires signals during all the phase delay combinations, the detector detects the signal intensities of the signals and acquires the phase delay combinations when the signal intensities are greater than a first threshold value, and it can be understood that the phase delay combinations greater than the first threshold value can be only one group, and the group is the phase delay combination with the strongest signal; the phase delay combinations of the group can be selected when the number of the groups reaches one group, so that the computing resources of the microprocessor are saved, all the phase delay combinations do not need to be operated, it should be noted that the value of the first threshold can be manually input or obtained by the microprocessor according to historical data statistics, and a specific scene is determined according to actual conditions and is not limited here.

For example: the first threshold is 25dBm, in the first phase delay combination, the first sub-antenna module deviates by 15 degrees, the second sub-antenna module deviates by 30 degrees, the third sub-antenna module deviates by 15 degrees, the fourth sub-antenna module deviates by 30 degrees, and the signal strength is 20dBm; in the second phase delay combination, the first sub-antenna module is shifted by 30 degrees, the second sub-antenna module is shifted by 30 degrees, the third sub-antenna module is shifted by 15 degrees, the fourth sub-antenna module is shifted by 15 degrees, and the signal strength is 30dBm; and since the signal strength of 30dBm of the second phase delay combination is greater than the first threshold value of 20dBm, adjusting the positions of the 4 sub-antenna modules in the second phase delay combination mode to receive the next signals.

Optionally, in a possible scenario, since the vehicle-mounted environment is not stable, the position of the sub-antenna module may be changed due to shaking of the vehicle body, or the signal propagation path may be changed due to the influence of the metal vehicle body, so that the detection and adjustment process of the phase delay combination may be periodically performed, that is, a fixed time interval is set in the microprocessor, and when a preset time is reached, the microprocessor controls the directional antenna to perform the process.

The embodiment improves the quality and stability of signals received by the directional antenna by selecting the phase delay combination, and the scheme can also be applied to the transceiving scenes of other wireless signals, which is not limited herein.

The directional antenna has a signal receiving function, and can also transmit a signal, which corresponds to a transceiving process of an uplink/downlink signal in a circuit, but in a gain control circuit, different transmission channels are often required to be provided for the uplink signal and the downlink signal, which is shown in fig. 5, and is a schematic diagram of another signal amplification circuit provided in the embodiment of the present application, in order to avoid interference between signals and solve this problem.

The signal amplification circuit includes: a directional antenna 501, a gain control circuit 502, a microprocessor 503, and a first synchronization unit 504.

The first synchronization unit 504 is connected to the gain control circuit 502, and the first synchronization unit 504 is connected to the microprocessor 503; the first synchronization unit 504 is connected to the directional antenna 501.

The first synchronization unit 504 is configured to couple a downlink signal; detecting the signal strength of a downlink signal; outputting the signal strength of the downlink signal to the microprocessor 503; when the microprocessor 503 detects that the signal intensity of the downlink signal is greater than the signal intensity of the uplink signal detected by the directional antenna 501, a downlink channel is connected; when the microprocessor 503 detects that the signal strength of the downlink signal is smaller than the signal strength of the uplink signal detected by the directional antenna 501, the uplink channel is switched on.

The first synchronization unit 504 is configured to switch on a downlink channel when the microprocessor 503 detects that the signal strength of the downlink signal is greater than the signal strength of the uplink signal detected by the directional antenna 501; when the microprocessor 503 detects that the signal strength of the downlink signal is smaller than the signal strength of the uplink signal detected by the directional antenna 501, the uplink channel is switched on.

In this embodiment, the first synchronization unit 504 may adopt a circuit design, as shown in fig. 6, which is a circuit diagram of a synchronization unit provided in this embodiment of the present application. It should be noted that this possible implementation manner is not limited to the circuit design of the first synchronization unit 504, and the first synchronization unit 504 may also be another design having the above-mentioned functions, and the specific design is determined by actual scenarios and is not limited herein.

In this embodiment, the switching on of the uplink/downlink channel may be switched by a switch, or may be switched by a circulator; because the switching between the uplink channel and the downlink channel corresponds to different operation processes, that is, in a possible scenario, when the uplink signal strength is greater than the downlink signal strength, the microprocessor 503 determines that the signal is in a signal transmitting state, and the microprocessor 503 controls the first synchronization unit 504 to switch to the uplink channel; when the uplink signal strength is smaller than the downlink signal strength, the microprocessor 503 determines that the signal is in a signal receiving state, and the microprocessor 503 controls the first synchronization unit 504 to switch to the downlink channel.

It can be understood that the scene may be embodied in a real-time statistical manner by using data in the microprocessor 503, as shown in fig. 7, which is a schematic diagram of a real-time status detection result provided by the embodiment of the present application, where the real-time status detection result may be embodied by a code inside the microprocessor 503, or may be presented in the form of an external display device, and the presentation content may be a dynamic curve during detection, or may be a detection result, for example: transmitting or receiving.

In a possible scenario, the signal strength of the uplink signal or the signal strength of the downlink signal may not reach the preset strength, that is, the terminal has a fault, and at this time, the terminal needs to detect the fault, in this embodiment, the absolute value of the difference between the signal strength of the uplink signal and the signal strength of the downlink signal may be compared with a second threshold, and the second threshold may be a threshold a, and may be expressed by a formula: when the signal strength of the uplink signal-the signal strength of the downlink signal | is greater than the threshold a, the terminal is considered to be normal, and when the signal strength of the uplink signal-the signal strength of the downlink signal | is less than or equal to the threshold a, the terminal is considered to be faulty, for example, the microprocessor 503 detects that the signal strength of the uplink signal is 40dBm, the signal strength of the downlink signal is 10dBm, and the threshold a is 20dB, and since the signal strength of the uplink signal-the signal strength of the downlink signal | = |40dBm-10dBm | =30dB > 20dB, the terminal is considered to be normal.

It should be noted that the threshold a may be set by an input of an operator, or may be calculated by the terminal according to the operation data, and the specific method is determined by the actual situation, and is not limited herein.

In another possible scenario, a synchronization unit may be added to implement the function of fault detection, as shown in fig. 8, which is a schematic diagram of another signal amplification circuit provided in this embodiment of the present application, and the signal amplification circuit further has the function of fault detection based on the function of combining channel selection.

The signal amplification circuit includes: directional antenna 801, gain control circuit 802, microprocessor 803, first synchronization unit 804 and second synchronization unit 805.

The second synchronous unit is connected with the gain control circuit and the microprocessor; the second synchronization unit is used for coupling the uplink signal after gain control; detecting the signal intensity of the uplink signal after the gain control; outputting the signal intensity of the uplink signal after the gain control to the microprocessor; the first synchronization unit is further configured to couple the gain-controlled downlink signal; detecting the signal strength of the downlink signal after the gain control; and outputting the signal intensity of the downlink signal after the gain control to the microprocessor.

The microprocessor is used for obtaining uplink output power according to the signal intensity of the uplink signal after the gain control and the signal intensity of the uplink signal; and the downlink output power is obtained according to the signal strength of the downlink signal after the gain control and the signal strength of the downlink signal.

Since the signal amplification circuit has transmission of uplink signals and downlink signals, the difference value of the uplink signals and the downlink signals can correspond to different signal amplification circuit components, that is, the difference value obtained by subtracting the signal strength of the downlink signals from the signal strength of the uplink signals can be compared with a third threshold value to deduce a relay circuit fault, and the difference value obtained by subtracting the signal strength of the uplink signals from the signal strength of the downlink signals can be compared with a fourth threshold value to deduce a directional antenna fault, where the third threshold value can be a threshold A1, and the fourth threshold value can be a threshold A2, and can be expressed by the following formula: when the signal intensity of the uplink signal and the signal intensity of the downlink signal are less than or equal to a threshold A1, the relay circuit is considered to be in fault, and when the signal intensity of the downlink signal and the signal intensity of the uplink signal are less than or equal to a threshold A2, the directional antenna is considered to be in fault. For example: the microprocessor 503 detects that the signal strength of the uplink signal is 30dBm, the signal strength of the downlink signal is 20dBm, and the threshold A1 is 15dB, and since the signal strength of the uplink signal-the signal strength of the downlink signal =30dBm-20dbm =10db < 15dB, it is considered that the relay circuit is faulty, it can be understood that the detection result can be represented by a data schematic diagram, as shown in fig. 9, which is a fault detection result schematic diagram provided in the embodiment of the present application, and the real-time state detection result can be embodied as a code inside the microprocessor 503, or can be presented in the form of an external display device, and the presentation content can be a dynamic curve during detection, or a detection result.

It should be noted that the thresholds A1 and A2 may be set by input of an operator, or may be calculated by the terminal according to the operation data, and the specific method is determined according to the actual situation, and is not limited herein.

In this embodiment, by calculating the signal strength of the uplink signal and the downlink signal strength, the identifiability of the signal amplification circuit is improved, that is, the working state or the fault condition of the circuit at this time can be better understood, and the terminal corresponding to the signal amplification circuit also has the above characteristics, which is not described herein again.

It can be understood that, during the operation of the signal amplifying circuit, the signal amplifying operation may change due to the fluctuation of the signal source, that is, the power used for signal amplification may fluctuate, and the gain control circuit needs to make adjustments in real time, to solve this problem, a possible implementation manner is described below, and as shown in fig. 10, it is a schematic diagram of an automatic gain control circuit provided in the embodiment of the present application.

It should be noted that, this embodiment is a description of the function of automatic gain control, and its components may be applied to any of the above circuits, that is, the reception of the signal may refer to the related description of fig. 3, and the judgment or failure judgment of the signal may refer to the related description of fig. 5, which is not described herein again.

The following describes the process of automatic gain control, in which an adjustable attenuator and a variable gain amplifier are integrated in a gain control circuit, and the microprocessor can obtain the strength of the uplink/downlink output signal of the relay amplifier through a detector integrated in the final stage amplifier or a coupler and a detector integrated in a synchronization unit, and calculate the gain required when the relay amplifier operates at the target output power according to the strength, and then control the adjustable attenuator and the variable gain amplifier.

The variable gain amplifier is used for performing gain operation when the microprocessor detects that the uplink output power is smaller than a first preset power; the microprocessor is also used for carrying out switching operation when detecting that the downlink output power is greater than a second preset power; the adjustable attenuator is used for performing attenuation operation when the microprocessor detects that the uplink output power is greater than the first preset power; and the microprocessor is also used for carrying out attenuation operation when detecting that the downlink output power is greater than the second preset power.

It should be noted that the first preset power and the second preset power may be set by input of an operator, or may be calculated by the terminal according to the operation data, and the specific method is determined by actual conditions, and is not limited herein.

In a possible scenario, the gain control of the downlink signal may only be achieved by the variable gain amplifier, that is, when the microprocessor detects that the downlink output power is greater than the third preset power, the variable gain amplifier is adjusted from the first gain state to the second gain state, and the gain amount corresponding to the first gain state is greater than the gain amount corresponding to the second gain state. For example: the microprocessor detects that the downlink output power is 40dBm, the preset power is 30dBm, the first gain state of the variable gain amplifier is amplified by 20dB, the second gain state is amplified by 10dB, and at the moment, the downlink output power of 40dBm is greater than the preset power of 30dBm, so that the first gain state is adjusted to the second gain state, the downlink output power is adjusted to 30dBm, and the requirement of the preset power is met.

In another possible scenario, the downlink signal is strong enough, and the effect that the gain control of the downlink signal is achieved only by the variable gain amplifier through bypassing the variable gain amplifier can also be achieved, namely, the variable gain amplifier is bypassed by using a switch, and the original gain state is recovered after being continued for 1ms and 1ms, and the process similar to restarting enables the variable gain amplifier to skip the signal of the frame, so that the effect of gain control is achieved.

The signal amplification circuit can be integrated into a wireless relay amplifier for receiving, amplifying and transmitting wireless signals, and the wireless relay amplifier can also be integrated with a temperature sensor which is connected with a microprocessor; and the temperature compensation circuit is used for acquiring the temperature variation of the signal amplification circuit, and performing temperature compensation if the temperature variation is larger than a fifth threshold value. It is understood that the temperature variation may be a temperature of the single board, and a specific scenario is determined according to an actual situation and is not limited herein. For example: and the fifth threshold is 40 ℃, the temperature of the single board of the wireless relay amplifier is 45 ℃, and the microprocessor controls the wireless relay amplifier to perform temperature compensation.

It should be noted that the wireless relay amplifier can also have a plurality of signal transmission modes, namely when one mode fails, the wireless relay amplifier can be switched to another mode, so that the normal operation of the wireless relay amplifier is ensured, and the potential safety hazard caused by the failure of the wireless relay amplifier is avoided.

To illustrate this design, fig. 11 is a schematic diagram of another signal amplifying circuit provided in the embodiments of the present application.

The connection manner and functions of the directional antenna 1101, the gain control circuit 1102, the microprocessor 1103, the first synchronization unit 1104, and the second synchronization unit 1105 may refer to the related description in fig. 5, which is not described herein again.

In the signal amplifying circuit provided in this embodiment, the power divider 1109 is connected to the TBOX through a radio frequency cable, the power divider 1109 is connected to the synchronous demodulation unit 1110, the power divider 1109 is connected to the second synchronous unit 1105, and the synchronous demodulation unit 1110 is connected to the microprocessor 1103.

In a possible scenario, when the directional antenna 1101 is faulty, to ensure signal transmission of the circuit, the power divider 1109 divides a second signal sent by the TBOX, where the second signal includes a radio frequency signal and a power supply modulation signal; the synchronous demodulation unit 1110 obtains transmission direction information of the second signal according to the power modulation signal, and sends the transmission direction information to the microprocessor 1103; the microprocessor 1103 generates the gain command according to the transmission direction information; the gain control circuit 1102 performs gain control in accordance with the gain command in the transmission direction. It is understood that the first synchronization unit 1104 and the second synchronization unit 1105 may perform the determination of the transmission status or the fault detection with reference to the related description in fig. 5, and details are not described herein.

In this embodiment, the synchronous demodulation unit 1110 may acquire the transmission direction information of the second signal according to the power modulation signal in a manner that the synchronous demodulation unit 1110 acquires a first voltage according to the power modulation signal, where the first voltage is an output voltage of TBOX; comparing the first voltage with a preset voltage, wherein the preset voltage is used for indicating the transmission direction information; if the first voltage is greater than the preset voltage, generating uplink transmission information and sending the uplink transmission direction information to the microprocessor; and if the first voltage is less than the preset voltage, generating downlink transmission information and sending the uplink transmission direction information to the microprocessor. For example: the preset voltage is 9V, and if the first voltage is 6V, the microprocessor sends downlink transmission direction information; if the first voltage is 12V, the microprocessor sends uplink transmission direction information, which can be implemented by the following circuit design, as shown in fig. 12, which is a circuit diagram of a synchronous demodulation unit provided in the embodiment of the present application.

In the present embodiment, a TBOX includes: a wireless communication unit 1106, a combiner 1107 and a synchronous modulation unit 1108, wherein the wireless communication unit 1106 is connected to the combiner 1107, the combiner 1107 is connected to the synchronous modulation unit 1108, and the synchronous modulation unit 1108 is connected to the wireless communication unit 1106.

It can be understood that, in this embodiment, the TBOX further includes an internal antenna, and the internal antenna is connected to the combiner 1107, and is used to switch the radio frequency signal to the internal antenna when switching to the wireless transmission mode, so as to use the signal amplifying circuit described in fig. 3, fig. 5, or fig. 8, and the specific operation refers to the description of fig. 3, fig. 5, or fig. 8, which is not described herein again. The built-in antenna may be integrated in a wireless communication unit, or may be a plug-in for a TBOX, and the specific manner is determined by an actual scenario and is not limited herein.

When the signal amplification circuit fails and cannot receive the signal transmitted by the wireless communication unit 1106, the wireless communication unit 1106 transmits a radio frequency signal to the combiner 1107; the synchronous modulation unit 1108 generates a power modulation signal according to the radio frequency signal; combiner 1107 then transmits the power modulated signal and the radio frequency signal.

In this embodiment, the synchronous modulation unit 1108 may output a first voltage according to the radio frequency signal, and generate the power modulation signal according to the first voltage, where the first voltage is used to indicate that the radio frequency signal is an uplink control signal; and the power supply modulation circuit is further configured to output a second voltage according to the radio frequency signal, and generate the power supply modulation signal according to the second voltage, where the second voltage is used to indicate that the radio frequency signal is a downlink control signal. For example: the preset voltage is 9V, and if the radio frequency signal is an uplink signal, the first voltage may be 12V; if the rf signal is a downlink signal, the first voltage may be 6V, which may be implemented by the following circuit design, as shown in fig. 13, which is a circuit diagram of a synchronous modulation unit provided in this embodiment of the present application.

By means of the voltage modulation and demodulation mode, the transition problem of the signal amplification circuit when the wireless antenna fails is solved, the scheme realizes that the radio-frequency signal, the control signal and the power supply multiplex one cable, and the wiring quantity is reduced.

It can be understood that the scheme of voltage modulation and demodulation can also be used as a scheme for solving the problem of signal cable complexity alone, as shown in fig. 14, the scheme is another schematic diagram of a signal amplifying circuit provided in the embodiment of the present application, and components shown in the diagram can all refer to the related description in fig. 11, which is not described herein again.

The embodiment of the application also provides the terminal equipment. The terminal device may be a relay amplifier, or may be a device having the signal amplification circuit.

Fig. 15 is a schematic diagram of a terminal device according to an embodiment of the present application. For ease of understanding and illustration, in fig. 15, the terminal device takes a relay amplifier as an example. As shown in fig. 15, the terminal device includes a processor, a memory, a signal amplification circuit, an antenna, and an input-output device. The processor is mainly used for processing communication protocols and communication data, controlling the terminal equipment, executing software programs, processing data of the software programs and the like. The memory is used primarily for storing software programs and data. The signal amplifying circuit is mainly used for converting baseband signals and radio frequency signals and processing the radio frequency signals. The antenna is mainly used for receiving and transmitting radio frequency signals in the form of electromagnetic waves. Input and output devices, such as touch screens, display screens, keyboards, etc., are used primarily for receiving data input by a user and for outputting data to the user. It should be noted that some kinds of terminal devices may not have input/output means.

When data needs to be sent, the processor performs baseband processing on the data to be sent and outputs baseband signals to the signal amplification circuit, and the signal amplification circuit performs radio frequency processing on the baseband signals and sends the radio frequency signals to the outside in the form of electromagnetic waves through the antenna. When data is transmitted to the terminal equipment, the signal amplification circuit receives radio-frequency signals through the antenna, converts the radio-frequency signals into baseband signals and outputs the baseband signals to the processor, and the processor converts the baseband signals into the data and processes the data. For ease of illustration, only one memory and processor are shown in FIG. 15. In an actual end device product, there may be one or more processors and one or more memories. The memory may also be referred to as a storage medium or a storage device, etc. The memory may be provided independently of the processor, or may be integrated with the processor, which is not limited in this embodiment of the present application.

In the embodiment of the present application, the antenna and the signal amplifying circuit having the transceiving function may be regarded as a transceiving unit of the terminal device, and the processor having the processing function may be regarded as a processing unit of the terminal device. As shown in fig. 15, the terminal device includes a transceiving unit 1501 and a processing unit 1502. A transceiver unit may also be referred to as a transceiver, a transceiving device, etc. A processing unit may also be referred to as a processor, a processing board, a processing module, a processing device, or the like. Alternatively, a device for implementing a receiving function in the transceiving unit 1501 may be regarded as a receiving unit, and a device for implementing a transmitting function in the transceiving unit 1501 may be regarded as a transmitting unit, that is, the transceiving unit 1501 includes a receiving unit and a transmitting unit. A transceiver unit may also sometimes be referred to as a transceiver, transceiving circuitry, or the like. The receiving unit may also be referred to as a receiver, a signal amplification circuit, or the like. A transmitting unit may also sometimes be referred to as a transmitter, or a transmitting circuit, etc.

It is to be understood that the transceiving unit 1501 is configured to perform the transmitting operation and the receiving operation on the terminal device side in the above-described method embodiments, and the processing unit 1502 is configured to perform other operations on the terminal device in the above-described method embodiments, in addition to the transceiving operation.

The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not expressly listed or inherent to such process, method, article, or apparatus. The naming or numbering of the steps appearing in the present application does not mean that the steps in the method flow have to be executed in the chronological/logical order indicated by the naming or numbering, and the named or numbered process steps may be executed in a modified order depending on the technical purpose to be achieved, as long as the same or similar technical effects are achieved. The division of the modules presented in this application is a logical division, and in practical applications, there may be another division, for example, multiple modules may be combined or integrated into another system, or some features may be omitted, or not executed, and in addition, the shown or discussed coupling or direct coupling or communication connection between each other may be through some interfaces, and the indirect coupling or communication connection between the modules may be in an electrical or other similar form, which is not limited in this application. The modules or sub-modules described as separate components may or may not be physically separated, may or may not be physical modules, or may be distributed in a plurality of circuit modules, and some or all of the modules may be selected according to actual needs to achieve the purpose of the present disclosure.

Those skilled in the art will appreciate that all or part of the steps of the various circuit operations of the above embodiments may be implemented by associated hardware as instructed by a program, which may be stored in a computer-readable storage medium, which may include: a U disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The signal amplification circuit and the terminal device provided in the embodiments of the present application are described in detail above, and specific examples are applied herein to explain the principles and embodiments of the present application, and the description of the embodiments is only used to help understanding the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (17)

1. A signal amplification circuit, characterized in that the signal amplification circuit comprises: the device comprises a directional antenna, a gain control circuit and a microprocessor;

the directional antenna is connected with the gain control circuit, the microprocessor is connected with the directional antenna, and the microprocessor is connected with the gain control circuit;

the directional antenna is used for receiving an uplink signal sent by a vehicle-mounted communication terminal TBOX, sending a downlink signal to the TBOX, and detecting the signal intensity of the uplink signal and the signal intensity of the downlink signal;

the microprocessor is used for determining a gain parameter according to the signal intensity of the uplink signal and the signal intensity of the downlink signal and sending a gain instruction to the gain control circuit according to the gain parameter;

and the gain control circuit is used for processing signals according to the gain instruction.

2. The signal amplification circuit of claim 1, wherein the directional antenna comprises a coupler, a detector, and at least two sub-antenna modules;

the at least two sub-antenna modules are connected with the microprocessor, the at least two sub-antenna modules are connected with the coupler, the coupler is connected with the detector, the coupler is connected with the gain control circuit, and the detector is connected with the microprocessor;

the coupler is used for acquiring first signals of the at least two sub-antenna modules within a preset time period;

the detector is used for detecting the signal intensity of the first signal;

the microprocessor is used for traversing the position information of the at least two sub-antenna modules; acquiring the corresponding relation between the signal intensity of the first signal and the position information; and when the signal intensity of the first signal is greater than a first threshold value, acquiring the position information of the at least two sub-antenna modules, and controlling the at least two sub-antenna modules to acquire a second signal according to the position information.

3. The signal amplification circuit of claim 2,

the coupler is specifically configured to periodically acquire the first signals of the at least two sub-antenna modules within a preset time period.

4. The signal amplification circuit according to any one of claims 1 to 3, wherein the signal amplification circuit further comprises a first synchronization unit;

the first synchronization unit is connected with the directional antenna, the first synchronization unit is connected with the gain control circuit, and the first synchronization unit is connected with the microprocessor;

the first synchronization unit is configured to couple the downlink signal; detecting the signal strength of the downlink signal; outputting the signal intensity of the downlink signal to the microprocessor; when the microprocessor detects that the signal intensity of the downlink signal is greater than the signal intensity of the uplink signal detected by the directional antenna, a downlink channel is connected; and when the microprocessor detects that the signal intensity of the downlink signal is smaller than that of the uplink signal detected by the directional antenna, the microprocessor switches on an uplink channel.

5. The signal amplification circuit of claim 4,

the microprocessor is further used for calculating the absolute value of the difference value between the signal intensity of the uplink signal and the signal intensity of the downlink signal; if the absolute value is less than or equal to a second threshold, relay fault information is generated, the relay fault information is used for indicating that a relay amplifier has a fault, and the signal amplification circuit is integrated into the relay amplifier.

6. The signal amplification circuit of claim 5,

the microprocessor is specifically configured to calculate a difference between the signal strength of the uplink signal and the signal strength of the downlink signal; if the difference is less than or equal to a third threshold, the microprocessor generates relay fault information.

7. The signal amplification circuit of claim 5,

the microprocessor is specifically configured to calculate a difference between the signal strength of the downlink signal and the signal strength of the uplink signal; and if the difference is smaller than or equal to a fourth threshold value, the microprocessor generates directional antenna fault information.

8. The signal amplification circuit according to claim 4, further comprising a second synchronization unit;

the second synchronization unit is connected with the gain control circuit and the microprocessor;

the second synchronization unit is configured to couple the gain-controlled uplink signal; detecting the signal strength of the uplink signal after the gain control; outputting the signal intensity of the uplink signal after the gain control to the microprocessor;

the first synchronization unit is also used for coupling the downlink signals after gain control; detecting the signal intensity of the downlink signal after the gain control; outputting the signal intensity of the downlink signal after the gain control to the microprocessor;

the microprocessor is used for obtaining uplink output power according to the signal intensity of the uplink signal after the gain control and the signal intensity of the uplink signal; and the downlink output power is obtained according to the signal intensity of the downlink signal after the gain control and the signal intensity of the downlink signal.

9. The signal amplification circuit of claim 8, wherein the gain control circuit comprises: a variable gain amplifier and an adjustable attenuator;

the variable gain amplifier is used for performing gain operation when the microprocessor detects that the uplink output power is smaller than a first preset power; the microprocessor is also used for carrying out switching operation when detecting that the downlink output power is greater than a second preset power;

the adjustable attenuator is used for performing attenuation operation when the microprocessor detects that the uplink output power is greater than the first preset power; and the microprocessor is further configured to perform an attenuation operation when the microprocessor detects that the downlink output power is greater than the second preset power.

10. The signal amplification circuit of claim 9,

the variable gain amplifier is specifically configured to adjust the variable gain amplifier from a first gain state to a second gain state when the microprocessor detects that downlink output power is greater than third preset power, where a gain amount corresponding to the first gain state is greater than a gain amount corresponding to the second gain state.

11. The signal amplification circuit of claim 10, wherein the gain control circuit further comprises a switching device;

the switching device is connected with the variable gain amplifier in parallel;

and the switching device is used for switching the variable gain amplifier to the bypass when the microprocessor detects that the downlink output power is greater than the preset power, and recovering the connection after the second preset duration.

12. The signal amplification circuit according to any one of claims 1 to 3, wherein the signal amplification circuit further comprises a power divider and a synchronous demodulation unit;

the power divider is connected with the TBOX through a radio frequency cable, the power divider is connected with the synchronous demodulation unit, the power divider is connected with the gain control circuit, and the synchronous demodulation unit is connected with the microprocessor;

the power divider is used for separating a second signal sent by the TBOX, and the second signal comprises a radio frequency signal and a power supply modulation signal;

the synchronous demodulation unit is used for acquiring the transmission direction information of a second signal according to the power supply modulation signal and sending the transmission direction information to the microprocessor;

the microprocessor is used for generating the gain instruction according to the transmission direction information;

and the gain control circuit is used for executing gain control corresponding to the transmission direction according to the gain instruction.

13. The signal amplification circuit of claim 12,

the synchronous demodulation unit is specifically configured to obtain a first voltage according to the power supply modulation signal, where the first voltage is an output voltage of the TBOX; comparing the first voltage with a preset voltage, wherein the preset voltage is used for indicating the transmission direction information; if the first voltage is greater than the preset voltage, generating uplink transmission information and sending the uplink transmission information to the microprocessor; and if the first voltage is less than the preset voltage, generating downlink transmission information and sending the downlink transmission information to the microprocessor.

14. The signal amplification circuit according to any one of claims 1 to 3, further comprising: a temperature sensor;

the temperature sensor is connected with the microprocessor;

and the temperature sensor is used for acquiring the temperature variation of the signal amplification circuit, and if the temperature variation is larger than a fifth threshold value, temperature compensation is carried out.

15. A vehicle communication terminal TBOX, characterized in that the TBOX comprises: the device comprises a wireless communication unit, a combiner and a synchronous modulation unit;

the wireless communication unit is connected with the combiner, the combiner is connected with the synchronous modulation unit, and the synchronous modulation unit is connected with the wireless communication unit;

the wireless communication unit is used for sending radio frequency signals;

the synchronous modulation unit is used for generating a power supply modulation signal;

the combiner is used for sending the power supply modulation signal and the radio frequency signal.

16. The TBOX of claim 15,

the synchronous modulation unit is specifically configured to output a first voltage according to the radio frequency signal, and generate the power modulation signal according to the first voltage, where the first voltage is used to indicate that the radio frequency signal is an uplink control signal; and the power supply modulation circuit is further configured to output a second voltage according to the radio frequency signal, and generate the power supply modulation signal according to the second voltage, where the second voltage is used to indicate that the radio frequency signal is a downlink control signal.

17. A terminal device, characterized in that the terminal device comprises:

the device comprises a signal amplifying circuit, a processor, a memory, a bus and an input/output interface;

the signal amplification circuit comprises the signal amplification circuit of any one of claims 1-14;

the memory has program code stored therein;

and the processor sends a control signal to the signal amplification circuit when calling the program code in the memory, wherein the control signal is used for controlling the signal amplification circuit to amplify the uplink signal or the downlink signal.

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