CN112805678A

CN112805678A - Program programming method, device, equipment, storage medium and program product

Info

Publication number: CN112805678A
Application number: CN201880098335.8A
Authority: CN
Inventors: 胡强
Original assignee: Bitmain Technologies Inc
Current assignee: Bitmain Technologies Inc
Priority date: 2018-12-05
Filing date: 2018-12-05
Publication date: 2021-05-14
Also published as: WO2020113451A1

Abstract

A program programming method, apparatus, device, storage medium and program product, the method comprising: the control board sends error packet status request information (S201) to a plurality of computing power boards, wherein the error packet status request information is used for indicating the computing power boards to feed back error packet identification information of data packet receiving errors; further, the control board resends the target data packet corresponding to the error packet identification information to the force computing board according to the error packet identification information fed back by any force computing board (S202), so that the corresponding force computing board can correctly receive the target data packet, and program programming is facilitated. Therefore, the method can ensure that each computational board can correctly receive each data packet, thereby realizing the synchronous upgrade of programs in a plurality of computational boards.

Description

Program programming method, device, equipment, storage medium and program product

Technical Field

The present application relates to the field of electronic technologies, and in particular, to a program programming method, apparatus, device, storage medium, and program product.

Background

Generally, the processing device of the digital certificate comprises a control board and a plurality of computing boards; wherein, the control board controls the program programming of a plurality of computation force boards.

In the related art, the control board sends at least one data packet to the plurality of computation force boards respectively in a unicast mode, so that the plurality of computation force boards respectively perform programming after receiving the corresponding data packets.

However, in the related art, the problem of packet loss or packet error may occur in a part of data packets during transmission, so that the corresponding computation force board cannot correctly receive the data packets, thereby affecting program programming.

Disclosure of Invention

The embodiment of the disclosure provides a program programming method, a program programming device, program programming equipment, a storage medium and a program product, and solves the technical problem that a partial computation board in the related art cannot correctly receive a data packet, so that program programming is influenced.

In a first aspect, the disclosed embodiments provide a program programming method, which is applied to a processing device of a digital certificate, where the processing device of the digital certificate includes a control board and a plurality of computation boards, and the method includes:

the control board sends error packet status request messages to the computing boards, wherein the error packet status request messages are used for indicating error packet identification information of feedback data packet receiving errors;

and the control board resends the target data packet corresponding to the error packet identification information to the computing board according to the error packet identification information fed back by any computing board.

In a possible implementation manner, the sending, by the control board, a target data packet corresponding to the error packet identification information to the force computing board again according to the error packet identification information fed back by any force computing board includes:

the control board receives an error packet state message sent by any computing board, wherein the error packet state message comprises identification information of the computing board and identification information of the error packet;

and the control board retransmits the target data packet corresponding to the identification information of the error packet to the target force computing board corresponding to the identification information of the force computing board.

In a possible implementation manner, the retransmitting, by the control board, the target data packet corresponding to the identification information of the error packet to the target performance computing board corresponding to the identification information of the performance computing board includes:

and the control board unicast-sends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board.

In a possible implementation manner, after the unicast sending, by the control board, the target data packet corresponding to the identification information of the error packet to the target performance board corresponding to the identification information of the performance board, the method further includes:

the control board receives a unicast response message sent by the computing board; wherein the unicast response message includes: identification information and a receiving state identification of the force calculation board; the receiving state identifier is used for indicating whether the computing board successfully receives the target data packet.

In this implementation manner, the control board obtains whether the computing board successfully receives the target data packet by receiving the unicast response message sent by the computing board, so as to send the target data packet again when obtaining that the computing board does not successfully receive the target data packet until the computing board successfully receives the target data packet, thereby ensuring that any computing board correctly receives the corresponding target data packet, and facilitating the implementation of synchronous upgrade of programs in multiple computing boards.

In one possible implementation, the control board sending an error packet status request message to the plurality of computing boards includes:

and the control board broadcasts and sends the error packet status request message to the plurality of computing boards.

In a possible implementation manner, the error packet status request message includes: the device comprises a broadcast identifier and an error packet status request identifier, wherein the error packet status request identifier is used for indicating error packet identification information of a feedback data packet receiving error.

In the implementation mode, the sending efficiency of the error packet status request message can be improved by broadcasting the error packet status request message, so that the efficiency of feeding back the error packet identification information is improved.

and the control board respectively sends the error packet status request message to the plurality of computing boards in a unicast mode.

In a possible implementation manner, the error packet status request message corresponding to any computing board includes: the computing board comprises identification information of the computing board and an error packet status request identification, wherein the error packet status request identification is used for indicating error packet identification information of a feedback data packet receiving error.

In one possible implementation manner, before the control board sends the error packet status request message to the plurality of computing boards, the method further includes:

the control board sends at least one broadcast message to the plurality of computing boards, wherein the broadcast message comprises: a data packet and corresponding data packet identification information.

In the implementation mode, the control board sends the data packets to the plurality of computation force boards in a broadcasting mode, so that the sending efficiency of the data packets is improved, and the synchronous upgrading efficiency of programs in the plurality of computation force boards is improved.

In a second aspect, an embodiment of the present disclosure provides a program programming apparatus, including:

the system comprises a first sending module, a second sending module and a sending module, wherein the first sending module is configured to send an error packet status request message to a plurality of computation force boards, and the error packet status request message is used for indicating error packet identification information of a feedback data packet receiving error;

and the second sending module is configured to resend the target data packet corresponding to the error packet identification information to the force computing board according to the error packet identification information fed back by any force computing board.

In a possible implementation manner, the second sending module includes:

the receiving unit is configured to receive an error packet status message sent by any computing board, wherein the error packet status message comprises identification information of the computing board and identification information of the error packet;

and the first sending unit is configured to resend the target data packet corresponding to the error packet identification information to the target computation board corresponding to the identification information of the computation board.

In a possible implementation manner, the first sending unit is configured to send a target data packet corresponding to the error packet identification information to a target performance board corresponding to the identification information of the performance board in a unicast manner.

In one possible implementation, the apparatus further includes:

the receiving module is configured to receive a unicast response message sent by the computing board; wherein the unicast response message includes: identification information and a receiving state identification of the force calculation board; the receiving state identifier is used for indicating whether the computing board successfully receives the target data packet.

In one possible implementation manner, the first sending module includes:

a second transmitting unit configured to broadcast and transmit the error packet status request message to the plurality of computing boards.

In one possible implementation manner, the first sending module includes:

a third sending unit configured to unicast the error packet status request message to the plurality of computation boards, respectively.

In one possible implementation, the apparatus further includes:

a third sending module configured to send at least one broadcast message to the plurality of computing boards, wherein the broadcast message includes: a data packet and corresponding data packet identification information.

In a third aspect, an embodiment of the present disclosure provides an electronic device, including: a processor and a memory;

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,

the memory stores instructions executable by the at least one processor, which when executed by the at least one processor, cause the at least one processor to perform the method of any one of the above first aspects.

In a fourth aspect, an embodiment of the present disclosure provides a processing apparatus for digital certificates, including a control board and a plurality of computation boards; wherein the control board is configured to perform the method of any of the first aspect above.

In a fifth aspect, embodiments of the present disclosure provide a computer-readable storage medium storing computer-executable instructions configured to perform the method of any one of the first aspect.

In a sixth aspect, the disclosed embodiments provide a computer program product comprising a computer program stored on a computer readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to perform the method of any of the above first aspects.

According to the program programming method, the program programming device, the program programming equipment, the program programming storage medium and the program product, the control board sends error packet status request messages (indicating the computing board to feed back error packet identification information of data packet receiving errors) to the computing boards; further, the control board resends the target data packet corresponding to the error packet identification information to the corresponding computing force board according to the error packet identification information fed back by any computing force board, so that the corresponding computing force board can correctly receive the target data packet, and program programming is facilitated. Therefore, the embodiment of the disclosure can ensure that each computation force board can correctly receive each data packet, thereby realizing the synchronous upgrade of programs in a plurality of computation force boards.

Drawings

One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the accompanying drawings and not in limitation thereof, in which elements having the same reference numeral designations are shown as like elements and not in limitation thereof, and wherein:

fig. 1 is a schematic view of an application scenario provided by an embodiment of the present disclosure;

FIG. 2 is a first flowchart illustrating a program writing method according to an embodiment of the present disclosure;

FIG. 3A is a second flowchart illustrating a program writing method according to an embodiment of the disclosure;

FIG. 3B is a third flowchart illustrating a program writing method according to an embodiment of the disclosure;

fig. 4A is a fourth schematic flowchart of a program programming method according to an embodiment of the disclosure;

fig. 4B is a fifth flowchart illustrating a program writing method according to an embodiment of the disclosure;

fig. 5 is a sixth schematic flowchart of a program programming method according to an embodiment of the present disclosure;

fig. 6 is a seventh flowchart illustrating a program programming method according to an embodiment of the disclosure;

fig. 7 is a flowchart illustrating an eighth method for programming according to an embodiment of the disclosure;

FIG. 8 is a first schematic structural diagram of a program programming device according to an embodiment of the present disclosure;

FIG. 9 is a second schematic structural diagram of a program writing device according to an embodiment of the present disclosure;

FIG. 10 is a third schematic structural diagram of a program writing device according to an embodiment of the present disclosure;

FIG. 11 is a fourth schematic structural diagram of a program writing device according to an embodiment of the present disclosure;

FIG. 12 is a schematic structural diagram of a program programming device according to an embodiment of the present disclosure;

fig. 13 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.

Detailed Description

So that the manner in which the features and elements of the disclosed embodiments can be understood in detail, a more particular description of the disclosed embodiments, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the appended drawings. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may be practiced without these details. In other instances, well-known structures and devices may be shown in simplified form in order to simplify the drawing.

First, an application scenario and a part of vocabulary according to the embodiment of the present disclosure will be described.

Fig. 1 is a schematic view of an application scenario provided in the embodiment of the present disclosure. As shown in fig. 1, the program programming method provided by the embodiment of the present disclosure may be applied to a processing device of a digital certificate, where the processing device of the digital certificate provided by the embodiment of the present disclosure may include, but is not limited to: a control board and a plurality of force calculation boards (for convenience of description, the force calculation boards include a force calculation board 1 and a force calculation board 2 are shown in fig. 1 as an example).

For example, the control board provided by the embodiment of the disclosure may send a data packet to a plurality of computing boards, so that the plurality of computing boards write programs synchronously, thereby implementing synchronous upgrade of the programs in the plurality of computing boards.

Illustratively, any computing board involved in embodiments of the present disclosure may include a storage device, such as a Serial Peripheral Interface (SPI) FLASH memory (FLASH)

The data packet identification information related in the embodiments of the present disclosure may uniquely identify the corresponding data packet, for example, the packet number information of the data packet, and the like.

The error packet identification information related in the embodiments of the present disclosure may uniquely identify a corresponding data packet with an error in reception, for example, packet number information of the data packet with the error in reception, and the like.

The identification information of the force computing plate related in the embodiment of the present disclosure may uniquely identify the corresponding force computing plate, for example, the number information of the force computing plate, and the like.

In the related art, the control board sends at least one data packet to the plurality of computation force boards respectively in a unicast mode, so that the plurality of computation force boards respectively perform programming after receiving the corresponding data packets. However, in the related art, the problem of packet loss or packet error may occur in a part of data packets during transmission, so that the corresponding computation force board cannot correctly receive the data packets, program programming is affected, and synchronous upgrading of programs in multiple computation force boards cannot be realized.

The embodiment of the disclosure provides a program programming method, a program programming device, a program programming equipment, a program product and a control board, wherein after a control board sends data packets to a plurality of computation force boards, the control board sends error packet status request messages (indicating the computation force boards to feed back error packet identification information of data packet receiving errors) to the plurality of computation force boards; furthermore, the control board resends the target data packet corresponding to the error packet identification information to the corresponding computing force board according to the error packet identification information fed back by any computing force board, so that the corresponding computing force board can correctly receive the target data packet to perform program programming, and the technical problem that part of computing force boards in the related technology cannot correctly receive the data packet to influence the program programming is solved.

The following describes the technical solutions of the embodiments of the present disclosure and how to solve the above technical problems. The several embodiments may be combined, and details of the same or similar concepts or processes may not be repeated in some embodiments.

Fig. 2 is a first flowchart of a program programming method according to an embodiment of the present disclosure. The program programming method provided by the embodiment of the disclosure can be applied to a processing device of a digital certificate, which may include, but is not limited to: a control panel and a plurality of force calculation panels. As shown in fig. 2, a method provided by an embodiment of the present disclosure may include:

step S201, the control board sends error packet status request information to a plurality of computation force boards.

In this step, after sending the data packet to the plurality of force computing boards, the control board may send an error packet status request message to the plurality of force computing boards, where the error packet status request message is used to instruct the force computing boards to feed back error packet identification information of the data packet reception error (may uniquely identify the corresponding data packet with the reception error).

Step S202, the control board resends a target data packet corresponding to the error packet identification information to the force computing board according to the error packet identification information fed back by any force computing board.

In this step, for the error packet identification information fed back by any computation force board, the control board resends the target data packet corresponding to the error packet identification information to the corresponding computation force board, so that the corresponding computation force board can correctly receive the target data packet.

Illustratively, assuming that the computing force board 1 feeds back error packet identification information 1 (which can uniquely identify a target data packet 1 with a reception error) and the computing force board 2 feeds back error packet identification information 2 (which can uniquely identify a target data packet 2 with a reception error), the control board retransmits the target data packet 1 corresponding to the error packet identification information 1 to the computing force board 1 and retransmits the target data packet 2 corresponding to the error packet identification information 2 to the computing force board 2.

In the embodiment of the disclosure, the control board sends error packet status request messages (indicating the computation force board to feed back error packet identification information of data packet receiving errors) to the computation force boards; further, the control board resends the target data packet corresponding to the error packet identification information to the corresponding computing force board according to the error packet identification information fed back by any computing force board, so that the corresponding computing force board can correctly receive the target data packet, and program programming is facilitated. Therefore, the embodiment of the disclosure can ensure that each computation force board can correctly receive each data packet, thereby realizing the synchronous upgrade of programs in a plurality of computation force boards.

Fig. 3A is a second flowchart illustrating a program programming method according to an embodiment of the disclosure, and fig. 3B is a third flowchart illustrating the program programming method according to the embodiment of the disclosure. On the basis of the above embodiments, the present disclosure describes an implementation manner of "the control board resends the target data packet corresponding to the error packet identification information to any force computation board". As shown in fig. 3A, in the method provided in the embodiment of the present disclosure, the step S202 may include:

in step S202A, the control board receives the error packet status message sent by any computing board.

In this step, the control board receives an error packet status message sent by any computing board, where the error packet status message may include, but is not limited to, identification information of the computing board (which may uniquely identify the computing board) and error packet identification information (which may uniquely identify a corresponding data packet with a reception error).

Table 1 is a schematic structural table of error packet status messages provided in the embodiments of the present disclosure

Illustratively, as shown in table 1, the error packet status message may include, but is not limited to: identification information of the computation force board, the identification information of the error packets (for example, the packet numbers corresponding to the target data packets), the number of the error packets (for example, the number of the target data packets), and Cyclic Redundancy Check (CRC) Check information.

Step S202B, the control board resends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board.

In this step, the control board resends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the received identification information of the force computing board, so that the force computing board can correctly receive the target data packet.

For example, assuming that the control board receives the error packet status message 1 (including the identification information of the force board 1 and the error packet identification information 1) sent by the force board 1 and the error packet status message 2 (including the identification information of the force board 2 and the error packet identification information 2) sent by the force board 2 in step S202A, the control board resends the target data packet 1 corresponding to the error packet identification information 1 to the target force board (i.e., the force board 1) corresponding to the identification information of the force board 1 and resends the target data packet 2 corresponding to the error packet identification information 2 to the target force board (i.e., the force board 2) corresponding to the identification information of the force board 2.

The following section of the embodiment of the present disclosure introduces an implementation manner of "the control board resends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board".

As shown in fig. 3B, in the method provided in the embodiment of the present disclosure, the step S202B may include:

step S202B0, the control board sends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board in a unicast mode.

In this step, the control board may send a unicast message to the target force computing board corresponding to the identification information of the force computing board, where the unicast message may include but is not limited to: and the target data packet corresponding to the error packet identification information.

Table 2 is a schematic structural table of unicast messages provided in the embodiment of the present disclosure

Illustratively, as shown in table 2, the unicast message may include, but is not limited to: identification information of the computation force board, identification information of the error packet (for example, a packet number corresponding to the target data packet), length information of the target data packet, data of the target data packet, and CRC check information.

In order to facilitate the control board to know whether the computing board successfully receives the target data packet, after step S202B0, the method further includes:

and step S202B1, the control board receives the unicast response message sent by the computing board.

Illustratively, the unicast response message may include, but is not limited to: identification information of the computing power board and a receiving state identification (used for indicating whether the computing power board successfully receives the target data packet). For example, if the receiving status identifier is equal to a first preset identifier, the computing board is indicated to successfully receive the target data packet; and if the receiving state identifier is equal to a second preset identifier, indicating that the computation board does not successfully receive the target data packet.

Table 3 is a schematic structural table of a unicast response message provided in the embodiment of the present disclosure

Identification information of force calculation board

Receiving status identification

CRC check information

Illustratively, as shown in table 3, the unicast response message may include, but is not limited to: identification information of the computation force board, the receiving state identification and CRC check information.

For example, when the receiving status identifier indicates that the performance board has not successfully received the target data packet, the control board may send the target data packet corresponding to the error packet identifier information to the target performance board in a unicast manner again until the target performance board successfully receives the target data packet, so as to ensure that the target performance board correctly receives the target data packet, and thus, the synchronous upgrade of programs in multiple performance boards is facilitated.

In this embodiment of the present disclosure, the control board may also retransmit the target data packet corresponding to the identification information of the error packet to the target force computing board corresponding to the identification information of the force computing board in another implementable manner, which is not limited in this embodiment of the present disclosure.

In the embodiment of the disclosure, when an error packet status message (including the identification information of the force computing board and the error packet identification information) sent by any force computing board is received, the control board resends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board, so that the corresponding force computing board can correctly receive the target data packet. Therefore, the embodiment of the disclosure can ensure that each computation force board can correctly receive each data packet, so as to facilitate program programming, thereby realizing synchronous upgrading of programs in a plurality of computation force boards.

Fig. 4A is a fourth flowchart illustrating a program programming method according to an embodiment of the disclosure, and fig. 4B is a fifth flowchart illustrating the program programming method according to the embodiment of the disclosure. On the basis of the above embodiments, the present disclosure describes an implementation manner of "the control board sends an error packet status request message to multiple computing power boards.

In a possible implementation manner, as shown in fig. 4A, in the method provided in the embodiment of the present disclosure, the step S201 may include:

step S201A, the control board broadcasts and sends an error packet status request message to the plurality of computing boards.

Illustratively, the error packet status request message may include, but is not limited to: broadcasting an identifier and an error packet status request identifier (error packet identifier information indicating that the feedback data packet is received erroneously), so that each of the plurality of computing boards can receive the error packet status request message, thereby feeding back the error packet identifier information to the control board. Therefore, the sending efficiency of the error packet status request message can be improved by broadcasting the error packet status request message, so that the efficiency of feeding back the error packet identification information is improved.

Table 4 is a structural schematic table of an error packet status request message provided in the embodiment of the present disclosure

Broadcast identification

Error packet status request identification

CRC check information

Illustratively, as shown in table 4, the error packet status request message may include, but is not limited to: the broadcast identification and the error packet status request identification and CRC check information.

In another possible implementation manner, as shown in fig. 4B, in the method provided in the embodiment of the present disclosure, the step S201 may include:

step S201B, the control board unicast-sends the error packet status request message to the plurality of computing boards, respectively.

In this step, the control board respectively sends the error packet status request message to the plurality of computation force boards in a unicast manner; the error packet status request message corresponding to any computing board may include, but is not limited to: identification information of the computation force board and an error packet status request identification (error packet identification information indicating that a feedback data packet is received erroneously).

Table 5 is a structural schematic diagram of an error packet status request message provided in the embodiment of the present disclosure

Identification information of force calculation board

Error packet status request identification

CRC check information

Illustratively, as shown in table 5, the error packet status request message corresponding to any computing board may include, but is not limited to: identification information of the computation force board, the error packet status request identification and CRC check information.

Fig. 5 is a sixth schematic flowchart of a program programming method according to an embodiment of the present disclosure. On the basis of the above embodiments, the present disclosure describes an implementation manner of a control board before sending an error packet status request message to a plurality of computing boards. As shown in fig. 5, the method provided in the embodiment of the present disclosure further includes, before step S201:

step S203, the control board sends at least one broadcast message to the plurality of computing boards.

In this step, the control board sends at least one broadcast message to the plurality of computing boards, where the broadcast message may include but is not limited to: a data packet and corresponding data packet identification information.

Table 6 is a structural schematic table of a broadcast message provided in the embodiments of the present disclosure

Illustratively, as shown in table 6, the broadcast message may include, but is not limited to: broadcast identification, packet identification information (e.g., packet number corresponding to the packet), length information of the packet, data in the packet, and CRC check information.

In the embodiment of the disclosure, the control board sends the data packets to the plurality of computation force boards in a broadcasting manner, so that the sending efficiency of the data packets is improved, and the synchronous upgrading efficiency of programs in the plurality of computation force boards is improved.

Fig. 6 is a seventh flowchart illustrating a program programming method according to an embodiment of the disclosure. On the basis of the above example, in the embodiment of the present disclosure, the procedure of the program programming method provided in the above embodiment is described by taking the example of programming the control board to the computation board 1. As shown in fig. 6, a method provided by an embodiment of the present disclosure may include:

step S601, the control board sends n broadcast messages to the computing board 1.

Illustratively, the mth broadcast message includes: the data packet comprises a data packet m and corresponding data packet identification information m, wherein m is an integer which is greater than 0 and less than n, and n is an integer which is greater than 1.

Step S602, the control board sends an error packet status request message to the computing board 1.

Illustratively, the error packet status request message is used for indicating error packet identification information of a feedback data packet reception error.

Step S603, the control board receives the error packet status message sent by the computing board 1.

Illustratively, the error packet status message may include: identification information of the computing power board 1, error packet identification information 1 (e.g., data packet identification information 1), and error packet identification information 2 (e.g., data packet identification information 3).

Step S604, the control board resends the target data packet corresponding to the error packet identification information 1 to the force computing board 1.

Illustratively, the error packet identification information 1 corresponds to a target data packet (e.g., the data packet 1 corresponding to the data packet identification information 1).

Step S605, after receiving the first unicast response message sent by the force computing board 1, the control board resends the target data packet corresponding to the error packet identification information 2 to the force computing board 1.

Illustratively, the unicast response message 1 may include: identification information of the force computing board 1 and a first preset identification (indicating that the force computing board 1 successfully receives the data packet 1).

Illustratively, the error packet identification information 2 corresponds to a destination data packet (e.g., data packet 3 corresponding to data packet identification information 3).

And step S606, the control board receives a second unicast response message sent by the computing board 1.

Illustratively, the unicast response message 2 may include: identification information of the force computing board 1 and a first preset identification (indicating that the force computing board 1 successfully receives the data packet 3).

In the embodiment of the disclosure, after the control board broadcasts and sends the data packet to the force computing board, when receiving the error packet status message sent by the force computing board, the control board resends the target data packet corresponding to the error packet identification information to the force computing board, so that the force computing board can correctly receive the target data packet. Therefore, the embodiment of the disclosure can ensure that any computation force board can correctly receive the data packet sent by the control board, thereby realizing programming.

Fig. 7 is a flowchart illustrating an eighth method for programming according to an embodiment of the disclosure. On the basis of the above example, in the embodiment of the present disclosure, the procedure of the program programming method provided in the above embodiment is described by taking the example that the control board performs program programming on the force computing board 1 and the force computing board 2. As shown in fig. 7, a method provided by an embodiment of the present disclosure may include:

step S701, the control board sends at least one broadcast message to the force computing board 1 and the force computing board 2.

Illustratively, the at least one broadcast message includes a broadcast message 1 and a broadcast message 2, wherein the broadcast message 1 includes: the data packet 1 and the corresponding data packet identification information 1, and the broadcast message 2 includes: packet 2 and corresponding packet identification information 2.

Step S702, the control board sends an error packet status request message to the force computing board 1 and the force computing board 2.

Illustratively, the control board may send error packet status request messages to the force board 1 and the force board 2 in a unicast manner or in a broadcast manner.

Step S703, the control board receives the error packet status message 1 sent by the force computing board 1 and the error packet status message 2 sent by the force computing board 2.

Illustratively, the error packet status message 1 includes: identification information of computing power board 1 and error packet identification information 1 (e.g., data packet identification information 2).

Illustratively, the error packet status message 2 includes: computing board 2 and error packet identification information 2 (e.g., packet identification information 1).

Step S704, the control board resends the target data packet corresponding to the error packet identification information 1 to the computing force board 1.

Illustratively, the error packet identification information 1 corresponds to a destination data packet (e.g., the data packet 2 corresponds to the data packet identification information 2).

Step S705, the control board retransmits the target data packet corresponding to the error packet identification information 2 to the computing board 2.

Illustratively, the error packet identification information 2 corresponds to the target data packet (e.g., the data packet 1 corresponding to the data packet identification information 1).

In the embodiment of the disclosure, after the control board broadcasts and sends the data packet to each computing board, when an error packet status message sent by any computing board is received, the control board resends the target data packet corresponding to the error packet identification information to the corresponding computing board, so that the corresponding computing board can correctly receive the target data packet. Therefore, according to the embodiment of the disclosure, on one hand, each computation force board can be ensured to correctly receive each data packet, so that program programming can be realized; on the other hand, the data packet is transmitted in a broadcasting mode, and the transmission efficiency of the data packet can be improved, so that the synchronous upgrading efficiency of programs in a plurality of computing boards is improved.

Fig. 8 is a first schematic structural diagram of a program programming device according to an embodiment of the present disclosure. As shown in fig. 8, the program programming device 80 provided by the embodiment of the present disclosure may include: a first transmission module 801 and a second transmission module 802.

The first sending module 801 is configured to send an error packet status request message to a plurality of computing boards, where the error packet status request message is used to indicate error packet identification information of a feedback data packet reception error;

a second sending module 802, configured to resend, to the force computing board, a target data packet corresponding to the error packet identification information according to the error packet identification information fed back by any force computing board.

Fig. 9 is a schematic structural diagram of a program programming device according to an embodiment of the present disclosure. On the basis of the above example, as shown in fig. 9, the second sending module 802 includes:

a receiving unit 802A configured to receive an error packet status message sent by any computing board, where the error packet status message includes identification information of the computing board and identification information of the error packet;

the first sending unit 802B is configured to resend the target data packet corresponding to the error packet identification information to the target performance computing board corresponding to the identification information of the performance computing board.

In a possible implementation manner, the first sending unit 802B is configured to send a target data packet corresponding to the error packet identification information to a target computing board corresponding to the identification information of the computing board in a unicast manner.

In one possible implementation, as shown in fig. 8, the program programming device 80 further includes:

a receiving module 803 configured to receive a unicast response message sent by the computing board; wherein the unicast response message includes: identification information and a receiving state identification of the force calculation board; the receiving state identifier is used for indicating whether the computing board successfully receives the target data packet.

Fig. 10 is a schematic structural diagram of a program programming device according to an embodiment of the present disclosure. On the basis of the above example, as shown in fig. 10, the first sending module 801 includes:

a second sending unit 801A configured to broadcast and send the error packet status request message to the plurality of computing boards.

Fig. 11 is a schematic structural diagram of a program programming device according to a fourth embodiment of the present disclosure. On the basis of the above example, as shown in fig. 11, the first sending module 801 includes:

a third sending unit 801B configured to unicast-send the error packet status request message to the plurality of computing boards, respectively.

Fig. 12 is a schematic structural diagram five of the program programming device according to the embodiment of the present disclosure. On the basis of the above example, as shown in fig. 12, the program programming apparatus 80 further includes:

a third sending module 804 configured to send at least one broadcast message to the plurality of computing boards, wherein the broadcast message includes: a data packet and corresponding data packet identification information.

The program programming device provided in each embodiment of the present disclosure may be configured to execute the technical solution of the above program programming method embodiment of the present disclosure, and the implementation principle and the technical effect are similar, which are not described herein again.

Fig. 13 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. As shown in fig. 13, an electronic device 130 provided by the embodiment of the present disclosure may include: at least one processor 1301 (one processor 1301 is illustrated in fig. 13); and a memory 1302 communicatively coupled to the at least one processor 1301, and may also include a Communication Interface 1303 and a bus 1304. The processor 1301, the memory 1302, and the communication interface 1303 may communicate with each other via a bus 1304.

Wherein the memory 1302 stores logic instructions executable by the processor 1301; the communication interface 1303 may be used for information transmission; the processor 1301 may call the logic instruction in the memory 1302 to execute the technical solution of the above embodiment of the program programming method of the present application, and the implementation principle and the technical effect are similar, and are not described herein again.

Furthermore, the logic instructions in the memory 1302 may be implemented in software functional units and stored in a computer readable storage medium when sold or used as a stand-alone product.

The memory 1302 is a computer-readable storage medium, and can be used for storing software programs, computer-executable programs, such as program instructions/modules corresponding to the methods in the embodiments of the present disclosure. The processor 1301 executes the functional application and data processing by running the software programs, instructions and modules stored in the memory 1302, that is, implementing the program programming method in the above method embodiments.

The memory 1302 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of the electronic device, and the like. Further, memory 1302 may include high speed random access memory and may also include non-volatile memory.

The embodiment of the present disclosure further provides a device for processing a digital certificate, where the device for processing a digital certificate may include: the device comprises a control board and a plurality of force calculation boards; the control board is used for executing the technical scheme of the above program programming method embodiment of the present application, and the implementation principle and technical effect are similar, which are not described herein again.

The embodiment of the present disclosure further provides a computer-readable storage medium, which stores computer-executable instructions configured to execute the technical solution of the above-mentioned program programming method embodiment of the present disclosure, and the implementation principle and the technical effect are similar, and are not described herein again.

The embodiments of the present disclosure further provide a computer program product, where the computer program product includes a computer program stored on a computer-readable storage medium, where the computer program includes program instructions, and when the program instructions are executed by a computer, the computer is caused to execute the technical solution of the above-mentioned program programming method embodiment of the present application, and the implementation principle and the technical effect are similar, and are not described herein again.

It should be understood by those of ordinary skill in the art that, in the various embodiments of the present disclosure, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of the processes should be determined by their functions and inherent logic, and should not limit the implementation process of the embodiments of the present disclosure.

The technical solution of the embodiments of the present disclosure may be embodied in the form of a software product, where the computer software product is stored in a storage medium and includes one or more instructions to enable a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method of the embodiments of the present disclosure. And the aforementioned storage medium may be a non-transitory storage medium comprising: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes, and may also be a transient storage medium.

As used in this application, although the terms "first," "second," etc. may be used in this application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, unless the meaning of the description changes, so long as all occurrences of the first element are renamed consistently and all occurrences of the second element are renamed consistently. The first and second elements are both elements, but may not be the same element.

The words used in this application are words of description only and not of limitation of the claims. As used in the description of the embodiments and the claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this application is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, the terms "comprises" and/or "comprising," when used in this application, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

The various aspects, implementations, or features of the described embodiments can be used alone or in any combination. Aspects of the described embodiments may be implemented by software, hardware, or a combination of software and hardware. The described embodiments may also be embodied by a computer-readable medium having computer-readable code stored thereon, the computer-readable code comprising instructions executable by at least one computing device. The computer readable medium can be associated with any data storage device that can store data which can be read by a computer system. Exemplary computer readable media can include read-only memory, random-access memory, CD-ROMs, HDDs, DVDs, magnetic tape, and optical data storage devices, among others. The computer readable medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.

The above description of the technology may refer to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration embodiments in which the described embodiments may be practiced. These embodiments, while described in sufficient detail to enable those skilled in the art to practice them, are non-limiting; other embodiments may be utilized and changes may be made without departing from the scope of the described embodiments. For example, the order of operations described in a flowchart is non-limiting, and thus the order of two or more operations illustrated in and described in accordance with the flowchart may be altered in accordance with several embodiments. As another example, in several embodiments, one or more operations illustrated in and described with respect to the flowcharts are optional or may be eliminated. Additionally, certain steps or functions may be added to the disclosed embodiments, or two or more steps may be permuted in order. All such variations are considered to be encompassed by the disclosed embodiments and the claims.

Additionally, terminology is used in the foregoing description of the technology to provide a thorough understanding of the described embodiments. However, no unnecessary detail is required to implement the described embodiments. Accordingly, the foregoing description of the embodiments has been presented for purposes of illustration and description. The embodiments presented in the foregoing description and the examples disclosed in accordance with these embodiments are provided solely to add context and aid in the understanding of the described embodiments. The above description is not intended to be exhaustive or to limit the described embodiments to the precise form disclosed. Many modifications, alternative uses, and variations are possible in light of the above teaching. In some instances, well known process steps have not been described in detail in order to avoid unnecessarily obscuring the described embodiments.

Claims

A programming method applied to a processing device of a digital voucher, the processing device of the digital voucher comprising a control board and a plurality of computation boards, the method comprising:

the control board sends error packet status request messages to the computing boards, wherein the error packet status request messages are used for indicating error packet identification information of feedback data packet receiving errors;

and the control board resends the target data packet corresponding to the error packet identification information to the computing board according to the error packet identification information fed back by any computing board.
The method of claim 1, wherein the control board resends the target data packet corresponding to the error packet identification information to the force computing board according to the error packet identification information fed back by any force computing board, and the method comprises:

the control board receives an error packet state message sent by any computing board, wherein the error packet state message comprises identification information of the computing board and identification information of the error packet;

and the control board retransmits the target data packet corresponding to the identification information of the error packet to the target force computing board corresponding to the identification information of the force computing board.
The method of claim 2, wherein the control board resends the target data packet corresponding to the error packet identification information to the target performance board corresponding to the identification information of the performance board, and the method comprises:

and the control board unicast-sends the target data packet corresponding to the error packet identification information to the target force computing board corresponding to the identification information of the force computing board.
The method of claim 3, wherein after the control board unicast-transmits the target data packet corresponding to the error packet identification information to the target performance board corresponding to the identification information of the performance board, the method further comprises:

the control board receives a unicast response message sent by the computing board; wherein the unicast response message includes: identification information and a receiving state identification of the force calculation board; the receiving state identifier is used for indicating whether the computing board successfully receives the target data packet.
The method of any of claims 1-4, wherein the control board sends an error packet status request message to the plurality of computing boards, comprising:

and the control board broadcasts and sends the error packet status request message to the plurality of computing boards.
The method of claim 5, wherein the error packet status request message comprises: the device comprises a broadcast identifier and an error packet status request identifier, wherein the error packet status request identifier is used for indicating error packet identification information of a feedback data packet receiving error.
The method of any of claims 1-4, wherein the control board sends an error packet status request message to the plurality of computing boards, comprising:

and the control board respectively sends the error packet status request message to the plurality of computing boards in a unicast mode.
The method of claim 7, wherein the error packet status request message corresponding to any of the computing boards comprises: the computing board comprises identification information of the computing board and an error packet status request identification, wherein the error packet status request identification is used for indicating error packet identification information of a feedback data packet receiving error.
The method of any of claims 1-4, wherein prior to the control board sending an error packet status request message to the plurality of computing boards, further comprising:

the control board sends at least one broadcast message to the plurality of computing boards, wherein the broadcast message comprises: a data packet and corresponding data packet identification information.
A program writing apparatus, comprising:

the system comprises a first sending module, a second sending module and a sending module, wherein the first sending module is configured to send an error packet status request message to a plurality of computation force boards, and the error packet status request message is used for indicating error packet identification information of a feedback data packet receiving error;

and the second sending module is configured to resend the target data packet corresponding to the error packet identification information to the force computing board according to the error packet identification information fed back by any force computing board.
The apparatus of claim 10, wherein the second sending module comprises:

the receiving unit is configured to receive an error packet status message sent by any computing board, wherein the error packet status message comprises identification information of the computing board and identification information of the error packet;

and the first sending unit is configured to resend the target data packet corresponding to the error packet identification information to the target computation board corresponding to the identification information of the computation board.
The apparatus according to claim 11, wherein the first sending unit is configured to send a target data packet corresponding to the error packet identification information to a target performance board corresponding to the identification information of the performance board in a unicast manner.
The apparatus of claim 12, further comprising:

the receiving module is configured to receive a unicast response message sent by the computing board; wherein the unicast response message includes: identification information and a receiving state identification of the force calculation board; the receiving state identifier is used for indicating whether the computing board successfully receives the target data packet.
The apparatus according to any one of claims 10-13, wherein the first sending module comprises:

a second transmitting unit configured to broadcast and transmit the error packet status request message to the plurality of computing boards.
The apparatus of claim 14, wherein the error packet status request message comprises: the device comprises a broadcast identifier and an error packet status request identifier, wherein the error packet status request identifier is used for indicating error packet identification information of a feedback data packet receiving error.
The apparatus according to any of claims 10-13, wherein the first sending module comprises:

a third sending unit configured to unicast the error packet status request message to the plurality of computation boards, respectively.
The apparatus of claim 16, wherein the error packet status request message corresponding to any of the computing boards comprises: the computing board comprises identification information of the computing board and an error packet status request identification, wherein the error packet status request identification is used for indicating error packet identification information of a feedback data packet receiving error.
The apparatus according to any one of claims 10-13, further comprising:

a third sending module configured to send at least one broadcast message to the plurality of computing boards, wherein the broadcast message includes: a data packet and corresponding data packet identification information.
An electronic device, comprising: a processor and a memory;

at least one processor; and a memory communicatively coupled to the at least one processor;

wherein the memory stores instructions executable by the at least one processor, the instructions, when executed by the at least one processor, cause the at least one processor to perform the method of any of claims 1-9.
The processing equipment of the digital certificate is characterized by comprising a control board and a plurality of force calculation boards; wherein the control board is configured to perform the method of any one of claims 1-9.
A computer-readable storage medium having stored thereon computer-executable instructions configured to perform the method of any one of claims 1-9.
A computer program product, characterized in that the computer program product comprises a computer program stored on a computer-readable storage medium, the computer program comprising program instructions which, when executed by a computer, cause the computer to carry out the method of any one of claims 1-9.