CN112803749B - Current detection control method of power factor correction circuit - Google Patents
Current detection control method of power factor correction circuit Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The present disclosure relates to a current detection control method of a power factor correction circuit, applied in a control device for outputting a control signal to control the power factor correction circuit to correct a power factor of an input alternating current, wherein the method comprises: the method comprises the steps of determining a current sampling mode according to common-mode voltage of an input current sampling signal, amplifying the current sampling signal to obtain an amplified current sampling signal when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, and taking the amplified current sampling signal as a target current signal so that the control device adjusts the duty ratio of a control signal according to the amplified current sampling signal. Through the method, the embodiment of the disclosure can realize multiple current detection modes, compatibility and self-adaptive selection of multiple types of power factor correction circuits, and reduce the circuit complexity.
Description
Technical Field
The present disclosure relates to the field of integrated circuit technologies, and in particular, to a current detection control method for a power factor correction circuit.
Background
The application of the power electronic technology can greatly improve the power density of the electric energy conversion device and effectively reduce the volume and the weight of the device. With the rapid development of power electronic technology, power electronic devices are more and more, almost every power electronic device needs to convert alternating current into direct current through a rectification conversion technology, and in order to reduce the mutual influence of load harmonics on a power grid and other devices, the input current harmonic content and power density of every electronic device need to meet the current harmonic requirements of alternating current electric equipment. Therefore, it is important to research a PFC (Power Factor correction) converter with high efficiency and high Power density.
When a PFC converter is controlled, an alternating current of an input alternating current needs to be detected, and a control signal is generated according to the alternating current, and in order to adapt to a plurality of current detection modes, a circuit adapted to different current detection modes needs to be designed according to different applications, power levels, topologies and the like in the related art, so that the implementation is complex, and compatibility and adaptive selection of the plurality of current detection modes are difficult to implement.
Disclosure of Invention
In view of this, the present disclosure provides a current detection control method for a power factor correction circuit, so as to implement compatibility and adaptive selection of multiple current detection modes and reduce circuit complexity.
According to an aspect of the present disclosure, a current detection control method of a power factor correction circuit is provided, which is applied in a control device for outputting a control signal to control the power factor correction circuit to correct a power factor of an input alternating current, wherein the method includes:
determining a current sampling mode according to a common-mode voltage of an input current sampling signal, wherein the current sampling signal is acquired from the power factor correction circuit;
when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, amplifying the current sampling signal to obtain an amplified current sampling signal;
and taking the amplified current sampling signal as a target current signal, so that the control device adjusts the duty ratio of a control signal according to the amplified current sampling signal.
In one possible implementation, the method further includes:
and when the current sampling mode is determined to be a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier, directly taking the current sampling signal as a target current signal.
In a possible implementation manner, the determining a current sampling manner according to a common-mode voltage of an input current sampling signal includes:
when the common-mode voltage of the current sampling signal is lower than a preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a resistor; or
And when the common-mode voltage of the current sampling signal is higher than the preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier.
In one possible implementation, the control device includes an amplifier, wherein the amplifying the current sampling signal includes:
and amplifying the current sampling signal by using the amplifier, wherein the gain of the amplifier is a preset gain.
In one possible implementation, the method further includes:
and performing overcurrent detection on the target current signal current sampling signal, and outputting a turn-off control signal to control the power factor correction circuit to be turned off when the current of the detected target current sampling signal reaches a set threshold value.
In a possible implementation manner, the control device includes a comparison unit and a threshold setting unit, and a positive terminal of the comparison unit is used for inputting a differential positive signal corresponding to the target current detection signal; the negative terminal of the comparison unit is used for inputting a differential negative signal corresponding to the target current detection signal and is connected to the threshold setting unit, and the threshold setting unit is used for generating the set threshold.
In one possible implementation manner, the outputting a shutdown control signal to control the power factor correction circuit to be shut down when the current of the detected target current sampling signal reaches a set threshold value includes:
and when the input voltage of the positive end of the comparison unit is the same as the input voltage of the negative end, determining that the current of the detected target current sampling signal reaches a set threshold value, and outputting the turn-off control signal by the comparison unit so as to control the power factor correction circuit to be turned off.
In one possible implementation, the control device includes a selection control unit, and the method further includes:
controlling the selection control unit to output the target current sampling signal according to the common-mode voltage and/or the sampling voltage of the input current sampling signal,
and controlling a differential positive signal corresponding to the target current sampling signal to be output from a first output end of the selection control unit, and controlling a differential negative signal corresponding to the target current sampling signal to be output from a second output end of the selection control unit.
In one possible implementation, the power factor correction circuit includes a bridgeless totem-pole power factor correction circuit, including:
controlling a differential positive signal corresponding to the target current sampling signal to be output from a first output end of the selection control unit according to the polarity of the alternating current;
and controlling a differential negative signal corresponding to the target current sampling signal to be output from a second output end of the selection control unit according to the polarity of the alternating current.
In one possible implementation manner, the control device further includes:
the voltage loop module is used for outputting power related parameters according to the output voltage of the power factor correction circuit and the reference voltage, and the power related parameters are related to the power of the power factor correction circuit;
the target current determining module is electrically connected with the voltage loop module and used for determining target current according to the alternating voltage of the input alternating current and the power related parameters;
the current loop module is electrically connected to the target current determination module and used for obtaining an adjustment value according to the target current and the target current sampling signal, and the adjustment value is used for adjusting the duty ratio of a control signal;
the voltage adjusting module is electrically connected with the current loop module and used for calculating the alternating voltage of the input alternating current and adjusting the calculated voltage by using the adjusting value to obtain the adjusted voltage;
and the signal generating module is electrically connected with the voltage adjusting module and used for generating a control signal according to the adjusted voltage.
By the method, the current sampling mode is determined according to the common-mode voltage of the input current sampling signal, when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, the current sampling signal is amplified to obtain an amplified current sampling signal, and the amplified current sampling signal is used as a target current signal, so that the control device adjusts the duty ratio of the control signal according to the amplified current sampling signal, the compatibility and the self-adaptive selection of various current detection modes can be realized, and the circuit complexity is reduced.
Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.
Fig. 1 shows a flowchart of a current detection control method of a power factor correction circuit according to an embodiment of the present disclosure.
Fig. 2 shows a flowchart of a current detection control method of a power factor correction circuit according to an embodiment of the present disclosure.
FIG. 3a shows a partial schematic view of a control device according to an embodiment of the disclosure.
FIG. 3b shows a partial schematic view of a control device according to an embodiment of the disclosure.
FIG. 4 shows a partial schematic view of a control device according to an embodiment of the present disclosure.
FIG. 5 shows a schematic diagram of a power factor correction circuit according to an embodiment of the present disclosure.
FIG. 6 shows a schematic diagram of a power factor correction circuit according to an embodiment of the present disclosure.
Detailed Description
Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the subject matter of the present disclosure.
Referring to fig. 1, fig. 1 is a flowchart illustrating a current detection control method of a pfc circuit according to an embodiment of the present disclosure.
The method is applied to a control device, which is used for outputting a control signal to control a power factor correction circuit to correct the power factor of input alternating current, wherein, as shown in figure 1, the method comprises the following steps:
step S11, determining a current sampling mode according to the common mode voltage of the input current sampling signal, wherein the current sampling signal is collected from the power factor correction circuit;
step S12, when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, amplifying the current sampling signal to obtain an amplified current sampling signal;
and step S13, taking the amplified current sampling signal as a target current signal, so that the control device adjusts the duty ratio of the control signal according to the amplified current sampling signal.
By the method, the embodiment of the disclosure determines a current sampling mode according to the common-mode voltage of the input current sampling signal, and when the current sampling mode is determined to be a current sampling mode that utilizes a resistor to sample, the current sampling signal is amplified to obtain an amplified current sampling signal, and the amplified current sampling signal is used as a target current signal, so that the control device adjusts the duty ratio of the control signal according to the amplified current sampling signal, thereby realizing compatibility and adaptive selection of multiple current detection modes and multiple PFC circuits, and reducing circuit complexity.
In one example, the current sampling method using the resistor for sampling may be that a sampling resistor is provided at a specific position of the power factor correction circuit, and a current value is obtained by detecting a voltage drop of a voltage of a current flowing through the resistor.
The embodiment of the disclosure amplifies a current sampling signal obtained by sampling the resistance to control the loss, so that the subsequent operation can be accurately realized.
In one example, the current sampling mode may further include a current sampling mode that performs sampling by using a Hall current Sensor (Hall Sensor) or an isolation amplifier, and the current sampling mode that performs sampling by using the Hall current Sensor or the isolation amplifier acquires a current sampling signal, and has the characteristics of low loss, large current detection gain, and large signal amplitude.
Of course, the current sampling manner may also include others, and the embodiment of the present disclosure is not limited thereto.
Referring to fig. 2, fig. 2 is a flowchart illustrating a current detection control method of a pfc circuit according to an embodiment of the present disclosure.
In one possible implementation, as shown in fig. 2, the method may further include:
and step S14, when the current sampling mode is determined to be a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier, directly taking the current sampling signal as a target current signal.
The current sampling mode of sampling by using the Hall current sensor or the isolation amplifier is used for collecting the current sampling signal, so that the method and the device have the characteristics of low loss, large current detection gain and large signal amplitude, and the current sampling signal can be directly used as a target current signal, so that the control device can adjust the duty ratio of the control signal according to the target current signal.
In the following, possible implementations of the individual steps are exemplarily described.
In one possible implementation, the step S11 of determining the current sampling mode according to the common-mode voltage of the input current sampling signal may include:
when the common-mode voltage of the current sampling signal is lower than a preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a resistor; or
And when the common-mode voltage of the current sampling signal is higher than the preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier.
In an example, the preset voltage value may be determined according to actual conditions or needs, and the specific magnitude of the preset voltage value is not limited in the embodiments of the present disclosure.
In one example, the output signal common-mode voltage of the hall current sensor is above 1V, which is 2.5V for a 5V powered hall current sensor.
In one example, an isolation amplifier can also be used for current sampling, and the isolation amplifier which is commonly used in the market supplies power of 3.3V to 5V, and the output common-mode voltage is more than 1V.
In one example, the common-mode voltage of the resistance sampling signal is usually 0V, and of course, after amplification by the embodiments of the present disclosure, the common-mode voltage is no longer 0V.
For example, the preset voltage value can be set to any voltage value between 0.5 and 1V, for example, 0.8V.
Taking a preset voltage value of 0.8V as an example, when the common-mode voltage of the current sampling signal is lower than the preset voltage value of 0.8V, the embodiment of the present disclosure may determine that the current sampling mode is a current sampling mode in which sampling is performed by using a resistor, and when the common-mode voltage of the current sampling signal is higher than the preset voltage value of 0.8V, the embodiment of the present disclosure may determine that the current sampling mode is a current sampling mode in which sampling is performed by using a hall current sensor or an isolation amplifier.
Of course, it should be understood that the above description of the preset voltage is exemplary and should not be construed as limiting the present disclosure.
In a possible implementation manner, the control device includes an amplifier, wherein the step S12 of amplifying the current sampling signal may include:
and amplifying the current sampling signal by using the amplifier, wherein the gain of the amplifier is a preset gain.
In one example, the preset gain M may be an integer greater than 0, and preferably, may be, for example, 0 to 10 times; further preferably, the preset gain may be 5 times.
Referring to fig. 3a, fig. 3a is a partial schematic diagram of a control device according to an embodiment of the disclosure.
In one example, as shown in fig. 3a, the control means may comprise an amplifier AMP, the amplification factor (gain) M of which may be set as desired, e.g. may be set to 5, and which may then amplify the input by a factor of five.
It should be noted that, the embodiment of the present disclosure does not limit the specific multiple of the amplifier AMP, nor does it limit the specific implementation manner of setting the amplification factor of the amplifier AMP, and those skilled in the art can select various possible multiple configurations to set the multiple of the amplifier as needed.
For example, a feedback resistor may be provided on the operational amplifier to realize the setting of the amplification factor of the amplifier, and the configuration for realizing the amplification factor of the amplifier is exemplarily described below in a manner of providing the feedback resistor.
Referring to fig. 3b, fig. 3b is a partial schematic diagram of a control device according to an embodiment of the disclosure.
In one example, as shown in fig. 3b, the amplifier of the embodiment of the present disclosure may be implemented by combining an operational amplifier with an external feedback resistor, and by setting a suitable external feedback resistor on the operational amplifier, the embodiment of the present disclosure may set a required gain (M), which is described in the following exemplary description.
In one example, as shown in fig. 3b, the apparatus may include a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4, wherein,
a first end of the first resistor R1 is used for inputting a first input voltage CSN, a second end of the first resistor R1 is electrically connected to a first input end (e.g., a positive input end) of the amplifier AMP and a first end of the third resistor R3,
a first end of the second resistor R2 is used for inputting a second input voltage CSP, a second end of the second resistor R2 is electrically connected to a second input terminal (for example, a negative input terminal) of the amplifier AMP and a first end of the fourth resistor R4,
the current sampling signal may include the first input voltage CSN and the second input voltage CSP, and the first terminal of the first resistor R1 may serve as a differential negative input terminal to receive the first input voltage CSN, where the first input voltage CSN may be a differential negative input signal of the current sampling signal; the first end of the second resistor R2 may serve as a positive input end for checking and differentiating, and receive the second input voltage CSP, where the second input voltage CSP may be a differential positive input signal of the current sampling signal, and in an example, the embodiment of the present disclosure may perform a common mode determination by using a differential signal input by two differential input ends, for example, the first input voltage CSN may be used for performing the common mode determination, the second input voltage CSP may be used for performing the common mode determination, and an average value of the first input voltage CSN and the second input voltage CSP may be used for performing the common mode determination, which is not limited in the embodiment of the present disclosure.
In one example, the embodiment of the present disclosure may determine the magnitude of the sampling current according to a difference between the first input voltage CSN and the second input voltage CSP.
In one example, the second resistor R2 and the fourth resistor R4 are connected to the negative input terminal of the amplifier AMP, and the output of the amplifier is fed back to the negative input terminal through the fourth resistor R4, and with this configuration, the amplifier AMP is set to the operational amplifier mode.
When the current sampling manner is determined to be sampling by using the sampling resistor according to the magnitude of the common mode voltage (e.g., determined according to the first input voltage CSN), the first input voltage CSN and the second input voltage CSP may be input to the amplifier AMP to amplify the current sampling signal by using the amplifier AMP, so as to obtain an amplified current sampling signal.
In one example, as shown in fig. 3b, the control device may further include a selection control unit 31, and the selection control unit 31 may be utilized to confirm the current sampling mode and output a corresponding target current sampling signal according to an embodiment of the present disclosure, for example, as shown in fig. 3b, the selection control unit 31 may include a comparator 311 and a multiplexer MUX, where the comparator 311 may judge the current sampling mode according to a magnitude of the common-mode voltage and output a corresponding target current sampling signal, and when the comparator 311 determines that the common-mode voltage (as determined according to either or both of the first input voltage CSN and the second input voltage CSP) is greater than a preset voltage value, the current sampling mode may be determined to be a mode through a hall sensor or an isolation amplifier, in which case, the comparator 311 may output a corresponding comparison result as a control signal to control the multiplexer to directly use the first input signal CSN and the second input signal CSP as the target current CSP Outputting a sampling signal; when the comparator 311 determines that the common mode voltage is smaller than the preset voltage value, the current sampling mode may be determined to be a mode of passing through a sampling resistor, and in this case, the comparator 311 may output a corresponding comparison result as a control signal to control the multiplexer MUX to output the amplified voltage signal of the amplifier AMP and the first input signal passing through the first resistor R1 and the third resistor R3 as the target current sampling signal.
The above description is given by way of example only by determining the current sampling mode according to the magnitude of the common mode voltage, and in other embodiments, the current sampling mode may also be determined according to the common mode voltage and the voltage signal corresponding to the common mode voltage, for example, the current sampling mode may be determined by using an average value of the first input voltage CSN and the second input voltage CSP (i.e., the sampling voltage), and when the average value of the first input voltage CSN and the second input voltage CSP is greater than a preset average value, the current sampling mode may be determined as a current sampling mode in which current sampling is performed by using a hall sensor or an isolation amplifier; when the mean value of the first input voltage CSN and the second input voltage CSP is smaller than the preset mean value, it may be determined that the current sampling mode is a current sampling mode in which current sampling is performed using a sampling resistor. Of course, in other embodiments, the current sampling manner may also be determined by using a voltage signal (the second input voltage CSP, that is, the sampling voltage) corresponding to the common-mode voltage, which is not limited in this disclosure.
In one possible implementation, the method may further include:
and performing overcurrent detection on the target current signal current sampling signal, and outputting a turn-off control signal to control the power factor correction circuit to be turned off when the current of the detected target current sampling signal reaches a set threshold value.
According to the embodiment of the disclosure, the target current signal current sampling signal is subjected to overcurrent detection, and when the current of the detected target current sampling signal reaches the preset threshold value, a turn-off control signal is output to control the power factor correction circuit to be turned off, so that peak value limitation can be realized to protect the power factor correction circuit.
Please continue to refer to fig. 3 b.
In a possible implementation manner, as shown in fig. 3b, the control device may further include a comparing unit CMP and a threshold setting unit Vs, wherein a positive terminal of the comparing unit CMP is used for inputting the differential positive signal corresponding to the target current detection signal, a negative terminal of the comparing unit is used for inputting the differential negative signal corresponding to the target current detection signal and is connected to the threshold setting unit Vs, and the threshold setting unit Vs is used for generating the set threshold.
It should be noted that the threshold setting unit Vs may be implemented in various ways according to the embodiments of the present disclosure, that is, the threshold setting unit Vs may generate the set threshold in various ways, for example, directly by using a voltage source, or by using a current source in combination with a resistor, which is exemplified below.
In one example, as shown in fig. 3b, the threshold setting unit Vs may include a threshold setting resistor, and the embodiments of the present disclosure may generate the first current Ib1 using a current source and input the first current Ib1 to a first end of the threshold setting resistor; the negative terminal of the comparing unit CMP is electrically connected to the first terminal of the threshold setting unit Vs, the current source may further generate a second current Ib2 and input the second current Ib2 to the positive terminal of the comparing unit, and the second terminal of the threshold setting unit Vs is further configured to input a differential negative signal corresponding to the target current detection signal.
Through the above arrangement, the set threshold may be generated by using the first current Ib1 and the threshold setting resistor Rb, and specifically, the set threshold is a voltage drop (Ib1 × Rb) of the first current Ib1 on the threshold setting resistor Rb.
In one example, the first current Ib1 of the disclosed embodiment may be equal to the second current Ib2 to achieve current matching, reducing common mode errors.
In one example, the comparison unit CMP may comprise one comparator.
In a possible implementation manner, the outputting a shutdown control signal to control the power factor correction circuit to be shut down when the current of the detected target current sampling signal reaches a preset threshold value may include:
and when the input voltage of the positive end of the comparison unit CMP is the same as the input voltage of the negative end, determining that the current of the detected target current sampling signal reaches a preset threshold value, and outputting the turn-off control signal by the comparison unit to control the power factor correction circuit to be turned off.
In one possible implementation, the method may further include:
and controlling the selection control unit to output the target current sampling signal according to the common-mode voltage and/or the sampling voltage of the input current sampling signal.
In one possible implementation manner, as shown in fig. 3b, the embodiment of the disclosure may control a differential positive signal corresponding to the target current sampling signal to be output from the first output terminal Out1 of the selection control unit 31, and control a differential negative signal corresponding to the target current sampling signal to be output from the second output terminal Out2 of the selection control unit 31.
In one possible implementation, the power factor correction circuit may include a bridge power factor correction circuit or may include a bridgeless power factor correction circuit.
In one example, for the bridged PFC, since the current flows unidirectionally, and thus the polarity control is not required, the embodiment of the present disclosure directly outputs a differential positive signal of the target current sampling signal of the bridged PFC from the first output terminal Out1 of the selection control unit 31 and outputs a differential negative signal from the second output terminal Out 2.
For the bridgeless PFC circuit, because the current flows in both directions in the positive and negative half cycles in the bridgeless PFC, the embodiment of the disclosure can realize the switching of the positive and negative half cycles according to the polarity control signal Pac.
In one example, the comparison unit CMP is set to be in a differential input mode in the embodiment of the present disclosure, so that the clipping accuracy can be ensured, and for the bridgeless totem-pole PFC, polarity switching can be performed in combination with positive and negative half cycles of the alternating current, peak detection on a target current sampling signal (including positive current and negative current) can be realized by using the same comparator, and symmetry of the positive and negative half cycles can be ensured.
In one example, for a bridgeless PFC, when the alternating current is positive, the corresponding current is positive, and the input current sampling signal is positive; when the alternating current is negative, the corresponding current is negative, and the input current (amplified) is inverted after passing through the selection control unit Mux.
In one possible implementation, the power factor correction circuit includes a bridgeless totem-pole power factor correction circuit, and in one example, as shown in fig. 3b, the selection control unit 31 may receive the polarity control signal Pac, and the method may include:
controlling a high-level signal corresponding to the target current sampling signal to be output from a first output end of the selection control unit according to the polarity of the alternating current;
and controlling a low-level signal corresponding to the target current sampling signal to be output from a second output end of the selection control unit according to the polarity of the alternating current.
In one example, the polarity of the alternating current may be determined according to the received polarity control signal Pac.
In one example, as for the current sampling manner, the sampling manner is a manner of sampling through a sampling resistor, as shown in fig. 3b, the embodiment of the present disclosure may select, according to the polarity of the alternating current, to output a voltage, which is obtained by passing through the first resistor R1 and the second resistor R2 according to the first input voltage CSN, from the first output terminal Out1, and output an amplified voltage, which is obtained by amplifying the second input voltage CSP, from the second output terminal Out 2; or the voltage after passing through the first resistor R1 and the second resistor R2 according to the first input voltage CSN is selected to be output from the second output terminal Out2 according to the polarity of the alternating current (determined by the polarity control signal Pac, for example), and the amplified voltage after being amplified by the second input voltage CSP is output from the first output terminal Out 1.
In one example, for the current sampling manner being a manner of sampling by a hall sensor or an isolation amplifier, as shown in fig. 3b, the embodiment of the present disclosure may select to output the CSP according to the first input voltage CSN from the first output terminal Out1 and to output the CSP according to the second output terminal Out2 according to the polarity of the alternating current; or the polarity of the alternating current is selected to output the second input voltage CSP from the first output terminal Out2 according to the first input voltage CSN and from the first output terminal Out 1.
The first current Ib1 is set to be equal to the second current Ib2, and flows into two ends of the comparison unit CMP respectively, that is, flows into two ends of the target current sampling signal simultaneously, so that two paths of current matching are realized, and the common mode error of the target current sampling signal can be effectively suppressed.
In one example, when the differential positive signal (output from the first output terminal Out 1) of the target current sampling signal is equal to the differential negative signal (output from the second output terminal Out 2) of the target current sampling signal plus the voltage Ib × Rb (the set threshold of the threshold setting unit Vs), it can be determined that the target current sampling signal is over-current, and therefore, the comparison unit CMP outputs a shutdown control signal to control the power tube in the PFC circuit to be turned off, so as to avoid the device damage due to excessive current.
Possible implementations of the control device are further described below.
Referring to fig. 4, fig. 4 is a partial schematic diagram of a control device according to an embodiment of the disclosure.
In one possible implementation, as shown in fig. 4, the control device further includes:
the voltage loop module 10 is configured to output a power-related parameter according to the output voltage of the power factor correction circuit and a reference voltage, where the power-related parameter is related to the power of the power factor correction circuit;
the target current determining module 20 is electrically connected to the voltage loop module 10 and is used for determining a target current according to the alternating voltage of the input alternating current and the power related parameter;
a current loop module 30, electrically connected to the target current determination module 20, configured to obtain an adjustment value according to the target current and the target current sampling signal, where the adjustment value is used to adjust a duty ratio of a control signal;
a voltage adjusting module 40 electrically connected to the current loop module 30, configured to calculate an ac voltage of the input ac power, and adjust the calculated voltage by using the adjustment value to obtain an adjusted voltage;
and a signal generating module 50 electrically connected to the voltage adjusting module 40 for generating a control signal according to the adjusted voltage.
In one example, the voltage loop module 10 may include a comparator and a compensator (e.g., an error amplifier) for generating a power-related parameter related to the power value, and the embodiment of the present disclosure does not limit the specific implementation manner of the voltage loop module 10.
In one example, the target current determination module 20 may include a multiplier, and the target current determination module 20 may be utilized to determine the target current according to the embodiment of the present disclosure, and the embodiment of the present disclosure does not limit the specific implementation manner of the target current determination module 20.
In an example, the current loop module 30 may include a comparator, a compensator (e.g., an error amplifier), and the like to determine the adjustment value according to the target current and the target current sampling signal, and the embodiment of the present disclosure does not limit the specific implementation manner of the current loop module.
In an example, the voltage adjustment module 40 may include a proportional operation circuit, a multiplication circuit, an adder, and the like, and the voltage adjustment module 40 may multiply the ac voltage by a preset coefficient to obtain an operated voltage, and implement an addition operation or a subtraction operation of the operated voltage and an adjustment value by using the adder, so as to adjust a duty ratio of the operated voltage by using the adjustment value.
In an example, the signal generating module 50 may generate a pulse width modulation PWM signal (control signal) by using a triangular wave (or a sawtooth wave) and the adjusted voltage, for example, the signal generating module 50 may use a comparator to compare the adjusted voltage and the triangular wave to generate the PWM signal, and of course, the specific implementation manner of the signal generating module is not limited in the embodiment of the present disclosure.
The embodiment of the present disclosure does not limit the possible implementation manners of each module of the control device, and those skilled in the art can determine the implementation manners as needed.
A possible implementation of the power factor correction module is exemplarily described below.
It should be noted that the power factor correction module in the embodiment of the present disclosure may include various types of PFC circuits, for example, may include a bridge PFC or a bridgeless totem pole PFC, and for this reason, the specific implementation manner of the power factor correction module is not limited in the embodiment of the present disclosure.
Referring to fig. 5, fig. 5 is a schematic diagram of a power factor correction circuit according to an embodiment of the disclosure.
In a possible implementation manner, as shown in fig. 5, the power factor correction module may further include a zeroth diode D0, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first inductor L1, and a first capacitor C1, where the transistors include a first transistor Q1, where,
a positive terminal of the first diode D1 is electrically connected to a negative terminal of the second diode D2 and a first terminal of an alternating current power source AC, a negative terminal of the first diode D1 is electrically connected to a negative terminal of the third diode D3 and a first terminal of the first inductor L1, the alternating current power source AC is used for outputting alternating current,
a positive terminal of the third diode D3 is electrically connected to a negative terminal of the fourth diode D4 and a second terminal of the AC power source AC,
a second end of the first inductor L1 is electrically connected to the positive terminal of the zeroth diode D0 and the drain of the first transistor Q1,
the negative terminal of the zeroth diode D0 is electrically connected to the first terminal of the first capacitor C1 for outputting the output voltage Vo to power the load RL,
the gate of the first transistor Q1 is used to receive the control signal,
the positive terminal of the second diode D2, the positive terminal of the fourth diode D4, the source of the first transistor Q1, and the second terminal of the first capacitor C1 are grounded.
In one example, an EMI filtering module may be disposed between the ac power supply and the power factor correction module to reduce electromagnetic interference EMI, and a specific implementation manner of the EMI filtering module is not limited in the embodiment of the present disclosure, and a person skilled in the art may implement the EMI filtering module by using a related technology as needed.
The above description of the bridged PFC is exemplary and should not be considered as a limitation on the embodiments of the present disclosure, and in other embodiments, the bridged PFC may also include other implementations.
Referring to fig. 6, fig. 6 is a schematic diagram of a power factor correction circuit according to an embodiment of the disclosure.
In a possible implementation manner, as shown in fig. 6, the transistors include a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a fifth transistor Q5, and the power factor correction module may further include a second inductor L2 and a second capacitor C2, wherein,
a source of the third transistor Q3 is electrically connected to a drain of the fourth transistor Q4 and a first end of an alternating current power source AC for outputting alternating current power,
the drain of the third transistor Q3 is electrically connected to the drain of the second transistor Q2 and the first end of the second capacitor C2, and is used for outputting the output voltage Vo to drive the load RL,
a first end of the second inductor L2 is electrically connected to the second end of the AC power source AC, a second end of the second inductor L2 is electrically connected to the source of the second transistor Q2 and the drain of the fifth transistor Q5,
the gate of the second transistor Q2, the gate of the third transistor Q3, the gate of the fourth transistor Q4, and the gate of the fifth transistor Q5 are used for receiving the control signal,
the source of the fourth transistor Q4, the source of the fifth transistor Q5, and the second terminal of the second capacitor C2 are grounded.
The above description of the bridgeless PFC is exemplary and should not be considered as a limitation on the embodiments of the present disclosure, and in other embodiments, the bridgeless PFC may also include other implementations.
By the method, the current sampling mode is determined according to the common-mode voltage of the input current sampling signal, when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, the current sampling signal is amplified to obtain an amplified current sampling signal, and the amplified current sampling signal is used as a target current signal, so that the control device adjusts the duty ratio of the control signal according to the amplified current sampling signal, the compatibility and the self-adaptive selection of various current detection modes can be realized, and the circuit complexity is reduced.
By the method, the embodiment of the disclosure can be adaptive to current detection modes such as resistance detection, Hall current sensor detection, isolation amplifier and the like, is compatible with a bridgeless PFC circuit and a bridged PFC circuit, improves adaptability, realizes peak current limitation by a differential mode, and can effectively inhibit common mode errors of current signal detection.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen in order to best explain the principles of the embodiments, the practical application, or improvements made to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Claims (9)
1. A current detection control method of a power factor correction circuit is applied to a control device, and the control device is used for outputting a control signal to control the power factor correction circuit to correct the power factor of input alternating current, wherein the method comprises the following steps:
determining a current sampling mode according to a common mode voltage of an input current sampling signal, comprising: when the common-mode voltage of the current sampling signal is lower than a preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a resistor; or when the common-mode voltage of the current sampling signal is higher than the preset voltage value, determining that the current sampling mode is a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier, wherein the current sampling signal is acquired from the power factor correction circuit;
when the current sampling mode is determined to be a current sampling mode for sampling by using a resistor, amplifying the current sampling signal to obtain an amplified current sampling signal;
and taking the amplified current sampling signal as a target current signal, so that the control device adjusts the duty ratio of a control signal according to the amplified current sampling signal.
2. The method of claim 1, further comprising:
and when the current sampling mode is determined to be a current sampling mode for sampling by using a Hall current sensor or an isolation amplifier, directly taking the current sampling signal as a target current signal.
3. The method of claim 1, wherein the control device comprises an amplifier, and wherein the amplifying the current sample signal comprises:
and amplifying the current sampling signal by using the amplifier, wherein the gain of the amplifier is a preset gain.
4. The method of claim 2, further comprising:
and performing overcurrent detection on the target current signal current sampling signal, and outputting a turn-off control signal to control the power factor correction circuit to be turned off when the current of the detected target current sampling signal reaches a set threshold value.
5. The method according to claim 4, wherein the control device comprises a comparison unit and a threshold setting unit, wherein the positive terminal of the comparison unit is used for inputting a differential positive signal corresponding to the target current detection signal; the negative terminal of the comparison unit is used for inputting a differential negative signal corresponding to the target current detection signal and is connected to the threshold setting unit, and the threshold setting unit is used for generating the set threshold.
6. The method of claim 5, wherein outputting a shutdown control signal to control the power factor correction circuit to shut down when the current of the detected target current sampling signal reaches a set threshold, comprises:
and when the input voltage of the positive end of the comparison unit is the same as the input voltage of the negative end, determining that the current of the detected target current sampling signal reaches a set threshold value, and outputting the turn-off control signal by the comparison unit so as to control the power factor correction circuit to be turned off.
7. The method of claim 4, wherein the control device comprises a selection control unit, the method further comprising:
controlling the selection control unit to output the target current sampling signal according to the common-mode voltage and/or the sampling voltage of the input current sampling signal,
and controlling a differential positive signal corresponding to the target current sampling signal to be output from a first output end of the selection control unit, and controlling a differential negative signal corresponding to the target current sampling signal to be output from a second output end of the selection control unit.
8. The method of claim 7, wherein the power factor correction circuit comprises a bridgeless totem-pole power factor correction circuit comprising:
controlling a differential positive signal corresponding to the target current sampling signal to be output from a first output end of the selection control unit according to the polarity of the alternating current;
and controlling a differential negative signal corresponding to the target current sampling signal to be output from a second output end of the selection control unit according to the polarity of the alternating current.
9. The method according to any one of claims 1-8, wherein the control device further comprises:
the voltage loop module is used for outputting power related parameters according to the output voltage of the power factor correction circuit and the reference voltage, and the power related parameters are related to the power of the power factor correction circuit;
the target current determining module is electrically connected with the voltage loop module and used for determining target current according to the alternating voltage of the input alternating current and the power related parameters;
the current loop module is electrically connected with the target current determination module and used for obtaining an adjustment value according to the target current and a target current sampling signal, and the adjustment value is used for adjusting the duty ratio of a control signal;
the voltage adjusting module is electrically connected with the current loop module and used for calculating the alternating voltage of the input alternating current and adjusting the calculated voltage by using the adjusting value to obtain the adjusted voltage;
and the signal generating module is electrically connected with the voltage adjusting module and used for generating a control signal according to the adjusted voltage.
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