CN112789627A - 一种神经网络处理器、数据处理方法及相关设备 - Google Patents

一种神经网络处理器、数据处理方法及相关设备 Download PDF

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CN112789627A
CN112789627A CN201880098253.3A CN201880098253A CN112789627A CN 112789627 A CN112789627 A CN 112789627A CN 201880098253 A CN201880098253 A CN 201880098253A CN 112789627 A CN112789627 A CN 112789627A
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input
matrix
core
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CN112789627B (zh
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顾雄礼
李艳华
张惠敏
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Huawei Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

本发明实施例公开了一种神经网络处理器、方法及相关设备，其中的神经网络处理器，包括：n个计算核Core、原子操作累加单元和片上共享缓存；每一个Core用于根据输入矩阵计算输入矩阵的核内均值μ，并将u写入到原子操作累加单元；根据输入矩阵计算m个x2的均值v，并将v写入到原子操作累加单元；原子操作累加单元，用于对n个Core写入的n个μ进行累加得到S1，并将S1写入片上共享缓存；对n个Core写入的n个v的进行累加得到S2，并将S2写入片上共享缓存；每一个Core还用于：从片上共享缓存获取S1和S2，并根据S1和S2计算n个Core的n个输入矩阵的全局方差。采用本申请，可以提升神经网络的训练速度。

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PCT国内申请，说明书已公开。

Claims (13)

  1. PCT国内申请，权利要求书已公开。
CN201880098253.3A 2018-09-30 2018-09-30 一种神经网络处理器、数据处理方法及相关设备 Active CN112789627B (zh)

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CN115278360B (zh) * 2022-07-18 2023-11-07 天翼云科技有限公司 一种视频数据处理方法及电子设备

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