CN112785954B - Display device and compensation circuit - Google Patents
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- CN112785954B CN112785954B CN201911167121.4A CN201911167121A CN112785954B CN 112785954 B CN112785954 B CN 112785954B CN 201911167121 A CN201911167121 A CN 201911167121A CN 112785954 B CN112785954 B CN 112785954B
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Abstract
The application provides a display device and compensating circuit, includes: a display screen configured to display an image picture; a sound reproducing device configured to play sound; a power supply circuit configured to supply power to a load of the display apparatus; the power supply circuit includes: a rectifying circuit and a compensating circuit; wherein the rectifier circuit is configured to convert alternating current to direct current; the compensation circuit is used for compensating parasitic signals of synchronous rectification MOSFETs in the rectification circuit. Parasitic inductance on the pin that this application can solve synchronous rectification MOSFET influences the voltage of the synchronous rectification MOSFET both sides that detect, influences the technical problem to the control that switches on and turn-off going on of synchronous rectification MOSFET to realize reducing MOSFET phenomenon of generating heat and reduce the technological effect of synchronous rectification MOSFET's loss.
Description
The present application claims priority from the chinese patent application filed on the 11 th 04 th 2019, with the application number 201911067969.X, entitled "compensation circuit for synchronous rectifier MOSFET", the entire contents of which are incorporated herein by reference.
Technical Field
The present invention relates to electronic technologies, and in particular, to a display device and a compensation circuit.
Background
In some application scenes, voltage values at two sides of a synchronous rectification MOSFET in the rectification circuit need to be acquired, and the voltage values are used as a judgment basis for triggering and executing functions of the display device. For example, a Synchronous Rectification (SR) driver chip provided in the rectifier circuit controls the synchronous rectifier MOSFET to turn on and off according to the voltage value at two sides of the synchronous rectifier MOSFET.
However, parasitic inductance exists on the pins of the synchronous rectification MOSFET of the rectification circuit, which affects the voltage value collected by the SR driving chip, thereby affecting the timing of controlling the on and off of the synchronous rectification MOSFET by the processor, further causing the phenomenon of overall heating of the synchronous rectification MOSFET to be severe, and increasing the loss of the synchronous rectification MOSFET.
Disclosure of Invention
In a first aspect of embodiments of the present invention, there is provided a display device including:
a display screen configured to display an image picture; a sound reproducing device configured to play sound;
a power supply circuit configured to supply power to a load of the display apparatus; the power supply circuit includes: a rectifying circuit and a compensating circuit; wherein the rectifier circuit is configured to convert alternating current to direct current;
the compensation circuit is used for compensating parasitic signals of synchronous rectification MOSFETs in the rectification circuit.
Optionally, the rectifier circuit includes: a closed loop consisting of a secondary coil, the synchronous rectification MOSFET and a load;
the compensation circuit includes: an electromagnetic induction coil disposed in a closed loop of the rectifier circuit; the electromagnetic induction coil is configured to generate a compensation signal under the action of a closed current in the closed loop, and the compensation signal is used for compensating a parasitic signal of a synchronous rectification MOSFET in the rectification circuit.
Optionally, the method further includes: a controller configured to control the synchronous rectification MOSFET;
the source electrode of the synchronous rectification MOSFET is connected with the secondary coil and the first end of the electromagnetic induction coil, and the drain electrode of the synchronous rectification MOSFET is respectively connected with the load and the controller; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal for controlling the synchronous rectifier MOSFET according to a voltage between the second end of the electromagnetic induction coil and a drain of the synchronous rectifier MOSFET.
Optionally, the method further includes: a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the first end of the electromagnetic induction coil, and the drain of the synchronous rectification MOSFET is connected with the load and the controller; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal for controlling the synchronous rectifier MOSFET according to a voltage between the second end of the electromagnetic induction coil and a source of the synchronous rectifier MOSFET.
Optionally, the controller includes: an SR driving chip;
the CS pin of the SR driving chip is connected with the second end of the electromagnetic induction coil;
a GND pin of the SR driving chip is connected with a drain of the synchronous rectification MOSFET;
the DRV pin of the SR driving chip is connected with the grid electrode of the synchronous rectification MOSFET;
optionally, the controller includes: an SR driving chip;
the CS pin of the SR driving chip is connected with the source stage of the synchronous rectification MOSFET;
the GND pin of the SR driving chip is connected with the second end of the electromagnetic induction coil;
the DRV pin of the SR driving chip is connected with the grid electrode of the synchronous rectification MOSFET;
optionally, when the control signal is a low level signal sent to the gate of the synchronous rectification MOSFET by the SR driving chip, the low level signal is used to control turn-off between a source and a drain of the synchronous rectification MOSFET;
when the control signal is a high level signal sent to the grid of the synchronous rectification MOSFET by the SR driving chip, the high level signal is used for controlling conduction between a source and a drain of the synchronous rectification MOSFET.
Optionally, the electromagnetic induction coil comprises at least one closed turn of wire.
Optionally, the rectifying circuit and the compensating circuit are arranged on a single-sided PCB;
the electromagnetic induction coil is a lead connected between a pin of the controller and a pin of the synchronous rectification MOSFET.
Optionally, the parasitic signal is generated by a parasitic inductance of a pin of the synchronous rectification MOSFET.
Optionally, the parasitic signal and the compensation signal are voltage signals.
In a second aspect of the embodiments of the present invention, there is provided a compensation circuit for compensating a parasitic signal of a synchronous rectification MOSFET in a rectification circuit; the rectifier circuit includes: a closed loop consisting of a secondary coil, the synchronous rectification MOSFET and a load; the compensation circuit includes:
and the electromagnetic induction coil is arranged in the closed loop and used for generating a compensation signal under the action of a closed current in the closed loop.
In a third aspect of embodiments of the present invention, there is provided a display device including:
a first display screen for displaying a first image;
a second display screen for displaying a second image;
a sound reproducing device configured to play sound;
a power supply circuit configured to supply power to a load of the display apparatus;
the power supply circuit includes: a rectifying circuit and a compensating circuit;
wherein the rectifier circuit is configured to convert alternating current to direct current; the rectifier circuit includes: a closed loop formed by the secondary coil, the synchronous rectification MOSFET and a load;
the compensation circuit includes: an electromagnetic induction coil disposed in a closed loop of the rectifier circuit; the electromagnetic induction coil is configured to generate a compensation signal under the action of a closed current in the closed loop, and the compensation signal is used for compensating a parasitic signal of a synchronous rectification MOSFET in the rectification circuit.
The technical effects are as follows:
the parasitic signals generated by the synchronous rectification MOSFET are compensated through the compensation circuit arranged in the synchronous rectification circuit, so that the voltages at two sides of the synchronous rectification MOSFET detected by the processor can reflect the voltage actually generated by the current flowing through the synchronous rectification MOSFET more truly. Therefore, the technical problem that the parasitic inductance on the pins of the synchronous rectification MOSFET influences the voltage on two sides of the detected synchronous rectification MOSFET so as to influence the control on the on and off of the synchronous rectification MOSFET is solved, and the technical effects of reducing the heating phenomenon of the MOSFET and reducing the loss of the synchronous rectification MOSFET are achieved.
Drawings
Fig. 1 is a schematic diagram illustrating an operation scenario between a display device and a control device according to an embodiment;
fig. 2 is a diagram schematically illustrating a hardware configuration of a hardware system in the display apparatus 200 according to the exemplary embodiment;
fig. 3 is a diagram schematically illustrating a hardware configuration of a hardware system in the display apparatus according to the exemplary embodiment;
FIG. 4 is a schematic diagram illustrating the connection of a power strip to a load;
fig. 5 is a block diagram illustrating an exemplary hardware architecture according to the display apparatus 200 shown in fig. 2 or fig. 3;
fig. 6 is a diagram schematically illustrating a functional configuration of a display device according to an exemplary embodiment;
FIG. 7 shows a detailed description of one power architecture of the present application, wherein the display device has dual power supplies;
FIG. 8 shows a specific description of another power supply architecture in the present application, wherein the display device has a single power supply;
FIG. 9 is a schematic diagram of the structure of the main components in the LLC synchronous rectification circuit to illustrate the operation principle of the rectification circuit;
FIG. 10 is a schematic diagram of a control circuit for a synchronous rectifier MOSFET;
FIG. 11 is a schematic diagram of a synchronous rectifier MOSFET including a pin;
FIG. 12 is a diagram illustrating a control signal transmitted by an SR driving chip;
FIG. 13 is a schematic diagram of an embodiment of a compensation circuit provided in the present application;
FIG. 14 is a graph of the current waveform output by the secondary winding;
fig. 15 is a schematic diagram of a control signal sent by an SR driver chip according to the present application;
FIG. 16 is a schematic diagram of another embodiment of a compensation circuit for a synchronous rectifier MOSFET;
fig. 17 is a schematic structural diagram of another embodiment of a compensation circuit of a synchronous rectifier MOSFET provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Before formally describing the embodiments of the present application, a description will be given of the application scenarios and problems thereof with reference to the accompanying drawings.
The display device provided by the embodiments of the application can be provided with a single system and a single display screen. For example, the display device includes: a display screen configured to display a picture image; a sound reproducing device configured to play sound; a power supply circuit configured to supply power to a load of a display apparatus, the load including the display screen and the sound reproduction apparatus.
Alternatively, the display device provided in the embodiments of the present application may also have a dual-system and dual-display-screen structure, that is, the display device has a first controller (a first hardware system, an a chip), a second controller (a second hardware system, an N chip), and a sound-picture synchronization process of the display device of the first display screen and the second display screen, and the structure, the function, the implementation manner, and other aspects of the display device having the dual-system hardware structure are first described in detail below.
For the convenience of users, various external device interfaces are usually provided on the display device to facilitate connection of different peripheral devices or cables to implement corresponding functions. When a high-definition camera is connected to an interface of the display device, if a hardware system of the display device does not have a hardware interface of a high-pixel camera receiving a source code, data received by the camera cannot be displayed on a display screen of the display device.
Furthermore, due to the hardware structure, the hardware system of the conventional display device only supports one hard decoding resource, and usually can only support video decoding with 4K resolution at most, so when a user wants to perform video chat while watching a network television, the user needs to use the hard decoding resource (usually a GPU in the hardware system) to decode the network video without reducing the definition of the network video screen, and in this case, the user can only process the video chat screen by using a general-purpose processor (e.g. a CPU) in the hardware system to perform soft decoding on the video.
The soft decoding is adopted to process the video chat picture, so that the data processing burden of a CPU (central processing unit) can be greatly increased, and when the data processing burden of the CPU is too heavy, the problem of picture blocking or unsmooth flow can occur. Further, due to the data processing capability of the CPU, when the CPU performs soft decoding on the video chat screen, multi-channel video calls cannot be generally implemented, and when a user wants to perform video chat with multiple other users in the same chat scene, access is blocked.
In view of the above aspects, to overcome the above drawbacks, the present application discloses a dual hardware system architecture to implement multiple channels of video chat data (at least one channel of local video).
The concept of the present application will be described first with reference to the drawings. It should be noted that the following descriptions of the concepts are only for the purpose of facilitating understanding of the contents of the present application, and do not represent limitations on the scope of the present application.
The term "module," as used in various embodiments of the present application, may refer to any known or later developed hardware, software, firmware, artificial intelligence, fuzzy logic, or combination of hardware and/or software code that is capable of performing the functionality associated with that element.
The term "remote control" as used in the various embodiments of the present application refers to a component of an electronic device (e.g., a display device as disclosed herein) that is capable of wirelessly controlling the electronic device, typically over a short distance. The component may typically be connected to the electronic device using infrared and/or Radio Frequency (RF) signals and/or bluetooth, and may also include functional modules such as WiFi, wireless USB, bluetooth, motion sensors, etc. For example: the hand-held touch remote controller replaces most of the physical built-in hard keys in the common remote control device with the user interface in the touch screen.
The term "gesture" as used in the embodiments of the present application refers to a user behavior used to express an intended idea, action, purpose, or result through a change in hand shape or an action such as hand movement.
The term "hardware system" used in the embodiments of the present application may refer to a physical component having computing, controlling, storing, inputting and outputting functions, which is formed by a mechanical, optical, electrical and magnetic device such as an Integrated Circuit (IC), a Printed Circuit Board (PCB) and the like. In various embodiments of the present application, a hardware system may also be referred to as a motherboard (or chip).
Fig. 1 is a schematic diagram illustrating an operation scenario between a display device and a control device according to an embodiment. As shown in fig. 1, a user may operate the display device 200 through the control device 100.
The control device 100 may be a remote controller 100A, which can communicate with the display device 200 through an infrared protocol communication, a bluetooth protocol communication, a ZigBee (ZigBee) protocol communication, or other short-range communication, and is used to control the display device 200 through a wireless or other wired manner. The user may input a user instruction through a key on the remote controller 100A, voice input, control panel input, or the like to control the display apparatus 200. Such as: the user can input a corresponding control command through a volume up/down key, a channel control key, up/down/left/right movement keys, a voice input key, a menu key, a power on/off key, etc. on the remote controller 100A to control the functions of the display device 200.
The control device 100 may also be an intelligent device, such as a mobile terminal 100B, a tablet computer, a notebook computer, etc., which may communicate with the display device 200 through a Local Area Network (LAN), a Wide Area Network (WAN), a Wireless Local Area Network (WLAN), or other networks, and implement control of the display device 200 through an application program corresponding to the display device 200. For example, the display apparatus 200 is controlled using an application program running on a smart device. The application may provide various controls to the User through an intuitive User Interface (UI) on a screen associated with the smart device.
For example, the mobile terminal 100B and the display device 200 may each be installed with a software application, so that connection communication between the two can be realized through a network communication protocol, and the purpose of one-to-one control operation and data communication can be further realized. Such as: a control instruction protocol can be established between the mobile terminal 100B and the display device 200, the remote control keyboard is synchronized to the mobile terminal 100B, and the function of controlling the display device 200 is realized by controlling the user interface on the mobile terminal 100B; the audio and video contents displayed on the mobile terminal 100B may also be transmitted to the display device 200, so as to implement a synchronous display function.
As shown in fig. 1, the display device 200 may also perform data communication with the server 300 through various communication methods. In various embodiments of the present application, the display device 200 may be allowed to be in wired or wireless communication connection with the server 300 through a local area network, a wireless local area network, or other network. The server 300 may provide various contents and interactions to the display apparatus 200.
Illustratively, the display device 200 receives software Program updates, or accesses a remotely stored digital media library by sending and receiving information, and Electronic Program Guide (EPG) interactions. The servers 300 may be a group or groups, and may be one or more types of servers. Other web service contents such as a video on demand and an advertisement service are provided through the server 300.
The display device 200 includes a first display screen 201 and a second display screen 202, wherein the first display screen 201 and the second display screen 202 are independent from each other, and a dual hardware control system is adopted between the first display screen 201 and the second display screen 202.
Among them, the first display screen 201 and the second display screen 202 may be used to display different display screens. For example, the first display screen 201 may be used for screen display of conventional television programming and the second display screen 202 may be used for screen display of auxiliary information such as notification-like messages, voice assistants, and the like.
Alternatively, the content displayed by the first display screen 201 and the content displayed by the second display screen 202 may be independent of each other and may not affect each other. For example, while the first display screen 201 plays a television program, the second display screen 202 may display information such as time, weather, temperature, reminder messages, and the like, which are not related to the television program.
Alternatively, there may be an association between the content displayed by the first display screen 201 and the content displayed by the second display screen 202. For example, when the first display screen 201 plays a main screen of a video chat, the second display screen 202 may display information such as an avatar, a chat duration, and the like of a user currently accessing the video chat.
Alternatively, part or all of the content displayed by the second display screen 202 may be adjusted to be displayed by the first display screen 201. For example, information such as time, weather, temperature, and reminder messages displayed on the first display screen 201 may be adjusted to be displayed on the first display screen 201, while other information is displayed on the second display screen 202.
In addition, the first display screen 201 displays the multi-party interactive picture while displaying the traditional television program picture, and the multi-party interactive picture does not block the traditional television program picture. The display mode of the traditional television program picture and the multi-party interactive picture is not limited by the application. For example, the position and the size of the traditional television program picture and the multi-party interactive picture can be set according to the priority of the traditional television program picture and the multi-party interactive picture.
Taking the example that the priority of the traditional television program picture is higher than that of the multi-party interactive picture, the area of the traditional television program picture is larger than that of the multi-party interactive picture, and the multi-party interactive picture can be positioned at one side of the traditional television program picture and can also be arranged at one corner of the multi-party interactive picture in a floating manner.
The display device 200 may be a liquid crystal display screen, an oled (organic Light Emitting diode) display screen, or a projection display device; on the other hand, the display device can be a smart television or a display system consisting of a display screen and a set-top box. The specific display device type, size, resolution, etc. are not limited, and those skilled in the art will appreciate that the display device 200 may be modified in performance and configuration as desired.
The display apparatus 200 may additionally provide an intelligent network tv function providing a computer support function in addition to the broadcast receiving tv function. Examples include a web tv, a smart tv, an Internet Protocol Tv (IPTV), and the like. In some embodiments, the display device may not have a broadcast receiving television function.
As shown in fig. 1, a camera may be connected or disposed on the display device 200, and is used to present a picture taken by the camera on a display interface of the display device or other display devices, so as to implement an interactive chat between users. Specifically, the picture shot by the camera can be displayed on the display device in a full screen mode, a half screen mode or any optional area.
As an optional connection mode, the camera is connected with the rear shell of the display device through the connecting plate, and is fixedly installed in the middle of the upper side of the rear shell of the display device.
As another optional connection mode, the camera is connected to the rear housing of the display device through a connection board or another conceivable connector, the camera is capable of being lifted up and down, the connector is provided with a lifting motor, when a user wants to use the camera or an application program wants to use the camera, the camera is lifted out of the display device, and when the camera is not needed, the camera can be embedded into the rear housing, so that the camera is protected from being damaged and privacy safety of the user is protected.
As an embodiment, the camera adopted in the present application may have 1600 ten thousand pixels, so as to achieve the purpose of ultra high definition display. In actual use, cameras higher or lower than 1600 ten thousand pixels may also be used.
After the display device is provided with the camera, contents displayed by different application scenes of the display device can be fused in various different modes, so that the function which cannot be realized by the traditional display device is achieved.
Illustratively, a user may conduct a video chat with at least one other user while watching a video program. The presentation of the video program may be as a background frame over which a window for video chat is displayed. The function is called 'chat while watching'.
Optionally, in a scene of "chat while watching", at least one video chat is performed across terminals while watching a live video or a network video.
In another example, a user can conduct a video chat with at least one other user while entering the educational application for learning. For example, a student may be able to remotely interact with a teacher while learning content in an educational application. Vividly, this function can be called "chatting while learning".
In another example, a user conducts a video chat with a player entering a card game while playing the game. For example, a player may enable remote interaction with other players when entering a gaming application to participate in a game. Figuratively, this function may be referred to as "watch while playing".
Optionally, the game scene is fused with the video picture, the portrait in the video picture is scratched and displayed in the game picture, and the user experience is improved.
Optionally, in the motion sensing game (such as ball hitting, boxing, running and dancing), the human posture and motion, limb detection and tracking and human skeleton key point data detection are obtained through the camera, and then the human posture and motion, the limb detection and tracking and the human skeleton key point data detection are fused with the animation in the game, so that the game of scenes such as sports and dancing is realized.
In another example, a user may interact with at least one other user in a karaoke application in video and voice. Vividly, this function can be called "sing while watching". Optionally, when at least one user enters the application in a chat scenario, multiple users may jointly complete recording of a song.
In another example, a user may turn on a camera locally to take pictures and videos, figurative, which may be referred to as "looking into the mirror".
In other examples, more or less functionality may be added. The function of the display device is not particularly limited in the present application.
Fig. 2 is a diagram schematically illustrating a hardware configuration of a hardware system in the display apparatus 200 according to the exemplary embodiment. For convenience of explanation, the display device 200 in fig. 2 is illustrated by using a liquid crystal display screen as an example.
As shown in fig. 2, the display device 200 includes: the display panel comprises a first panel 11, a first backlight assembly 21, a main board 31, an interactive board 32, a first display driving board 33, a second panel 12, a second backlight assembly 22, a second display driving board 34, a power board 4, a first rear case 51, a second rear case 52 and a base 6.
The first panel 11 is used for presenting the picture of the first display screen 201 to the user. The first backlight assembly 21 is disposed under the first panel 11, and is generally an optical assembly for providing sufficient light source with uniform brightness and distribution to enable the first panel 11 to normally display images. The first backlight assembly 21 further includes a first back plate (not shown). The main board 31, the interactive board 32, the first display driving board 33 and the power board 4 are disposed on the first back board, and some convex hull structures are typically formed by stamping on the first back board. The main board 31, the interactive board 32, the first display driving board 33 and the power board 4 are fixed on the convex hull through screws or hooks. The main board 31, the interactive board 32, the first display driving board 3 and the power board 4 may be disposed on one board, or may be disposed on different boards respectively. The first rear case 51 covers the first panel 11 to hide the parts of the display device 200, such as the first backlight assembly 21, the main board 31, the interactive board 32, the first display driving board 33, and the power board 4, thereby achieving an aesthetic effect.
Among them, the first display driving board 33 mainly functions to: the multilevel backlight partition control is performed through the PWM signal and the lcaldimeming signal transmitted by the first controller on the motherboard 31, and the control is changed according to the image content, and after the handshake is established between the control and the first controller on the motherboard 31, the VbyOne display signal transmitted by the first controller on the motherboard 31 is received, and the VbyOne display signal is converted into the LVDS signal, so that the image display of the first display screen 201 is realized. The base 6 is used for supporting the display device 200, and it should be noted that the drawings only show one type of base design, and those skilled in the art can design different types of bases according to the product requirements.
Wherein the second panel 12 is used for presenting the picture of the second display screen 202 to the user. The second backlight assembly 22 is disposed under the second panel 12, and is generally an optical assembly for providing sufficient brightness and uniform light distribution to enable the second panel 12 to normally display images. The second backlight assembly 22 further includes a second back plate (not shown). Second display driver board 34 is disposed on the second backplane, typically with some convex hull structures stamped thereon. The second display driving board 34 is fixed to the convex bag by a screw or a hook. The second display driving board 34 may be provided on one board or may be provided on different boards, respectively. The second rear case 52 covers the second panel 12 to hide the second backlight assembly 22, the adapter driving board 34b, the second TCON board 35, the key board 36, and other parts of the display device 200, thereby achieving an aesthetic effect.
Optionally, fig. 2 further includes a key sheet 36, where the key sheet 36 may be disposed on the first back plate or the second back plate, which is not limited in this application.
In addition, the display device 200 further includes a sound reproducing device (not shown), such as an audio component, e.g., an I2S interface including a power Amplifier (AMP) and a Speaker (Speaker), for realizing sound reproduction. Usually, the sound components are capable of realizing sound output of at least two sound channels; when the panoramic surround effect is to be achieved, a plurality of acoustic components are required to be arranged to output sounds of a plurality of sound channels, and a detailed description thereof is omitted.
It should be noted that the display device 200 may also adopt an OLED display screen, so that the template included in the display device 200 is changed accordingly, which is not described herein too much.
Alternatively, a display device having a dual display screen is taken as an exemplary illustration as shown in fig. 2, and a hardware configuration diagram of a hardware system in the display device according to an exemplary embodiment is exemplarily shown in fig. 3, wherein the display device includes a panel 1, a backlight assembly 2, a main board 3, a power supply board 4, a rear case 5, and a base 6 in the display device having a single display screen as shown in fig. 3. Wherein, the panel 1 is used for presenting pictures for users; the backlight assembly 2 is located below the panel 1, usually some optical assemblies, and is used for supplying sufficient light sources with uniform brightness and distribution, so that the panel 1 can normally display images, the backlight assembly 2 further includes a back plate 20, the main board 3 and the power board 4 are arranged on the back plate 20, usually some convex hull structures are formed by punching on the back plate 20, and the main board 3 and the power board 4 are fixed on the convex hulls through screws or hooks; the rear shell 5 is covered on the panel 1 to hide the parts of the display device such as the backlight assembly 2, the main board 3 and the power panel 4, and the like, thereby achieving the effect of beautiful appearance; and a base 6 for supporting the display device.
Fig. 4 is a schematic diagram illustrating a connection relationship between a power panel and a load, and fig. 4 illustrates a possible connection relationship between the power panel and the load IN a display device with dual display screens, where the power panel 4 includes an input terminal IN and an output terminal OUT (a first output terminal OUT1, a second output terminal OUT2, a third output terminal OUT3 and a fourth output terminal OUT4 are illustrated), where the input terminal IN is connected to a commercial power, the output terminal OUT is connected to a load, for example, the first output terminal OUT1 is connected to an audio component, the second output terminal OUT2 is connected to a main board 31, the third output terminal OUT3 is connected to a first display driving board 33, and the fourth output terminal OUT4 is connected to a first backlight component 21. The power board 4 needs to convert ac power into dc power required by the load, and the dc power is usually in different specifications, for example, 18V is required for the audio components, 12V/18V is required for the main board 31, and so on.
The system architecture of the display device of the present application is further described below with reference to fig. 5. It should be noted that fig. 5 is only an exemplary illustration and does not represent a limitation of the present application. In actual implementation, more or less hardware or interfaces may be included as desired.
Fig. 5 is a block diagram illustrating an exemplary hardware architecture of the display apparatus 200 according to fig. 2 or fig. 3. As shown in fig. 5, the hardware system of the display device 200 may include a controller, and modules connected to the controller through various interfaces.
Wherein the controller may be provided on the interactive board 32 shown in fig. 2 or on the main board 3 shown in fig. 3. Alternatively, the controller may include a tuning demodulator 220, a communicator 230, an external device interface 250, a first controller 210, a memory 290, a user input interface 260-3, a video processor 260-1, an audio processor 260-2, a display screen 280, an audio output interface 270, a power module 240, a detector 340, an external device interface 350, and a video processor 360. The controller may include more or fewer modules in other embodiments.
The tuning demodulator 220 is configured to perform modulation and demodulation processing such as amplification, mixing, resonance and the like on a broadcast television signal received in a wired or wireless manner, so as to demodulate an audio/video signal carried in a frequency of a television channel selected by a user and additional information (e.g., an EPG data signal) from a plurality of wireless or wired broadcast television signals. Depending on the broadcast system of the television signal, the signal path of the tuner 220 may be various, such as: terrestrial broadcasting, cable broadcasting, satellite broadcasting, internet broadcasting, or the like; according to different modulation types, the adjustment mode of the signal can be a digital modulation mode or an analog modulation mode; and depending on the type of television signal being received, tuner demodulator 220 may demodulate analog and/or digital signals.
The tuner demodulator 220 is also operative to respond to the user-selected television channel frequency and the television signal carried thereby, in accordance with the user selection and as controlled by the first controller 210.
In other exemplary embodiments, the tuner/demodulator 220 may be in an external device, such as an external set-top box. In this way, the set-top box outputs television audio/video signals after modulation and demodulation, and the television audio/video signals are input into the display device 200 through the external device interface 250.
The communicator 230 is a component for communicating with an external device or an external server according to various communication protocol types. For example: the communicator 230 may include a WIFI module 231, a bluetooth communication protocol module 232, a wired ethernet communication protocol module 233, and other network communication protocol modules such as an infrared communication protocol module or a near field communication protocol module (not shown).
The display apparatus 200 may establish a connection of a control signal and a data signal with an external control device or a content providing device through the communicator 230. For example, the communicator may receive a control signal of the remote controller 100 according to the control of the first controller 210.
The external device interface 250 is a component for providing data transmission between the N-chip first controller 210 and the a-chip and other external devices. The external device interface 250 may be connected with an external apparatus such as a set-top box, a game device, a notebook computer, etc. in a wired/wireless manner, and may receive data such as a video signal (e.g., moving image), an audio signal (e.g., music), additional information (e.g., EPG), etc. of the external apparatus.
The external device interface 250 may include: a High Definition Multimedia Interface (HDMI) terminal is also referred to as HDMI 251, a Composite Video Blanking Sync (CVBS) terminal is also referred to as AV 252, an analog or digital component terminal is also referred to as component 253, a Universal Serial Bus (USB) terminal 254, a Red Green Blue (RGB) terminal (not shown in the figure), and the like. The number and type of external device interfaces are not limited by this application.
The first controller 210 controls the operation of the display apparatus 200 and responds to the operation of the user by running various software control programs (e.g., an operating system and/or various application programs) stored on the memory 290.
As shown in fig. 5, the first controller 210 includes a read only memory ROM 213, a random access memory RAM 214, a graphics processor 216, a CPU processor 212, a communication interface 218, and a communication bus. The ROM 213 and the RAM 214, the graphic processor 216, the CPU processor 212, and the communication interface 218 are connected via a bus.
A ROM 213 for storing instructions for various system boots. If the display device 200 is powered on when a power-on signal is received, the CPU processor 212 executes a system boot instruction in the ROM and copies the operating system stored in the memory 290 to the RAM 214 to start running the boot operating system. After the start of the operating system is completed, the CPU processor 212 copies the various application programs in the memory 290 to the RAM 214, and then starts running and starting the various application programs.
A graphics processor 216 for generating various graphics objects, such as: icons, operation menus, user input instruction display graphics, and the like. The display device comprises an arithmetic unit which carries out operation by receiving various interactive instructions input by a user and displays various objects according to display attributes. And a renderer for generating various objects based on the operator, and displaying the rendered result on the first display screen 280.
A CPU processor 212 for executing operating system and application program instructions stored in memory 290. And executing various application programs, data and contents according to various interactive instructions received from the outside so as to finally display and play various audio and video contents.
In some exemplary embodiments, the CPU processor 212 may include a plurality of processors. The plurality of processors may include a main processor and a plurality of or a sub-processor. A main processor for performing some operations of the display apparatus 200 in a pre-power-up mode and/or operations for displaying a screen in a normal mode. A plurality of or one sub-processor for performing an operation in a standby mode or the like.
The communication interface 218 may include a first interface 218-1 through an nth interface 218-n. These interfaces may be network interfaces that are connected to external devices via a network.
The first controller 210 may control operations of the display apparatus 200 in relation to the display screen 280. For example: in response to receiving a user command for selecting a UI object to be displayed on the display screen 280, the first controller 210 may perform an operation related to the object selected by the user command.
Wherein the object may be any one of selectable objects, such as a hyperlink or an icon. Operations related to the selected object, such as: displaying an operation connected to a hyperlink page, document, image, or the like, or performing an operation of a program corresponding to an icon. The user command for selecting the UI object may be a command input through various input devices (e.g., a mouse, a keyboard, a touch pad, etc.) connected to the display device 200 or a voice command corresponding to a voice spoken by the user.
The memory 290 includes various software modules for driving and controlling the display apparatus 200. Such as: various software modules stored in memory 290, including: a base module, a detection module, a communication module, a display control module, a browser module, and various service modules, etc. (not shown in the figure).
The basic module is a bottom layer software module used for signal communication between hardware in the display device 200 and sending processing and control signals to an upper layer module. The detection module is a management module used for collecting various information from various sensors or user input interfaces, and performing digital-to-analog conversion and analysis management. The voice recognition module comprises a voice analysis module and a voice instruction database module. The display control module is a module for controlling the first display screen 280 to display image content, and may be used to play information such as multimedia image content and UI interface. The communication module is used for carrying out control and data communication with external equipment. And the browser module is used for executing data communication between the browsing servers. The service module is a module for providing various services and various application programs.
Meanwhile, the memory 290 is also used to store visual effect maps and the like for receiving external data and user data, images of respective items in various user interfaces, and a focus object.
A user input interface 260-3 for transmitting an input signal of a user to the first controller 210 or transmitting a signal output from the first controller 210 to the user. For example, the control device (e.g., a mobile terminal or a remote controller) may transmit an input signal input by a user, such as a power switch signal, a channel selection signal, a volume adjustment signal, etc., to the user input interface, and then the input signal is forwarded to the first controller 210 through the user input interface 260-3; alternatively, the control device may receive an output signal such as audio, video or data processed by the first controller 210 and output from the user input interface 260-3, and display or output the received output signal in audio or vibration form.
In some embodiments, the user may input a user command on a Graphical User Interface (GUI) displayed on the first display screen 280, and the user input interface 260-3 receives the user input command through the Graphical User Interface (GUI). Alternatively, the user may input a user command by inputting a specific sound or gesture, and the user input interface 260-3 receives the user input command by recognizing the sound or gesture through the sensor.
The video processor 260-1 is configured to receive a video signal, and perform video data processing such as decompression, decoding, scaling, noise reduction, frame rate conversion, resolution conversion, and image synthesis according to a standard codec protocol of the input signal, so as to obtain a video signal that is directly displayed or played on the first display screen 280.
Illustratively, the video processor 260-1 includes a demultiplexing module, a video decoding module, an image synthesizing module, a frame rate conversion module, a display formatting module, and the like (not shown in the figure).
The demultiplexing module is used for demultiplexing the input audio and video data stream, and if the input MPEG-2 is input, the demultiplexing module demultiplexes the input audio and video data stream into a video signal and an audio signal.
And the video decoding module is used for processing the video signal after demultiplexing, including decoding, scaling and the like.
And the image synthesis module, such as an image synthesizer, is used for performing superposition mixing processing on the GUI signal input by the user or generated by the user and the video picture after the zooming processing by the graphics generator so as to generate an image signal for display.
The frame rate conversion module is configured to convert a frame rate of an input video, such as a 24Hz, 25Hz, 30Hz, or 60Hz video, into a 60Hz, 120Hz, or 240Hz frame rate, where the input frame rate may be related to a source video stream, and the output frame rate may be related to a refresh rate of the display device. And a display formatting module for converting the signal output by the frame rate conversion module into a signal conforming to a display format of the display device, such as converting the format of the signal output by the frame rate conversion module to output RGB data signals.
The display screen 280 receives an image signal inputted from the video processor 260-1, displays video contents and images, and the menu manipulation interface display screen 280 includes a display screen assembly for presenting a picture and a driving assembly for driving the display of the image. The video content may be displayed from the video in the broadcast signal received by the tuner/demodulator 220, or from the video content input from the communicator or the external device interface. The screen 280 is displayed while a user manipulation interface UI generated in the display apparatus 200 and used to control the display apparatus 200 is displayed.
And, a driving component for driving the display according to the type of the display screen 280. Alternatively, a projection device and projection screen may be included, provided that display screen 280 is a projection display screen.
The audio processor 260-2 is configured to receive an audio signal, and perform decompression and decoding according to a standard codec protocol of the input signal, and perform audio data processing such as noise reduction, digital-to-analog conversion, and amplification processing to obtain an audio signal that can be played in the speaker 272.
An audio output interface 270 for receiving the audio signal output by the audio processor 260-2 under the control of the first controller 210, wherein the audio output interface may include a speaker 272 or an external sound output terminal 274 for outputting to a generating device of an external device, such as: external sound terminal or earphone output terminal.
In other exemplary embodiments, video processor 260-1 may comprise one or more chip components. The audio processor 260-2 may also include one or more chips.
And, in some other exemplary embodiments, the video processor 260-1 and the audio processor 260-2 may be separate chips or may be integrated in one or more chips together with the first controller 210.
The power supply module 240 is configured to provide power supply support for the display apparatus 200 with power input from an external power source under the control of the first controller 210. The power supply module 240 may include a built-in power supply circuit installed inside the display apparatus 200, or may be a power supply installed outside the display apparatus 200, such as a power supply interface for providing an external power supply in the display apparatus 200.
The detector 340 is a component of the display device a chip for collecting signals of an external environment or interacting with the outside. The detector 340 may include a light receiver 342, a sensor for collecting the intensity of ambient light, which may be used to adapt to display parameter changes, etc.; the system may further include an image collector 341, such as a camera, a video camera, etc., which may be configured to collect external environment scenes, collect attributes of the user or interact gestures with the user, adaptively change display parameters, and identify user gestures, so as to implement a function of interaction with the user.
The external device interface 350 provides a component for data transmission between the first controller 210 and the N-chip or other external devices. The external device interface may be connected with an external apparatus such as a set-top box, a game device, a notebook computer, etc. in a wired/wireless manner.
A video processor 360 for processing the associated video signal.
A functional configuration diagram of a display device according to an exemplary embodiment is exemplarily shown in fig. 6. As shown in fig. 6, the memory 290 is specifically used for storing an operating program for driving the first controller 210 in the display apparatus 200, and storing various applications built in the display apparatus 200, various applications downloaded by a user from an external device, various graphical user interfaces related to the applications, various objects related to the graphical user interfaces, user data information, and internal data of various supported applications. The memory 290 is used to store system software such as an Operating System (OS) kernel, middleware, and applications, and to store input video data and audio data, and other user data.
The memory 290 is specifically used for storing drivers and related data such as the video processor 260-1 and the audio processor 260-2, the first display screen 280, the communicator 230, the tuner demodulator 220, the input/output interface, and the like.
In some embodiments, memory 290 may store software and/or programs, software programs for representing an Operating System (OS) including, for example: a kernel, middleware, an Application Programming Interface (API), and/or an application program. For example, the kernel may control or manage system resources, or functions implemented by other programs (e.g., the middleware, APIs, or applications), and the kernel may provide interfaces to allow the middleware and APIs, or applications, to access the controller to implement controlling or managing system resources.
The memory 290, for example, includes a broadcast receiving module 2901, a channel control module 2902, a volume control module 2903, an image control module 2904, a display control module 2905, a first audio control module 2906, an external instruction recognition module 2907, a communication control module 2908, a light receiving module 2909, a power control module 2910, an operating system 2911, and other applications 2912, a browser module 2913, and so forth. The first controller 210 performs operations such as: the system comprises a broadcast television signal receiving and demodulating function, a television channel selection control function, a volume selection control function, an image control function, a display control function, an audio control function, an external instruction identification function, a communication control function, an optical signal receiving function, an electric power control function, a software control platform supporting various functions, a browser function and other various functions.
The memory 390 includes a memory storing various software modules for driving and controlling the display apparatus 200. Such as: various software modules stored in memory 390, including: a base module, a detection module, a communication module, a display control module, a browser module, and various service modules, etc. (not shown in the figure). Since the functions of the memory 390 and the memory 290 are similar, reference may be made to the memory 290 for relevant points, and thus, detailed description thereof is omitted here.
Illustratively, the memory 390 includes an image control module, a second audio control module, an external instruction recognition module 3907, a communication control module, a light receiving module, an operating system, and other application programs, a browser module, and the like. The first controller 210 performs operations such as: the system comprises an image control function, a display control function, an audio control function, an external instruction identification function, a communication control function, an optical signal receiving function, an electric power control function, a software control platform supporting various functions, a browser function and other various functions.
Illustratively, since the image receiving device such as a camera is connected with the controller, the external instruction recognition module 3907 of the controller may include an image recognition module 3907-1, a graphic database is stored in the image recognition module 3907-1, and when the camera receives an external graphic instruction, the camera corresponds to the instruction in the graphic database to perform instruction control on the display device. Since the voice receiving device and the remote controller are connected to the controller, the external command recognition module 2907 of the controller may include a voice recognition module 2907-2, a voice database is stored in the voice recognition module 2907-2, and when the voice receiving device receives an external voice command or the like, the voice receiving device corresponds to the command in the voice database to perform command control on the display device. Similarly, a control device 100 such as a remote controller is connected to the controller, and the button command recognition module 2907-3 performs command interaction with the control device 100.
The application can adopt a dual power supply control structure or a multi-power supply control structure. Hereinafter, for convenience of explanation, a power supply of a display structure having a dual power supply is exemplified with reference to fig. 7, and a power supply of a display structure having a single power supply is exemplified with reference to fig. 8.
Fig. 7 shows a specific introduction of a power supply architecture in the present application, wherein the display device has dual power supplies. Referring to fig. 2 and 7, the power supply board 4 on the first display screen 201 may be mainly composed of a main power supply board 41 and a sub power supply board 42. The main power board 41 and the sub power board 42 have substantially the same structure, and the operation principle will be described in detail below mainly by taking the main power board 41 as an example.
The main power board 41 may include a first rectifying and filtering module, a first PFC module, and a first LLC module, which are connected in sequence.
The first rectifying and filtering module may specifically include: the rectifier bridge is used for rectifying input alternating current and inputting full-wave signals to a Power Factor Correction (PFC) module. Before the AC power is input into the first PFC module, an Electromagnetic Interference (EMI) filter may be connected to perform high frequency filtering on the input AC power.
The first PFC module generally includes a PFC inductor, a switching power device, and a PFC control chip, and mainly performs power factor correction on an input Alternating Current (AC) power source to output a stable dc bus voltage (e.g., 380V) to the first resonant converter (LLC) module. The first PFC module can effectively improve the power factor of a power supply and ensure the same phase of voltage and current.
The first LLC module may adopt a double-MOS transistor LLC resonant conversion circuit, and may further include a Pulse Frequency Modulation (PFM) circuit, a capacitor, an inductor, and other components. The first LLC module may specifically step down or step up the dc bus voltage input by the first PFC module, and output a constant voltage to the load. Here, the load may include a load as shown in fig. 3. Typically, the first LLC module is capable of outputting a variety of different voltages to meet the demands of the load. For example, the first LLC module supplies power to the main board 31, the first LLC module supplies power to the first backlight assembly 21, and so on. The main board also supplies power (for example, 12V or 18V) to the interactive board 32, the first display driving board 33, the second display driving board 34, the keypad 36, and the second backlight assembly 22, so as to ensure that each board can operate.
Optionally, the main power board 41 further includes a first synchronous rectification module (not shown in the figure), which may include a transformer, a controller, two MOS transistors and a diode, and is directly capable of outputting a stable target voltage, such as 12V or 18V. It should be noted that the first synchronous rectification module may be separately disposed, or may be disposed in the first LLC module.
The main power board 41 further includes a relay for controlling the supply of power to the sub power board 42.
The secondary power board 42 may include a second rectifying and filtering module, a second PFC module, and a second LLC module, which are connected in sequence. The ac power of the secondary power board 42 is derived from the main power board 41, and the second LLC module can realize the power supply of the first backlight assembly 21, etc. The rest of the modules are introduced by referring to the introduction of the main power panel. Optionally, the secondary power board 42 further includes a second synchronous rectification module, wherein the second synchronous rectification module may refer to an implementation form of the first synchronous rectification module.
The arrows in fig. 4 are used to indicate that the power supply board directly or indirectly supplies power to other components in the display device 200 except for the power supply board. In addition, the main power board may output a first backlight display signal to the first display driving board 33 in addition to power supply. The sub power board may output a second backlight display signal to the first display driving board 33 in addition to supplying power. The first backlight display signal is used for indicating to turn on the backlight of the first area in the first display screen. The second backlight display signal is used for indicating to turn on the backlight of the second area in the first display screen. The first area and the second area together constitute a display area of the first display screen.
Fig. 8 shows a specific description of another power architecture in the present application, in which the display device has a single power supply, and as shown in fig. 8, the present application provides a display device that can be connected to a commercial ac power grid through its power supply 1, since the power supplied in the grid is transmitted through an ac power, and the load 3 in the display device needs to be driven by the power in the form of a dc power. Therefore, in addition to obtaining ac power through the power supply 1, the display device needs to convert the ac power into dc power through the power supply circuit 2, and then transmit the dc power to the load 3 in the display device to drive the load 3 to implement the related function. The process of converting alternating current to direct current may be referred to as "rectification" and may be implemented by a rectification circuit in the power supply circuit 2. For example, if the electrical appliance is a television, the television is connected to a power grid through a power supply 1 and obtains an alternating current, and then after the obtained alternating current is converted into a direct current by a power supply circuit 2, the direct current can drive a host, a display screen, or a sound reproduction device (or a speaker, a sound box) in the television to operate as a device of a load 3, so as to realize the function of the television.
More specifically, the rectifier circuit in the power supply circuit 2 includes: a rectifying and filtering circuit 21, an interleaved PFC22 and an LLC synchronous rectifying circuit 23. For the LLC synchronous rectification filter circuit 23, fig. 9 is a schematic structural diagram of main elements in the LLC synchronous rectification circuit to illustrate the working principle of the rectification circuit. The primary coil of the coil 21 in the rectifying circuit on the left side is used for receiving the alternating current processed by the rectifying and filtering circuit 21 and the interleaved PFC22, and the coil 21 includes two secondary coils, namely a secondary coil 211 and a secondary coil 212. In order to control the paths corresponding to the two secondary coils, the secondary coil 211 is connected to the load 3 through the MOSFET221, the secondary coil 212 is connected to the load 3 through the MOSFET222, and since the alternating current received by the primary coil has a positive half cycle and a negative half cycle, and the directions of currents of the positive half cycle and the negative half cycle are opposite, the MOSFET221 and the MOSFET222 are respectively conducted in two different half cycles corresponding to the alternating current, so that the alternating current is converted into direct current in the different half cycles by the secondary coil corresponding to the conducted MOSFET, and then the direct current in the same direction sent by the MOSFET221 or the MOSFET222 can be continuously received by the load 3 in both the positive half cycle and the negative half cycle corresponding to the alternating current, thereby realizing the conversion from the alternating current to the direct current. It should be noted that the rectifier circuit shown in fig. 8 and the LLC synchronous rectifier circuit shown in fig. 9 are only schematic diagrams, and only include main functional components, and the present application is not limited to other specific implementations of the rectifier circuit and the LLC synchronous rectifier circuit.
In a specific implementation manner, a controller provided in the LLC synchronous rectification circuit is used to control on and off of the MOSFETs in the rectification circuit shown in fig. 9, where the controller may be a Synchronous Rectification (SR) driver chip in the LLC synchronous rectification circuit, specifically, fig. 10 is a schematic structural diagram of a control circuit of the synchronous rectification MOSFET, where a secondary coil and a MOSFET corresponding to any loop in fig. 9 are taken as an example in fig. 10, then in fig. 10, the secondary coil 201 is connected to a source (S) of the synchronous rectification MOSFET202, a drain (D) of the synchronous rectification MOSFET202 is connected to the load 3, and the secondary coil 201, the synchronous rectification MOSFET202 and the load 3 form a closed loop, where a current direction for supplying power to the load through the secondary coil 201 is a-b-c-D in the figure. Meanwhile, the SR driving chip 203 in the rectifying circuit 23 may be connected to the source and drain of the synchronous rectification MOSFET202 through its CS pin and GND pin, respectively, and connected to the gate (G) of the synchronous rectification MOSFET202 through its DRV pin. The SR driving chip 203 is specifically configured to obtain a voltage value between a source and a drain of the synchronous rectification MOSFET202, judge the obtained voltage value, and send a control signal for controlling conduction between the source and the drain of the synchronous rectification MOSFET202 to the gate of the synchronous rectification MOSFET202 when the voltage value is greater than a certain preset threshold; and when the voltage value is smaller than the preset threshold value, a control signal for controlling the turn-off between the source and the drain of the synchronous rectification MOSFET202 is sent to the gate of the synchronous rectification MOSFET202, so that the on-off of the synchronous rectification MOSFET is controlled.
However, in the rectifier circuit shown in fig. 10, the synchronous rectifier MOSFET is often soldered on the circuit board through its pins in the form of a chip, and since the pins themselves are also conductors, parasitic inductance is generated when current flows through the pins of the synchronous rectifier MOSFET. For example, fig. 11 is a schematic structural diagram of a synchronous rectifier MOSFET including pins, in which, in addition to a voltage drop generated by the synchronous rectifier MOSFET when a current passes through the synchronous rectifier MOSFET due to its own internal resistance R1, parasitic inductances L1 and L2 on the pins of a source stage and a drain stage also generate voltage drops when the current passing through the synchronous rectifier MOSFET changes, so that voltages on two sides of the pins of the source stage and the drain stage are different. At this time, the voltage between the source and the drain of the synchronous rectification MOSFET detected by the SR driving chip cannot truly reflect the voltage drop caused by the current actually flowing through the inside of the synchronous rectification MOSFET, so that the SR driving chip cannot further transmit a control signal to the synchronous rectification MOSFET accurately according to the detected voltage, and the timing of turning on and off the synchronous rectification MOSFET is further influenced.
For example, fig. 12 is a schematic diagram of a control signal sent by an SR driving chip, wherein when a voltage generated by a current flowing through a synchronous rectification MOSFET decreases from a peak value to a lower value, a voltage drop is also generated due to parasitic inductance of a pin when the current flows through the pin of the synchronous rectification MOSFET, so that the voltage on two sides of the pin of the synchronous rectification MOSFET decreases in advance. For the SR driver, when it is determined at time t1 that the detected voltage is smaller than the preset threshold, the SR driver sends a low-level control signal to the synchronous rectification MOSFET to control the synchronous rectification MOSFET2 to turn off between the source and the drain. At this time, since the voltage across the synchronous rectification MOSFET detected by the SR driving chip is lower than the voltage actually generated by the current flowing through the synchronous rectification MOSFET, the voltage actually generated by the current flowing through the synchronous rectification MOSFET is lowered to the preset threshold at time t2, whereas the SR driving chip already controls the synchronous rectification MOSFET to turn off at time t 1. Therefore, since the SR driver chip controls the synchronous rectifier MOSFET to turn off too early before the time t2, when the synchronous rectifier MOSFET is turned off between the times t1 and t2, and the current flowing through the synchronous rectifier MOSFET is large due to the effect of the parasitic diode therein, the phenomenon that the synchronous rectifier MOSFET is heated as a whole is serious, and the loss of the synchronous rectifier MOSFET is increased.
In addition, synchronous rectification MOSFET can be with the preparation of the SMD MOSFET that the pin is less in the actual engineering realization, if use SMD MOSFET in the rectifier circuit, although reduced the parasitic inductance of pin, in the design that the circuit board leads to 2 layers or more multilayer PCB board realization, SMD MOSFET's heat dissipation measure is not convenient for implement, for SMD MOSFET carries out the heat dissipation design specially and has greatly increased the cost again, consequently, the parasitic inductance of synchronous rectification MOSFET's pin generally can't eliminate through using SMD MOSFET in the rectifier circuit.
Therefore, the application provides a compensation circuit of synchronous rectification MOSFET, through the electromagnetic induction coil that sets up in the synchronous rectification circuit, compensates the produced spurious signal of synchronous rectification MOSFET, and then makes the voltage of synchronous rectification MOSFET both sides that the treater detected can reflect the voltage that the electric current actually produced through synchronous rectification MOSFET more really. Therefore, the technical problem that the parasitic inductance on the pin of the synchronous rectification MOSFET influences the voltage on two sides of the synchronous rectification MOSFET detected by the SR driving chip and further influences the control of the SR driving chip on and off the synchronous rectification MOSFET is solved, and the technical effects of reducing the heating phenomenon of the MOSFET and reducing the loss of the synchronous rectification MOSFET are achieved.
The technical solution of the present invention will be described in detail below with specific examples. These several specific embodiments may be combined with each other below, and details of the same or similar concepts or processes may not be repeated in some embodiments.
The present application provides a compensation circuit that can be applied to the power supply circuit 2 of a display device as shown in fig. 7, and in particular can be used to compensate for parasitic signals generated by the synchronous rectifier MOSFET202 in the LLC synchronous rectifier 23 in the rectifier circuit as shown in fig. 8 in the power supply circuit. Wherein the compensation circuit comprises: and the electromagnetic induction coil is arranged in a closed loop formed by the secondary coil, the synchronous rectification MOSFET and the load in the synchronous rectification circuit. When a closed current flows in the closed loop, the electromagnetic induction coil can form induced electromotive force at two ends of the electromagnetic induction coil under the action of the closed current according to an electromagnetic induction law, and the induced electromotive force can be used for compensating voltage drop generated by parasitic inductance of pins when the pins of the synchronous rectification MOSFET flow through the current.
The compensation signal and the parasitic signal in this embodiment may be voltage signals, for example, the compensation signal may be an induced electromotive force generated by the electromagnetic induction coil, and the parasitic signal may be a voltage drop generated by a parasitic inductance of the pin of the synchronous rectification MOSFET. Alternatively, the compensation signal and the parasitic signal in the present embodiment may also be both current signals and the like, and the present application takes the compensation signal and the parasitic signal as voltage signals as an exemplary description, and does not limit the specific representation thereof.
Specifically, in this embodiment, the compensation signal generated by the electromagnetic coil can be used to cancel the parasitic signal generated by the inductance of the pin of the synchronous rectifier MOSFET when the processor controls the synchronous rectifier MOSFET. For example, in the control circuit shown in fig. 10, since the pins of the synchronous rectification MOSFET are also conductors, parasitic inductance is generated when current flows through the pins of the synchronous rectification MOSFET. Parasitic inductances also produce voltage drops when the current through them changes. At this time, the SR driving chip as the processor includes a parasitic signal in the detected voltage between the source and the drain of the synchronous rectification MOSFET, and the SR driving chip may compensate the parasitic signal through a compensation signal generated by the parasitic coil to obtain a final detection voltage, so that the final detection voltage detected by the SR driving chip can more truly reflect the voltage actually generated by the current flowing through the synchronous rectification MOSFET.
Further, fig. 13 is a schematic structural diagram of an embodiment of the compensation circuit provided in the present application, and as shown in fig. 13, the secondary winding 201 is connected to the source (S) of the synchronous rectification MOSFET202, and the drain (D) of the synchronous rectification MOSFET202 is connected to the load 3. The operating state of the synchronous rectifier MOSFET202 includes an on state and an off state. When the MOSFET202 is in a conducting state, the source and the drain are conducted, the direct current induced by the secondary coil 201 flows into the load 3 through the synchronous rectification MOSFET202, and the current direction for supplying power to the load through the secondary coil 201 is a-b-c-d in the figure; when the MOSFET202 is in the off state, the source and drain are disconnected, and there is no direct current induced in the secondary winding 201.
In particular, the secondary winding 201, the synchronous rectification MOSFET202 and the load 3 in the present embodiment form a closed loop, the electromagnetic induction coil 204 is disposed in the closed loop, the first end a of the electromagnetic induction coil 204 is connected to the source of the synchronous rectification MOSFET, and the second end B is connected to the CS pin of the processor 203. Then when the synchronous rectification MOSFET202 is in a conducting state, the closing current in the direction of a-B-c-d in the closed loop causes an induced electromotive force between the first terminal a and the second terminal B of the electromagnetic induction coil 204 to be generated as a compensation signal for compensating a parasitic signal generated by a parasitic inductance on the pin of the synchronous rectification MOSFET 202.
More specifically, for the electromagnetic induction coil 204 in the embodiment shown in fig. 13, the area of the coil is positively correlated with the magnitude of the parasitic inductance of the pin in the synchronous rectification MOSFET202, so that the compensation signal generated by the electromagnetic induction coil is correlated with the parasitic signal generated by the parasitic inductance. For example, fig. 14 is a waveform diagram of the current output by the secondary winding, that is, the magnitude of the current I output by the secondary winding 201 to the synchronous rectifier MOSFET202 in fig. 13 shows a variation law of "steamed bread wave" with time t. Then for the parasitic inductance (L) at the pin of the MOSFET202, the parasitic inductance will generate a voltage Δ U = L × dI/dt (formula one) when the current flowing through the pin of the MOSFET202 changes. At the same time, the varying current dI/dt generates a varying magnetic field dB/dt, which in a closed coil can generate an induced electromotive force. That is, the voltage generated by the parasitic inductance at the pin of the MOSFET202 when the current changes may be "equivalent" to a "virtual" electromagnetic induction coil, where the induced electromotive force Δ u = n × d/dt = n × dB/dt × S (formula two) generated when the magnetic flux changes in the back direction, where S is the area of the electromagnetic induction coil and n is the number of turns of the electromagnetic induction coil. Combining the first formula and the second formula can obtain the equation Δ u = n + d, and/dt = n + dB/dt + S = n + a + di/dt + S (formula three), where a is the electromagnetic inductance. Finally, it can be found from the formula three that the voltage generated by the parasitic inductance L can be represented by n a di/dt S, and if it is necessary to cancel the voltage generated by the on-board inductance, n a S = -L in the formula three can be made, and at this time, an induced electromotive force equal to Δ U in magnitude and opposite in direction can be obtained.
Therefore, in the embodiment shown in fig. 13, after knowing the total inductance L of the parasitic inductance that the source and drain pins of the synchronous rectification MOSFET202 will introduce, the coil area S of the electromagnetic induction coil 204 to be set can be calculated by formula three (assuming that the number of coil turns n is a certain value, or the coil area S and the number of coil turns n can be calculated by formula three at the same time), so that a compensation signal generated by the inductance of "-L" size is generated by the electromagnetic induction coil on the basis of the parasitic signal generated by the parasitic inductance L through the change of the magnetic flux generated by the electromagnetic induction coil 204, and the compensation signal is equal in size and opposite in direction, so that the compensation signal can compensate the parasitic signal.
For example, in the circuit shown in fig. 13, when the current flows through the synchronous rectification MOSFET202, the voltage drop caused by the internal resistance is 1V, the on-board inductance L on the pin can generate an induced electromotive force of 2mV, and the area S of the electromagnetic induction coil should be set to generate an induced electromotive force of-2 mV.
In particular, in some specific implementations, in order to avoid the overall circuit abnormality caused by an excessively large compensation signal generated by the electromagnetic induction coil, the coil area S may be further determined by the formula n × a × S < = -L, so as to limit the magnitude of the compensation signal generated by the electromagnetic induction coil.
Further, the electromagnetic induction coil 204 provided in the embodiment shown in fig. 13 is capable of providing a compensation signal, so that the SR driving chip 203 can compensate for a parasitic signal of the synchronous rectification MOSFET202 by using the compensation signal provided by the electromagnetic induction coil 204 when controlling the synchronous rectification MOSFET.
At this time, the processor 203 is connected to the second terminal B of the electromagnetic induction coil 204 through its CS pin and also connected to the drain of the synchronous rectification MOSFET through its GND pin, so that the processor 203 can detect the voltage between the second terminal B of the electromagnetic induction coil 204 and the drain of the synchronous rectification MOSFET, generate a control signal for controlling the operating state of the synchronous rectification MOSFET through the DRV pin, and transmit the control signal to the gate (G) of the synchronous rectification MOSFET according to the detected voltage. The electromagnetic induction coil can provide a virtual inductor with an inductance value corresponding to "-L" by means of electromagnetic induction, and the induced electromotive force that can be generated by the electromagnetic induction coil is recorded as "- [ delta ] U", and the induced electromotive force that can be generated by the parasitic inductor L of the pin of the synchronous rectification MOSFET is recorded as "[ delta ] U". When the SR driving chip detects the voltage between the second end B of the electromagnetic induction coil 204 and the drain of the synchronous rectification MOSFET, "- [ delta ] U" and "[ delta ] U" have the same size and opposite directions, and can be offset, so that the voltage detected by the SR driving chip can more truly reflect the voltage drop caused by the current actually flowing through the inside of the synchronous rectification MOSFET, and further accurately send a control signal to the synchronous rectification MOSFET according to the detected voltage.
For example, fig. 15 is a schematic diagram of a control signal sent by an SR driver chip of the present application, wherein when a voltage generated by a current flowing through a synchronous rectification MOSFET decreases from a peak value to a lower value, even though the voltage flows through a pin of the synchronous rectification MOSFET, a voltage drop is generated due to a parasitic inductance of the pin, so that a voltage across the pin of the synchronous rectification MOSFET decreases in advance. For the SR driving chip, since the voltage between the second end of the electromagnetic induction coil and the drain of the synchronous rectification MOSFET is detected, the voltage detected by the SR driving chip can more accurately determine the voltage generated when the actual current flows through the synchronous rectification MOSFET, and when it is determined at time t1 that the detected voltage is smaller than the preset threshold, a low-level control signal is sent to the synchronous rectification MOSFET to control the turn-off between the source and the drain of the synchronous rectification MOSFET 2. At this time, the voltage at the two sides of the SR driving chip detection switch tube is closer to the actual voltage of the synchronous rectification MOSFET, so that the SR driving chip can send out the driving waveform as shown in fig. 15 according to the more accurate voltage. Whereas the driving waveform in fig. 15 is closer to t2 at time t1 than the driving waveform in fig. 12, in some ideal cases such as "-. DELTA.U" and ". DELTA.U", t1 can be closer to t2 or even equal to t2, so as to reduce the duration of heat generation caused by the parasitic diode in the synchronous rectifier MOSFET when it is turned off between times t1 and t2, and further reduce the loss of the synchronous rectifier MOSFET.
Alternatively, in the embodiment shown in fig. 13, taking the electromagnetic induction coil 204 connected to the source of the synchronous rectification MOSFET202 as an example, the voltage detected by the SR driving chip is equivalent to the voltage across the electromagnetic induction coil 204 and the synchronous rectification MOSFET202 connected in series. Therefore, in addition to the electromagnetic coil 204 being connected to the source of the synchronous rectifier MOSFET202 in the embodiment shown in fig. 13, in another implementation, the electromagnetic coil 204 may be connected to the drain of the synchronous rectifier MOSFET 202.
For example, fig. 16 is a schematic structural diagram of another embodiment of the compensation circuit for the synchronous rectification MOSFET provided in the present application, in the compensation circuit shown in fig. 16, the secondary winding 201 is connected to the source (S) of the synchronous rectification MOSFET202, and the drain (D) of the synchronous rectification MOSFET202 is connected to the load 3. The secondary coil 201, the synchronous rectification MOSFET202 and the load 3 form a closed loop, the electromagnetic induction coil 204 is arranged in the closed loop, a first end A of the electromagnetic induction coil 204 is connected with a drain of the synchronous rectification MOSFET, and a second end B is connected with a GND pin of the processor 203. Then when the synchronous rectification MOSFET202 is in a conducting state, the closing current in the direction of a-B-c-d in the closed loop causes an induced electromotive force between the first terminal a and the second terminal B of the electromagnetic induction coil 204 to be generated as a compensation signal for compensating a parasitic signal generated by a parasitic inductance on the pin of the synchronous rectification MOSFET 202. The principle of the compensation signal generated in the embodiment shown in fig. 16 and the parasitic signal compensated by the compensation signal is the same as that shown in fig. 13, and the description thereof is omitted.
Further, in the above-mentioned embodiments shown in fig. 13 and fig. 16, taking the compensation circuit connected to one secondary coil in the rectification circuit as an example for explanation, in an actual implementation process, for example, the primary coil in the rectification circuit shown in fig. 9 may be generally connected to two secondary coils, in this case, one electromagnetic induction coil may be respectively disposed in the closed loop corresponding to each secondary coil. For example, fig. 17 is a schematic structural diagram of another embodiment of the compensation circuit of the synchronous rectification MOSFET provided in the present application, and in the circuit shown in fig. 17, a primary coil in a rectification circuit is connected to two secondary coils: a secondary coil 201 and a secondary coil 201a, and the secondary coil 201, the synchronous rectifier MOSFET202 and the load can constitute a closed loop in which an electromagnetic induction coil 204 is disposed; the secondary winding 201a, the synchronous rectifier MOSFET202a and the load can also form a closed loop in which an electromagnetic coil 204a is arranged. When the alternating current input into the primary coil corresponds to the positive half period and the negative half period respectively, the alternating current is converted into the direct current by the two closed loops in different half periods, and each electromagnetic induction coil in the two closed loops generates a compensation signal when the closed current flows through the loop respectively so as to supplement a parasitic signal generated by parasitic inductance of a pin of the synchronous rectification MOSFET when an SR driving chip corresponding to the closed loop detects voltages at two sides of the synchronous rectification MOSFET.
In order to realize the structure of the compensation circuit in the circuit configuration shown in fig. 17, in a specific implementation, the electromagnetic induction coil having n turns and an area S may be obtained by winding the lead wire connected between the synchronous rectification MOSFET and the SR driving chip for n turns in the central area S as a coil, or the electromagnetic induction coil having n turns and an area S may be obtained by winding the lead wire connected between the synchronous rectification MOSFET and the SR driving chip for n turns in the central area S as a coil. For the selection of the center area S of the winding and the number n of the winding cycles, reference may be made to the formula three in the foregoing embodiments, and details are not described here. Finally, after the wires connected to the CS pins of the two SR driving chips in the circuit shown in fig. 17 are wound, the obtained rectifying circuit may be disposed on a single-sided PCB, so that the compensation circuit provided in this embodiment further has the characteristics of simple structure, small area and convenience for engineering implementation.
Those of ordinary skill in the art will understand that: all or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The program may be stored in a computer-readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A display device, comprising:
a display screen configured to display an image picture;
a sound reproduction apparatus configured to play sound;
a power supply circuit configured to supply power to a load of the display apparatus;
the power supply circuit includes: a rectifying circuit and a compensating circuit;
wherein the rectifier circuit is configured to convert alternating current to direct current;
the compensation circuit is used for compensating parasitic signals of synchronous rectification MOSFETs in the rectification circuit;
the rectifier circuit includes: a closed loop consisting of a secondary coil, the synchronous rectification MOSFET and a load;
the compensation circuit includes: an electromagnetic induction coil disposed in a closed loop of the rectifier circuit; the electromagnetic induction coil is configured to generate a compensation signal under the action of a closed current in the closed loop, and the compensation signal is used for compensating a parasitic signal of a synchronous rectification MOSFET in the rectification circuit;
a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the first end of the electromagnetic induction coil, and the drain of the synchronous rectification MOSFET is respectively connected with the load and the controller; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal according to a voltage between the second end of the electromagnetic induction coil and a drain of the synchronous rectification MOSFET, wherein the control signal is used for controlling the synchronous rectification MOSFET;
or, a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the controller, and the drain of the synchronous rectification MOSFET is connected with the load and the first end of the electromagnetic induction coil; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal for controlling the synchronous rectifier MOSFET according to a voltage between the second end of the electromagnetic induction coil and a source of the synchronous rectifier MOSFET.
2. The display device according to claim 1,
the controller includes: an SR driving chip;
the CS pin of the SR driving chip is connected with the second end of the electromagnetic induction coil;
a GND pin of the SR driving chip is connected with a drain of the synchronous rectification MOSFET;
and a DRV pin of the SR driving chip is connected with the grid electrode of the synchronous rectification MOSFET.
3. The display device according to claim 1,
the controller includes: an SR driving chip;
the CS pin of the SR driving chip is connected with the source stage of the synchronous rectification MOSFET;
the GND pin of the SR driving chip is connected with the second end of the electromagnetic induction coil;
and a DRV pin of the SR driving chip is connected with the grid electrode of the synchronous rectification MOSFET.
4. The display device according to claim 2 or 3,
when the control signal is a low level signal sent to the grid electrode of the synchronous rectification MOSFET by the SR driving chip, the low level signal is used for controlling the turn-off between the source electrode and the drain electrode of the synchronous rectification MOSFET;
when the control signal is a high level signal sent to the grid of the synchronous rectification MOSFET by the SR driving chip, the high level signal is used for controlling conduction between a source and a drain of the synchronous rectification MOSFET.
5. A display device as claimed in claim 2 or 3,
the electromagnetic induction coil comprises at least one closed circle of conducting wire.
6. The display device according to claim 5,
the rectifying circuit and the compensating circuit are arranged on the single-sided PCB;
the electromagnetic induction coil is a lead connected between a pin of the controller and a pin of the synchronous rectification MOSFET.
7. The display device according to any one of claims 1 to 3,
the parasitic signal is generated by a parasitic inductance of a pin of the synchronous rectification MOSFET.
8. The display device according to claim 6,
the parasitic signal and the compensation signal are voltage signals.
9. A compensation circuit for compensating a parasitic signal of a synchronous rectification MOSFET in a rectification circuit; the rectifier circuit includes: a closed loop formed by the secondary coil, the synchronous rectification MOSFET and a load;
characterized in that the compensation circuit comprises:
the electromagnetic induction coil is arranged in the closed loop and used for generating a compensation signal under the action of closed current in the closed loop;
a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the first end of the electromagnetic induction coil, and the drain of the synchronous rectification MOSFET is respectively connected with the load and the controller; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal according to a voltage between the second end of the electromagnetic induction coil and a drain of the synchronous rectification MOSFET, wherein the control signal is used for controlling the synchronous rectification MOSFET;
or, a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the controller, and the drain of the synchronous rectification MOSFET is connected with the load and the first end of the electromagnetic induction coil; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal for controlling the synchronous rectifier MOSFET based on a voltage between the second end of the electromagnetic coil and a source of the synchronous rectifier MOSFET.
10. A display device, comprising:
a first display screen for displaying a first image;
a second display screen for displaying a second image;
a sound reproduction apparatus configured to play sound;
a power supply circuit configured to supply power to a load of the display apparatus;
the power supply circuit includes: a rectifying circuit and a compensating circuit;
wherein the rectifier circuit is configured to convert alternating current to direct current; the rectifier circuit includes: a closed loop formed by the secondary coil, the synchronous rectification MOSFET and the load;
the compensation circuit includes: an electromagnetic induction coil disposed in a closed loop of the rectifier circuit; the electromagnetic induction coil is configured to generate a compensation signal under the action of a closed current in the closed loop, and the compensation signal is used for compensating a parasitic signal of a synchronous rectification MOSFET in the rectification circuit;
a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the first end of the electromagnetic induction coil, and the drain of the synchronous rectification MOSFET is respectively connected with the load and the controller; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal according to a voltage between the second end of the electromagnetic induction coil and a drain of the synchronous rectification MOSFET, wherein the control signal is used for controlling the synchronous rectification MOSFET;
or, a controller configured to control the synchronous rectification MOSFET;
the source of the synchronous rectification MOSFET is connected with the secondary coil and the controller, and the drain of the synchronous rectification MOSFET is connected with the load and the first end of the electromagnetic induction coil; the second end of the electromagnetic induction coil is connected with the controller;
the electromagnetic coil is specifically configured to generate a compensation signal between the first end and the second end under the action of a closed current in the closed loop;
the controller is configured to generate a control signal for controlling the synchronous rectifier MOSFET according to a voltage between the second end of the electromagnetic induction coil and a source of the synchronous rectifier MOSFET.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211268983.8A CN115565471A (en) | 2019-11-04 | 2019-11-25 | Display device and compensation circuit |
| CN202211284606.3A CN115565472A (en) | 2019-11-04 | 2019-11-25 | Display device and compensation circuit |
| PCT/CN2020/076417 WO2021088273A1 (en) | 2019-11-04 | 2020-02-24 | Display device and compensation circuit |
| US17/660,395 US11900855B2 (en) | 2019-11-04 | 2022-04-22 | Display apparatus |
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| CN201911067969X | 2019-11-04 | ||
| CN201911067969 | 2019-11-04 |
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| CN202211284606.3A Division CN115565472A (en) | 2019-11-04 | 2019-11-25 | Display device and compensation circuit |
| CN202211268983.8A Division CN115565471A (en) | 2019-11-04 | 2019-11-25 | Display device and compensation circuit |
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| JP2016009156A (en) * | 2014-06-26 | 2016-01-18 | 株式会社Ｊｏｌｅｄ | Gate driver circuit and el display device |
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| JP3672669B2 (en) * | 1996-05-31 | 2005-07-20 | 富士通株式会社 | Driving device for flat display device |
| US8711582B2 (en) * | 2009-03-31 | 2014-04-29 | Semiconductor Components Industries, Llc | Parasitic element compensation circuit and method for compensating for the parasitic element |
| CN101997438B (en) * | 2009-08-27 | 2014-07-23 | 台达电子工业股份有限公司 | Compensating device for synchronous rectification control and method thereof |
| US20160049876A1 (en) * | 2014-08-12 | 2016-02-18 | Alpha And Omega Semiconductor Incorporated | Single package synchronous rectifier |
| CN107046368B (en) * | 2016-02-05 | 2019-03-08 | 力林科技股份有限公司 | Power supply change-over device |
| CN107731167A (en) * | 2016-08-12 | 2018-02-23 | 京东方科技集团股份有限公司 | Image element circuit, display panel, display device and driving method |
| US10256744B2 (en) * | 2017-09-12 | 2019-04-09 | Infineon Technologies Austria Ag | Controller device with adaptive synchronous rectification |
| CN109995236B (en) * | 2017-12-29 | 2021-04-23 | 东南大学 | Control system of LLC converter synchronous rectifier tube |
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- 2019-11-25 CN CN201911167121.4A patent/CN112785954B/en active Active
- 2019-11-25 CN CN202211284606.3A patent/CN115565472A/en active Pending
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| JP2016009156A (en) * | 2014-06-26 | 2016-01-18 | 株式会社Ｊｏｌｅｄ | Gate driver circuit and el display device |
| KR20170039053A (en) * | 2015-09-30 | 2017-04-10 | 엘지디스플레이 주식회사 | Display device and driving method of the same |
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