CN112784512A - Design method of ultra-wideband radio frequency power division feed network - Google Patents

Design method of ultra-wideband radio frequency power division feed network Download PDF

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CN112784512A
CN112784512A CN202011627790.8A CN202011627790A CN112784512A CN 112784512 A CN112784512 A CN 112784512A CN 202011627790 A CN202011627790 A CN 202011627790A CN 112784512 A CN112784512 A CN 112784512A
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power divider
order
line width
strip line
circuit
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CN112784512B (en
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刘刚
袁丽
张玉
陆平
苏长江
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8511 Research Institute of CASIC
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00Antenna arrays or systems
    • H01Q21/0006Particular feeding systems

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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
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  • General Engineering & Computer Science (AREA)
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  • Non-Reversible Transmitting Devices (AREA)

Abstract

The invention discloses a design method of an ultra-wideband radio frequency power division feed network, which realizes the embedded design of the wideband power division feed network by combining a planar embedded resistance process with a microwave multilayer printed board manufacturing process. The characteristic impedance value of the strip line inside the network is reduced through impedance transformation and optimization of power divider unit parameters, the line width of the strip line inside the feed network is widened under the condition that the thickness parameter of a printed board is not changed, and the circuit processing difficulty is effectively reduced; the electromagnetic shielding is carried out around the power distribution feed network by adopting a via hole grid design, so that the signal crosstalk between circuits is reduced, and the electromagnetic compatibility of the circuits is effectively improved. The invention can reduce the problem of the accumulation and deterioration of the interstage standing wave caused by the cascade connection of the multistage power divider on the basis of improving the integration level of the microwave circuit; the increase of the line width of the internal network strip line reduces the influence of the processing error of the printed circuit on the radio frequency index of the circuit and also reduces the conductor loss of the feed network.

Description

Design method of ultra-wideband radio frequency power division feed network
Technical Field
The invention belongs to the field of microwave circuit integration, and particularly relates to a design method of an ultra-wideband radio frequency power division feed network.
Background
The phased array radio frequency feed network is a key circuit for realizing receiving analog beam synthesis and transmitting power distribution of a phased array system, and the amplitude-phase consistency and port standing waves of the radio frequency feed network are indexes which need to be focused in feed network design. With the improvement of the requirement on the integration miniaturization of the phased array system, the design mode of the traditional independent modular radio frequency power division feed network can not meet the requirement on the integration of the radio frequency system increasingly, and particularly the phased array tile type integration mode requires the integration of the power division feed network and a radio frequency transceiving component; in addition, with the improvement of the phased array bandwidth, the design difficulty of a high-performance radio frequency feed network is gradually increased, and the traditional design method of the radio frequency power division feed network is subjected to bottleneck in the design and manufacture of an embedded integrated ultra-wideband radio frequency feed network.
Disclosure of Invention
The invention aims to provide a design method of an ultra wide band radio frequency power division feed network, which solves the bottleneck problem of the ultra wide band radio frequency feed network in the aspects of simulation design, circuit integration, engineering realizability and the like.
The technical solution for realizing the purpose of the invention is as follows: a design method of an ultra-wideband radio frequency power division feed network comprises the following steps:
step 1, selecting a Wilkinson structure one-to-two power divider with proper section number according to the bandwidth requirement of a radio frequency feed network, and calculating by selecting a design formula of a Chebyshev converter according to the order of the Wilkinson power divider;
step 2, selecting the type of each dielectric plate of the microwave multilayer printed circuit, calculating the impedance value of each step of strip line of the power divider according to the dielectric constant and the plate thickness of the plate, and calculating the line width of each step of strip line;
step 3, modeling simulation is carried out on the first-stage power divider, the characteristic impedance of a strip line at the combining end of the first-stage power divider is set to be 50 ohms, the characteristic impedance of a strip line at the branch end of the first-stage power divider is set to be 40 ohms, impedance transformation is realized through the first-stage circuit, and 50-ohm matching with an external circuit is realized; determining the first-order strip line width, the second-order strip line width, the third-order strip line width, the combined end line width, the branch end line width and the first, second and third-order isolation resistor resistance values in the first-order power divider of the circuit;
step 4, modeling simulation is carried out on the final-stage power divider, the characteristic impedance of a strip line at the combining end of the final-stage power divider is set to be 40 ohms, the characteristic impedance of a strip line at the branch end of the final-stage power divider is set to be 50 ohms, the final-stage power divider is used for realizing combination and impedance transformation, and 50-ohm matching with an external circuit is realized; determining the first-order strip line width, the second-order strip line width, the third-order strip line width, the combined end line width, the branch end line width and the first, second and third-order isolation resistor resistance values in the first-order power divider of the circuit;
step 5, modeling simulation is carried out on the intermediate-stage power divider, the characteristic impedance of a strip line at the combining end of the intermediate-stage power divider is 40 ohms, and the characteristic impedance of a strip line at the branch end of the intermediate-stage power divider is 40 ohms; determining the first-order strip line width, the second-order strip line width, the third-order strip line width, the combined end line width, the branch end line width and the first, second and third-order isolation resistor resistance values in the first-order power divider of the circuit;
step 6, interconnecting the interstage interconnection strip lines of the first-stage power divider, the intermediate-stage power divider and the final-stage power divider by adopting 40-ohm impedance lines;
and 7, adding a metallized through hole, namely a shielding grid (5), on the outer ring of the power divider network, connecting the upper radio frequency ground and the lower radio frequency ground of the power divider feed network, and keeping the upper radio frequency ground and the lower radio frequency ground of the power divider feed network shielding layer complete, so that the circuit is in a better electromagnetic shielding state, and inner circuit space in other areas is obtained for radio frequency, control and power supply wiring.
Compared with the prior art, the invention has the remarkable advantages that:
(1) the invention adopts the plane buried resistance process combined with the microwave multilayer printed board manufacturing process to realize the buried design of the power division feed network, gives the surface space of the circuit to the layout of the radio frequency active device and the control and power supply device, and effectively improves the integration level of the radio frequency microwave circuit.
(2) The invention reduces the characteristic impedance of the strip line by improving and designing each level of power divider circuit, increases the line width of each level of strip line of the broadband one-to-two power divider, improves the realizability of circuit processing, and effectively reduces the influence of the processing error of the printed circuit on the circuit performance;
(3) the first-stage power divider, the middle-stage power divider and the last-stage power divider of the broadband power dividing feed network adopt different circuit designs, can effectively avoid the problem of standing wave accumulation deterioration caused by circuit concatenation, and are beneficial to improving the input and output standing waves of a combiner end.
(4) The method for changing the input and output impedance of the combined end and the branch end of each stage of power divider effectively solves the technical difficulty in the embedded design of the broadband power dividing feed network, and the circuit design method is also suitable for the embedded design of the power dividing feed network of LTCC, HTCC and silicon-based MEMS processes.
Drawings
Fig. 1 is a schematic diagram of a microwave multilayer board lamination.
Fig. 2 is a schematic diagram of an embedded ultra-wideband strip line power division feed network.
Detailed Description
The present invention is described in further detail below with reference to the attached drawing figures.
With reference to fig. 1 and fig. 2, a method for designing an ultra-wideband radio frequency power division feed network includes the following steps:
step 1, selecting a Wilkinson structure one-to-two power divider with proper sections according to the bandwidth requirement of a radio frequency feed network, wherein the Wilkinson structure power divider has a symmetrical structure and can better ensure the amplitude phase consistency of branches in design, and the selection of the order of the Wilkinson power divider refers to the design formula of a Chebyshev converter for calculation; the working bandwidth of the radio frequency power division feed network is 2.5GHz-9GHz, and the requirement of frequency band coverage can be met by selecting a 3-order Wilkinson power divider.
And 2, selecting the type of each dielectric plate of the microwave multilayer printed circuit, calculating the impedance value of each step of strip line of the power divider according to the dielectric constant and the plate thickness of the plate, and calculating the line width of each step of strip line. In combination with fig. 1, considering that the thickness of the microwave multilayer board after lamination is not too thick, the circuit adopts a Ceramic filler-glass fiber cloth (PTFE-Ceramic) board with the board thickness of 0.254mm and the dielectric constant of 3.0, and based on the board layer structure, if a 50 Ω input/output power divider is adopted, the line width of a first-order strip line of the power divider is 0.10mm, which approaches the line width processing limit of the current printed circuit, and under the requirement of the line width, the line width precision in circuit processing is difficult to guarantee, so that the impedance of a radio frequency circuit is difficult to guarantee. The design of line width is needed to be increased, and two ways of increasing the design of line width are provided, one is to start from materials to increase the plate thickness or select plates with lower dielectric constants, and the other is to start from design to reduce the impedance of strip lines; increasing the plate thickness is not beneficial to radio frequency circuit integration, but the plate with lower dielectric constant is not suitable for multilayer lamination and buried resistance process production, so that a more suitable method is to reduce the characteristic impedance of a radio frequency circuit by optimizing the design. Through comprehensive evaluation, a 40-ohm characteristic impedance system is adopted in the network, the impedance of the power division feed network to an external port is still kept at 50 ohms, and the internal and external impedance transformation of the network is converted and transited through the first-stage power divider 1 and the final-stage power divider 3.
And 3, modeling and simulating the first-stage power divider 1, wherein the characteristic impedance of a strip line at the combining end of the first-stage power divider is 50 ohms, the characteristic impedance of a strip line at the branch end of the first-stage power divider is 40 ohms, and the impedance transformation is realized through the first-stage circuit and is matched with an external circuit by 50 ohms. Through circuit optimization, the line width of a first-order strip line of the circuit is 0.14mm, the line width of a second-order strip line of the circuit is 0.24mm, the line width of a third-order strip line of the circuit is 0.37mm, the line width of a combining end is 0.37mm, and the line width of a branch end is 0.53 mm; the resistance values of the first, second and third-order isolation resistors of the power divider are respectively 100 ohms, 150 ohms and 200 ohms.
And 4, carrying out modeling simulation on the final-stage power divider 3, wherein the strip line characteristic impedance of the combining end of the final-stage power divider is 40 ohms, the strip line characteristic impedance of the branch end of the final-stage power divider is 50 ohms, and the final-stage power divider is used for realizing the combination and impedance transformation of the final-stage power divider and realizing the 50-ohm matching with an external circuit. Through circuit optimization, the line width of a first-order strip line of the circuit is 0.18mm, the line width of a second-order strip line of the circuit is 0.24mm, the line width of a third-order strip line of the circuit is 0.32mm, the line width of a combining end is 0.53mm, and the line width of a branch end is 0.37 mm; the resistance values of the first, second and third-order isolation resistors of the power divider are respectively 100 ohms, 150 ohms and 200 ohms.
And 5, modeling and simulating the intermediate-stage power divider 2, wherein the characteristic impedance of the strip line at the combining end of the intermediate-stage power divider is 40 ohms, and the characteristic impedance of the strip line at the branch end of the intermediate-stage power divider is 40 ohms. Through circuit optimization, the line width of a first-order strip line of the circuit is 0.2mm, the line width of a second-order strip line of the circuit is 0.3mm, the line width of a third-order strip line of the circuit is 0.43mm, the line width of a combining end is 0.53mm, and the line width of a branch end is 0.53 mm; the resistance values of the first, second and third-order isolation resistors of the power divider are respectively 100 ohms, 150 ohms and 200 ohms.
And 6, interconnecting the power divider interstage interconnection strip lines by adopting 40-ohm impedance lines.
And 7, adding metallized through holes (shielding grids 5) on the outer ring of the power divider network, connecting the upper radio frequency ground and the lower radio frequency ground of the power divider feed network, and keeping the upper radio frequency ground and the lower radio frequency ground of the power divider feed network shielding layer complete, so that the circuit is in a better electromagnetic shielding state, and the inner circuit space in other areas can be made available for radio frequency, control and power supply wiring.

Claims (4)

1. A design method of an ultra-wideband radio frequency power division feed network is characterized in that the power division feed network is embedded in a microwave multilayer printed circuit by adopting a plane embedded resistance scheme, and the line width of an embedded strip line is optimized by changing the input characteristic impedance of a combined end and a branch end of each level one-to-two power divider of the amplification power division feed network.
2. The design method of the ultra-wideband radio frequency power division feed network according to claim 1, characterized in that circuit parameters of a first-stage power divider (1), a middle-stage power divider (2) and a last-stage power divider (3) of the power division feed network are changed to enable each stage of power dividers in the feed network to have different circuit parameters, so that each stage of power dividers cascaded in the network have different output standing waves, thereby effectively reducing the accumulative deterioration of the inter-stage standing waves among the power dividers and improving the standing waves of network ports.
3. The design method of the ultra-wideband radio frequency power division feed network according to claim 2, characterized by comprising the following steps:
step 1, selecting a Wilkinson structure one-to-two power divider with proper section number according to the bandwidth requirement of a radio frequency feed network, and calculating by selecting a design formula of a Chebyshev converter according to the order of the Wilkinson power divider;
step 2, selecting the type of each dielectric plate of the microwave multilayer printed circuit, calculating the impedance value of each step of strip line of the power divider according to the dielectric constant and the plate thickness of the plate, and calculating the line width of each step of strip line;
step 3, modeling simulation is carried out on the first-stage power divider (1), the characteristic impedance of a strip line at a combining end of the first-stage power divider is set to be 50 ohms, the characteristic impedance of a strip line at a branch end of the first-stage power divider is set to be 40 ohms, impedance transformation is realized through the first-stage circuit, and 50-ohm matching with an external circuit is realized; determining the line width of a first-order strip line, the line width of a second-order strip line, the line width of a third-order strip line, the line width of a combined end, the line width of a branch end and the resistance values of a first-order isolation resistor, a second-order isolation resistor and a third-order isolation resistor in a first-order power divider (1) of the circuit;
step 4, modeling simulation is carried out on the final-stage power divider (3), the characteristic impedance of a strip line at the combining end of the final-stage power divider is set to be 40 ohms, the characteristic impedance of a strip line at the branch end is set to be 50 ohms, the final-stage power divider is used for realizing the combination and impedance transformation of the final-stage power divider, and the final-stage power divider is matched with an external circuit in 50 ohms; determining the line width of a first-order strip line, the line width of a second-order strip line, the line width of a third-order strip line, the line width of a combined end, the line width of a branch end and the resistance values of a first-order isolation resistor, a second-order isolation resistor and a third-order isolation resistor in a first-order power divider (1) of the circuit;
step 5, modeling simulation is carried out on the intermediate-stage power divider (2), the characteristic impedance of a strip line at the combining end of the intermediate-stage power divider is 40 ohms, and the characteristic impedance of a strip line at the branch end of the intermediate-stage power divider is 40 ohms; determining the line width of a first-order strip line, the line width of a second-order strip line, the line width of a third-order strip line, the line width of a combined end, the line width of a branch end and the resistance values of a first-order isolation resistor, a second-order isolation resistor and a third-order isolation resistor in a first-order power divider (1) of the circuit;
step 6, interconnecting strip lines among the first-stage power divider (1), the intermediate-stage power divider (2) and the final-stage power divider (3) by adopting 40-ohm impedance lines;
and 7, adding a metallized through hole, namely a shielding grid (5), on the outer ring of the power divider network, connecting the upper radio frequency ground and the lower radio frequency ground of the power divider feed network, and keeping the upper radio frequency ground and the lower radio frequency ground of the power divider feed network shielding layer complete, so that the circuit is in a better electromagnetic shielding state, and inner circuit space in other areas is obtained for radio frequency, control and power supply wiring.
4. The design method of the ultra wide band radio frequency power dividing feed network according to claim 3, characterized in that by optimizing the circuit design, the width of the strip line in the circuit network is increased, the influence of the processing line width error on the network performance is reduced, and the line loss is reduced at the same time.
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CN114552169B (en) * 2022-04-25 2022-07-05 中国电子科技集团公司第二十九研究所 Construction method of broadband curved surface conformal radio frequency functional circuit assembly

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