CN112735962A - Photoresist compatibility detection device - Google Patents

Photoresist compatibility detection device Download PDF

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CN112735962A
CN112735962A CN202011505042.2A CN202011505042A CN112735962A CN 112735962 A CN112735962 A CN 112735962A CN 202011505042 A CN202011505042 A CN 202011505042A CN 112735962 A CN112735962 A CN 112735962A
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photoresist
laser
depth
probe
compatibility
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CN112735962B (en
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刘云飞
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Yangtze Memory Technologies Co Ltd
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Yangtze Memory Technologies Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Abstract

The invention discloses a photoresist compatibility detection device, which is used for detecting the consistency of the hardness of photoresist at different depths by adopting a probe and comprises the following components: a driving power supply for generating a compensation current; the piezoelectric driver is connected with the driving power supply and applies acting force based on the compensation current so as to enable the probe to enter the photoresist; the laser unit is used for detecting the depth of the probe entering the photoresist; the data processing device is connected with the driving power supply to obtain the compensation current, is connected with the laser unit to obtain the depth, and calculates the compatibility of the photoresist according to the relation between the compensation current and the depth; the photoresist compatibility detection device disclosed by the invention can directly detect and represent the compatibility of the lower part and the upper part of the photoresist, and is favorable for improving the photoresist compatibility in an actual scene or a subsequent process, thereby improving the product yield.

Description

Photoresist compatibility detection device
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a photoresist compatibility detection device.
Background
In recent years, flash memory (flash memory) memories have been developed particularly rapidly. The main characteristics of flash memory are that it can keep the stored information for a long time without power up, and it has the advantages of high integration level, fast access speed, easy erasing and rewriting, so it has been widely used in many fields such as microcomputer, automatic control, etc. with the feature size of semiconductor manufacturing process getting smaller and smaller, the storage density of the storage device gets higher and higher. In order to further increase the memory density, a memory device of a three-dimensional structure (i.e., a three-dimensional memory device) has been developed. The three-dimensional memory device includes a plurality of memory cells stacked in a vertical direction, can increase the integration degree by a multiple on a unit area of a wafer, and can reduce the cost.
When a step structure is formed in an existing three-dimensional memory device, Photoresist (PR) needs to be formed on the surface of a sacrificial stacked structure or a gate stacked structure to be used as a mask, and then the stacked structure is etched to form the step structure. The photoresist can be consumed longitudinally and transversely in the etching process, when the number of layers of the step structure is large, a thick photoresist layer needs to be formed, and the hardness of the photoresist layer close to the lower part of the laminated structure and the hardness of the photoresist layer far away from the upper part of the laminated structure have certain difference, so that the etching effect is not ideal, and the yield of devices in the later stage cannot be guaranteed.
However, in the prior art, the compatibility between the lower part and the upper part of the photoresist layer can only be indirectly reflected by the AEI (After etching detection) technology such as LER (Line Edge Roughness), and the like, so a technical scheme capable of directly detecting and representing the compatibility between the lower part and the upper part of the photoresist layer is expected.
Disclosure of Invention
In view of the above problems, it is an object of the present invention to provide a photoresist compatibility detecting apparatus, whereby the compatibility of the lower and upper portions of the photoresist can be directly detected and characterized.
According to an aspect of the present invention, there is provided a photoresist compatibility detecting apparatus for detecting uniformity of hardness of different depths of a photoresist using probes, comprising: a driving power supply for generating a compensation current; the piezoelectric driver is connected with the driving power supply and applies acting force based on the compensation current so as to enable the probe to enter the photoresist; the laser unit is used for detecting the depth of the probe entering the photoresist; and the data processing device is connected with the driving power supply to obtain the compensation current, is connected with the laser unit to obtain the depth, and calculates the compatibility of the photoresist according to the relation between the compensation current and the depth.
Optionally, the piezoelectric driver further includes: and the laser unit emits laser to irradiate the upper surface of the cantilever and receives reflected light so as to detect the depth of the probe entering the photoresist.
Optionally, the depth detection method is selected from any one of time-of-flight technique, multi-frequency phase shift technique and interferometry
Optionally, the laser unit is selected from a laser displacement sensor, and the depth is detected using triangulation.
Optionally, the laser displacement sensor includes: the laser emission circuit emits a beam of laser to irradiate a measured object to form an incident light spot; a light sensing circuit receiving the scattered light beam at the incident light spot to form a reflected light spot; and the signal processing circuit is connected with the laser emitting circuit and the photosensitive circuit, receives signals fed back by the laser emitting circuit and the photosensitive circuit, and detects the depth of the probe entering the photoresist according to the signals fed back by the laser emitting circuit and the photosensitive circuit.
Optionally, the laser emitting circuit is selected from a semiconductor laser.
Optionally, the photosensitive circuit is selected from any one of a photo charge coupler and a photo position sensor.
Optionally, the photoresist covers the semiconductor structure, and is used for forming a step structure in the semiconductor structure.
Optionally, the semiconductor structure is a 3D memory structure, including: a substrate; and a gate stack structure formed on the substrate, the gate stack structure including interlayer insulating layers and gate conductor layers alternately stacked.
Optionally, the photoresist compatibility detection apparatus further includes: a platform for placing the semiconductor structure, the temperature of the platform being adjustable to simulate a real environment.
The photoresist compatibility detection device provided by the invention can directly detect and represent the compatibility of the upper part and the lower part of the photoresist, namely, can directly detect and represent the difference of parameters such as the hardness of the upper part and the lower part of the photoresist.
Specific parameters of compatibility of the upper part and the lower part of the photoresist can be obtained through a relation curve of the compensating current and the depth of the probe entering the photoresist, so that the compatibility of the photoresist can be improved in an actual scene or a subsequent process, for example, the difference of parameters such as hardness of the upper part and the lower part of the photoresist is reduced by changing process temperature, concentration of a developing solution and spin-coating rotation speed, and the photoresist has better compatibility, so that the product yield is improved.
Further, compared with the traditional device for detecting the distance through the laser unit, the laser displacement sensor has higher precision and resolution, and can better detect the depth of the probe entering the photoresist so as to better detect and characterize the compatibility of the lower part and the upper part of the photoresist.
Furthermore, the platform for placing the photoresist also has a temperature control function, and can simulate the compatibility of the photoresist at different temperatures, so that the photoresist compatibility detection device provided by the embodiment of the invention can be suitable for requirements of different processes and different temperatures, and the application range is wider.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 to 6 are cross-sectional views of a semiconductor structure 100 illustrating a step structure formation process of a three-dimensional memory device according to the related art;
FIG. 7 illustrates an imaging schematic diagram of line edge roughness detection for a step structure of a three-dimensional memory device of the prior art;
FIG. 8 shows a cross-sectional view of a photoresist layer in the prior art;
FIG. 9 shows a photoresist compatibility detection apparatus according to an embodiment of the present invention;
FIG. 10 is a circuit configuration diagram illustrating the laser unit of FIG. 9 as a laser displacement sensor;
FIG. 11 is a graph showing the depth of probe penetration into the photoresist versus compensation current of FIG. 9.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the various figures, the same elements or modules are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
It should be understood that in the following description, "circuitry" may comprise singly or in combination hardware circuitry, programmable circuitry, state machine circuitry, and/or elements capable of storing instructions executed by programmable circuitry. When an element or circuit is referred to as being "connected to" another element or circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present. When a layer, a region, or a region is referred to as being "on" or "over" another layer, another region, or a region may be directly on the other layer, the other region, or another layer or a region may be included between the layer, the region, or the region. And, if the device is turned over, that layer, region, or regions would be "under" or "beneath" another layer, region, or regions. If for the purpose of describing the situation directly above another layer, another area, the expression "directly above … …" or "above and adjacent to … …" will be used herein.
In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a memory device, including all layers or regions that have been formed. In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
Also, certain terms are used throughout the description and claims to refer to particular components. As one of ordinary skill in the art will appreciate, manufacturers may refer to a component by different names. This patent specification and claims do not intend to distinguish between components that differ in name but not function.
Moreover, it is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In the three-dimensional memory device of the NAND structure, gate conductors of the selection transistor and the memory transistor are provided in a stacked structure. In order to increase the storage capacity of the three-dimensional memory device, the number of layers of memory cells stacked in the vertical direction is increasing, and in order to form a word line conductive path to each memory cell, a step structure needs to be formed at an edge portion of the stacked structure.
In order to more clearly illustrate the embodiments of the present invention, a process of forming a step structure of a three-dimensional memory device in the related art will be first described. Fig. 1 to 6 are cross-sectional views of semiconductor structures illustrating a step structure formation process of a three-dimensional memory device according to the related art.
See fig. 1. A semiconductor structure 100 to be etched to form a step structure is provided. The semiconductor structure 100 includes: the semiconductor structure comprises a substrate 110 and a gate stack structure 120 positioned on the substrate 110, wherein the gate stack structure 120 comprises an interlayer insulating layer 121 and a gate conductor layer 122 which are alternately stacked. A photoresist layer 130 is formed on the gate stack structure 120 to form a step structure as a mask in a subsequent etching step.
In this embodiment, the substrate 110 is, for example, a single crystal silicon substrate, a Ge substrate, a SiGe substrate, an SOI (silicon on insulator) substrate, a GOI (germanium on insulator) substrate, or the like, the interlayer insulating layer 121 is, for example, composed of silicon oxide, and the gate conductor layer 122 is, for example, composed of silicon nitride.
See fig. 2. The photoresist layer 130 is modified such that the modified photoresist layer 130 exposes the upper surface of the gate stack structure 120 compared to the photoresist layer before modification. In practical applications, the trim dimension (TRIMCD) in the trim step is equal to the distance between the boundaries of two adjacent steps along the step direction, and the distance between the steps in the step structure can be adjusted by adjusting the trim dimension.
See fig. 3. And etching by using the modified photoresist layer 130 as a mask, so that the whole area, which is not covered by the photoresist layer 130, in the gate stack structure 120 is reduced by one step thickness, where the one step thickness is the sum of the thicknesses of an interlayer insulating layer and a gate conductor layer.
Next, referring to fig. 4 to 6, the steps of modifying the photoresist layer 130 and etching with the modified photoresist layer 130 as a mask are repeated to form a step structure. The number of modifications and the number of etching are merely examples, and the number of modifications and the number of etching in practical application are related to the number of steps actually formed.
Fig. 7 shows an imaging schematic diagram of line edge roughness detection of a step structure of a three-dimensional memory device of the prior art. For example, the imaging diagram shown in fig. 7 is a top view of the semiconductor structure 100 shown in fig. 6 in the a-a direction, and the step edge of the first trim etching and the step edge … … of the second trim etching are sequentially from right to left in fig. 7, and it can be seen that the LER gradually deteriorates from left to right, which may cause adverse effects on subsequent processes and thus reduce the product yield.
Figure 8 shows a cross-sectional view of a photoresist layer in the prior art. Referring to fig. 5, the photoresist layer 130 includes an upper portion 131 distant from the gate stack structure 120 and a lower portion 132 adjacent to the gate stack structure 120.
See fig. 1-7. The photoresist layer 130 is consumed in both the longitudinal direction and the transverse direction in the etching process, when the number of layers of the step structure is large, a thick photoresist layer 130 needs to be formed, at this time, the upper portion 131 of the photoresist layer far away from the gate stack structure 120 and the lower portion 132 of the photoresist layer close to the gate stack structure 120 have difference in compatibility, that is, certain difference exists in parameters such as hardness, and the like, so that the modifying and etching effects are not ideal, the LER is poor, the subsequent process is affected, and the yield of the product is reduced.
In the prior art, the compatibility of the upper portion 131 and the lower portion 132 of the photoresist layer 130 cannot be directly detected and characterized, and can only be indirectly reflected by an image map obtained by an AEI technique after etching is completed, such as by line edge roughness, lithography contrast, exposure sensitivity, and the like. The AEI technique can only indirectly reflect the difference in compatibility between the upper portion 131 and the lower portion 132 of the photoresist layer 130, and cannot directly detect and characterize the relevant parameters, such as the hardness of the upper portion 131 and the lower portion 132 of the photoresist layer 130, which makes it difficult to obtain accurate data, and is not favorable for adjusting the process according to the relevant parameters to improve the compatibility between the upper portion 131 and the lower portion 132 of the photoresist layer 130.
FIG. 9 shows a photoresist compatibility detection apparatus according to an embodiment of the present invention. The photoresist compatibility detecting apparatus 200 includes a stage 210, a driving power supply 220, a piezo driver 230, a laser unit 240, and a data processing apparatus 250.
The platform 210 is used for placing the semiconductor structure 100, and the semiconductor structure 100 includes a substrate and a gate stack structure. A photoresist 130 overlies the semiconductor structure 100.
The driving power supply 220 is connected to the piezoelectric actuator 230 for supplying the compensation current to the piezoelectric actuator 230.
The piezo actuator 230 includes a cantilever 231 and a probe 232, and the piezo actuator 230 applies a force based on the compensation current provided by the driving power supply 220 to move the cantilever 231 so that the probe 232 slowly and uniformly enters the photoresist 130.
The laser unit 240 is used for detecting a distance x between the upper surface of the cantilever 231 and the laser unit 240, thereby calculating a depth of the probe 232 into the photoresist 130. The laser unit 240 emits a laser beam to irradiate the upper surface of the cantilever 231, receives a reflected light beam from the upper surface of the cantilever 231, calculates a distance x, and then obtains a depth of the probe 232 entering the photoresist 130 according to a relative positional relationship among the laser unit 240, the cantilever 231, the probe 232, and the stage 210. The method of detecting the distance x may be any one selected from time of light technology, Multiple frequency phase-shift technology, and Interferometry (Interferometry). Meanwhile, the laser unit 240 transmits the detected depth of the probe 232 into the photoresist 130 to the data processing device 250.
The data processing device 250 is connected to the driving power 220 to obtain the compensation current, connected to the laser unit 240 to obtain the depth of the probe 232 into the photoresist 130, and calculates the compatibility of the photoresist 130 according to the relationship between the compensation current and the depth.
The driving power supply 220 provides a compensation current, the piezoelectric driver 230 applies a force based on the compensation current to control the probe 232 to slowly enter the photoresist 130 at a uniform speed, and sends the value of the compensation current to the data processing device 250, the laser unit 240 detects the depth of the probe 232 entering the photoresist 130 and sends the detected depth to the data processing device 250, and the data processing device 250 calculates the compatibility of the photoresist 130 according to the depth of the probe 232 entering the photoresist 130 and the compensation current.
Different resistances are applied to different depths of the probe 232 entering the photoresist 130, and the applied resistances are related to parameters such as the hardness of the photoresist 130, so that the probe 232 can slowly enter the photoresist at a uniform speed, the driving power supply 220 needs to provide different compensation currents to enable the piezoelectric driver 230 to apply different acting forces, and the compatibility between the lower part and the upper part of the photoresist 130 can be obtained according to different compensation current values.
The photoresist compatibility detection device provided by the embodiment of the invention can directly detect parameters such as hardness of the upper part and the lower part of the photoresist, so that the compatibility of the upper part and the lower part of the photoresist can be directly detected and represented.
Preferably, the laser unit 240 is selected from a laser displacement sensor, as shown in fig. 10. Fig. 10 shows a schematic circuit diagram of the laser unit of fig. 9 as a laser displacement sensor.
The laser unit 240 includes a laser emitting circuit 241, a light sensing circuit 242, and a signal processing circuit 243.
The laser emitting circuit 241 is, for example, a semiconductor laser, and is connected to the signal processing circuit 243 for emitting a laser beam to the surface of the object to be measured to form an incident light spot.
The light sensing circuit 242 is, for example, a CCD (Charge Coupled Device) or a PSD (Position Sensitive Detectors), and is connected to the signal processing circuit 243 for receiving the scattered light beam from the incident light spot to form a reflected light spot.
The signal processing circuit 243 calculates the displacement of the object to be measured from parameters such as the displacement of the reflected light spot of the scattered light beam on the light receiving circuit 242.
The laser emitting circuit 242 emits a beam of laser light onto the surface of the object to be measured to form a first incident light spot, the first incident light spot is formed at the position of the photosensitive circuit 242 through scattering, when the object to be measured generates displacement y along the optical axis direction of the incident light, the laser light emitted by the laser emitting circuit forms a second incident light spot on the surface of the object to be measured, the second reflected light spot is formed at the position of the photosensitive circuit 242 through scattering, the displacement of the second reflected light spot relative to the first reflected light spot is y ', and the signal processing circuit 243 can obtain the displacement y of the object to be measured according to other parameters such as y'.
At this time, the laser unit 240 obtains the depth of the probe 232 entering the photoresist 130 according to the detected parameters, such as the displacement y of the probe 232, the relative position relationship among the laser unit 240, the cantilever 231, the probe 232, and the stage 210, and the like.
Compared with the traditional device for detecting the distance through the laser unit, the laser displacement sensor has higher precision and resolution, and can better detect and characterize the compatibility of the lower part and the upper part of the photoresist.
Preferably, the temperature of the platform 210 is adjustable to simulate a real environment. According to the temperature difference of the platform 210, the compatibility of the photoresist 130 at different temperatures can be simulated, so that the photoresist compatibility detection device provided by the embodiment of the invention can be suitable for the requirements of different processes and different temperatures, and the application range is wider.
Fig. 11 shows a graph of the depth of probe 232 into photoresist 130 versus compensation current in fig. 9. As shown in curve a of fig. 11, when the compatibility between the lower portion and the upper portion of the photoresist 130 is good, that is, the hardness of the lower portion and the upper portion of the photoresist 130 are the same, the relationship between the compensation current and the depth of the probe 232 into the photoresist 130 is a linear function, and the compensation current increases uniformly as the depth of the probe 232 into the photoresist 130 increases.
When the lower and upper portions of the photoresist 130 are poorly compatible, the compensation current no longer increases uniformly as the depth of the probe into the photoresist 130 increases.
For example, when the lower portion of the photoresist 130 has a higher hardness than the upper portion, the compensation current and the depth of the probe 232 into the photoresist 130 are related as shown in curve b, and as the depth of the probe 232 into the photoresist 130 increases, a larger compensation current needs to be supplied from the driving power supply 220, compared to curve a.
When the hardness of the lower portion of the photoresist 130 is less than that of the upper portion, the relationship between the compensation current and the depth of the probe 232 into the photoresist 130 is shown in curve c, and the driving power 220 only needs to provide a smaller compensation current to make the probe 232 enter the photoresist 130 as the depth of the probe 232 into the photoresist 130 increases compared to curve a.
Therefore, the compatibility of the lower part and the upper part of the photoresist can be directly detected and represented by a relation curve of the compensating current and the depth of the probe 232 entering the photoresist, so that the compatibility of the lower part and the upper part of the photoresist can be improved in a subsequent process or an actual scene, for example, the purpose of reducing the difference of the upper hardness and the lower hardness of the photoresist can be achieved by changing the temperature, the concentration of a developing solution and the spin-coating rotating speed, the compatibility of the photoresist in actual application is better, and the yield of products is further improved.
It should be noted that as used herein, the words "during", "when" and "when … …" in relation to the operation of a circuit are not strict terms referring to actions occurring immediately at the beginning of a startup action, but rather there may be some small but reasonable delay or delays, such as various transmission delays, between them and the reflected action (action) initiated by the startup action. The words "about" or "substantially" are used herein to mean that the value of an element (element) has a parameter that is expected to be close to the stated value or position. However, as is well known in the art, there is always a slight deviation that makes it difficult for the value or position to be exactly the stated value. It has been well established in the art that a deviation of at least ten percent (10%) for a semiconductor doping concentration of at least twenty percent (20%) is a reasonable deviation from the exact ideal target described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive or negative logic is used.
In accordance with the present invention, as set forth above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the invention should be determined with reference to the appended claims and their equivalents.

Claims (10)

1. A photoresist compatibility detection apparatus for detecting consistency of hardness of different depths of photoresist using a probe, comprising:
a driving power supply for generating a compensation current;
the piezoelectric driver is connected with the driving power supply and applies acting force based on the compensation current so as to enable the probe to enter the photoresist;
the laser unit is used for detecting the depth of the probe entering the photoresist; and
and the data processing device is connected with the driving power supply to obtain the compensation current, is connected with the laser unit to obtain the depth, and calculates the compatibility of the photoresist according to the relation between the compensation current and the depth.
2. The photoresist compatibility detection apparatus of claim 1, the piezo actuator further comprising: a cantilever on which the probe is located,
the laser unit emits laser to irradiate the surface of the cantilever and receives reflected light so as to detect the depth of the probe entering the photoresist.
3. The photoresist compatibility detection apparatus of claim 2, wherein the depth detection method is selected from any one of time-of-flight technique, multi-frequency phase shift technique and interferometry.
4. The photoresist compatibility detection apparatus of claim 1, the laser unit being selected from a laser displacement sensor, the depth being detected using triangulation.
5. The photoresist compatibility detection apparatus of claim 4, the laser displacement sensor comprising:
the laser emission circuit emits a beam of laser to irradiate a measured object to form an incident light spot;
a light sensing circuit receiving the scattered light beam at the incident light spot to form a reflected light spot;
and the signal processing circuit is connected with the laser emitting circuit and the photosensitive circuit, receives signals fed back by the laser emitting circuit and the photosensitive circuit, and detects the depth of the probe entering the photoresist according to the signals fed back by the laser emitting circuit and the photosensitive circuit.
6. The photoresist compatibility detection apparatus of claim 5, the laser emitting circuit being selected from a semiconductor laser.
7. The apparatus according to claim 5, wherein the photosensitive circuit is selected from any one of a photo charge coupler and a photo position sensor.
8. The photoresist compatibility detection apparatus of claim 1, wherein the photoresist overlies a semiconductor structure for forming a step structure in the semiconductor structure.
9. The photoresist compatibility detection apparatus of claim 8, the semiconductor structure being a 3D memory structure comprising:
a substrate; and
and the grid laminated structure comprises an interlayer insulating layer and a grid conductor layer which are alternately stacked.
10. The photoresist compatibility detection apparatus of claim 9, further comprising: a platform, wherein the semiconductor structure is placed on the platform, the temperature of the platform being adjustable to simulate a real environment.
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW271006B (en) * 1994-07-16 1996-02-21 Shyue-Kuen Shy Thin film probe structure and manufacturing process thereof
US20010042868A1 (en) * 1999-04-06 2001-11-22 Hu Yungjun Jeff Conductive material for integrated circuit fabrication
CN102955378A (en) * 2012-11-12 2013-03-06 上海集成电路研发中心有限公司 Morphology characterization method for photoresist
CN106053355A (en) * 2016-05-11 2016-10-26 京东方科技集团股份有限公司 Photoresist parameter detection method and apparatus
CN106571315A (en) * 2016-11-16 2017-04-19 上海华力微电子有限公司 Method for detecting quality of photoresist
US20190043768A1 (en) * 2017-08-03 2019-02-07 Samsung Electronics Co., Ltd. Methods for Fabricating Semiconductor Devices Using a Fringe Signal

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW271006B (en) * 1994-07-16 1996-02-21 Shyue-Kuen Shy Thin film probe structure and manufacturing process thereof
US20010042868A1 (en) * 1999-04-06 2001-11-22 Hu Yungjun Jeff Conductive material for integrated circuit fabrication
CN102955378A (en) * 2012-11-12 2013-03-06 上海集成电路研发中心有限公司 Morphology characterization method for photoresist
CN106053355A (en) * 2016-05-11 2016-10-26 京东方科技集团股份有限公司 Photoresist parameter detection method and apparatus
CN106571315A (en) * 2016-11-16 2017-04-19 上海华力微电子有限公司 Method for detecting quality of photoresist
US20190043768A1 (en) * 2017-08-03 2019-02-07 Samsung Electronics Co., Ltd. Methods for Fabricating Semiconductor Devices Using a Fringe Signal

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