CN1127185C - High bit rate driver for semiconductor laser device and electric acceptive modulator - Google Patents
High bit rate driver for semiconductor laser device and electric acceptive modulator Download PDFInfo
- Publication number
- CN1127185C CN1127185C CN99107427A CN99107427A CN1127185C CN 1127185 C CN1127185 C CN 1127185C CN 99107427 A CN99107427 A CN 99107427A CN 99107427 A CN99107427 A CN 99107427A CN 1127185 C CN1127185 C CN 1127185C
- Authority
- CN
- China
- Prior art keywords
- bit rate
- constitutes
- high bit
- rate driver
- series connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Semiconductor Lasers (AREA)
Abstract
The present invention relates to a high bit rate driver for semiconductor laser devices and electric absorption modulators. The range of the working speed is from DC to 3 Gb/s. Active elements of the driver all adopt microwaves silicon bipolar transistors, a bistable trigger circuit is used as an input buffer stage, a differential amplifier is used as an output stage, and each active element is provided with a unique accelerating circuit. The present invention has the advantages of simple circuit structure, low cost and high reliability, and can be used for optical fiber communication systems.
Description
Technical field: the present invention relates to a kind of high bit rate driver that is used for semiconductor laser and electroabsorption modulator, is the semiconductor laser (LD) that is used for high code check optical fiber telecommunications system and the drive circuit (driver) of electroabsorption modulator (EA).
Background technology: typical prior art is the LG1626 that is produced by U.S. Lucent company, the serial IC products such as FMM3191DG that serial IC product such as LG1625 and Japanese Fujitsu company produce.(reference:
1, the LG1626AXF of U.S. Lucent company drive products technical manual, 1998.2, the Japanese Fujitsu FMM3191DG of company Drive technology handbook.Japan Fujitsu " the 1998 Lightwave Components ﹠amp of company; Modules Databook " p132-135.)
The basic condition of prior art is: the circuit structure of LD/EA high bit rate driver is the multipole differential amplifier and constitutes, the circuit topological structure complexity, and the used element of basic circuit (IC) and peripheral circuit is more.Low frequency characteristic is relatively poor, can not export complete " 0 ", complete " 1 " sign indicating number.Active device all adopts GaAs FET device, material cost, production cost and equipment cost height, and antistatic property is poor, the welding process requirement harshness.
Summary of the invention: the purpose of this invention is to provide that a kind of technical performance compared with prior art is suitable, circuit topological structure is simple, the high code check LD/EA driver of low production cost.
High code check LD/EA driver provided by the invention is characterised in that: employing flip and flop generator as shown in Figure 4 is as the input buffering level, adopt differential amplifier as output stage, thereby the assurance driver can be exported good complete " 0 " sign indicating number, complete " 1 " coded signal level; Adopt unique accelerating circuit scheme, make driver adopt silicon bipolar transistor still to have very high switching speed under as the prerequisite of active device; Adopt silicon bipolar transistor as active device, make driver have with low cost, antistatic property good, the simple advantage of welding procedure.
Description of drawings:
The high code check LD/EA of Fig. 1 drive circuit schematic diagram
Fig. 2 test macro block diagram
Fig. 3 input signal 2.488 Gbit/s, ECL level, NRZ pseudo noise code 2
31-1 output voltage waveforms
The input buffering level that Fig. 4 flip and flop generator constitutes
Embodiment:
Concrete enforcement of the present invention can be illustrated by example reference the following drawings.
Fig. 1 is a high code check LD/EA drive circuit schematic diagram provided by the invention, is " driver " to call this circuit in the following text.
Driver comprises by T
1, T
2Two microwave silicon bipolar transistors and R
1～R
8Eight input buffering levels that resistance constitutes; By T
3, T
4Two microwave silicon bipolar transistors and R
9～R
11Three output stages that resistance constitutes; By R
12And C
1, R
13And C
2, R
14And C
3, R
15And C
4Four accelerating circuit unit that constitute and by R
16Input buffering level balancing circuitry switching time that constitutes with L is totally four parts.
Q
+And Q
-Be the driver signal input port, can single-endedly import, also can the differential input of both-end, input signal is the ECL standard signal.D
+And D
-Port is the driver signal output port, D
-Can connect semiconductor laser (LD) negative electrode is used to drive LD or meets the oscilloscope that input impedance is 50 Ω, D
+Port can meet electroabsorption modulator (EA) anode (D
-Ground connection) be used to drive EA.
The course of work of driver is as follows:
One, basic circuit operation principle: as power supply V
EeAfter the connection, because T
1, T
2The difference of current amplification factor, T
1, T
2One of certainty is saturated, and one is ended.
Assumed initial state is T
1End T
2Saturated, input signal is from Q
+Add.When input pulse signal rising edge arrives Q
+During point, Q
+Current potential raises, and makes T
1Saturated, A point current potential descends, Q
-The point current potential descends, and forces T
2End, B point current potential rises, and further impels Q
+Current potential raises; When input pulse signal trailing edge arrives Q
+The time, Q
+Current potential reduces, and makes T
1End, A point current potential rises, Q
-The point current potential rises, and forces T
2Saturated, B point current potential descends, and further impels Q
+Current potential reduces.Therefore, at Q
+End input pulse signal then can obtain and the input pulse signal inversion at the A point, and the B point obtains the stable pulse signal with input pulse signal homophase.At Q
-End input pulse signal then can obtain and input pulse signal homophase at the A point, and the B point obtains the stable pulse signal with the input pulse signal inversion.
Assumed initial state is T
1Saturated, T
2End, input signal is from Q
+Add.Q when input pulse signal rising edge arrives
+During point, Q
+Current potential raises, T
1Still saturated, A point current potential is constant, Q
-The point current potential is constant, T
2Still end, B point current potential is constant; When input pulse signal trailing edge arrives Q
+The time, Q
+The point current potential reduces, and makes T
1End, A point current potential rises, Q
-The point current potential rises, and forces T
2Saturated, B point current potential descends, and further impels Q
+Current potential reduces.Therefore, at Q
+End input pulse signal can obtain and the input pulse signal inversion at the A point, and the B point obtains the burning voltage pulse signal with input pulse signal homophase.At Q
-End input pulse signal then can obtain and input pulse signal homophase and anti-phase burning voltage pulse signal at A point and B point.
Therefore, T no matter
1, T
2Initial condition how, at Q
+End input pulse signal can obtain and the input pulse signal inversion at the A point, and the B point obtains the burning voltage pulse signal with input pulse signal homophase.At Q
-End input pulse signal then can obtain and input pulse signal homophase and anti-phase burning voltage pulse signal at A point and B point.
The control of Electric potentials that A point and B are ordered T
3, T
4Collector current, make D
-The pulse current of port and Q
+Port pulse voltage signal homophase, D
+The pulse voltage of port and Q
+Port pulse voltage signal homophase.Because T
3, T
4Work in saturated, cut-off state respectively, from D
+, D
-Port can obtain good output voltage of waveform or current pulse signal.
Two, accelerating circuit operation principle: because T
1, T
2, T
3, T
4Work in saturated, as to end continuous conversion state, therefore, the collector electrode stored charge of silicon bipolar transistor under saturation condition is the key of restriction flip and flop generator switching speed.By R
12And C
1, R
13And C
2, R
14And C
3, R
15And C
4Four accelerating circuit unit that constitute can be taken the collector electrode stored charge away at reasonable time, thereby improve the switching speed of flip and flop generator.R wherein
12And C
1Series connection constitutes T
1Accelerating circuit, R
13And C
2Series connection constitutes T
2Accelerating circuit, R
14And C
3Series connection constitutes T
3Accelerating circuit, R
15And C
4Series connection constitutes T
4Accelerating circuit, R
16With L is to guarantee T
1, T
2The circuit of switching speed balance.
With the input buffering level is example, and the operation principle of accelerating circuit is described.
Suppose T
1Be in saturated T
2Be in by being initial condition, as the trailing edge arrival Q of input pulse signal
+The time, Q
+Current potential descends, because C
1On voltage can not suddenly change so R
12On electric current will undergo mutation.Because the speed of current break is exceedingly fast, the response speed of DC power supply is nowhere near, and mutation current will be at R
12→ C
1→ T
1Base stage → T
1Collector electrode → R
6→ R
8Last formation loop, thus take T away
1Stored charge on the collector electrode makes T
1Change cut-off state fast over to from saturation condition.
Suppose T
1Be in by T
2Be in the saturated initial condition that is, as the rising edge arrival Q of input pulse signal
+The time, Q
+Current potential rises, and makes T
1Saturated, A point current potential descends, Q
-The point current potential descends, because C
2On voltage can not suddenly change so R
13On electric current will undergo mutation.Because the speed of current break is exceedingly fast, the response speed of DC power supply is nowhere near, and mutation current will be at R
13→ C
2→ T
2Base stage → T
2Collector electrode → R
7→ R
8Last formation loop, thus take T away
2Stored charge on the collector electrode makes T
2Change cut-off state fast over to from saturation condition.
Claims (7)
1, a kind of high bit rate driver that is used for semiconductor laser and electroabsorption modulator comprises that employing is by T
1, T
2Two transistors and R
1～R
8The flip and flop generator of eight resistance formations replaces normally used differential amplifier as the input buffering level, adopts by T
3, T
4Two transistors and R
9～R
11The differential amplifier of three resistance formations is characterized in that as output stage the active device of this driver all adopts silicon bipolar transistor.
2, high bit rate driver according to claim 1 is characterized in that: be furnished with transistor switch in input buffering level and the output-stage circuit and quicken and the switching speed balancing circuitry.
3, high bit rate driver according to claim 2 is characterized in that the input buffering level has by R
12, C
1The accelerating circuit that constitutes, wherein R
12And C
1Be connected in parallel on T after the series connection again
1Between base stage and the power supply ground, by R
12, C
1, T
1, R
6, R
8T has been improved in the loop that constitutes
1Be transformed into the speed of cut-off state from saturation condition.
4, high bit rate driver according to claim 2 is characterized in that the input buffering level has by R
13, C
2The accelerating circuit that constitutes, wherein R
13And C
2Be connected in parallel on T after the series connection again
2Between base stage and the power supply ground, by R
13, C
2, T
2, R
7, R
8T has been improved in the loop that constitutes
2Be transformed into the speed of cut-off state from saturation condition.
5, high bit rate driver according to claim 2 is characterized in that the input buffering level has by R
16Be connected in parallel on R again after the L series connection
6The input buffering level switch balancing circuitry of last formation.
6, high bit rate driver according to claim 2 is characterized in that output stage has by R
14, C
3The accelerating circuit that constitutes, wherein R
14And C
3Be connected in parallel on T after the series connection again
3Between base stage and the power supply ground, by R
14, C
3, T
3, R
9T has been improved in the loop that constitutes
3Be transformed into the speed of cut-off state from saturation condition.
7, high bit rate driver according to claim 2 is characterized in that output stage has by R
15, C
4The accelerating circuit that constitutes, wherein R
15And C
4Be connected in parallel on T after the series connection again
4Between base stage and the power supply ground, by R
15, C
4, T
4, R
10T has been improved in the loop that constitutes
4Be transformed into the speed of cut-off state from saturation condition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN99107427A CN1127185C (en) | 1999-05-21 | 1999-05-21 | High bit rate driver for semiconductor laser device and electric acceptive modulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN99107427A CN1127185C (en) | 1999-05-21 | 1999-05-21 | High bit rate driver for semiconductor laser device and electric acceptive modulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1235345A CN1235345A (en) | 1999-11-17 |
| CN1127185C true CN1127185C (en) | 2003-11-05 |
Family
ID=5272756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN99107427A Expired - Fee Related CN1127185C (en) | 1999-05-21 | 1999-05-21 | High bit rate driver for semiconductor laser device and electric acceptive modulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1127185C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012141335A (en) * | 2010-12-28 | 2012-07-26 | Mitsubishi Electric Corp | Non-cooled optical semiconductor device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4709370A (en) * | 1985-06-17 | 1987-11-24 | Rca Corporation | Semiconductor laser driver circuit |
| US4748633A (en) * | 1986-05-09 | 1988-05-31 | Asahi Kogaku Kogyo Kabushiki Kaisha | Semiconductor laser drive circuit in laser beam printer |
| EP0309791A1 (en) * | 1987-09-21 | 1989-04-05 | Siemens Aktiengesellschaft | Fast control circuit for a semiconductor laser diode |
| EP0405952A2 (en) * | 1989-06-28 | 1991-01-02 | Sharp Kabushiki Kaisha | Semiconductor laser driving circuit |
| EP0628830A2 (en) * | 1993-06-11 | 1994-12-14 | Sumitomo Electric Industries, Ltd. | Reliability tester of semiconductor lasers |
-
1999
- 1999-05-21 CN CN99107427A patent/CN1127185C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4709370A (en) * | 1985-06-17 | 1987-11-24 | Rca Corporation | Semiconductor laser driver circuit |
| US4748633A (en) * | 1986-05-09 | 1988-05-31 | Asahi Kogaku Kogyo Kabushiki Kaisha | Semiconductor laser drive circuit in laser beam printer |
| EP0309791A1 (en) * | 1987-09-21 | 1989-04-05 | Siemens Aktiengesellschaft | Fast control circuit for a semiconductor laser diode |
| EP0405952A2 (en) * | 1989-06-28 | 1991-01-02 | Sharp Kabushiki Kaisha | Semiconductor laser driving circuit |
| EP0628830A2 (en) * | 1993-06-11 | 1994-12-14 | Sumitomo Electric Industries, Ltd. | Reliability tester of semiconductor lasers |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1235345A (en) | 1999-11-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE373846T1 (en) | METHOD FOR GENERATING A DFA AUTOMATIC WHICH GROUPS TRANSITIONS INTO CLASSES FOR MEMORY SAVING | |
| CN87105899A (en) | Drive the drive circuit of a light-emitting component by the sub-information signal of superposed simulation on digital main signal | |
| CN1921329A (en) | Power cord chopped wave communication transmitting-receiving circuit | |
| CN106535412B (en) | The digital simulation light adjusting circuit that a kind of port shares | |
| CN101040439A (en) | Low voltage, high-speed output-stage for laser or modulator driving | |
| CN1127185C (en) | High bit rate driver for semiconductor laser device and electric acceptive modulator | |
| CN100379184C (en) | Data transmission apparatus, photoelectric conversion circuit, and test apparatus | |
| CN105656473B (en) | A kind of drive circuit of the high amplitude of oscillation of high-speed suitable for silicon light modulators | |
| CN1527469A (en) | Switch power source driving control circuit | |
| CN1316763C (en) | Duty ratio adjustable high-speed optical return-to-zero code generation method and its equipment | |
| US4133981A (en) | Time correction circuit for a digital multiplexer | |
| CN107918043A (en) | A kind of experiment photoelectric converter | |
| CN209488445U (en) | A kind of driving circuit and driver | |
| Lin et al. | High-speed large-signal digital modulation of a 1.3 μm InGaAsP constricted mesa laser at a simulated bit rate of 16 Gbit/s | |
| CN106603046B (en) | Preemphasis circuit based on unidirectional regenerative comparator | |
| CN200953558Y (en) | Electric source wire chopping communication transmitting-receiving circuit | |
| CN217902274U (en) | Photoswitch array drive control system | |
| CN112964958B (en) | Reverse bias test method for high-power intelligent power module | |
| CN109218916A (en) | Loudspeaker driving circuit | |
| CN207557330U (en) | A kind of experiment photoelectric converter | |
| CN2138366Y (en) | General negative resistance IC circuit device | |
| CN217425972U (en) | Device capable of delaying and outputting fixed time control signal | |
| CN1146846C (en) | Grid pulse generator for color display tube | |
| JPH04275473A (en) | Laser diode driving circuit | |
| CN1142638C (en) | Laser interface front-end circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| REG | Reference to a national code |
Ref country code: HK Ref legal event code: GR Ref document number: 1055180 Country of ref document: HK |
|
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |