CN112711544B - Flash memory particle physical address fast addressing method of solid-state nonvolatile memory controller - Google Patents
Flash memory particle physical address fast addressing method of solid-state nonvolatile memory controller Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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Abstract
The invention provides a method for quickly addressing a flash memory particle physical address of a solid-state nonvolatile memory controller, wherein the physical address of a flash memory particle is completed by hardware; moreover, the bit width of each domain of the physical address is configurable, the accumulation sequence of each domain is also configurable, and bad blocks are automatically skipped. The process does not need software participation, does not influence the operation of the CPU at all, and can realize the maximization of the efficiency.
Description
Technical Field
The invention relates to the technical field of flash memory controllers, in particular to a flash memory particle physical address fast addressing method of a solid-state nonvolatile memory controller.
Background
The physical addresses required for data programming of a solid-state non-volatile memory controller are typically generated by software, for example as follows: the software selects the idle block first, then accumulates each domain of the physical address in sequence according to the order of the programming command, wherein the bad block needs to be skipped, and sends the complete programming command to the hardware module after generating the physical address corresponding to the programming command. The composition of the flash memory particle physical addresses of each brand may be different, the bit width of each domain is variable in order to adapt to various media by software, and a bad block is jumped, so that the link of generating the physical address by the software consumes much time, and hardware is required to accelerate the completion of the operation under the requirement of high performance. Since the CPU is burdened by the physical address generated for each programming, the CPU has less and less time requirement for processing each read/write command as the read/write bandwidth requirement of the solid-state nonvolatile memory controller increases, and it is significant to generate the physical address required for data programming by hardware.
Disclosure of Invention
Aiming at the problems, the invention provides a method for quickly addressing the physical address of the flash memory particle of the solid-state nonvolatile memory controller, wherein the physical address of the flash memory particle is completed by hardware; moreover, the bit width of each domain of the physical address is configurable, the accumulation sequence of each domain is also configurable, and bad blocks are automatically skipped. The process does not need software participation, does not influence the operation of the CPU at all, and can realize the maximization of the efficiency.
Specifically, in the method for fast addressing the flash memory particle physical address of the solid-state nonvolatile memory controller, a hardware module generates a physical address, wherein the physical address comprises a channel field, a lun field, a block field, a plane field and a page field; and configuring the accumulation sequence of the channel field, the lun field, the block field, the plane field and the page field in the physical address by means of configuration information.
Further, the bit width of the ID of each of the channel field, the lun field, the block field, the plane field, and the page field may be configured according to configuration information.
Further, the method for fast addressing the flash granule physical address of the solid-state nonvolatile memory controller can further comprise the steps of judging whether a bad block exists in the physical address or not and directly skipping the bad block.
Still further, the step of directly skipping the bad block includes:
step 1: accumulating the physical addresses of the bad blocks;
step 2: the accumulated result indexes the bad block table of the bad block according to the index numbers of the channel ID, the lunID and the plane ID;
if the bit of the bad block table is 1, judging that the bad block is a bad block, generating no legal value of the physical address and returning to the step 1, otherwise generating the legal value of the physical address and returning to the step 1 to continue accumulation.
Detailed Description
The following examples are provided by way of illustration in order to fully convey the spirit of the invention to those skilled in the art to which the invention pertains. Accordingly, the present invention is not limited to the embodiments disclosed herein.
As known to those skilled in the art, common physical addresses may include block addresses, lun addresses, plane addresses, page addresses, and column addresses. The column address is not provided during programming, but the controller generally uses multiple channels to improve the read/write performance, so the physical address generated at this time needs to indicate the channel number.
In the invention, the physical address generated by the hardware module finally has five fields of { channel, lun, block, plane, page }, wherein block id needs the hardware module to apply for.
The arrangement sequence of the physical addresses directly influences the programming performance and the size of the memory needing to cache the programming data, so that which domain is accumulated can be controlled according to actual conditions. For example, take 8 channels, 2 luns, 1024 blocks, 2 planes and 1024 pages, the first application for a block id of 0 as an example, where channel id is 3 bits, lun id is 1bit, block id is 1bit, plane id is 1bit, and page is 10 bits.
A common address accumulation method is to accumulate channel ids, then accumulate lun ids, then accumulate plane ids, and finally accumulate page ids, and switch block numbers after all accumulation is completed.
<xnotran> { channel, lun, block, plane, page } , block id 0, {0,0,0,0,0}, {1,0,0,0,0},... {8,0,0,0,0}, 9 {0,1,0,0,0}, 10 {1,1,0,0,0}, 16 {8,1,0,0,0}, , block 0 {8,1,0,1, 1023}. </xnotran> And after the physical address of block 0 is accumulated, accumulating the next round according to the newly applied block id in the same way as the block 0.
Another common method for accumulating addresses is to add a plane first under the current channel and switch channels after the plane is added, and the remaining accumulation rule is similar to the previous method. Therefore, the accumulating sequence of each domain of the module is required to be configurable, and the domain is determined to be accumulated firstly through configuration information, such as whether channel id or plane id is accumulated firstly or the ids of other domains. Meanwhile, the bit widths of the page id and the block id are also not fixed, so that the non-fixed bit widths also need to be configurable.
In addition, it is necessary to determine whether the current physical address is a bad block during the accumulation process. If the block is bad, the block is not a valid physical address and is directly skipped.
Therefore, the method of the present invention further comprises the step of reading the bad block table, wherein the bad block table is generally stored in a rule of { channel, lun, plane }. Taking block 0 as an example, if block 0 of channel 0, lun 1 and plane 1 is a bad block, the bit corresponding to the bad block table {0, 1} is set to 1.
The process of skipping bad blocks may be as follows:
step 1: accumulating the physical addresses of block 0 according to a rule;
and 2, step: the accumulated result indexes a bad block table of block 0 according to the index numbers of channel id, lun id and plane id;
and if the bit of the corresponding id bad block table is 1, indicating that the block is a bad block, not generating valid of the physical address, and jumping back to the step 1, otherwise, generating valid of the physical address, and simultaneously jumping back to the step 1 to continue accumulation.
In the addressing method of the invention, the physical address of the flash memory grain is completed by hardware; moreover, the bit width of each domain of the physical address is configurable, the accumulation sequence of each domain is also configurable, and bad blocks are automatically skipped. The process does not need software participation, does not influence the operation of the CPU at all, and can realize the maximization of the efficiency.
Although the present invention has been described in terms of specific embodiments, those skilled in the art will readily appreciate that the above-described embodiments are meant to be illustrative only and not limiting as to the scope of the invention which is to be given the full breadth of the appended claims and any and all variations thereof without departing from the spirit and scope of the present invention.
Claims (1)
1. A flash memory particle physical address fast addressing method of a solid-state nonvolatile memory controller is disclosed, wherein a hardware module generates a physical address, and the physical address has a channel field, a lun field, a block field, a plane field and a page field; configuring the accumulation sequence of the channel field, the lun field, the block field, the plane field and the page field in the physical address by means of configuration information;
the bit width of the ID of each of the channel domain, the lun domain, the block domain, the plane domain and the page domain can be configured according to configuration information;
the method also comprises a step of judging whether the physical address has a bad block or not, and a step of directly skipping the bad block;
the step of directly skipping the bad block comprises:
step 1: accumulating the physical addresses of the bad blocks;
step 2: the accumulated result indexes a bad block table of the bad block according to the channel ID, the lunID and the plane ID as index numbers;
if the bit of the bad block table is 1, judging that the bad block is a bad block, generating no legal value of the physical address and returning to the step 1, otherwise generating the legal value of the physical address and returning to the step 1 to continue accumulation.
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