CN112703551A

CN112703551A - Pixel circuit, driving method and display panel

Info

Publication number: CN112703551A
Application number: CN201880096037.5A
Authority: CN
Inventors: 吴焕达; 张祖强
Original assignee: Shenzhen Royole Technologies Co Ltd
Current assignee: Shenzhen Royole Technologies Co Ltd
Priority date: 2018-11-23
Filing date: 2018-11-23
Publication date: 2021-04-23
Also published as: WO2020103132A1

Abstract

A pixel circuit, a driving method and a display panel, the pixel circuit comprises an input module (10), a compensation module (30), a driving module (20) and a light-emitting module (50); the first end of the input module (10) is connected with an input signal, and the second end of the input module (10) is connected with the first end of the driving module (20); the first end of the light emitting module (50) is connected with the high level input End (ELVDD), and the second end of the light emitting module (50) is connected with the second end of the driving module (20); the third end of the driving module (20) is connected with the first end of the compensation module (30), and the fourth end of the driving module (20) is connected with the low level input End (ELVSS); the second end of the compensation module (30) is connected with the low-level input End (ELVSS); an input module (10) for inputting a reference voltage (Vref) according to a second Scan signal (Scan2) and a data voltage (Vdata) according to a first Scan signal (Scan 1); the compensation module (30) is used for compensating the driving module (20) when the circuit is conducted; the driving module (20) is used for outputting a driving signal when being conducted so as to drive the light emitting module (50) to emit light; the input signal includes a reference voltage (Vref) and a data voltage (Vdata). The pixel circuit can improve the threshold voltage drift compensation of driving and the brightness uniformity.

Description

Pixel circuit, driving method and display panel

Technical Field

The present invention relates to the field of driving of display panels, and more particularly, to a pixel circuit, a driving method and a display panel.

Background

The pixel circuit in the AMOLED display may be formed in a structure of 4T2C, i.e., a conventional pixel circuit may be formed of four TFTs (thin film transistors), two capacitors, and one light emitting diode.

As shown in fig. 1, is a circuit schematic diagram of a conventional 4T 2C. The specific working principle is as follows: when Rn (reset signal) is high and En (enable signal) is high, the transistors T1 and T3 are turned on, the transistors T2 and T4 are turned off, and Int (input signal) resets the N1 node. Gn (scan signal) is high, Rn is low, and En is high, the transistor T2, the transistor T3, and the transistor T4 are turned on, the transistor T1 is turned off, Data (Data signal) transmits ref (reference) potential to the N2 node, and the N1 node potential is ref-Vth, where Vth is the threshold voltage of the transistor T4. When Gn is high and En is low, the transistor T2 and the transistor T4 are turned on, the transistor T1 and the transistor T3 are turned off, and Data transfers a Data potential to the N1 node. When En is high and Gn/Rn is low, the transistor T3 and the transistor T4 are turned on, the transistor T1 and the transistor T2 are turned off, VDD charges the N1 node, and the diode emits light.

However, the conventional 4T2C structure has a limited effect of compensating for the threshold voltage shift of the driving transistor T4, and the luminance uniformity of the display screen of the entire display panel is poor.

Technical problem

The present invention is directed to a pixel circuit, a driving method and a display panel, which can improve the threshold voltage drift compensation of a driving transistor and improve the uniformity of a display bright background.

Technical solution

The technical scheme adopted by the invention for solving the technical problems is as follows: a pixel circuit is provided, which comprises an input module, a compensation module, a driving module and a light-emitting module;

the first end of the input module is connected with an input signal, and the second end of the input module is connected with the first end of the driving module;

the first end of the light-emitting module is connected with the high-level input end, and the second end of the light-emitting module is connected with the second end of the driving module; the third end of the driving module is connected with the first end of the compensation module, and the fourth end of the driving module is connected with the low level input end; the second end of the compensation module is connected with the low level input end;

the input module is used for inputting a reference voltage according to a second scanning signal and inputting a data voltage according to a first scanning signal; the compensation module is used for compensating the driving module when the driving module is conducted; the driving module is used for outputting a driving signal when being conducted so as to drive the light emitting module to emit light; wherein the input signal includes the reference voltage and the data voltage.

The invention also provides a display panel comprising the pixel circuit.

The invention also provides a pixel circuit, which comprises a first node, a second node, a compensation capacitor connected with the first node, a fifth transistor and a driving transistor;

the grid electrode of the driving transistor is connected with the first node, the drain electrode of the driving transistor is connected with the second electrode of the light-emitting module through the fifth transistor, and the first electrode of the light-emitting module is connected with the high-level input end; the source electrode of the driving transistor is used for outputting driving current to the low-level input end;

in a driving period of the pixel circuit, the voltage of the second node at the second stage is a data voltage Vdata, the voltage at the third stage is VSS, and VSS is a low-level voltage received by the low-level input terminal;

the voltage of the first node in the third stage is Vdata + Vth, wherein Vth is the threshold voltage of the driving transistor;

the driving current output by the driving transistor satisfies the formula I = K (Vdata-VSS)²Where K is a parameter independent of the input voltage.

Advantageous effects

The invention has the beneficial effects that: the pixel circuit performs voltage compensation on the driving module in a non-coupling compensation mode, so that the driving threshold voltage drift compensation can be effectively improved, and the uniformity of the display brightness of the display panel is improved. In addition, the pixel circuit has a simple structure and small occupied area.

Drawings

The invention will be further described with reference to the accompanying drawings and examples, in which:

FIG. 1 is a circuit schematic of a conventional 4T 2C;

FIG. 2 is a circuit diagram of a first embodiment of a pixel circuit provided by the present invention;

FIG. 3 is a timing diagram of the pixel circuit of FIG. 2 in accordance with the present invention;

FIG. 4 is a circuit diagram of a second embodiment of a pixel circuit provided by the present invention;

fig. 5 is a flow chart of a driving method of a pixel circuit provided by the present invention.

Best mode for carrying out the invention

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 2 is a circuit diagram of a first embodiment of a pixel circuit provided in the present invention, where the pixel circuit can be applied to a display panel, and can be specifically disposed in a light-emitting region of the display panel. The display panel includes, but is not limited to, an AMOLED display panel, a TFT-LCD display panel, an LED display panel, and the like.

As shown in fig. 2, the pixel circuit includes an input module 10, a compensation module 30, a driving module 20, and a light emitting module 50.

A first end of the input module 10 is connected with an input signal, and a second end of the input module 10 is connected with a first end of the driving module 20; a first terminal of the light emitting module 50 is connected to the high level input terminal (ELVDD), and a second terminal of the light emitting module 50 is connected to the second terminal of the driving module 20; the third end of the driving module 20 is connected to the first end of the compensation module 30, and the fourth end of the driving module 20 is connected to the low level input terminal (ELVSS); a second terminal of the compensation module 30 is connected to the low level input terminal (ELVSS).

Wherein, the input module 10 is used for inputting a reference voltage (Vref) according to the second Scan signal (Scan2) and inputting a data voltage (Vdata) according to the first Scan signal (Scan 1); the compensation module 30 is used for compensating the driving module 20 when the circuit is switched on; the driving module 20 is configured to output a driving signal when being turned on to drive the light emitting module 50 to emit light. In the present embodiment, the input signal includes a reference voltage (Vref) and a data voltage (Vdata), and the reference voltage (Vref) is greater than the data voltage (Vdata). The high level input terminal (ELVDD) is for receiving a high level input Voltage (VDD), and the low level input terminal (ELVSS) is for receiving a low level input Voltage (VSS).

Further, the pixel circuit may further include a switch module 40, where the switch module 40 is turned on according to a fourth Scan signal (Scan 4) to enable the driving module 20 and the light emitting module 50 to form a light emitting loop, and control the light emitting module 50 to emit light.

Wherein, the on or off of the compensation module 30 is controlled by the third Scan signal (Scan 3).

Here, the first Scan signal (Scan1), the second Scan signal (Scan2), the third Scan signal (Scan 3), and the fourth Scan signal (Scan 4) are timing control signals of the pixel circuit, and the Scan signals may be generated by other circuits inside the display panel or may be provided by an IC outside the display panel. The present invention is not particularly limited.

As shown in fig. 2, in the present embodiment, the input module 10 includes: a second transistor T2 and a third transistor T3.

A first electrode of the second transistor T2 is connected to the second electrode of the driving transistor T1, a second electrode of the second transistor T2 is connected to the input signal, and a third electrode of the second transistor T2 is connected to the first Scan signal (Scan 1); a first electrode of the third transistor T3 is connected to a first electrode of the driving transistor T1, a second electrode of the third transistor T3 is connected to a second electrode of the second transistor T2, and a third electrode of the third transistor T3 is connected to a second Scan signal (Scan 2); the first electrode of the second transistor T2 and the first electrode of the third transistor T3 form a second terminal of the input module 10, and the second electrode of the second transistor T2 and the second electrode of the third transistor T3 are connected to the shorted connection terminal to form a first terminal of the input module 10.

In the present embodiment, the driving module 20 includes a driving transistor T1.

The first electrode of the driving transistor T1 is connected to the second electrode of the fifth transistor T5 as the second terminal of the driving module 20, the second electrode of the driving transistor T1 is connected to the first electrode of the sixth transistor T6 as the fourth terminal of the driving module 20, and the third electrode of the driving transistor T1 is connected to the first terminal of the compensation module 30 as the third terminal of the driving module 20 (i.e., as shown in fig. 2, the third electrode of the driving transistor T1 is connected to the first terminal of the compensation capacitor).

Wherein the first electrode and the second electrode of the driving transistor T1 are independently connected to the second terminal of the input module 10, respectively, wherein the first electrode and the second electrode of the driving transistor T1 form the first terminal of the driving module 20. That is, as shown in fig. 2, the first electrode of the driving transistor T1 is connected to the first electrode of the third transistor T3, and the second electrode of the driving transistor T1 is connected to the first electrode of the second transistor T2 and the first electrode of the sixth transistor T6.

Further, the driving transistor T1 is an N-type MOS transistor, the first electrode of the N-type driving transistor T1 is the drain thereof, the second electrode of the N-type driving transistor T1 is the source thereof, and the third electrode of the N-type driving transistor T1 is the gate thereof.

In the present embodiment, the switching module 40 includes a fifth transistor T5 and a sixth transistor T6.

A first electrode of the fifth transistor T5 is connected to the second terminal of the light emitting module 50, a second electrode of the fifth transistor T5 is connected to the second terminal of the driving module 20 (i.e., the first electrode of the driving transistor T1), and a third electrode of the fifth transistor T5 is connected to the fourth Scan signal (Scan 4); a first electrode of the sixth transistor T6 is connected to the fourth terminal of the driving module 20 (i.e., the second electrode of the driving transistor T1), a second electrode of the sixth transistor T6 is connected to the low level input terminal (ELVSS), and a third electrode of the sixth transistor T6 is connected to the fourth Scan signal (Scan 4).

In this embodiment, the compensation module 30 includes a compensation capacitor and a fourth transistor T4.

A first terminal of the compensation capacitor is connected to the first electrode of the fourth transistor T4, and a second terminal of the compensation capacitor is connected to the low level input terminal (ELVSS); the second electrode of the fourth transistor T4 is connected to the second terminal of the driving module 20 (i.e., the first electrode of the driving transistor T1), and the connection node between the first electrode of the fourth transistor T4 and the first terminal of the compensation capacitor is connected to the third terminal of the driving module 20 (i.e., the third electrode of the driving transistor T1) as the first terminal of the compensation module 30. Here, the second terminal of the compensation capacitor is the second terminal of the compensation module 30.

In this embodiment, the light emitting module 50 may be a light emitting diode (OLED).

Optionally, in this embodiment, the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are all N-type MOS transistors. At this time, the timing control of the pixel circuit is as shown in fig. 3. Of course, it is understood that in some other embodiments, the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are all P-type MOS transistors. When the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are P-type MOS transistors, the potential of the timing control of the pixel circuit is just inverted from the potential shown in fig. 3. Alternatively, in some other embodiments, the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 may be an N-type MOS transistor and a P-type MOS transistor, which intersect with each other, that is, there are an N-type MOS transistor and a P-type MOS transistor in the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6.

Further, in this embodiment, the pixel circuit includes three stages, namely, a first stage, a second stage, and a third stage. The first phase is an initialization phase, the second phase is a threshold voltage (Vth) compensation phase of the driving transistor T1, and the third phase is a light emitting phase of the light emitting module 50.

Optionally, in the present embodiment, in the first stage, the third transistor T3 and the fourth transistor T4 are turned on, and the fifth transistor T5 and the sixth transistor T6 are turned off; the compensation capacitor is charged with the reference voltage (Vref) through the third transistor T3 and the fourth transistor T4, and the voltage of the third electrode of the driving transistor T1 is the reference voltage (Vref).

In the second stage, the second transistor T2, the fourth transistor T4, and the driving transistor T1 are turned on, and the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are turned off; a data voltage (Vdata) is input to the second electrode of the driving transistor T1 through the second transistor T2, so that the second electrode voltage of the driving transistor T1 is the data voltage (Vdata); the compensation capacitor is discharged through the fourth transistor T4 and the driving transistor T1, and outputs a discharge current to an external circuit through the second transistor T2. The external circuit here may be other circuits inside the display panel, or an external IC of the display panel.

In the third stage, the second transistor T2, the third transistor T3, and the fourth transistor T4 are turned off, and the fifth transistor T5, the sixth transistor T6, and the driving transistor T1 are turned on; the driving current is input to the low level input terminal (ELVSS) through the light emitting module 50, the fifth transistor T5, the driving transistor T1, and the sixth transistor T6.

The operation principle of the pixel circuit of the present embodiment will be described with reference to fig. 3.

In this embodiment, the driving transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5 and the sixth transistor T6 are all N-type MOS transistors.

As shown in fig. 2:

in the first stage (initialization stage), the first Scan signal (Scan1) and the fourth Scan signal (Scan 4) are both at a low level, and the second Scan signal (Scan2) and the third Scan signal (Scan 3) are both at a high level, at this time, the third transistor T3 and the fourth transistor T4 are turned on, and the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the driving transistor T1 are all turned off; the reference voltage (Vref) is input to the compensation capacitor C1 from the third transistor T3 and the fourth transistor T4, and when the charging is finished, the voltage of the third electrode (gate) of the driving transistor T1 becomes the reference voltage (Vref), and the initialization of the driving transistor T1 is completed.

In the second stage (compensation stage), the first Scan signal (Scan1) and the third Scan signal (Scan 3) are both at a high level, the second Scan signal (Scan2) and the fourth Scan signal (Scan 4) are both at a low level, at this time, the second transistor T2 and the fourth transistor T4 are turned on, and the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are turned off; at this time, the data voltage (Vdata) is input to the second electrode (source) of the driving transistor T1 through the second transistor T2, the source voltage of the driving transistor T1 is equal to the data voltage (Vdata) (i.e., Vs = Vdata), while the third electrode (gate) voltage of the driving transistor T1 is the reference voltage (Vref), and the reference voltage (Vref) is greater than the data voltage (Vdata), so the driving transistor T1 is turned on. Further, at this time, the compensation capacitor is in a discharging state, a discharging current thereof is output to the external circuit through the fourth transistor T4, the drain of the driving transistor T1 to the source, and then through the second transistor T2 until a voltage difference between the gate voltage and the source voltage of the driving transistor T1 is equal to a threshold voltage (Vth) thereof, the driving transistor T1 is turned off, and the compensation capacitor stops discharging, at this time, the gate voltage Vg = Vdata + Vth of the driving transistor T1, and the threshold voltage (Vth) compensation of the driving transistor T1 is completed.

In the third stage (light-emitting display stage), the first Scan signal (Scan1), the second Scan signal (Scan2), and the third Scan signal (Scan 3) are all at low level, and the fourth Scan signal (Scan 4) is at high level; at this time, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all turned off, the fifth transistor T5 and the sixth transistor T6 are turned on, and since the sixth transistor T6 is turned on, the source voltage of the driving transistor T1 is pulled down to the low-level input Voltage (VSS) (i.e., Vs = VSS), and therefore, the driving transistor T1 is also turned on, and the driving transistor T1 operates in a saturated state, and it is known from characteristics of the transistors that a driving current flowing through the light emitting diode satisfies:

I=K（Vgs-Vth） ²

= K（（Vdata+Vth-VSS）-Vth） ²

=K（Vdata -VSS） ²。

it can be seen that the driving current flowing through the light emitting diode is only affected by the data voltage (Vdata) and the low level input Voltage (VSS) and has no relation with the threshold voltage (Vth) of the driving transistor T1, thereby effectively solving the problem of limited drift compensation of the threshold voltage (Vth) of the driving transistor T1 and improving the uniformity of the display screen.

Fig. 4 is a circuit diagram of a second embodiment of a pixel circuit provided in the present invention, and the pixel circuit of this embodiment also includes an input module 10, a driving module 20, a switching module 40, and a compensation module 30. The driving module 20, the switching module 40 and the compensation module 30 are the same as those of the first embodiment, and the second electrode of the third transistor T3 in the input module 10 is separated from the second electrode of the second transistor T2 and is independently connected to an external circuit, wherein the second electrode of the third transistor T3 receives the reference voltage (Vref) and the second electrode of the second transistor T2 receives the data voltage (Vdata).

Similarly, the operation principle of the pixel circuit of this embodiment is the same as that of the first embodiment, and is not described herein again.

The invention also provides a display panel which comprises the pixel circuit of the above embodiment. The display panel includes, but is not limited to, an AMOLED display panel, a TFT-LCD display panel, an LED display panel, and the like.

The present invention also provides a pixel circuit including a first node, a second node, a compensation capacitor connected to the first node, a fifth transistor T5, and a driving transistor T1.

A gate electrode of the driving transistor T1 is connected to the first node, a drain electrode of the driving transistor T1 is connected to the second electrode of the light emitting module 50 through the fifth transistor T5, and a first electrode of the light emitting module 50 is connected to the high level input terminal (ELVDD); the source of the driving transistor T1 is used to output a driving current to the low level input terminal (ELVSS).

In one driving period of the pixel circuit, the voltage of the second node in the second stage is a data voltage (Vdata) Vdata, the voltage in the third stage is VSS, and VSS is a low-level voltage received by the low-level input terminal (ELVSS); the voltage of the first node in the third stage is Vdata + Vth, where Vth is the threshold voltage of the driving transistor T1.

The driving current outputted from the driving transistor T1 satisfies the formula I = K (Vdata-VSS)²Where K is a parameter independent of the input voltage.

Further, in the first stage, the first node voltage is a reference voltage (Vref), and the initialization of the driving transistor T1 is completed by inputting the reference voltage (Vref).

The invention also provides a driving method of the pixel circuit, which can be applied to the pixel circuit.

As shown in fig. 5, the driving method of the pixel circuit includes the steps of:

in step S501, in the first stage, the input module 10 is turned on according to the second Scan signal (Scan2) and receives the input reference voltage (Vref), so as to complete initialization of the driving module 20.

Specifically, as shown in fig. 2, in the first stage, the first Scan signal (Scan1) and the fourth Scan signal (Scan 4) are both at a low level, and the second Scan signal (Scan2) and the third Scan signal (Scan 3) are both at a high level, at this time, the third transistor T3 in the input module 10 and the fourth transistor T4 in the compensation module 30 are both turned on, and the second transistor T2 in the input module 10, the fifth transistor T5 and the sixth transistor T6 in the switch module 40, and the driving transistor T1 in the driving module 20 are all turned off. The reference voltage (Vref) is input to the compensation capacitor C1 from the third transistor T3 and the fourth transistor T4, and when the charging is finished, the voltage of the third electrode (gate) of the driving transistor T1 becomes the reference voltage (Vref), and the initialization of the driving transistor T1 is completed.

In the second stage, in step S502, the input module 10 inputs the data voltage (Vdata) according to the first Scan signal (Scan1), and the compensation module 30 is turned on according to the third Scan signal (Scan 3) to perform compensation on the driving module 20.

The first Scan signal (Scan1) and the third Scan signal (Scan 3) are both at a high level, and the second Scan signal (Scan2) and the fourth Scan signal (Scan 4) are both at a low level, at which time the second transistor T2 and the fourth transistor T4 are turned on, and the third transistor T3, the fifth transistor T5, and the sixth transistor T6 are turned off; at this time, the data voltage (Vdata) is input to the second electrode (source) of the driving transistor T1 through the second transistor T2, the source voltage of the driving transistor T1 is equal to the data voltage (Vdata) (i.e., Vs = Vdata), while the third electrode (gate) voltage of the driving transistor T1 is the reference voltage (Vref), and the reference voltage (Vref) is greater than the data voltage (Vdata), so the driving transistor T1 is turned on. Further, at this time, the compensation capacitor is in a discharging state, a discharging current thereof is output to the external circuit through the fourth transistor T4, the drain of the driving transistor T1 to the source, and then through the second transistor T2 until a voltage difference between the gate voltage and the source voltage of the driving transistor T1 is equal to a threshold voltage (Vth) thereof, the driving transistor T1 is turned off, and the compensation capacitor stops discharging, at this time, the gate voltage Vg = Vdata + Vth of the driving transistor T1, and the threshold voltage (Vth) compensation of the driving transistor T1 is completed.

In step S503, in the third stage, the driving module 20 is turned on to form a driving loop, so that the driving current flows through the light emitting module 50 to control the light emitting module 50 to emit light.

The first Scan signal (Scan1), the second Scan signal (Scan2), and the third Scan signal (Scan 3) are all at low level, and the fourth Scan signal (Scan 4) is at high level; at this time, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all turned off, the fifth transistor T5 and the sixth transistor T6 are turned on, and the sixth transistor T6 is turned on, so that the source voltage of the driving transistor T1 is pulled down to the low-level input Voltage (VSS) (i.e., Vs = VSS), and therefore, the driving transistor T1 is also turned on, and the driving current sequentially flows through the light emitting module 50, the fifth transistor T5, the driving transistor T1, and the sixth transistor T6, and the light emitting module 50 emits light under the control of the driving current.

The above embodiments are merely illustrative of the technical ideas and features of the present invention, and are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the scope of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention should be covered by the claims of the present invention.

It will be understood that modifications and variations can be made by persons skilled in the art in light of the above teachings and all such modifications and variations are intended to be included within the scope of the invention as defined in the appended claims.

Claims

A pixel circuit is characterized by comprising an input module, a compensation module, a driving module and a light-emitting module;

the first end of the input module is connected with an input signal, and the second end of the input module is connected with the first end of the driving module;

the first end of the light-emitting module is connected with the high-level input end, and the second end of the light-emitting module is connected with the second end of the driving module; the third end of the driving module is connected with the first end of the compensation module, and the fourth end of the driving module is connected with the low level input end; the second end of the compensation module is connected with the low level input end;

the input module is used for inputting a reference voltage according to a second scanning signal and inputting a data voltage according to a first scanning signal; the compensation module is used for compensating the driving module when the driving module is conducted; the driving module is used for outputting a driving signal when being conducted so as to drive the light emitting module to emit light; wherein the input signal includes the reference voltage and the data voltage.
The pixel circuit according to claim 1, further comprising a switching module;

the switch module is used for being conducted according to a fourth scanning signal, so that the driving module and the light-emitting module form a light-emitting loop and control the light-emitting module to emit light.
The pixel circuit according to claim 2, wherein the switching module comprises a fifth transistor and a sixth transistor;

a first electrode of the fifth transistor is connected to the second end of the light emitting module, a second electrode of the fifth transistor is connected to the second end of the driving module, and a third electrode of the fifth transistor is connected to the fourth scan signal;

a first electrode of the sixth transistor is connected to the fourth end of the driving module, a second electrode of the sixth transistor is connected to the low-level input terminal, and a third electrode of the sixth transistor is connected to the fourth scan signal.
The pixel circuit according to claim 3, wherein the driving module comprises a driving transistor;

a first electrode of the driving transistor is used as a second end of the driving module and connected with a second electrode of the fifth transistor, a second electrode of the driving transistor is used as a fourth end of the driving module and connected with a first electrode of the sixth transistor, and a third electrode of the driving transistor is used as a third end of the driving module and connected with a first end of the compensation module;

the first electrode and the second electrode of the driving transistor are respectively and independently connected to the second end of the input module, wherein the first electrode and the second electrode of the driving transistor form the first end of the driving module.
The pixel circuit according to claim 4, wherein the input block comprises a second transistor and a third transistor;

a first electrode of the second transistor is connected with a second electrode of the driving transistor, a second electrode of the second transistor is connected with the input signal, and a third electrode of the second transistor is connected with the first scanning signal;

a first electrode of the third transistor is connected with the first electrode of the driving transistor, a second electrode of the third transistor is connected with the second electrode of the second transistor, and a third electrode of the third transistor is connected with the second scanning signal;

the first electrode of the second transistor and the first electrode of the third transistor form a second end of the input module, and the second electrode of the second transistor and the second electrode of the third transistor are connected with a short-circuited connecting end to form the first end of the input module.
The pixel circuit according to claim 4, wherein the input block comprises a second transistor and a third transistor;

a first electrode of the second transistor is connected with a second electrode of the driving transistor, a second electrode of the second transistor is connected with the data voltage, and a third electrode of the second transistor is connected with the first scanning signal;

a first electrode of the third transistor is connected with the first electrode of the driving transistor, a second electrode of the third transistor is connected with the reference voltage, and a third electrode of the third transistor is connected with the second scanning signal;

a first electrode of the second transistor and a first electrode of the third transistor form a second terminal of the input module, and a second electrode of the second transistor and a second electrode of the third transistor form a first terminal of the input module.
The pixel circuit according to claim 5 or 6, wherein the compensation module comprises a compensation capacitor and a fourth transistor;

a first end of the compensation capacitor is connected with the first electrode of the fourth transistor, and a second end of the compensation capacitor is connected with the low-level input end; a second electrode of the fourth transistor is connected with the second end of the driving module, and a connection end point of the first electrode of the fourth transistor and the first end of the compensation capacitor is used as the first end of the compensation module to be connected with the third end of the driving module;

and the second end of the compensation capacitor is the second end of the compensation module.
The pixel circuit according to claim 7, wherein the driving transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all N-type MOS transistors;

or, the driving transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor are all P-type MOS transistors.
The pixel circuit according to claim 7, wherein in a first phase, the third transistor and the fourth transistor are turned on, and the fifth transistor and the sixth transistor are turned off;

the reference voltage charges the compensation capacitor through the third transistor and the fourth transistor, and the voltage of the third electrode of the driving transistor is the reference voltage.
The pixel circuit according to claim 9, wherein in a second phase, the second transistor, the fourth transistor, and the driving transistor are turned on, and the third transistor, the fifth transistor, and the sixth transistor are turned off;

the data voltage is input to the second electrode of the driving transistor through the second transistor, so that the second electrode voltage of the driving transistor is the data voltage;

the compensation capacitor is discharged through the fourth transistor and the driving transistor, and outputs a discharge current to an external circuit through the second transistor.
The pixel circuit according to claim 10, wherein in a third stage, the second transistor, the third transistor, and the fourth transistor are off, and the fifth transistor, the sixth transistor, and the driving transistor are on;

the driving current is input to the low level input terminal through the light emitting module, the fifth transistor, the driving transistor, and the sixth transistor.
The pixel circuit according to claim 11, wherein the first, second, and third phases are one driving cycle of the pixel circuit.
The pixel circuit of claim 1, wherein the reference voltage is greater than the data voltage.
A pixel circuit comprises a first node, a second node, a compensation capacitor connected with the first node, a fifth transistor and a driving transistor;

the grid electrode of the driving transistor is connected with the first node, the drain electrode of the driving transistor is connected with the second electrode of the light-emitting module through the fifth transistor, and the first electrode of the light-emitting module is connected with the high-level input end; the source electrode of the driving transistor is used for outputting driving current to the low-level input end;

in a driving period of the pixel circuit, the voltage of the second node at the second stage is a data voltage Vdata, the voltage at the third stage is VSS, and VSS is a low-level voltage received by the low-level input terminal;

the voltage of the first node in the third stage is Vdata + Vth, wherein Vth is the threshold voltage of the driving transistor;

the driving current output by the driving transistor satisfies the formula I = K (Vdata-VSS)²Where K is a parameter independent of the input voltage.
A driving method of a pixel circuit applied to the pixel circuit according to any one of claims 1 to 13, comprising:

in the first stage, the input module is conducted according to the second scanning signal and receives input reference voltage to complete initialization of the driving module;

in the second stage, the input module inputs data voltage according to the first scanning signal, and the compensation module conducts and executes compensation on the driving module according to the third scanning signal;

in the third stage, the driving module is turned on to form a driving loop, so that the driving current flows through the light emitting module to control the light emitting module to emit light.
A display panel comprising the pixel circuit according to any one of claims 1 to 14.