CN112702816B

CN112702816B - Output overvoltage protection circuit and corresponding LED lighting driving circuit

Info

Publication number: CN112702816B
Application number: CN201910986240.6A
Authority: CN
Inventors: 刘玉芳; 丁增伟; 彭云武; 刘君; 吴君磊
Original assignee: CRM ICBG Wuxi Co Ltd
Current assignee: CRM ICBG Wuxi Co Ltd
Priority date: 2019-10-17
Filing date: 2019-10-17
Publication date: 2022-07-05
Anticipated expiration: 2039-10-17
Also published as: CN112702816A

Abstract

The invention relates to an output overvoltage protection circuit and a corresponding LED lighting drive circuit, wherein an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module are arranged in the output overvoltage protection circuit, so that a circuit applying the output overvoltage protection circuit can be closed and restarted when the output voltage exceeds a certain value, meanwhile, because the arc detection circuit module is arranged, whether the circuit applying the output overvoltage protection circuit has a creepage ignition condition is judged by judging whether the output voltage is smaller than a preset voltage value, and when the creepage ignition frequency exceeds a preset frequency, a drive switch is locked, so that the risk caused by repeated starting of the circuit applying the output overvoltage protection circuit is avoided, and the circuit applying the output overvoltage protection circuit can not be driven to work again until a power supply is cut off. By adopting the output overvoltage protection circuit and the corresponding LED lighting driving circuit, the safety factor can be improved, and potential safety hazards can be avoided.

Description

Output overvoltage protection circuit and corresponding LED lighting driving circuit

Technical Field

The invention relates to the field of electricity, in particular to the field of circuit protection, and particularly relates to an output overvoltage protection circuit and a corresponding LED lighting driving circuit.

Background

In some circuits, when operating, the output voltage of the circuits may increase to be similar to the input line voltage due to no-load or load damage, which may cause damage to other devices in the circuits. However, when the output terminal of the circuit in the prior art is open, the circuit may be repeatedly restarted without stop, which may cause some safety hazards.

For convenience of explanation, the following description will be given taking an LED lighting driving circuit as an example:

in the application of the LED lighting driving circuit, the output voltage may increase to be similar to the input line voltage due to no load or damage of the LED light emitting chip, which may damage the output capacitor or burn out the LED light emitting chip when the LED light emitting chip is connected. Therefore, in the prior art, an output overvoltage protection circuit is designed in an LED lighting driving circuit, so that when the output voltage exceeds a certain value, the driving chip is turned off and restarted, and thus other devices in the circuit cannot be damaged due to the overhigh output voltage.

However, when the output is open due to the damage of the light source board (i.e., the LED light emitting chip), the output overvoltage protection circuit drives the LED lighting driving circuit to restart continuously, so that the small gap of the loaded light source board climbs to strike a fire, and finally the light source board burns to strike a fire, which causes a potential safety hazard.

Fig. 1 is a circuit diagram of a prior art LED lighting driving circuit, which is a non-isolated LED driving circuit with an auxiliary winding.

As shown in fig. 1, a prior art LED lighting driving circuit includes a power module, capacitors C3, C4, C5, resistors R3, R4, R5, R6, R7, and R_CSThe LED driving circuit comprises diodes D1 and D2, a power switch tube M1, a transformer T1, an LED light-emitting chip and an output overvoltage protection circuit, wherein a module connected with the control end of the power switch tube M1 is the output overvoltage protection circuit.

The capacitor C5 is connected in parallel to two ends of the power module, the resistor R4 is connected in series with the capacitor C3 and then connected in parallel to two ends of the capacitor C5, one end of the capacitor C3, which is not connected with the resistor R4, is grounded, one end of the resistor R4, which is not connected with the capacitor C3, is connected with the cathode of the diode D2, and the anode of the diode D2 is connected with the dotted end of the primary coil of the transformer and the drain of the power switch tube M1; two ends of a capacitor C4 are respectively connected with the cathode of the diode D2 and the synonym end of the primary coil of the transformer, a resistor R5 is connected in parallel with two ends of a capacitor C4, and an LED light-emitting chip is connected in parallel with two ends of a resistor R5; the source electrode of the power switch tube M1 is grounded through the point-in Rcs;

as shown in fig. 1, the output overvoltage protection circuit includes: a power supply terminal VCC, a zero current detection input terminal ZCD (ZCD is an initial of zero current detection), a gate drive output terminal GD (GD is an initial of gate driver), a current detection input terminal CS (CS is an initial of current sense), and a ground terminal GND;

in the LED lighting driving circuit, a gate driving output end GD of an output overvoltage protection circuit is connected with a control end of a power switch tube M1, a ground end GND is grounded, a current detection input end CS is connected with a source electrode of a power switch tube M1, a dotted end of a transformer auxiliary coil in the LED lighting driving circuit is connected with a power end VCC through a resistor R3 and a diode D1 in sequence, the power end VCC is further connected with a junction of a resistor R4 and a capacitor C3, the dotted end of the transformer auxiliary coil is connected with a different-name end of the transformer auxiliary coil through a resistor R6 and a resistor R7 in sequence, a zero current detection input end ZCD connected with the output overvoltage protection circuit is LED out from the junction of a resistor R6 and a resistor R7, and the different-name end of the transformer auxiliary coil is further grounded.

The circuit state of the prior art output overvoltage protection circuit applied in the LED lighting driving circuit is analyzed with reference to fig. 1 as follows:

when the power switch tube M1 is turned on, the energy is stored in the primary winding, and the voltage across the secondary winding of the transformer is

At this time, the voltage of the zero current detection input terminal ZCD is clamped to 0 by the line voltage detection circuit; when the power switch tube is turned off, the voltage at two ends of the inductor of the main coil of the transformer is reversed, the voltage at the zero current detection input end ZCD in the output overvoltage protection circuit is sharply increased, and at the moment, the voltage at the end ZCD is increased

When the voltage at the zero current detection input end ZCD is larger than a preset first threshold voltage V_{TH_H}When the power supply end VCC is restarted, the power switch tube M1 is cut off, the overvoltage protection is quitted, the power switch tube M1 is driven to be restarted again, and finally the light source board can be burnt and ignited to cause potential safety hazards if the power supply end VCC is restarted for many times within a certain time.

Wherein N is_PNumber of turns of primary winding of transformer, N_AThe number of turns of the auxiliary coil of the transformer.

Through the circuit analysis, it can be seen that if the output overvoltage protection circuit in the prior art is adopted to protect the circuit, if the output end is opened due to the damage of the load, the circuit can be restarted repeatedly without stopping, so that the circuit load small-gap creepage ignition is caused, and finally, the combustion ignition is caused, thereby causing some potential safety hazards.

Disclosure of Invention

The present invention overcomes at least one of the above-mentioned disadvantages of the prior art by providing an output overvoltage protection circuit with high safety factor and stable performance.

In order to achieve the above object, an output overvoltage protection circuit of the present invention has the following constitution:

the output overvoltage protection circuit comprises a power supply end, a zero current detection input end and a current detection input end, and is mainly characterized by further comprising an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module;

the overvoltage protection module judges whether the voltage input to the zero current detection input end is greater than a preset first threshold voltage or not and outputs a driving signal for driving the output overvoltage protection circuit to enter an overvoltage protection state or not;

the overvoltage protection quitting circuit module is respectively connected with the power supply end, the overvoltage protection module and the logic control circuit module and outputs a driving signal for driving the output overvoltage protection circuit to quit the overvoltage protection state;

the arc detection circuit module is used for judging whether the voltage input to the zero current detection input end is smaller than a preset second threshold voltage or not, and outputting a driving signal for driving the output overvoltage protection circuit to enter a locking state or not according to the times that the voltage input to the zero current detection input end is smaller than the preset second threshold voltage, so that the output overvoltage protection circuit does not exit the overvoltage protection state;

the logic control circuit module outputs an overvoltage protection circuit working state driving signal according to the voltage of the zero current detection input end, the voltage of the current detection input end, the driving of the overvoltage protection module output, whether the output overvoltage protection circuit enters the driving signal of the overvoltage protection state, the driving of the overvoltage protection quitting circuit module output, whether the output overvoltage protection circuit quits the driving signal of the overvoltage protection state and the driving of the arc detection circuit module output, whether the output overvoltage protection circuit enters the driving signal of the locking state.

Preferably, the output overvoltage protection circuit further comprises a gate driving output terminal, a CS peak value applying circuit and a demagnetization detecting circuit module, wherein a first input terminal of the overvoltage protection module is connected to the zero current detecting input terminal, a first output terminal of the overvoltage protection module is connected to a first input terminal of the logic control circuit module, and a first output terminal of the overvoltage protection module outputs a driving signal for driving the output overvoltage protection circuit to enter an overvoltage protection state;

a first input end of the arc detection circuit module is connected with the power supply end, a second input end of the arc detection circuit module is connected with the zero current detection input end, a third input end of the arc detection circuit module is connected with a second input end of the logic control circuit module, a first output end of the arc detection circuit module is connected with a third input end of the logic control circuit module, and a first output end of the arc detection circuit module is used for outputting a driving signal for driving the output overvoltage protection circuit to enter a locking state or not;

the input end of the CS peak value adopting circuit is connected with the current detection input end, and the output end of the CS peak value adopting circuit is connected with the fourth input end of the logic control circuit module;

the input end of the demagnetization detection circuit module is connected with the zero current detection input end, and the output end of the demagnetization detection circuit module is connected with the fifth input end of the logic control circuit module;

the first input end of the overvoltage protection quitting circuit module is connected with the power supply end, the second input end of the overvoltage protection quitting circuit module is connected with the first output end of the overvoltage protection module, the first output end of the overvoltage protection quitting circuit module is connected with the second input end of the overvoltage protection module, and the second output end of the overvoltage protection quitting circuit module is connected with the sixth input end of the logic control circuit module;

the output end of the logic control circuit module is connected with the input end of the driving module; the output end of the driving module is connected with the gate driving output end.

Preferably, the logic control circuit module comprises an inverter, a first RS flip-flop and a first and gate;

the input end of the phase inverter forms the first input end of the logic control circuit module;

the output end of the phase inverter is connected with the first input end of the first AND gate, the first input end of the first AND gate forms the second input end of the logic control circuit module, and the second input end of the first AND gate forms the third input end of the logic control circuit module;

the reset end of the first RS trigger forms a fourth input end of the logic control circuit module, the set end of the first RS trigger forms a fifth input end of the logic control circuit module, and the output end of the first RS trigger is connected with the third input end of the first AND gate;

the fourth input end of the first AND gate forms the sixth input end of the logic control circuit module;

and the output end of the first AND gate forms the output end of the logic control circuit module.

Preferably, the overvoltage protection exit circuit module comprises an undervoltage protection unit, a first resistor and a first controllable switch;

the first input end of the undervoltage protection unit forms the first input end of the overvoltage protection exit circuit module, the first input end of the undervoltage protection unit is grounded sequentially through the first resistor and the first controllable switch, and the control end of the first controllable switch forms the second input end of the overvoltage protection exit circuit module;

the first output end of the undervoltage protection unit forms the first output end of the overvoltage protection exit circuit module, and the second output end of the undervoltage protection unit forms the second output end of the overvoltage protection exit circuit module;

the undervoltage protection unit compares the voltage of the power end with a preset upper limit threshold value of the power voltage and a preset lower limit threshold value of the power voltage.

the input end of the CS peak value adopting circuit is connected with the current detection input end, and the output end of the CS peak value adopting circuit is respectively connected with the fourth input end of the logic control circuit module and the third input end of the overvoltage protection module;

the first input end of the overvoltage protection quitting circuit module is connected with the power supply end, the second input end of the overvoltage protection quitting circuit module is connected with the output end of the logic control circuit module, the first output end of the overvoltage protection quitting circuit module is connected with the sixth input end of the logic control circuit module, and the second output end of the overvoltage protection quitting circuit module is connected with the seventh input end of the logic control circuit module;

Preferably, the logic control circuit module comprises an inverter, a first RS flip-flop, a first and gate, and a third and gate;

the output end of the phase inverter is connected with the first input end of the third AND gate, and the first input end of the third AND gate forms the second input end of the logic control circuit module;

the first input end of the first AND gate forms the third input end of the logic control circuit module;

the reset end of the first RS trigger forms a fourth input end of the logic control circuit module;

the second input end of the third AND gate forms the fifth input end of the logic control circuit module;

the output end of the third AND gate is connected with the set end of the first RS trigger, and the output end of the first RS trigger is connected with the second input end of the first AND gate;

the third input end of the first AND gate forms a seventh input end of the logic control circuit module;

Preferably, the overvoltage protection exit circuit module comprises an undervoltage protection unit and a maximum turn-off time circuit unit;

the first input end of the undervoltage protection unit forms the first input end of the overvoltage protection exit circuit module, the input end of the maximum turn-off time circuit unit forms the second input end of the overvoltage protection exit circuit module, the output end of the maximum turn-off time circuit unit forms the first output end of the overvoltage protection exit circuit module, and the first output end of the undervoltage protection unit forms the second output end of the overvoltage protection exit circuit module;

Preferably, the arc detection circuit module includes a low voltage reset unit, a first comparator, a D flip-flop and a counter;

the input end of the low-voltage reset unit forms a first input end of the arc detection circuit module;

the output end of the low-voltage reset unit is respectively connected with the setting end of the D trigger and the reset end of the counter;

the inverting input end of the first comparator forms a second input end of the arc detection circuit module, and the first comparator is used for judging whether the voltage input to the zero current detection input end is smaller than a preset second threshold voltage or not;

the output end of the first comparator is connected with the input end of the D trigger, and the output end of the D trigger is connected with the pulse input end of the counter;

the reset end of the D trigger forms a third input end of the arc detection circuit module, the output end of the counter forms a first output end of the arc detection circuit module, and the counter is used for counting the times that the voltage input to the zero current detection input end is smaller than a preset second threshold voltage.

Furthermore, the low-voltage reset unit comprises a second resistor, a first capacitor, a second capacitor, a first zener diode, a second zener diode, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor, a first schmitt trigger and a buffer;

the grid electrode of the first PMOS tube is connected with a constant current source, the source electrode of the first PMOS tube is connected with the power supply end through the second resistor, the drain electrode of the first PMOS tube is grounded through the first capacitor, and a working voltage which is connected with the low-voltage reset unit in an end manner is led out from the connection position of the drain electrode of the first PMOS tube and the first capacitor;

the cathode of the first Zener diode is connected with the constant current source, and the anode of the first Zener diode is grounded;

the constant current source is also connected with the source electrode of the second PMOS tube, and the drain electrode of the second PMOS tube is respectively connected with the grid electrode of the second PMOS tube, the drain electrode of the first NMOS tube and the grid electrode of the third PMOS tube;

the anode of the second Zener diode is connected with the power supply end, the cathode of the second Zener diode is connected with the source electrode of the third PMOS tube, and the drain electrode of the third PMOS tube is respectively connected with the drain electrode of the third NMOS tube, the drain electrode of the fourth NMOS tube and the first input end of the first Schmitt trigger;

the source electrode of the first NMOS tube, the source electrode of the second NMOS tube, the source electrode of the third NMOS tube, the source electrode of the fifth NMOS tube and the source electrode of the sixth NMOS tube are all grounded, and the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube, the grid electrode of the third NMOS tube and the grid electrode of the fifth NMOS tube are all connected with the constant current source;

the drain electrode of the fifth NMOS tube is connected with the source electrode of the fourth NMOS tube, and the grid electrode of the fourth NMOS tube is connected with the output end of the first Schmitt trigger;

the first input end of the first Schmitt trigger is grounded through the second capacitor, the second input end of the first Schmitt trigger is connected with the power supply end, and the output end of the first Schmitt trigger is connected with the grid electrode of the sixth NMOS tube;

the drain electrode of the sixth NMOS tube is connected with the first input end of the buffer;

the source electrode of the fourth PMOS tube and the source electrode of the fifth PMOS tube are both connected with the working voltage of the low-voltage reset unit; the grid electrode of the fourth PMOS tube, the drain electrode of the fourth PMOS tube and the grid electrode of the fifth PMOS tube are connected with the drain electrode of the second NMOS tube;

the drain electrode of the fifth PMOS tube is connected with the first input end of the buffer, and the second input end of the buffer is connected with the working voltage of the low-voltage reset unit;

the output end of the buffer forms the output end of the low-voltage reset unit.

Furthermore, the output overvoltage protection circuit further comprises a leading edge blanking circuit module, an input end of the leading edge blanking circuit module is connected with an output end of the logic control circuit module, and an output end of the leading edge blanking circuit module is respectively connected with a fourth input end of the overvoltage protection module and a clock pulse input end of the D flip-flop.

Preferably, the overvoltage protection module comprises a second comparator, a second and gate and a second RS flip-flop,

the non-inverting input end of the second comparator forms the first input end of the overvoltage protection module, and the second comparator is used for judging whether the voltage input to the zero current detection input end is greater than a preset first threshold voltage;

the first input end of the second AND gate is connected with the output end of the second comparator, the second input end of the second AND gate is connected with the output end of the leading edge blanking circuit module, and the output end of the second AND gate is connected with the set end of the second RS trigger;

the reset end of the second RS trigger forms a third input end of the overvoltage protection module;

and the output end of the second RS trigger forms a first output end of the overvoltage protection module.

The LED lighting driving circuit is mainly characterized by comprising the output overvoltage protection circuit.

The output overvoltage protection circuit is characterized in that an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module are arranged in the circuit, so that the circuit applying the output overvoltage protection circuit can be closed and restarted when the output voltage exceeds a certain value, meanwhile, the arc detection circuit module is arranged, whether the circuit applying the output overvoltage protection circuit has a creepage ignition condition or not is judged by judging whether the output voltage is smaller than a preset voltage value or not, when the creepage ignition frequency exceeds a preset frequency, a drive switch is locked, the output overvoltage protection circuit is prevented from exiting the overvoltage protection state, the risk caused by repeated starting of the circuit applying the output overvoltage protection circuit is avoided, the circuit applying the output overvoltage protection circuit can not be driven to work again until a power supply is cut off, and the LED lighting drive circuit comprising the output overvoltage protection circuit has higher safety level, the probability of fire hazard of the LED lighting drive circuit is reduced. By adopting the output overvoltage protection circuit and the corresponding LED lighting driving circuit, the safety coefficient of the circuit can be improved, and potential safety hazards are avoided.

Drawings

Fig. 1 is a circuit diagram of a prior art LED lighting driving circuit.

Fig. 2 is a schematic structural diagram of an output overvoltage protection circuit according to an embodiment of the invention.

Fig. 3 is a circuit diagram of a low voltage reset unit according to an embodiment of the invention.

Fig. 4 is a schematic structural diagram of an output overvoltage protection circuit according to another embodiment of the invention.

Fig. 5 is a timing diagram illustrating the operation of the output over-voltage protection circuit according to an embodiment of the invention.

Detailed Description

In order to more clearly describe the technical contents of the present invention, the following further description is given in conjunction with specific embodiments.

The invention discloses an output overvoltage protection circuit, as shown in fig. 2, the output overvoltage protection circuit comprises a power supply terminal VCC, a zero current detection input terminal ZCD and a current detection input terminal CS, wherein the output overvoltage protection circuit also comprises an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module;

the overvoltage protection module judges whether the voltage input to the zero current detection input end ZCD is larger than a preset first threshold voltage V_{TH_H}And outputs a driving signal OVP _ PROTECT for driving the output overvoltage protection circuit to enter an overvoltage protection state;

the overvoltage protection exit circuit module is respectively connected with the power supply terminal VCC, the overvoltage protection module and the logic control circuit module, and outputs a driving signal for driving the output overvoltage protection circuit to exit the overvoltage protection state;

the arc detection circuit module is used for judging whether the voltage input to the zero current detection input end ZCD is smaller than a preset second threshold voltage V_{TH_L}And detecting that the voltage input to the zero current detection input end ZCD is smaller than a preset second threshold voltage V_{TH_L}The number of times, output drive said output overvoltage protection circuit enter LOCK state drive signal OVP _ LOCK, make said output overvoltage protection circuit not exitAn overvoltage protection state; the arc detection circuit module judges whether the voltage input to the zero current detection input end ZCD is smaller than a preset second threshold voltage V or not_{TH_L}Judging whether a circuit applying the output overvoltage protection circuit has a creepage ignition condition, and when detecting creepage ignition for many times, outputting a driving signal OVP _ LOCK for driving the output overvoltage protection circuit to enter a locking state to a logic control circuit module to enable the output overvoltage protection circuit not to drive an external circuit to restart;

the logic control circuit module outputs an overvoltage protection circuit working state driving signal DRV according to the voltage of the zero current detection input end ZCD, the voltage of the current detection input end CS, a driving signal OVP _ PROTECT output by the overvoltage protection module and used for driving the output overvoltage protection circuit to enter an overvoltage protection state, a driving signal output by the overvoltage protection quitting circuit module and used for driving the output overvoltage protection circuit to quit the overvoltage protection state, a driving signal OVP _ LOCK output by the arc detection circuit module and used for driving the output overvoltage protection circuit to enter a locking state.

When the circuit applying the output overvoltage protection circuit enters a locking state (namely the output overvoltage protection circuit does not exit the overvoltage protection state), potential safety hazards caused by repeated restarting can be avoided, the locking state can not be released until the driving circuit system is restarted, and the circuit starts to work again.

In this embodiment, the output overvoltage protection circuit further includes a gate drive output terminal GD, a CS peak value applying circuit and a demagnetization detecting circuit module, wherein a first input terminal of the overvoltage protection module is connected to the zero current detection input terminal ZCD, a first output terminal of the overvoltage protection module is connected to a first input terminal of the logic control circuit module, and a first output terminal of the overvoltage protection module outputs a drive signal OVP _ PROTECT that drives whether the output overvoltage protection circuit enters an overvoltage protection state;

a first input end of the arc detection circuit module is connected with the power supply end VCC, a second input end of the arc detection circuit module is connected with the zero current detection input end ZCD, a third input end of the arc detection circuit module is connected with a second input end of the logic control circuit module, a first output end of the arc detection circuit module is connected with a third input end of the logic control circuit module, and a first output end of the arc detection circuit module is used for outputting the driving signal OVP _ LOCK for driving the output overvoltage protection circuit to enter a LOCK-up state or not;

the input end of the CS peak value adopting circuit is connected with the current detection input end CS, and the output end of the CS peak value adopting circuit is connected with the fourth input end of the logic control circuit module;

the input end of the demagnetization detection circuit module is connected with the zero current detection input end ZCD, and the output end of the demagnetization detection circuit module is connected with the fifth input end of the logic control circuit module;

a first input end of the overvoltage protection exit circuit module is connected with the power supply end VCC, a second input end of the overvoltage protection exit circuit module is connected with a first output end of the overvoltage protection module and used for receiving a driving signal OVP _ PROTECT which is output by the first output end of the overvoltage protection module and drives the output overvoltage protection circuit to enter an overvoltage protection state, the first output end of the overvoltage protection exit circuit module is connected with the second input end of the overvoltage protection module and transmits a UVLO _ DLY signal to the overvoltage protection module, and the second output end of the overvoltage protection exit circuit module is connected with a sixth input end of the logic control circuit module and transmits a UVLO _ ON signal to the logic control circuit module;

the output end of the logic control circuit module is connected with the input end of the driving module, and an overvoltage protection circuit working state driving signal DRV is transmitted to the logic control circuit module to control the driving module; and the output end of the driving module is connected with the gate driving output end GD.

In this embodiment, the logic control circuit module includes an inverter INV1, a first RS flip-flop RS1, AND a first AND gate AND 1;

the input end of the inverter INV1 forms the first input end of the logic control circuit module, and receives the driving signal OVP _ PROTECT for driving the output overvoltage protection circuit to enter the overvoltage protection state;

the output end of the inverter INV1 is connected to the first input end of the first AND gate AND1, the first input end of the first AND gate AND1 forms the second input end of the logic control circuit module, AND the second input end of the first AND gate AND1 forms the third input end of the logic control circuit module, AND is configured to receive the driving signal OVP _ LOCK for driving the output overvoltage protection circuit to enter the LOCK-up state;

a reset end of the first RS flip-flop RS1 forms a fourth input end of the logic control circuit module, a set end of the first RS flip-flop RS1 forms a fifth input end of the logic control circuit module, AND an output end of the first RS flip-flop RS1 is connected to a third input end of the first AND gate AND 1;

a fourth input end of the first AND gate AND1 forms a sixth input end of the logic control circuit block, AND is configured to receive a UVLO _ ON signal;

the output end of the first AND gate AND1 forms the output end of the logic control circuit module, AND is used for outputting the working state driving signal DRV of the overvoltage protection circuit.

In this embodiment, the overvoltage protection exit circuit module includes an undervoltage protection unit, a first resistor R1, and a first controllable switch;

the first input end of the undervoltage protection unit forms the first input end of the overvoltage protection exit circuit module, the first input end of the undervoltage protection unit sequentially passes through the first resistor R1 and the first controllable switch to be grounded GND, and the control end of the first controllable switch forms the second input end of the overvoltage protection exit circuit module;

the undervoltage protection unit compares the voltage of the power end VCC with a preset power supply voltage upper limit threshold VCC _ TH and a preset power supply voltage lower limit threshold VCC _ TL.

In this embodiment, the arc detection circuit module includes a low voltage reset unit, a first comparator COMP1, a D flip-flop DFF1, and a counter;

the output end of the low-voltage RESET unit is respectively connected with the setting end of the D trigger DFF1 and the RESET end of the counter, and a RESET signal is sent to the output end of the low-voltage RESET unit;

an inverting input end of the first comparator COMP1 forms a second input end of the arc detection circuit module, and the first comparator COMP1 is configured to determine whether a voltage input to the zero current detection input end ZCD is smaller than a preset second threshold voltage V_{TH_L}；

An output end of the first comparator COMP1 is connected with an input end of the D flip-flop DFF1, and an OVP _ L signal is transmitted thereto, and an output end of the D flip-flop DFF1 is connected with a pulse input end of the counter, and a CLK _ CNT signal is transmitted thereto;

the reset end of the D trigger DFF1 forms a third input end of the arc detection circuit module, the output end of the counter forms a first output end of the arc detection circuit module and is used for outputting a driving signal OVP _ LOCK for driving the output overvoltage protection circuit to enter a locking state or not, and the counter is used for outputting a voltage which is input to the zero current detection input end ZCD and is smaller than a preset second threshold voltage V_{TH_L}The number of times of (c) is counted.

As shown in fig. 3, in this embodiment, the low voltage reset unit includes a second resistor R2, a first capacitor C1, a second capacitor C2, a first zener diode ZD1, a second zener diode ZD2, a first PMOS transistor MP1, a second PMOS transistor MP2, a third PMOS transistor MP3, a fourth PMOS transistor MP4, a fifth PMOS transistor MP5, a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3, a fourth NMOS transistor MN4, a fifth NMOS transistor MN5, a sixth NMOS transistor MN6, a first schmitt trigger 1, and a buffer BUF 1;

the grid electrode of the first PMOS transistor MP1 is connected to a constant current source ibiasii, the source electrode of the first PMOS transistor MP1 is connected to the power supply terminal VCC through the second resistor R2, the drain electrode of the first PMOS transistor MP1 is grounded to GND through the first capacitor C1, and a working voltage VDD3 terminating the low-voltage reset unit is led out from the connection between the drain electrode of the first PMOS transistor MP1 and the first capacitor C1;

the cathode of the first zener diode ZD1 is connected to the constant current source ibiasii, and the anode of the first zener diode ZD1 is grounded;

the constant current source ibiasisi is further connected with a source electrode of the second PMOS transistor MP2, and a drain electrode of the second PMOS transistor MP2 is respectively connected with a gate electrode of the second PMOS transistor MP2, a drain electrode of the first NMOS transistor MN1, and a gate electrode of the third PMOS transistor MP 3;

an anode of the second zener diode ZD2 is connected to the power supply terminal VCC, a cathode of the second zener diode ZD2 is connected to a source of the third PMOS transistor MP3, and a drain of the third PMOS transistor MP3 is respectively connected to a drain of the third NMOS transistor MN3, a drain of the fourth NMOS transistor MN4, and a first input terminal of the first schmitt trigger SMIT 1;

the source electrode of the first NMOS tube MN1, the source electrode of the second NMOS tube MN2, the source electrode of the third NMOS tube MN3, the source electrode of the fifth NMOS tube MN5 and the source electrode of the sixth NMOS tube MN6 are all grounded, and the grid electrode of the first NMOS tube MN1, the grid electrode of the second NMOS tube MN2, the grid electrode of the third NMOS tube MN3 and the grid electrode of the fifth NMOS tube MN5 are all connected with the constant current source IBIASI;

the drain of the second NMOS transistor MN2 outputs a current IB, the drain of the fifth NMOS transistor MN5 is connected to the source of the fourth NMOS transistor MN4, and the gate of the fourth NMOS transistor MN4 is connected to the output of the first schmitt trigger SMIT 1;

the first input end of the first schmitt trigger SMIT1 is further grounded GND through the second capacitor C2, the second input end of the first schmitt trigger SMIT1 is connected to the power supply end VCC, and the output end of the first schmitt trigger SMIT1 is further connected to the gate of the sixth NMOS transistor MN 6;

the drain electrode of the sixth NMOS transistor MN6 is connected with the first input end of the buffer BUF 1;

the source electrode of the fourth PMOS tube MP4 and the source electrode of the fifth PMOS tube MP5 are both connected with the working voltage VDD3 of the low-voltage reset unit; the grid electrode of the fourth PMOS transistor MP4, the drain electrode of the fourth PMOS transistor MP4 and the grid electrode of the fifth PMOS transistor MP5 are all connected to the drain electrode of the second NMOS transistor, and receive the output current IB of the second NMOS transistor MN 2;

the drain electrode of the fifth PMOS pipe MP5 is connected with the first input end of the buffer BUF1, and the second input end of the buffer BUF1 is connected with the working voltage VDD3 of the low-voltage reset unit;

the output end of the buffer BUF1 forms the output end of the low-voltage RESET unit and is used for outputting a RESET signal.

The working principle of the low voltage reset unit in this embodiment is as follows:

when the voltage on the power supply terminal VCC is greater than the clamping voltage of the first Zener diode ZD1, the constant current source IBIASI current flows through the first Zener diode ZD1 to provide the voltage V to the source of the second PMOS transistor MP2_ZD1The source voltage of the third PMOS transistor MP3 is the voltage at the power source terminal VCC minus a forward diode voltage, i.e., VCC-0.7V (the second zener diode ZD1 is a silicon diode).

When the source voltage of the third PMOS transistor MP3 is less than the source voltage of the second PMOS transistor MP2, the third PMOS transistor MP3 is turned off, the voltage of the second capacitor C2 is reduced, the input end of the first schmitt trigger SMIT1 only has an NMOS transistor to discharge, and the RESET signal is at a low level;

when the source voltage of the third PMOS transistor MP3 is greater than the source voltage of the second PMOS transistor MP2, the third PMOS transistor MP3 is turned on, the voltage of the second capacitor C2 rises, the voltage exceeds the threshold of the first schmitt trigger, and the RESET signal is at a high level;

in this embodiment, the output overvoltage protection circuit further includes a leading edge blanking circuit module, an input terminal of the leading edge blanking circuit module is connected to an output terminal of the logic control circuit module, and an output terminal of the leading edge blanking circuit module is respectively connected to a fourth input terminal of the overvoltage protection module and a clock input terminal of the D flip-flop DFF1, and outputs an LEB signal thereto.

In this embodiment, the leading edge blanking circuit module includes a seventh NMOS transistor MN7, a capacitor C and a second schmitt trigger SMIT2, the gate of the seventh NMOS transistor MN7 forms the input terminal of the leading edge blanking circuit module, and is configured to receive the driving signal DRV in the working state of the overvoltage protection circuit, the drain of the seventh NMOS transistor MN7 is connected to the input terminals of the constant current source ibiasii and the second schmitt trigger SMIT2, the source of the seventh NMOS transistor MN7 is grounded, two ends of the capacitor C are respectively connected to the drain and the source of the seventh NMOS transistor MN7, and the output terminal of the second schmitt trigger SMIT2 forms the output terminal of the leading edge blanking circuit module, and is configured to output the LEB signal. In the embodiment, the interference is eliminated by arranging the leading edge blanking circuit module. In fig. 2, the timing diagrams of the driving signals DRV and LEB are plotted, and the triggering positions are different by T1.

In this embodiment, when the peripheral circuit is idle, the power supply terminal VCC is continuously restarted, and when the peripheral application does not need the auxiliary coil to supply power to the power supply terminal VCC, the voltage at the power supply terminal VCC is a constant value, the power supply terminal VCC is not restarted, the power switch tube connected to the gate drive output terminal GD is not restarted, and the peripheral application can be restarted only when the power is turned off.

In this embodiment, the overvoltage protection module includes a second comparator COMP2, a second AND gate AND2, AND a second RS flip-flop RS2,

a non-inverting input terminal of the second comparator COMP2 forms a first input terminal of the overvoltage protection module, and the second comparator COMP2 is used for determiningThe voltage input to the zero current detection input end ZCD is cut off and whether the voltage is larger than a preset first threshold voltage V or not_{TH_H}；

A first input end of the second AND gate AND2 is connected with an output end of the second comparator COMP2 AND receives an OVP _ H signal, a second input end of the second AND gate AND2 is connected with an output end of the leading edge blanking circuit module AND receives an LEB signal, AND an output end of the second AND gate AND2 is connected with a set end of the second RS flip-flop RS 2;

the reset end of the second RS trigger RS2 forms a second input end of the overvoltage protection module;

the output end of the second RS flip-flop RS2 constitutes a first output end of the overvoltage protection module, and is configured to output the driving signal OVP _ PROTECT that drives whether the output overvoltage protection circuit enters an overvoltage protection state.

In a specific implementation process, the output overvoltage protection circuit mentioned in the above embodiment may be applied to an LED lighting driving circuit, that is, the LED lighting driving circuit includes the output overvoltage protection circuit in the above embodiment, and the output overvoltage protection circuit may be connected to the LED lighting driving circuit according to the connection manner in fig. 1 in actual use.

When the LED lighting driving circuit in fig. 1 adopts the output overvoltage protection circuit in the above embodiment, the operating states are as follows:

when the LED lighting driving circuit in fig. 1 is normally unloaded, the operation of the output overvoltage protection circuit in this embodiment is as follows:

when the output voltage in fig. 1 is continuously increased and the power switching tube M1 is turned off, the voltage across the main coil inductor is reversed, the voltage at the zero current detection input end ZCD is rapidly increased, and when the voltage V at the zero current detection input end ZCD is increased_ZCDIs greater than a predetermined first threshold voltage V_{TH_H}When the output OVP _ H signal of the second comparator COMP2 is at a high level, the second RS flip-flop RS2 controls the driving signal OVP _ PROTECT driving the output overvoltage protection circuit to enter the overvoltage protection state to be at a high level, the switch of the power switch tube M1 is turned off,the output voltage drops. The auxiliary coil no longer charges the power supply terminal VCC through the third resistor R3 and the first diode D1, and the power supply terminal VCC discharges through the sixth resistor R6, so that the voltage of the power supply terminal VCC drops, and after the voltage of the power supply terminal VCC is smaller than the lower limit threshold value VCC _ TL of the power supply voltage, the UVLO _ ON signal becomes low level, and the system is powered ON and started again. After the restart, the output voltage rises again, and enters an overvoltage protection state (OVP protection), and the power supply terminal VCC restarts again, and so on.

During normal no-load, the output discharges through the load resistor R5 (as shown in fig. 1), and the restart is completed when the output voltage drop amplitude is small, so that the voltage of the zero current detection input end ZCD is not less than the preset second threshold voltage V_{TH_L}After the OVP _ L signal output by the first comparator is constantly at a low level and the power switch M1 is turned off, the CLK _ CNT signal output by the D flip-flop is constantly at a low level at the rising edge of the LEB signal output by the blanking circuit block, and the switch of the power switch M1 is not locked.

When the output load end R5 is open-circuited due to damage of the light source board LED, an electric arc may occur at the output end, at this time, the output end discharge loop has the light source board LED and the load resistor R5, the output capacitor C4 discharges through the electric arc, and the output voltage can be rapidly reduced to the voltage drop of the LED lamp bead.

As shown in fig. 2, during arc detection, the overvoltage protection module and the arc detection circuit module work simultaneously, and the specific working process is as follows:

(1) after the circuit is powered on, the D flip-flop DFF1 is set through a RESET signal, and the output signal CLK _ CNT of the D flip-flop DFF1 is at a high level;

(2) after triggering overvoltage protection, driving a driving signal OVP _ PROTECT which drives the output overvoltage protection circuit to be in an overvoltage protection state or not to be changed into high level, clearing the Q end of a D trigger DFF1, and enabling an output signal CLK _ CNT to be low level;

(3) when the power switch M1 is turned off, the signal output from the gate driving output terminal GD changes to low and the LEB signal has a rising edge after a certain time delay, so that the output signal OVP _ L of the first comparator COMP1 is output to the Q terminal of the D flip-flop DFF 1.

When an arc occurs in the LED lighting drive circuit, the light sourceThe output voltage of the panel LED is reduced, and the voltage on the zero current detection input end ZCD at the rising edge of the signal LEB output by the leading edge blanking circuit is lower than a preset second threshold voltage V_{TH_L}The rising edge of the LEB signal triggers the first comparator COMP1 to output the high level of the signal OVP _ L to the Q terminal of the D flip-flop DFF1, and the CLK _ CNT signal has a rising edge to complete one arc detection; (4) the CLK _ CNT signal is input into a counter for counting, after n times of continuous detection (the time threshold value in the counter can be set by a user according to actual needs), the OVP _ LOCK signal is changed into high level, and the power switch tube M1 is locked and is not opened any more. When the voltage of the power supply end VCC is reduced to be lower than the restart power supply voltage VCC _ RST after the power failure, the counter is cleared, and the arc detection is carried out again after the power supply is switched on again.

In this embodiment, after the circuit performs the overvoltage protection, the power switch tube M1 is turned off, the power supply terminal VCC discharges, and after VCC is smaller than the preset voltage value, the power supply is restarted, and the power switch tube M1 is turned on again, so that the overvoltage protection exits.

Through the analysis, can know when being applied to LED illumination drive circuit with the output overvoltage crowbar in above-mentioned embodiment, can be because light source board LED damages and leads to exporting the open circuit, when the small gap creepage is struck sparks, detect this problem by the output overvoltage crowbar in above-mentioned embodiment, and then turn off the lock with power switch pipe M1 and die, avoid appearing the phenomenon that the power constantly restarts, and then the effectual phenomenon of avoiding the burning of light source board, safer, the security that improves the circuit and uses.

The output overvoltage protection circuit is not limited to be used in an LED lighting drive circuit, but also can be used in other related circuits, when the output overvoltage protection circuit is used, all ports of the output overvoltage protection circuit are only connected with all devices of an external circuit, when a power switch tube connected with an output end GD of an AND gate drive is turned off, the voltage on an input end ZCD of the zero current detection is detected, and the voltage on the input end ZCD of the zero current detection is larger than a preset first threshold voltage V_{TH_H}When the zero current detection circuit is started, the driving power switch tube is turned off again, and if the voltage on the zero current detection input end ZCD is less than that on the zero current detection input end ZCDA predetermined second threshold voltage V_{TH_L}When the number of the creepage sparking times reaches the preset number, a power switch tube connected with the door drive output end GD is turned off and locked until the circuit cut-off voltage of the overvoltage protection circuit is output by application, the voltage on the power supply end VCC is reduced to the restart power supply voltage VCC _ RST, the counter is reset, the circuit is protected again after the power supply is switched on again, and corresponding arc detection is carried out.

In another embodiment, as shown in fig. 4, the general structure of the output overvoltage protection circuit is the same as that in the above embodiment, and the same working principle exists, but another circuit mode is selected to realize overvoltage exit protection, which reduces energy transmission to the load end after overvoltage protection is entered (i.e. OVP protection), increases turn-off time or reduces inductive current, the output discharges through the load resistor, the output voltage decreases, and when the voltage of the zero current detection input ZCD is less than the preset first threshold voltage V_{TH_H}And when the overvoltage protection is needed, the overvoltage protection is quitted, and the steps are repeated.

Therefore, only the differences between the embodiment and the output overvoltage protection circuit are described below, and the description of the same parts is omitted.

In this embodiment, a first input terminal of the overvoltage protection module is connected to the zero current detection input terminal ZCD, a first output terminal of the overvoltage protection module is connected to a first input terminal of the logic control circuit module, and a first output terminal of the overvoltage protection module outputs the driving signal OVP _ PROTECT for driving the output overvoltage protection circuit to enter an overvoltage protection state;

the input end of the CS peak value adopting circuit is connected with the current detection input end CS, and the output end of the CS peak value adopting circuit is respectively connected with the fourth input end of the logic control circuit module and the third input end of the overvoltage protection module;

a first input end of the overvoltage protection quitting circuit module is connected with the power supply end VCC, a second input end of the overvoltage protection quitting circuit module is connected with an output end of the logic control circuit module, a first output end of the overvoltage protection quitting circuit module is connected with a sixth input end of the logic control circuit module and used for calculating the turn-off time of a circuit, and a second output end of the overvoltage protection quitting circuit module is connected with a seventh input end of the logic control circuit module and used for transmitting UVLO _ ON signals to the logic control circuit module;

In this embodiment, the logic control circuit module includes an inverter INV1, a first RS flip-flop RS1, a first AND gate AND1, AND a third AND gate AND 3;

the input end of the inverter INV1 forms the first input end of the logic control circuit module, and receives the drive signal OVP _ PROTECT for driving the output overvoltage protection circuit to enter the overvoltage protection state;

the output end of the inverter INV1 is connected to the first input end of the third AND gate AND3, AND the first input end of the third AND gate AND3 forms the second input end of the logic control circuit block;

a first input end of the first AND gate AND1 constitutes a third input end of the logic control circuit module, AND is configured to receive the driving signal OVP _ LOCK for driving the output overvoltage protection circuit to enter a LOCK-up state;

the reset end of the first RS trigger RS1 forms a fourth input end of the logic control circuit module;

a second input end of the third AND gate AND3 constitutes a fifth input end of the logic control circuit block;

the output end of the third AND-gate AND3 is connected with the set end of the first RS flip-flop RS1, AND the output end of the first RS flip-flop RS1 is connected with the second input end of the first AND-gate AND 1;

a third input end of the first AND gate AND1 forms a seventh input end of the logic control circuit block, AND is configured to receive a UVLO _ ON signal;

a fourth input end of the first AND gate AND1 forms a sixth input end of the logic control circuit module;

the output end of the first AND gate AND1 constitutes the output end of the logic control circuit block.

In this embodiment, the overvoltage protection exit circuit module includes an undervoltage protection unit and a maximum off-time circuit unit;

the first input end of the undervoltage protection unit forms the first input end of the overvoltage protection exit circuit module, the input end of the maximum turn-off time circuit unit forms the second input end of the overvoltage protection exit circuit module, the output end of the maximum turn-off time circuit unit forms the first output end of the overvoltage protection exit circuit module, and the first output end of the undervoltage protection unit forms the second output end of the overvoltage protection exit circuit module and is used for outputting a UVLO _ ON signal;

the undervoltage protection unit compares the voltage of the power supply terminal VCC with a preset power supply voltage upper limit threshold VCC _ TH and a preset power supply voltage lower limit threshold VCC _ TL.

a non-inverting input terminal of the second comparator COMP2 forms a first input terminal of the overvoltage protection module, and the second comparator COMP2 is configured to determine whether a voltage input to the zero current detection input terminal ZCD is greater than a preset first threshold voltage V_{TH_H}；

A first input end of the second AND gate AND2 is connected with an output end of the second comparator COMP2 AND is used for receiving an OVP _ H signal, a second input end of the second AND gate AND2 is connected with an output end of the leading edge blanking circuit module AND is used for receiving an LEB signal, AND an output end of the second AND gate AND2 is connected with a set end of the second RS flip-flop RS 2;

the reset end of the second RS flip-flop RS2 constitutes a third input end of the overvoltage protection module;

In this embodiment, after the output overvoltage protection circuit enters the overvoltage protection state, the driving signal OVP _ PROTECT for driving the output overvoltage protection circuit to enter the overvoltage protection state is at a high level, AND after passing through the inverter INV1, the driving signal OVP _ PROTECT is changed to the high level, AND the signal output by the demagnetization detection circuit module is shielded by the third AND gate AND3, so that the power switch tube connected to the gate driving output end GD is continuously turned off until the maximum off time circuit unit outputs a power tube on signal, AND after the output of the CS peak value sampling circuit reaches the peak voltage, the output of the second RS flip-flop RS1 is cleared by the CS peak value sampling circuit, AND the output of the second RS flip-flop RS1 exits the overvoltage protection circuitVoltage protection, comparing the voltage of the zero current detection input end ZCD with a preset first threshold voltage V_{TH_H}The size of (2).

Fig. 5 is a timing diagram of the operation of the output overvoltage protection circuit according to the embodiment of the invention, from which the operation state of the output overvoltage protection circuit according to the invention can be clearly seen, and the waveform diagram of the output voltage of the peripheral circuit is denoted by VO, the waveform diagram of the gate driving output terminal GD is denoted by GD, the waveform diagram of the output signal of the overvoltage protection module is denoted by OVP _ PROTECT, the waveform diagram of the output signal of the D flip-flop in the arc detection circuit module is denoted by CLK _ CNT, the waveform diagram of the output signal of the arc detection circuit module is denoted by OVP _ LOCK, the waveform diagram of the voltage signal at the power supply terminal is denoted by VCC, and the correspondence between the output signals of the devices when the peripheral circuit changes is clearly reflected in fig. 5, and the operation state of the output overvoltage protection circuit according to the invention can be clearly seen in the function diagram. The output overvoltage protection circuit in the above embodiment can also be used in an LED lighting driving circuit.

When the output overvoltage protection circuit is applied to some drive circuits, the performance of the whole circuit can be improved without adjusting peripheral equipment of related circuits, so that the circuit is safer, and therefore, the adaptability is very good.

The output overvoltage protection circuit is characterized in that an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module are arranged in the circuit, so that the circuit applying the output overvoltage protection circuit can be closed and restarted when the output voltage exceeds a certain value, meanwhile, the arc detection circuit module is arranged, whether the circuit applying the output overvoltage protection circuit has a creepage ignition condition or not is judged by judging whether the output voltage is smaller than a preset voltage value or not, when the creepage ignition frequency exceeds a preset frequency, a drive switch is locked, the output overvoltage protection circuit is prevented from exiting the overvoltage protection state, the risk caused by repeated starting of the circuit applying the output overvoltage protection circuit is avoided, the circuit applying the output overvoltage protection circuit can not be driven to work again until a power supply is cut off, and the LED lighting drive circuit comprising the output overvoltage protection circuit has higher safety level, the probability of fire hazard of the LED lighting drive circuit is reduced. By adopting the output overvoltage protection circuit and the corresponding LED lighting driving circuit, the safety factor can be improved, and potential safety hazards can be avoided.

In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.

Claims

1. An output overvoltage protection circuit comprises a power supply end, a zero current detection input end and a current detection input end, and is characterized by further comprising an overvoltage protection module, an arc detection circuit module, an overvoltage protection exit circuit module and a logic control circuit module;

2. The output overvoltage protection circuit of claim 1, further comprising a gate drive output, a CS peak sampling circuit, and a demagnetization detection circuit block,

the first input end of the overvoltage protection module is connected with the zero current detection input end, the first output end of the overvoltage protection module is connected with the first input end of the logic control circuit module, and the first output end of the overvoltage protection module outputs the driving signal for driving the output overvoltage protection circuit to enter an overvoltage protection state or not;

3. The output overvoltage protection circuit of claim 2, wherein the logic control circuit module comprises an inverter, a first RS flip-flop, and a first and gate;

4. The output overvoltage protection circuit of claim 2, wherein the overvoltage protection exit circuit module comprises an undervoltage protection unit, a first resistor and a first controllable switch;

5. The output overvoltage protection circuit of claim 1, further comprising a gate drive output, a CS peak sampling circuit, and a demagnetization detection circuit block,

6. The output overvoltage protection circuit of claim 5, wherein the logic control circuit module comprises an inverter, a first RS flip-flop, a first AND gate, and a third AND gate;

the output end of the first AND gate forms the output end of the logic control circuit module.

7. The output overvoltage protection circuit of claim 5, wherein the overvoltage protection exit circuit module comprises an undervoltage protection unit and a maximum off-time circuit unit;

8. The output overvoltage protection circuit according to claim 2 or 5, wherein the arc detection circuit module comprises a low voltage reset unit, a first comparator, a D flip-flop and a counter;

the output end of the low-voltage reset unit is respectively connected with the set end of the D trigger and the reset end of the counter;

9. The output overvoltage protection circuit of claim 8, wherein the low voltage reset unit comprises a second resistor, a first capacitor, a second capacitor, a first zener diode, a second zener diode, a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a fifth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor, a sixth NMOS transistor MN6, a first schmitt trigger, and a buffer;

the source electrode of the first NMOS tube, the source electrode of the second NMOS tube, the source electrode of the third NMOS tube, the source electrode of the fifth NMOS tube and the source electrode of the sixth NMOS tube MN6 are all grounded, and the grid electrode of the first NMOS tube, the grid electrode of the second NMOS tube, the grid electrode of the third NMOS tube and the grid electrode of the fifth NMOS tube are all connected with the constant current source;

the first input end of the first schmitt trigger is grounded through the second capacitor, the second input end of the first schmitt trigger is connected with the power supply end, and the output end of the first schmitt trigger is connected with the grid electrode of the sixth NMOS transistor MN 6;

10. The output overvoltage protection circuit of claim 8, further comprising a leading edge blanking circuit block, an input of the leading edge blanking circuit block being connected to an output of the logic control circuit block, an output of the leading edge blanking circuit block being connected to a fourth input of the overvoltage protection block and a clock input of the D flip-flop, respectively.

11. The output overvoltage protection circuit of claim 5, wherein the overvoltage protection module comprises a second comparator, a second AND gate, and a second RS flip-flop,

12. An LED lighting driver circuit, comprising the output overvoltage protection circuit of any one of claims 1 to 11.