CN112688408A - Low-power-consumption ultrasonic energy collection circuit and use method thereof - Google Patents

Low-power-consumption ultrasonic energy collection circuit and use method thereof Download PDF

Info

Publication number
CN112688408A
CN112688408A CN202011579077.0A CN202011579077A CN112688408A CN 112688408 A CN112688408 A CN 112688408A CN 202011579077 A CN202011579077 A CN 202011579077A CN 112688408 A CN112688408 A CN 112688408A
Authority
CN
China
Prior art keywords
field effect
effect transistor
module
ultrasonic
drain electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202011579077.0A
Other languages
Chinese (zh)
Other versions
CN112688408B (en
Inventor
许明
王冠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Dianzi University
Original Assignee
Hangzhou Dianzi University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Dianzi University filed Critical Hangzhou Dianzi University
Priority to CN202011579077.0A priority Critical patent/CN112688408B/en
Publication of CN112688408A publication Critical patent/CN112688408A/en
Application granted granted Critical
Publication of CN112688408B publication Critical patent/CN112688408B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Ultra Sonic Daignosis Equipment (AREA)
  • Investigating Or Analyzing Materials By The Use Of Ultrasonic Waves (AREA)

Abstract

The invention discloses a low-power-consumption ultrasonic energy collection circuit and a using method thereof. The existing ultrasonic energy collecting circuit is difficult to realize accurate power-on and power-off control on a load. The invention relates to a low-power-consumption ultrasonic energy collecting circuit which comprises a rectifier module, a burst detection module, a switching tube, an ultrasonic collector and an energy storage capacitor. The input interface of the rectifier module is connected with the output interface of the ultrasonic collector; and the output interface of the rectifier module is connected with the energy storage capacitor. The switching tube and the load are connected in series between a supply voltage provided by the rectifier module and the energy storage capacitor and the ground. And the burst detection module provides a state working signal for the switching tube. According to the invention, through the waveform converter, the edge extraction module and the watchdog circuit which are sequentially connected in series, the switching tube can be automatically controlled to be switched on when ultrasonic waves are continuously input, and the switching tube is immediately controlled to be switched off when the ultrasonic waves are stopped, so that the accurate control of the on-off of the load is realized through the control of an external ultrasonic signal source.

Description

Low-power-consumption ultrasonic energy collection circuit and use method thereof
Technical Field
The invention belongs to the technical field of electric energy conversion, and particularly relates to a low-power-consumption ultrasonic energy collection circuit and a using method thereof.
Background
The ultrasonic energy collecting circuit is a circuit for collecting and converting mechanical energy into electric energy, and has wide application prospect; however, a capacitor for stabilizing voltage in the conventional ultrasonic energy collection circuit continues to supply power to the load for a period of time after the external ultrasonic source is removed, so that a difference exists between the working time of the load and the time of supplying and removing the external ultrasonic source, and further, accurate power on/off control of the load is difficult to achieve.
Disclosure of Invention
The invention aims to provide a low-power-consumption ultrasonic energy collecting circuit and a using method thereof.
The invention relates to a low-power-consumption ultrasonic energy collecting circuit which comprises a rectifier module, a burst detection module, a switching tube, an ultrasonic collector Y1 and an energy storage capacitor C _ stor. The input interface of the rectifier module is connected with the output interface of the ultrasonic collector Y1; and the output interface of the rectifier module is connected with the energy storage capacitor C _ stor. The switching tube and the load are connected in series between the supply voltage V _ Rec provided by the rectifier module and the energy storage capacitor C _ stor and ground. And the burst detection module provides a state working signal Pas/Act for the switching tube. And the switching tube controls the on-off of the load according to the state working signal Pas/Act. The burst detection module comprises a waveform converter, an edge extraction module and a watchdog circuit which are sequentially connected in series. The input end of the waveform converter is connected to the ultrasonic collector Y1, and the signal at the output end of the ultrasonic collector Y1 is converted into a square wave signal. When the frequency of an alternating signal input into the waveform converter is smaller than a threshold value, the switching tube keeps the load electrified; when the frequency of the alternating signal input to the waveform converter is greater than a threshold value, the switching tube controls the load to be powered off.
Preferably, the waveform converter is obtained by connecting an even number of digital inverters in series.
Preferably, the edge extraction module includes a delay unit and an exclusive or gate. The delay unit comprises an even number of inverters which are sequentially connected in series. The output signal of the waveform converter is divided into two paths, one path is connected to the first input end of the exclusive-or gate, and the other path is connected to the second input end of the exclusive-or gate after passing through the delay unit.
Preferably, the watchdog circuit comprises a current source IS2, a MOS transistor M22, a capacitor C _ WD and an inverter U3. The input end of the current source IS2 IS connected with the power voltage V _ Rec, and the output end IS connected with the source electrode of the MOS tube M22, one end of the capacitor C _ WD and the input end of the inverter U1. The drain of the MOS transistor M22 and the other end of the capacitor C _ WD are both grounded. The gate of the MOS transistor M22 serves as the input of the watchdog circuit. The output terminal of the inverter U1 outputs a state operating signal Pas/Act.
Preferably, the low-power-consumption ultrasonic energy collection circuit further comprises a two-pass voltage stabilizer module and a starting circuit module. The rectifier module adopts an active rectifier. The bi-pass voltage stabilizer module is used for stabilizing voltage through the series voltage stabilizer module and the parallel voltage stabilizer module. The starting circuit module provides a starting working signal SU for the rectifier module.
Preferably, the rectifier module comprises a field effect transistor MS3, a field effect transistor MS4 and two active diode modules. The grid electrode of the field effect transistor MS3 and the drain electrode of the field effect transistor MS4 are both connected with the IN1 end of the ultrasonic collector Y1; the drain electrode of the field effect transistor MS3 and the grid electrode of the field effect transistor MS4 are both connected with the IN2 end of the ultrasonic collector Y1; the sources of fet MS3 and fet MS4 are connected together to provide ground. The active diode module comprises an active comparator module Comp1 and a dynamic bias module. The active comparator module Comp1 includes a fet MS1, fets M1-M8, and a buffer BUF; the grid of the field effect transistor M1 is connected with an externally input reference voltage V _ BP 1; the drain electrode of the field effect transistor M1 is connected with the source electrode of the field effect transistor M2, and the drain electrode of the field effect transistor M2 is connected with the drain electrode of the field effect transistor M3; the gates of the field effect transistor M3, the field effect transistor M4 and the field effect transistor M5 are connected together; the source electrodes of the field effect transistor M3, the field effect transistor M4, the field effect transistor M5 and the negative power supply end of the buffer BUF are all connected with the input voltage V _ LDO provided by the double-pass voltage regulator module. The drain of the field effect transistor M6 is connected with the drain of the field effect transistor M4, and the gate is connected with the gate of the field effect transistor M7.
The drain of the FET M7 is connected to the drain of the FET M5 and the signal input terminal of the buffer BUF. The first input signal terminal of the NOR gate NOR and the gate of the fet M2 are connected to the status operating signal Pas/Act provided by the burst detection module. The second input signal terminal of the NOR gate NOR is connected to the start-up signal SU. The output signal of the NOR gate NOR is connected with the gate of the field effect transistor M8; the output signal of the buffer BUF is connected with the drain electrode of the field effect transistor M8 and the gate electrode of the field effect transistor MS 1. The sources of the field effect transistors M1, M6 and M8, the drain of the field effect transistor MS1, the substrates of the field effect transistors M1 and M2 and the positive power supply terminal of the buffer BUF are connected together to provide a power supply voltage V _ Rec. And the source electrode of the field effect transistor M7 and the source electrode of the field effect transistor MS1 are connected together and used as a signal input end of the active diode module. The signal input ends of the two active diode modules are respectively connected with the IN1 end and the IN2 end of the ultrasonic collector Y1.
Preferably, the two-pass regulator module comprises a series regulator module and a shunt regulator module. The series regulator module includes a comparator OPAMP1 and a field effect transistor M9. The shunt regulator module includes a comparator OPAMP2, a resistor R1, a current source IS1, and a field effect transistor M10. The inverting input end of the comparator OPAMP1 is connected with the reference voltage V _ Ref; the non-inverting input end of the comparator OPAMP1, the drain of the field effect transistor M9, one end of the resistor R1, the positive power source end of the comparator OPAMP2, the source of the field effect transistor M10, one end of the capacitor C _ LDO, and one end of the resistor R _ LDO are connected together, which is the rectifier module input voltage V _ LDO. The positive power supply of the comparator OPAMP1 is connected to the power supply voltage V _ Rec, and the negative power supply is connected to ground. The other end of the resistor R1 is connected to the negative terminal of the current source and the inverting input terminal of the comparator OPAMP 2. The positive electrode of the current source IS1, the negative power supply terminal of the comparator OPAMP2, the drain of the field effect transistor M10, the other end of the capacitor C _ LDO, and the other end of the resistor R _ LDO are all grounded. The non-inverting input of the comparator OPAMP2 is coupled to the reference voltage V _ Ref.
Preferably, the starting circuit module comprises an inverter U1, an inverter U2 and field effect transistors M11-M21. One end of the resistor R2 and the sources of the field effect transistors M17 and M18 are connected with the power voltage V _ Rec. The grid electrode of the field effect transistor M18, the grid electrode and the drain electrode of the field effect transistor M17, the drain electrode of the field effect transistor M21 and the source electrode of the field effect transistor M15 are all connected with a reference voltage V _ BP 1; the other end of the resistor R2 is connected with the gate of the field effect transistor M21, the input end of the inverter U1 and the drain of the field effect transistor M20. The drain electrode of the field effect transistor M18 is connected with the source electrode of the field effect transistor M16; the grid electrode of the field effect transistor M16, the grid electrode and the drain electrode of the field effect transistor M15 and the drain electrode of the field effect transistor M13 are all connected with a reference voltage V _ BP 2; the grid electrode of the field effect transistor M13, the grid electrode and the drain electrode of the field effect transistor M14, the source electrode of the field effect transistor M21, the grid electrode of the field effect transistor M20 and the drain electrode of the field effect transistor M16 are all connected with a reference voltage V _ Ref; the source electrode of the field effect transistor M20 is connected with the drain electrode of the field effect transistor M19; the source of the field effect transistor M13 is connected to the drain of the field effect transistor M11. The grid electrode of the field effect transistor M11, the grid electrode and the drain electrode of the field effect transistor M12, the source electrode of the field effect transistor M14 and the grid electrode of the field effect transistor M19 are all connected with a reference voltage V _ BN 1; the source electrode of the field effect transistor M11 is connected with one end of a resistor R3; the sources of the field effect transistors M12 and M19 and the other end of the resistor R3 are grounded. The output end of the inverter U1 is connected with the input end of the inverter U2; the output of inverter U2 is used to output an enable signal SU that is provided to the rectifier module.
The use method of the low-power-consumption ultrasonic energy collection circuit comprises the following specific steps:
an external ultrasonic generator is used to emit ultrasonic waves, and an ultrasonic collector Y1 receives the ultrasonic signals and generates an alternating voltage. The rectifier module rectifies the alternating voltage and provides power supply voltage for the switching tube and the load. In the burst detection module, a waveform converter converts an input alternating voltage into a square wave signal; the edge extraction module extracts the rising edge and the falling edge of the square wave signal to form a pulse signal; each pulse in the pulse signal enables a capacitor which is continuously charged in the watchdog circuit to reset, so that the input of an inverter in the watchdog circuit keeps a low level, and the output keeps a high level; the high level output by the watchdog circuit makes the switch tube always in a conducting state.
When the load is required to be controlled to be powered off, the ultrasonic generator is controlled to be turned off or the output frequency of the ultrasonic generator is made to be greater than a preset value, so that the edge extraction module cannot continuously provide pulses for the watchdog circuit, and a capacitor in the watchdog circuit is charged to output a high level to the inverter; the inverter outputs a low-level to the switch tube; the switching tube is turned off, so that the load is powered off.
The invention has the beneficial effects that:
1. according to the invention, through the waveform converter, the edge extraction module and the watchdog circuit which are sequentially connected in series, the switching tube can be automatically controlled to be switched on when ultrasonic waves are continuously input, and the switching tube is immediately controlled to be switched off when the ultrasonic waves are stopped, so that the load is accurately controlled to be switched on and off through controlling an external ultrasonic signal source, and the electronic element implanted into a human body can be accurately controlled.
2. The invention provides a novel active rectifier, which realizes the functions of reducing the propagation delay of a comparator and the power consumption of an active diode by changing the positive and negative power supply voltages of the comparator, and can reduce the propagation delay.
3. The invention provides a burst detection circuit, which enables other circuits to enter a low-power-consumption working mode when no signal is input or the frequency of an input signal is lower than a certain threshold value, thereby reducing the energy consumption of the circuit.
4. The invention provides a novel bi-pass voltage stabilizer, which utilizes the discharge current of a parasitic capacitor and the average current drawn by a comparator from a power supply to adjust the output current, thereby realizing the effect of low power consumption.
Drawings
FIG. 1 is a schematic diagram of the electrical circuit of the present invention;
FIG. 2 is a schematic circuit diagram of an active diode module according to the present invention;
FIG. 3 is a schematic diagram of a module with a two-pass regulator in accordance with the present invention;
FIG. 4 is a schematic diagram of a reference voltage and start-up circuit module of the present invention;
FIG. 5 is a schematic circuit diagram of a burst detection module according to the present invention;
FIG. 6 is a timing diagram illustrating the detection of an input signal by the burst detection module according to the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, a low-power-consumption ultrasonic energy collection circuit includes a rectifier module 1, a burst detection module 3, a two-pass regulator module 4, a reference voltage and start circuit module 5, a switching tube 6, an ultrasonic collector Y1, and an energy storage capacitor C _ stor. The ultrasonic collector Y1 can convert the ultrasonic energy into alternating voltage and output the alternating voltage, and the energy storage capacitor C _ stor plays a role in storing energy in the circuit. The rectifier module 1 employs an active rectifier. Two input ends of the rectifier module 1 are respectively connected with two ends of the ultrasonic collector Y1; the output interface of the rectifier module 1 is connected to two ends of the energy storage capacitor C _ stor and provides the power supply voltage V _ Rec. The switching tube 6 and the load are connected in series between the supply voltage V _ Rec and ground. The input end of the burst detection module 3 is connected with the IN1 end of the ultrasonic collector Y1, and the output end of the burst detection module provides a state working signal Pas/Act for the rectifier module 1 and the switch tube 6, so that the enable of the switch tube 6 is controlled by the burst detection module 3. The bi-pass regulator module 4 performs voltage stabilization through the series regulator module and the parallel regulator module. The start circuit module 5 provides a start operation signal SU to the rectifier module 1. When the control pin EN of the switch tube 6 inputs a high level, the switch tube 6 is conducted; when the control pin EN of the switching tube 6 inputs a low level, the switching tube 6 is turned off.
When the ultrasonic collector Y1 collects the ultrasonic signal, the two terminals (IN1, IN2) of the ultrasonic collector Y1 output an ac voltage, which is rectified by the rectifier module 1 and converted into a dc power supply voltage V _ Rec. The burst detection module 3 detects whether an ultrasonic signal is input. If there is no ultrasonic signal, the burst detection module 3 makes other circuit modules enter a low power operation mode, and the switch tube 6 will limit the current flowing through the load, so that the load is powered off. In this embodiment, the load is the light emitting diode LED1, i.e., the light emitting diode LED1 is turned off. Therefore, the real-time power-off of the load can be realized when the external ultrasonic output is removed, and the power-on and power-off of the load can be accurately controlled through an external ultrasonic signal source. And the energy stored on the energy storage capacitor C _ stor can supply other circuits for a longer time. The switch tube 6 module may be implemented using active circuitry, such as a current mirror/digital-to-analog converter, whose active module may be powered by the V _ LDO voltage. In order to reduce the interference of AC signal, a capacitor C _ LDO with a capacitance value of 77pF is connected in series with the output end of the two-way voltage stabilizer 4.
As shown in fig. 2 and 3, the burst detection module 3 includes a waveform converter 3-1, an edge extraction module 3-2 and a watchdog circuit 3-3 connected in series in sequence. The waveform converter 3-1 is obtained by connecting an even number of digital inverters IN series, and can convert an analog signal output from the IN1 end of the ultrasonic collector Y1 into a square wave signal. The edge extraction module 3-2 includes a delay unit and an exclusive or gate. The delay unit comprises an even number of inverters which are sequentially connected in series. An output node X of the waveform converter 3-1 is divided into two paths, one path is connected to a first input end of the exclusive-or gate, and the other path is connected to a second input end of the exclusive-or gate after passing through the delay unit, so that signals at two input ends of the exclusive-or gate have a certain phase difference. The output node Z of the edge extraction module 3-2 is connected to the input end of the watchdog circuit 3-3. The watchdog circuit 3-3 includes a current source IS2, a MOS transistor M22, a capacitor C _ WD, and an inverter U3. The input end of the current source IS2 IS connected with the power signal V _ Rec, and the output end IS connected with the source electrode of the MOS tube M22, one end of the capacitor C _ WD and the input end of the inverter U1. The drain of the MOS transistor M22 and the other end of the capacitor C _ WD are both grounded. The gate of the MOS transistor M22 is used as the input terminal of the watchdog circuit 3-3 and connected to the output node Z of the edge extraction module 3-2. The output end of the inverter U1 is the output end of the burst detection module 3, and is used for outputting the state operating signal Pas/Act.
As shown in fig. 3, the edge extractor block generates a short reset pulse at its output node Z for each falling or rising edge of the signal at node X and feeds them to the watchdog circuit 3-3. In the watchdog circuit 3-3, the capacitor C _ WD IS constantly charged by the current source IS 2. The reset pulse at node Z triggers fet M22 on watchdog circuit 3-3 to reset the voltage on capacitor C _ WD. Therefore, in the presence of ultrasonic waves, the voltage at the node U is lower than the trigger point of the output inverter, which causes the state operating signal Pas/Act output by the burst detection module 3 to maintain a high logic level, and the switching tube 6 does not limit the current on the load. Otherwise, if the node IN1 does not oscillate for a certain time, M22 will not reset the dc voltage. Therefore, the dc voltage will be charged to a certain level above the trigger point of the output inverter and cause the state operating signal Pas/Act output by the burst detection module 3 to change to a low logic level. The circuit consumes little power in the absence of ultrasound or ultrasound signals below a certain threshold.
As shown in fig. 4, the rectifier module 1 includes a field effect transistor MS3, a field effect transistor MS4, and two active diode modules 2. The grid electrode of the field effect transistor MS3 and the drain electrode of the field effect transistor MS4 are both connected with the IN1 end of the ultrasonic collector Y1; the drain electrode of the field effect transistor MS3 and the grid electrode of the field effect transistor MS4 are both connected with the IN2 end of the ultrasonic collector Y1; the sources of fet MS3 and fet MS4 are connected together to provide ground.
The active diode module 2 comprises an active comparator module Comp1 and a dynamic bias module. The active comparator module Comp1 comprises field effect transistors M1-M7 and a buffer BUF; the grid of the field effect transistor M1 is connected with an externally input reference voltage V _ BP 1; the reference voltage V _ BP1 provides the start-up voltage for the active comparator module Comp 1; the drain electrode of the field effect transistor M1 is connected with the source electrode of the field effect transistor M2, and the drain electrode of the field effect transistor M2 is connected with the drain electrode of the field effect transistor M3; the gates of the field effect transistor M3, the field effect transistor M4 and the field effect transistor M5 are connected together; the source electrodes of the fet M3, the fet M4, the fet M5, and the negative power supply terminal of the buffer BUF are all connected to the input voltage V _ LDO provided by the double pass regulator module 4. The drain of the field effect transistor M6 is connected with the drain of the field effect transistor M4, and the gate is connected with the gate of the field effect transistor M7.
The drain of the FET M7 is connected to the drain of the FET M5 and the signal input terminal of the buffer BUF. The first input signal terminal of the NOR gate NOR and the gate of the fet M2 are connected to the status working signal Pas/Act provided by the burst detection module 3. The second input signal terminal of the NOR gate NOR is connected to the start-up signal SU. The output signal of the NOR gate NOR is connected with the gate of the field effect transistor M8; the output signal of the buffer BUF is connected with the drain electrode of the field effect transistor M8 and the gate electrode of the field effect transistor MS 1. The sources of the field effect transistors M1, M6 and M8, the drain of the field effect transistor MS1, the substrates of the field effect transistors M1 and M2 and the positive power supply end of the buffer BUF are connected together, and the power supply voltage V _ Rec provided by the rectifier module 1 is output. The source of the field effect transistor M7 is connected to the source of the field effect transistor MS1 as the signal input of the active diode module 2. The signal input ends of the two active diode modules 2 are respectively connected with the IN1 end and the IN2 end of the ultrasonic collector Y1.
In principle, the active diode module 2 is composed of a comparator module and a dynamic bias module. The comparator module has a buffer BUF formed by a series of inverters, which is supplied by the supply voltage V _ Rec and the voltage V _ LDO to drive the switching tube MS 1. The state working signal Pas/Act is an output signal of the burst detection module 3, and the start working signal SU is a reference voltage and an output signal of the start circuit module 5. The state working signal Pas/Act and the start working signal SU signal output the signal through the NOR gate to control the on and off of the field effect transistor M8. The reference voltage V _ BP1 is used to bias the switch tube M1. When no external signal is input, the Pas/Act signal is low, so that the switching tube M2 is cut off, and the current in the circuit is cut off, thereby reducing the power consumption. When no external signal is input or during the start-up of the circuit, the fet M8 is turned on, and the fet MS1 may be considered as a diode.
Resolution V of comparator in active diodein,minCan be defined as the minimum differential input voltage between the high and low level switches of the comparator, and can be expressed by the following formula:
Figure BDA0002864849590000061
wherein, VR2RSIs the rail-to-rail supply voltage of the comparator, ADCIs the dc gain of the comparator. When the input differential voltage of the comparator increases above the resolution value, the comparator will enter the large signal mode and its propagation delay (t)P) Mainly dependent on VR2RSAnd Slew Rate (SR), as shown by the following equation:
Figure BDA0002864849590000071
however, the Slew Rate (SR) depends on the current driving capability of the comparator output branch and the parasitic capacitance of the comparator output node. Therefore, improving SR generally requires higher power consumption. Thus, lowering VR2RST of the comparator can be increasedPWithout generating additional power consumption.
As shown in fig. 5, the two-pass regulator module 4 includes a series regulator module and a shunt regulator module. The first reference input end, the second reference input end and the third reference input end of the double-pass voltage stabilizer module 4 are respectively connected to the IN1 end, the power supply voltage V _ Rec and the reference voltage V _ Ref of the ultrasonic collector Y1. The series regulator module includes a comparator OPAMP1 and a field effect transistor M9. The shunt regulator module includes a comparator OPAMP2, a resistor R1, a current source IS1, and a field effect transistor M10. The inverting input end of the comparator OPAMP1 is connected with the reference voltage V _ Ref; the non-inverting input terminal of the comparator OPAMP1 is connected to the drain of the field effect transistor M9, one terminal of the resistor R1, the positive power terminal of the comparator OPAMP2, the source of the field effect transistor M10, one terminal of the capacitor C _ LDO, and one terminal of the resistor R _ LDO. The positive power supply of the comparator OPAMP1 is connected to the power supply voltage V _ Rec, and the negative power supply is connected to ground. The other end of the resistor R1 is connected to the negative terminal of the current source and the inverting input terminal of the comparator OPAMP 2. The positive electrode of the current source IS1, the negative power supply terminal of the comparator OPAMP2, the drain of the field effect transistor M10, the other end of the capacitor C _ LDO, and the other end of the resistor R _ LDO are all grounded. The non-inverting input of the comparator OPAMP2 is coupled to the reference voltage V _ Ref.
In principle, I _ RU1 and I _ RU2 in the rectifier module 1 represent the average discharge current of the parasitic capacitance C _ GS1 and the average current drawn by the comparator from V _ Rec, respectively. Similarly, C _ GS1, I _ RU3, and I _ RU4 may be defined in the active diode 2. In the figure, the position of the upper end of the main shaft,
Figure BDA0002864849590000072
I_RU=I_RU1+I_RU2+I_RU3+I_RU4
1) when I _ LDO < I _ RU, the voltage on C _ LDO starts to rise. At this time, the average current conducted by the series regulator is IShuntThe switching transistor M10 connects the excess current to ground.
2) When I _ LDO > I _ RU, the voltage on C _ LDO starts to decrease. At this time, the average current delivered by the series regulator is ISeriesI _ LDO-I _ RU to compensate the load current I _ LDO.
In a conventional linear regulator, a resistor divider is used to regulate V _ LDO to a desired reference voltage. To reduce the power consumption of the voltage divider circuit, a larger resistance is usually chosen, which is omitted in the present circuit by making the input reference voltage V _ Ref equal to the required voltage V _ LDO. In order to reduce the output oscillation of the voltage regulator, the reference voltage V _ Ref is compared with the comparator and then output. The inverting input terminal of the comparator OPAMP2 of the present invention functions as an inverting voltage input by interfacing with a current source.
As shown in fig. 6, the start-up circuit module 5 includes an inverter U1, an inverter U2, and field effect transistors M11 to M21. One end of the resistor R2 and the sources of the field effect transistors M17 and M18 are connected with the power voltage V _ Rec. The grid electrode of the field effect transistor M18, the grid electrode and the drain electrode of the field effect transistor M17, the drain electrode of the field effect transistor M21 and the source electrode of the field effect transistor M15 are all connected with a reference voltage V _ BP 1; the other end of the resistor R2 is connected with the gate of the field effect transistor M21, the input end of the inverter U1 and the drain of the field effect transistor M20. The drain electrode of the field effect transistor M18 is connected with the source electrode of the field effect transistor M16; the grid electrode of the field effect transistor M16, the grid electrode and the drain electrode of the field effect transistor M15 and the drain electrode of the field effect transistor M13 are all connected with a reference voltage V _ BP 2; the grid electrode of the field effect transistor M13, the grid electrode and the drain electrode of the field effect transistor M14, the source electrode of the field effect transistor M21, the grid electrode of the field effect transistor M20 and the drain electrode of the field effect transistor M16 are all connected with a reference voltage V _ Ref; the source electrode of the field effect transistor M20 is connected with the drain electrode of the field effect transistor M19; the source of the field effect transistor M13 is connected to the drain of the field effect transistor M11. The grid electrode of the field effect transistor M11, the grid electrode and the drain electrode of the field effect transistor M12, the source electrode of the field effect transistor M14 and the grid electrode of the field effect transistor M19 are all connected with a reference voltage V _ BN 1; the source electrode of the field effect transistor M11 is connected with one end of a resistor R3; the sources of the field effect transistors M12 and M19 and the other end of the resistor R3 are grounded. The output end of the inverter U1 is connected with the input end of the inverter U2; the output of inverter U2 is used to output an enable signal SU that is provided to rectifier module 1.
The reference voltage and enable circuit block 5 is used in principle to provide the reference voltage V Ref and the enable signal SU to other circuits. When the reference voltage and the starting circuit module work, the field effect transistor M21 is conducted. Two inverters are connected in series with the grid of the field effect transistor M21, and the output starting working signal SU is used as the starting signal of the rectifier module 1 in the invention.
The specific use method of the low-power-consumption ultrasonic energy collecting circuit is as follows:
step one, the starting circuit module 5 provides a reference voltage V _ Ref, a reference voltage V _ BP1 and a starting working signal SU to the rectifier module 1, and provides a reference voltage V _ Ref to the two-way voltage regulator module 4 and the switching tube 6. V _ BP1 is used to bias fet M1 within rectifier module 1.
And step two, an external ultrasonic generator UT1 sends out ultrasonic waves, and an ultrasonic collector Y1 receives ultrasonic signals and generates alternating voltage. When the alternating voltage frequency reaches a certain threshold, the state working signal Pas/Act sent by the burst detection module 3 to the rectifier module 1 and the switch tube 6 module keeps high level, so that the rectifier module 1 works, the output end of the switch tube 6 connected with the load keeps low level, the energy storage capacitor C _ stor is in a charging state, and the light emitting diode LED1 serving as the load is conducted to emit light.
And step three, when no external ultrasonic signal exists or the frequency of the external ultrasonic signal is lower than a certain threshold value, the state working signal Pas/Act output by the burst detection module 3 changes to a low level, so that the active diode module 2 in the rectifier module 1 is cut off, and the switch tube 6 is turned off.
The output terminal connected to the load becomes high level, and the light emitting diode LED1 as a load is turned off, and the power consumption of the circuit is reduced. While the reference voltage is supplied by the storage capacitor C _ stor.

Claims (10)

1. A low-power ultrasonic energy collection circuit is characterized in that: the ultrasonic wave collector comprises a rectifier module (1), a burst detection module (3), a switching tube (6), an ultrasonic wave collector Y1 and an energy storage capacitor C _ stor; the input interface of the rectifier module (1) is connected with the output interface of the ultrasonic collector Y1; the output interface of the rectifier module (1) is connected with an energy storage capacitor C _ stor; the switching tube (6) and the load are connected in series between a power supply voltage V _ Rec provided by the rectifier module (1) and the energy storage capacitor C _ stor and the ground wire; the burst detection module (3) provides a state working signal Pas/Act for the switching tube (6); the switching tube (6) controls the on-off of the load according to the state working signal Pas/Act; the burst detection module (3) comprises a waveform converter (3-1), an edge extraction module (3-2) and a watchdog circuit (3-3) which are sequentially connected in series; the input end of the waveform converter (3-1) is connected to the ultrasonic collector Y1, and the signal at the output end of the ultrasonic collector Y1 is converted into a square wave signal; when the frequency of the alternating signal input into the waveform converter (3-1) is smaller than a threshold value, the switch tube (6) keeps the load electrified; when the frequency of the alternating signal input into the waveform converter (3-1) is larger than a threshold value, the switching tube (6) controls the load to be powered off.
2. A low power ultrasound energy harvesting circuit according to claim 1, wherein: the waveform converter (3-1) is obtained by connecting an even number of digital inverters in series.
3. A low power ultrasound energy harvesting circuit according to claim 1, wherein: the edge extraction module (3-2) comprises a delay unit and an exclusive-OR gate; the output signal of the waveform converter (3-1) is divided into two paths, one path is connected to the first input end of the exclusive-OR gate, and the other path is connected to the second input end of the exclusive-OR gate after passing through the delay unit.
4. A low power ultrasound energy harvesting circuit according to claim 3, wherein: the delay unit comprises an even number of inverters which are sequentially connected in series.
5. A low power ultrasound energy harvesting circuit according to claim 1, wherein: the watchdog circuit (3-3) comprises a current source IS2The MOS transistor M22, the capacitor C _ WD and the inverter U3; current source IS2The input end of the inverter is connected with a power supply voltage V _ Rec, and the output end of the inverter is connected with the source electrode of the MOS tube M22, one end of the capacitor C _ WD and the input end of the inverter U1; the drain electrode of the MOS transistor M22 and the other end of the capacitor C _ WD are both grounded; the grid of the MOS transistor M22 is used as the input end of the watchdog circuit (3-3); the output terminal of the inverter U1 outputs a state operating signal Pas/Act.
6. A low power ultrasound energy harvesting circuit according to claim 1, wherein: the invention relates to a low-power-consumption ultrasonic energy collection circuit, which further comprises a double-pass voltage stabilizer module (4) and a starting circuit module (5); the rectifier module (1) adopts an active rectifier; the two-way voltage stabilizer module (4) is used for stabilizing voltage through the series voltage stabilizer module and the parallel voltage stabilizer module; the starting circuit module (5) provides a starting working signal SU for the rectifier module (1).
7. A low power ultrasound energy harvesting circuit according to claim 6, wherein: the rectifier module (1) comprises a field effect transistor MS3, a field effect transistor MS4 and two active diode modules (2); the grid electrode of the field effect transistor MS3 and the drain electrode of the field effect transistor MS4 are both connected with the IN1 end of the ultrasonic collector Y1; the drain electrode of the field effect transistor MS3 and the grid electrode of the field effect transistor MS4 are both connected with the IN2 end of the ultrasonic collector Y1; the sources of the field effect transistor MS3 and the field effect transistor MS4 are connected together to provide a ground wire; the active diode module (2) comprises an active comparator module Comp1 and a dynamic bias module; the active comparator module Comp1 includes a fet MS1, fets M1-M8, and a buffer BUF; the grid of the field effect transistor M1 is connected with an externally input reference voltage V _ BP 1; the drain electrode of the field effect transistor M1 is connected with the source electrode of the field effect transistor M2, and the drain electrode of the field effect transistor M2 is connected with the drain electrode of the field effect transistor M3; the gates of the field effect transistor M3, the field effect transistor M4 and the field effect transistor M5 are connected together; the source electrodes of the field-effect tube M3, the field-effect tube M4 and the field-effect tube M5 and the negative power supply end of the buffer BUF are all connected with an input voltage V _ LDO provided by the double-pass voltage stabilizer module (4); the drain electrode of the field effect transistor M6 is connected with the drain electrode of the field effect transistor M4, and the grid electrode of the field effect transistor M7 is connected with the grid electrode of the field effect transistor M;
the drain electrode of the field effect transistor M7 is connected with the drain electrode of the field effect transistor M5 and the signal input end of the buffer BUF; a first input signal terminal of the NOR gate NOR and a gate of the field effect transistor M2 are connected with a state working signal Pas/Act provided by the burst detection module (3); a second input signal end of the NOR gate NOR is connected with a start working signal SU; the output signal of the NOR gate NOR is connected with the gate of the field effect transistor M8; the output signal of the buffer BUF is connected with the drain electrode of the field effect transistor M8 and the grid electrode of the field effect transistor MS 1; the sources of the field effect transistors M1, M6 and M8, the drain of the field effect transistor MS1, the substrates of the field effect transistors M1 and M2 and the positive power supply end of the buffer BUF are connected together to provide a power supply voltage V _ Rec; the source electrode of the field effect transistor M7 is connected with the source electrode of the field effect transistor MS1 to serve as a signal input end of the active diode module (2); the signal input ends of the two active diode modules (2) are respectively connected with the IN1 end and the IN2 end of the ultrasonic collector Y1.
8. A low power ultrasound energy harvesting circuit according to claim 6, wherein: the two-way stabilityThe voltage transformer module (4) comprises a series voltage stabilizer module and a parallel voltage stabilizer module; the series regulator module comprises a comparator OPAMP1 and a field effect transistor M9; the parallel voltage regulator module comprises a comparator OPAMP2, a resistor R1 and a current source IS1And a field effect transistor M10; the inverting input end of the comparator OPAMP1 is connected with the reference voltage V _ Ref; the non-inverting input end of the comparator OPAMP1, the drain electrode of the field effect transistor M9, one end of the resistor R1, the positive power supply end of the comparator OPAMP2, the source electrode of the field effect transistor M10, one end of the capacitor C _ LDO and one end of the resistor R _ LDO are connected together, and the input voltage V _ LDO is input to the rectifier module (1); the positive power supply end of the comparator OPAMP1 is connected with the power supply voltage V _ Rec, and the negative power supply end is grounded; the other end of the resistor R1 is connected with the negative pole of the current source and the inverting input end of the comparator OPAMP 2; current source IS1The positive electrode of the comparator OPAMP2, the negative power supply end of the comparator OPAMP2, the drain electrode of the field effect transistor M10, the other end of the capacitor C _ LDO and the other end of the resistor R _ LDO are all grounded; the non-inverting input of the comparator OPAMP2 is coupled to the reference voltage V _ Ref.
9. A low power ultrasound energy harvesting circuit according to claim 6, wherein: the starting circuit module (5) comprises an inverter U1, an inverter U2 and field effect transistors M11-M21; one end of the resistor R2 and the sources of the field effect transistors M17 and M18 are connected with a power supply voltage V _ Rec; the grid electrode of the field effect transistor M18, the grid electrode and the drain electrode of the field effect transistor M17, the drain electrode of the field effect transistor M21 and the source electrode of the field effect transistor M15 are all connected with a reference voltage V _ BP 1; the other end of the resistor R2 is connected with the grid of the field-effect tube M21, the input end of the phase inverter U1 and the drain of the field-effect tube M20; the drain electrode of the field effect transistor M18 is connected with the source electrode of the field effect transistor M16; the grid electrode of the field effect transistor M16, the grid electrode and the drain electrode of the field effect transistor M15 and the drain electrode of the field effect transistor M13 are all connected with a reference voltage V _ BP 2; the grid electrode of the field effect transistor M13, the grid electrode and the drain electrode of the field effect transistor M14, the source electrode of the field effect transistor M21, the grid electrode of the field effect transistor M20 and the drain electrode of the field effect transistor M16 are all connected with a reference voltage V _ Ref; the source electrode of the field effect transistor M20 is connected with the drain electrode of the field effect transistor M19; the source electrode of the field effect transistor M13 is connected with the drain electrode of the field effect transistor M11; the grid electrode of the field effect transistor M11, the grid electrode and the drain electrode of the field effect transistor M12, the source electrode of the field effect transistor M14 and the grid electrode of the field effect transistor M19 are all connected with a reference voltage V _ BN 1; the source electrode of the field effect transistor M11 is connected with one end of a resistor R3; the sources of the field effect transistors M12 and M19 and the other end of the resistor R3 are grounded; the output end of the inverter U1 is connected with the input end of the inverter U2; the output of inverter U2 is used to output a startup signal SU that is provided to the rectifier module (1).
10. A method of using a low power ultrasound energy harvesting circuit according to claim 1, wherein: an external ultrasonic generator is used for emitting ultrasonic waves, and an ultrasonic collector Y1 receives ultrasonic signals and generates alternating voltage; the rectifier module (1) rectifies the alternating voltage and provides power supply voltage for the switching tube and the load; in the burst detection module (3), a waveform converter (3-1) converts an input alternating voltage into a square wave signal; the edge extraction module (3-2) extracts the rising edge and the falling edge of the square wave signal to form a pulse signal; each pulse in the pulse signal enables a capacitor which is continuously charged in the watchdog circuit (3-3) to reset, so that the input of an inverter in the watchdog circuit (3-3) is kept at a low level, and the output of the inverter is kept at a high level; the high level output by the watchdog circuit (3-3) enables the switch tube (6) to be in a conducting state all the time;
when the load is required to be controlled to be powered off, the ultrasonic generator is controlled to be turned off or the output frequency of the ultrasonic generator is made to be larger than a preset value, so that the edge extraction module (3-2) cannot continuously provide pulses for the watchdog circuit (3-3), and a capacitor in the watchdog circuit (3-3) is charged to output a high level to the inverter; the inverter outputs a keeping low level to the switching tube (6); the switch tube (6) is turned off, so that the load is powered off.
CN202011579077.0A 2020-12-28 2020-12-28 Low-power-consumption ultrasonic energy collection circuit and use method thereof Active CN112688408B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011579077.0A CN112688408B (en) 2020-12-28 2020-12-28 Low-power-consumption ultrasonic energy collection circuit and use method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011579077.0A CN112688408B (en) 2020-12-28 2020-12-28 Low-power-consumption ultrasonic energy collection circuit and use method thereof

Publications (2)

Publication Number Publication Date
CN112688408A true CN112688408A (en) 2021-04-20
CN112688408B CN112688408B (en) 2022-06-14

Family

ID=75452679

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011579077.0A Active CN112688408B (en) 2020-12-28 2020-12-28 Low-power-consumption ultrasonic energy collection circuit and use method thereof

Country Status (1)

Country Link
CN (1) CN112688408B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113310677A (en) * 2021-05-27 2021-08-27 南京湖博智能科技有限公司 Fire hydrant monitoring devices
CN114094686A (en) * 2022-01-18 2022-02-25 成都飞英思特科技有限公司 Micro-energy acquisition circuit, acquisition device and power supply method

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102255397A (en) * 2011-06-28 2011-11-23 深圳创维-Rgb电子有限公司 Wireless driving device
CN102315698A (en) * 2011-08-30 2012-01-11 杭州矽力杰半导体技术有限公司 Magnetic field coupling-type non-contact electric energy transmission device
KR20120020220A (en) * 2010-08-27 2012-03-08 삼성전자주식회사 Active rectifier with delay locked loop, wireless power receiving apparatus including active rectifier
CN102611207A (en) * 2012-03-14 2012-07-25 邹磊 Power management module for radio-frequency portable energy supply equipment
US20120299540A1 (en) * 2011-05-27 2012-11-29 uBeam Inc. Sender communications for wireless power transfer
CN203225573U (en) * 2013-05-16 2013-10-02 常州矽能电子科技有限公司 Power-storing LED driver employing switching MOS tube and DC-DC module capable of multiplexing
CN105656167A (en) * 2016-03-16 2016-06-08 苏州大学 Passive wireless sensor node power supply circuit based on vibration energy harvesters
CN205491391U (en) * 2016-03-22 2016-08-17 西京学院 Complementary ultrasonic wave of scene intelligence lamp control system
CN106301072A (en) * 2016-08-17 2017-01-04 南京邮电大学 A kind of piezoelectric energy collection system and control method thereof
CN205986343U (en) * 2016-08-26 2017-02-22 武汉大学 Wireless charging device that can separate metal dielectric based on USWPT
CN106787088A (en) * 2017-01-18 2017-05-31 西北工业大学 It is applied to the self powered supply management circuit of discontinuous piezoelectric energy acquisition system
CN109546847A (en) * 2019-01-16 2019-03-29 合肥惠科金扬科技有限公司 Synchronization breaking circuit, driving circuit and the synchronous cut-off method of Switching Power Supply
CN111371130A (en) * 2018-12-07 2020-07-03 深圳迈瑞生物医疗电子股份有限公司 Wireless power supply equipment, method and electronic equipment

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120020220A (en) * 2010-08-27 2012-03-08 삼성전자주식회사 Active rectifier with delay locked loop, wireless power receiving apparatus including active rectifier
US20120299540A1 (en) * 2011-05-27 2012-11-29 uBeam Inc. Sender communications for wireless power transfer
CN102255397A (en) * 2011-06-28 2011-11-23 深圳创维-Rgb电子有限公司 Wireless driving device
CN102315698A (en) * 2011-08-30 2012-01-11 杭州矽力杰半导体技术有限公司 Magnetic field coupling-type non-contact electric energy transmission device
CN102611207A (en) * 2012-03-14 2012-07-25 邹磊 Power management module for radio-frequency portable energy supply equipment
CN203225573U (en) * 2013-05-16 2013-10-02 常州矽能电子科技有限公司 Power-storing LED driver employing switching MOS tube and DC-DC module capable of multiplexing
CN105656167A (en) * 2016-03-16 2016-06-08 苏州大学 Passive wireless sensor node power supply circuit based on vibration energy harvesters
CN205491391U (en) * 2016-03-22 2016-08-17 西京学院 Complementary ultrasonic wave of scene intelligence lamp control system
CN106301072A (en) * 2016-08-17 2017-01-04 南京邮电大学 A kind of piezoelectric energy collection system and control method thereof
CN205986343U (en) * 2016-08-26 2017-02-22 武汉大学 Wireless charging device that can separate metal dielectric based on USWPT
CN106787088A (en) * 2017-01-18 2017-05-31 西北工业大学 It is applied to the self powered supply management circuit of discontinuous piezoelectric energy acquisition system
CN111371130A (en) * 2018-12-07 2020-07-03 深圳迈瑞生物医疗电子股份有限公司 Wireless power supply equipment, method and electronic equipment
CN109546847A (en) * 2019-01-16 2019-03-29 合肥惠科金扬科技有限公司 Synchronization breaking circuit, driving circuit and the synchronous cut-off method of Switching Power Supply

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113310677A (en) * 2021-05-27 2021-08-27 南京湖博智能科技有限公司 Fire hydrant monitoring devices
CN114094686A (en) * 2022-01-18 2022-02-25 成都飞英思特科技有限公司 Micro-energy acquisition circuit, acquisition device and power supply method

Also Published As

Publication number Publication date
CN112688408B (en) 2022-06-14

Similar Documents

Publication Publication Date Title
CN112688408B (en) Low-power-consumption ultrasonic energy collection circuit and use method thereof
CN102136800B (en) Switching regulaor
US10985743B2 (en) Low-power-consumption high-speed zero-current switch
CN2884287Y (en) Circuit for starting current-source or valtage-source
CN102097923B (en) Driving circuit with zero turn-off current and driving method thereof
CN101102080B (en) Startup circuit of voltage elevation regulator and its startup method
US8587972B2 (en) Apparatus and system for transformer frequency control
CN111699607A (en) Micro-energy acquisition chip, circuit, equipment and control method thereof
CN112803744B (en) Low-power-consumption power supply starting control device and method and power supply equipment
CN215072203U (en) Soft start circuit and motor
CN113489126B (en) High-efficient milliwatt level photovoltaic energy collection control circuit
CN110867912A (en) Power management system and method for optimizing quiescent current
CN113037070B (en) Fast starting circuit of switching power supply
CN109687707B (en) Step-down circuit
CN209767367U (en) self-powered circuit and control chip of switching power supply, switching power supply and electrical device
CN107359785B (en) Switching power supply and starting circuit thereof
CN112968606B (en) ELVDD structure for AMOLED
CN111277144B (en) Switching power supply circuit and voltage boosting method
CN113110146B (en) Driving power supply circuit and driving method thereof
CN214412594U (en) Boosting device and power supply equipment
CN221103321U (en) Power supply selection switch circuit, chip and radio frequency front end module
CN220173112U (en) High-efficiency CMOS rectifying circuit with threshold compensation
CN109756108B (en) Charge pump conversion circuit
CN220022407U (en) Power-down protection circuit and electronic equipment
CN219592272U (en) Quick start circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant