CN112685291A - System joint test method and related device - Google Patents

System joint test method and related device Download PDF

Info

Publication number
CN112685291A
CN112685291A CN202011541846.8A CN202011541846A CN112685291A CN 112685291 A CN112685291 A CN 112685291A CN 202011541846 A CN202011541846 A CN 202011541846A CN 112685291 A CN112685291 A CN 112685291A
Authority
CN
China
Prior art keywords
test
interface
target interface
return value
interceptor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011541846.8A
Other languages
Chinese (zh)
Inventor
洪润
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ping An Puhui Enterprise Management Co Ltd
Original Assignee
Ping An Puhui Enterprise Management Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ping An Puhui Enterprise Management Co Ltd filed Critical Ping An Puhui Enterprise Management Co Ltd
Priority to CN202011541846.8A priority Critical patent/CN112685291A/en
Publication of CN112685291A publication Critical patent/CN112685291A/en
Pending legal-status Critical Current

Links

Images

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

The application provides a system combined test method and a related device, and belongs to the technical field of test. The method comprises the following steps: the uniform access assembly is internally provided with an interceptor of the interface, a simulation return value and a test interface configuration; when a system starts testing, acquiring a testing environment of a system calling target interface; determining whether to open an interceptor according to the test environment, and intercepting a target interface when the interceptor is opened; when the target interface is intercepted, determining whether to simulate the return value of the target interface according to the configuration of the test interface; when the return value of the simulation target interface is determined, acquiring the simulation return value of the matching target interface and the test environment; and returning the simulation return value of the matched target interface to the system. The present application also relates to the field of blockchain technology, and the systems and associated systems may be systems operating in different blockchain nodes. The reliability and the test efficiency of the system joint test are effectively improved.

Description

System joint test method and related device
Technical Field
The application relates to the technical field of testing, in particular to a system combined testing method and a related device.
Background
Along with the fact that the development iteration cycle is shorter and shorter in the agile development process, the development rhythm is faster and faster, the development quality requirement is higher and higher, the development self-test quality requirement and the time requirement for the inter-system joint test are higher and higher, the quality and the efficiency of the self-test and the joint test influence the efficiency of the test cycle, and the importance is increased increasingly.
In the prior art, a plurality of self-testing and joint-testing schemes are provided, namely unit testing, pairwise joint testing, three-party joint testing and multi-party joint testing, and the prior unit testing frame has a plurality of mature frames, such as a Junit4 frame and a Mockito frame, and is convenient to use. However, these tests are only convenient for unit testing, and it is difficult to perform twin-test, three-party test and multi-party test when multiple systems are connected, and multi-party test requires multiple systems to start service at the same time for joint debugging, so that the communication cost is greatly increased, the system code coupling degree is high, and the joint test interface has long calling link, and each system has complex feedback return value in cooperation with the number of manufacture, and the reliability of joint test is poor, and the number of manufacture is developed once, which cannot be reused, thereby further reducing the efficiency of joint test.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
An object of the embodiments of the present application is to provide a system joint test method and a related apparatus, which can effectively improve reliability and test efficiency of a system joint test.
According to an embodiment of the application, a system joint test method is characterized in that the method is applied to a unified access component, the unified access component belongs to the system, the unified access component is used for the system to call interfaces of a plurality of associated systems, and an interceptor, an analog return value and a test interface configuration of the interfaces are arranged in the unified access component; the method comprises the following steps:
when the system starts testing, obtaining a testing environment of the system calling target interface;
determining whether the interceptor is opened or not according to the test environment, and intercepting the target interface when the interceptor is opened;
when the target interface is intercepted, determining whether to simulate a return value of the target interface according to the configuration of the test interface;
when the return value simulating the target interface is determined, acquiring a simulated return value matching the target interface and the test environment;
and returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
In some embodiments of the present application, the determining whether to open the interceptor according to the test environment and intercepting the target interface when the interceptor is opened includes:
acquiring a switch configuration file corresponding to the test environment, wherein the switch configuration file contains switch configuration information of the interceptor;
and determining whether to turn on the interceptor according to the switch configuration information so as to turn on the interceptor, and intercepting the target interface when the interceptor is turned on.
In some embodiments of the present application, the determining whether to open the interceptor according to the test environment and intercepting the target interface when the interceptor is opened includes:
acquiring test environments and interface related information of a plurality of target interfaces;
inputting the test environment and interface related information of the target interfaces into a preset interception analysis model to obtain a target interface to be intercepted;
and opening an interceptor corresponding to the target interface to be intercepted so as to intercept the target interface to be intercepted.
In some embodiments of the present application, before determining whether to simulate a return value of the target interface according to the test interface configuration when the target interface is intercepted, the method further includes:
acquiring the total configuration of an interface, wherein the total configuration of the interface contains information of the interface of a return value to be simulated;
and filtering the interfaces of the return values to be simulated from the interfaces of the associated systems, and adding the interfaces of the return values to be simulated to the test interface configuration.
In some embodiments of the present application, the unified gateway component is provided with a simulation return value corresponding to each of the interfaces in different test environments, test scenarios, and call parameters; when determining to simulate the return value of the target interface, acquiring a simulated return value matching the target interface and the test environment, including:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
and acquiring a simulation return value of the test environment, the call parameter and the test scene which are matched and called with the target interface.
In some embodiments of the present application, the obtaining a simulated return value matching the target interface and the test environment when determining a return value simulating the target interface includes:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
inputting a test environment, a call parameter and a test scene for calling the target interface into a return value generation model, so that the return value generation model generates a simulated return value matched with the target interface and the test environment.
In some embodiments of the present application, the training method of the return value generation model includes:
collecting an interface sample set, wherein the interface sample set comprises a test environment, a calling parameter and a test scene of an interface, and the interface sample sets a corresponding simulation return value sample;
and taking the interface sample set as an input of a return value generation model, taking the simulation return value sample as an expected output, and training the accuracy of the return value generation model to reach a preset threshold value.
According to another embodiment of the present application, a system joint test apparatus is applied to a unified gateway component, the unified gateway component belongs to the system, the unified gateway component is used for the system to call interfaces of a plurality of associated systems, and an interceptor, a simulation return value and a test interface configuration of the interfaces are arranged in the unified gateway component; the device comprises:
the acquisition module is used for acquiring the test environment of the system call target interface when the system starts a test;
the interception module is used for determining whether the interceptor is opened or not according to the test environment and intercepting the target interface when the interceptor is opened;
the determining module is used for determining whether to simulate a return value of the target interface according to the test interface configuration when the target interface is intercepted;
the simulation module is used for acquiring a simulation return value matched with the target interface and the test environment when the return value for simulating the target interface is determined;
and the feedback module is used for returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
According to another embodiment of the present application, an electronic device may include: a memory storing computer readable instructions; a processor reading computer readable instructions stored by the memory to perform the method as described above.
According to another embodiment of the present application, a computer program medium having computer readable instructions stored thereon, which, when executed by a processor of a computer, cause the computer to perform the method as described above.
According to the embodiment of the application, a unified access assembly is arranged during system joint test (joint debugging of a system and a plurality of associated systems), based on configuration in the unified access assembly, a target interface can be intercepted dynamically according to a test environment when an interceptor is opened, whether a return value of a simulation target interface is returned or not is determined after the target interface is intercepted, and the simulation return value matched with the target interface and the test environment is obtained and returned to the system when the return is needed, so that the test is completed. The realization is as follows: the decoupling test of the service codes and the joint test codes is realized, the pluggable plug-in type simulation correlation system return data (simulation return value) is realized through the control of the uniform access component according to the interceptor switch, the service system codes are non-invasive, and the decoupling of the service system codes and the joint test correlation system codes is realized; and environment independent configuration testing: the simulation return values of the switches of the interceptors and the associated system interfaces can be configured independently according to different test environments, so that the simulation return values can be configured according to different requirements in different environments, and the reliability of the system joint test is effectively improved. The dynamic configuration test can dynamically configure each interface calling parameter (interceptor, simulation return value and test interface configuration of the interface) based on the unified access component, each interface only needs to be configured once, and the interface simulation return value can be reused in each test, so that the number making efficiency is improved, and the test efficiency is improved.
Other features and advantages of the present application will be apparent from the following detailed description, taken in conjunction with the accompanying drawings, or may be learned by practice of the application.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
FIG. 1 shows a schematic diagram of a system to which embodiments of the present application may be applied.
FIG. 2 shows a flow diagram of a method of system joint test according to an embodiment of the present application.
FIG. 3 shows a flow diagram of a method of system joint test according to yet another embodiment of the present application.
FIG. 4 shows a block diagram of a system joint test apparatus according to an embodiment of the present application.
FIG. 5 shows a block diagram of an electronic device according to an embodiment of the application.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the application. One skilled in the relevant art will recognize, however, that the subject matter of the present application can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and so forth. In other instances, well-known methods, devices, implementations, or operations have not been shown or described in detail to avoid obscuring aspects of the application.
The block diagrams shown in the figures are functional entities only and do not necessarily correspond to physically separate entities. I.e. these functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor means and/or microcontroller means.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
FIG. 1 shows a schematic diagram of a system 100 to which embodiments of the present application may be applied.
As shown in fig. 1, the system 100 may include a server 101 and a server 102, and the server 102 may include a plurality of servers corresponding to the associated systems. The server 101 and the server 102 may be directly or indirectly connected through wireless communication, and the application is not limited thereto. The systems of the server 101 and the server 102 can make a multiparty join interface call. The server 101 may be a cloud server. The server 101 may also block nodes in a chain network.
In an embodiment of this example, as shown in fig. 1, a system runs on a server 101, and the server 101 may execute a system joint test method, where the method is applied to a unified gateway component, the unified gateway component belongs to the system, the unified gateway component is used for the system to call interfaces of multiple associated systems, and an interceptor, an analog return value, and a test interface configuration of the interfaces are set in the unified gateway component; the method comprises the following steps: when the system starts testing, obtaining a testing environment of the system calling target interface; determining whether the interceptor is opened or not according to the test environment, and intercepting the target interface when the interceptor is opened; when the target interface is intercepted, determining whether to simulate a return value of the target interface according to the configuration of the test interface; when the return value simulating the target interface is determined, acquiring a simulated return value matching the target interface and the test environment; and returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
FIG. 2 schematically shows a flow diagram of a method of system joint test according to an embodiment of the present application. An execution main body of the system joint test method may be an electronic device with a calculation processing function, such as the server 101 shown in fig. 1, a system is run on the server 101, and the server 101 may execute the system joint test method, where the method is applied to a unified gateway component belonging to the system, the unified gateway component is used for the system to call interfaces of multiple associated systems, and an interceptor, an analog return value, and a test interface configuration of the interfaces are set in the unified gateway component.
As shown in fig. 2, the system joint test method may include steps S210 to S250.
Step S210, when the system starts testing, obtaining a testing environment of the system calling target interface;
step S220, determining whether the interceptor is opened or not according to the test environment, and intercepting the target interface when the interceptor is opened;
step S230, when the target interface is intercepted, determining whether to simulate a return value of the target interface according to the configuration of the test interface;
step S240, when the return value of the target interface is determined to be simulated, obtaining a simulated return value matched with the target interface and the test environment;
and step S250, returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
Furthermore, when the system is jointly tested (the system and a plurality of associated systems are jointly adjusted), the target interface can be intercepted when the interceptor is opened according to the test environment dynamically by setting the unified access assembly based on the configuration in the unified access assembly, whether the return value of the simulation target interface is returned or not is determined after the target interface is intercepted, and the simulation return value which is matched with the target interface and the test environment is obtained and returned to the system when the return is needed, so that the test is completed. The realization is as follows: the decoupling test of the service codes and the joint test codes is realized, the pluggable plug-in type simulation correlation system return data (simulation return value) is realized through the control of the uniform access component according to the interceptor switch, the service system codes are non-invasive, and the decoupling of the service system codes and the joint test correlation system codes is realized; and environment independent configuration testing: the simulation return values of the switches of the interceptors and the associated system interfaces can be configured independently according to different test environments, so that the simulation return values can be configured according to different requirements in different environments, and the reliability of the system joint test is effectively improved. The dynamic configuration test can dynamically configure each interface calling parameter (interceptor, simulation return value and test interface configuration of the interface) based on the unified access component, each interface only needs to be configured once, and the interface simulation return value can be reused in each test, so that the number making efficiency is improved, and the test efficiency is improved.
The following describes the specific process of each step performed when the system is jointly tested.
In step S210, when the system starts a test, a test environment of the system call target interface is obtained.
In the embodiment of the present example, the unified gateway component is configured to implement a gateway of an interface for a system call of multiple associated systems, that is, each time a system calls an interface of another associated system, the unified gateway component passes through the unified gateway component, and the unified gateway component monitors a target interface of the system call in a unified manner.
The called interface unified access component can monitor the input calling parameters and system testing environment information when the system calls the interface.
In step S220, it is determined whether to open the interceptor according to the test environment, and the target interface is intercepted when the interceptor is opened.
In the embodiment of the example, the interceptor is used to implement interception of the interface to avoid the system calling the components of the interface directly from the relational system. Each interface can be provided with a corresponding interceptor, and the interfaces can be intercepted when the interceptors are opened. And determining whether the interceptor is opened according to the test environment, determining whether the interceptor in the unified access assembly under the test environment is opened, and if the interceptor is opened, performing interface interception.
For example, the interceptor may be set to be an AOP section, and the interface may be intercepted by the section, and direct joint debugging between the system and the associated system may be avoided by intercepting the target interface.
In one embodiment, the determining whether to turn on the interceptor according to the test environment and intercepting the target interface when the interceptor is turned on includes:
acquiring a switch configuration file corresponding to the test environment, wherein the switch configuration file contains switch configuration information of the interceptor;
and determining whether to turn on the interceptor according to the switch configuration information so as to turn on the interceptor, and intercepting the target interface when the interceptor is turned on.
Whether the interceptor is opened or not can be realized through a switch configuration file, the corresponding switch configuration file is configured according to different test environments, and a switch lock of the interceptor is configured in the switch configuration file. For example, the environment configuration for the AOP profile may be implemented as a profile switch configuration class: java, aopautoconfiguration; the section switch configuration can be configured: enabled, default false, configure to true on apollo opens the cut plane.
In one embodiment, referring to fig. 3, the determining whether to open the interceptor according to the test environment and intercepting the target interface when the interceptor is opened includes:
step S310, obtaining the test environment and interface related information of a plurality of target interfaces;
step S320, inputting the test environment and interface related information of a plurality of target interfaces into a preset interception analysis model to obtain a target interface to be intercepted;
step S330, opening the interceptor corresponding to the target interface to be intercepted to intercept the target interface to be intercepted.
The test environment may include a hardware environment, a software environment, and the like; the interface related information may include an interface name, information of a target associated system corresponding to the interface, and the like. The testing environment and interface related information of the target interfaces are input into a preset interception analysis model, the preset interception analysis model can make planning decision on interception of the called target interfaces, and the preset interception analysis model outputs the target interfaces to be intercepted, so that the interfaces can be intercepted dynamically in real time, and the interfaces which are not configured in advance are prevented from being leaked.
The method for training the interception analysis model comprises the following steps: collecting an interface interception training sample set, wherein the interface interception training sample set comprises test environments of a plurality of interfaces and interface related information, and the interface interception training sample sets corresponding target interface labels to be intercepted; and taking the interface interception training sample as an input of an interception analysis model, taking the target interface label to be intercepted as an expected output, and training the accuracy of the interception analysis model to reach a preset threshold value. The interception analysis model is a machine learning model.
In step S230, when the target interface is intercepted, it is determined whether to simulate a return value of the target interface according to the test interface configuration.
In the embodiment of the present example, the test interface configuration includes configuration information on whether to simulate the return value of the target interface (i.e., simulate the number of artifacts), and the configuration information on whether to simulate the return value of the target interface (i.e., simulate the number of artifacts) may be set for the target interface, or may be set for all the interfaces. And further determining whether to simulate the return value of the target interface according to the test interface configuration.
For example, the AOP section may further analyze whether to perform a simulation number generation on the interface (i.e., mock processing, i.e., a simulation return value corresponding to a call parameter when returning to the call interface). Implementation class of AOP facet such as esgmockaspect. Switch, default false, configured to true on apollo turns on the section emulation artificial function (i.e., mock logic function).
In one embodiment, before determining whether to simulate a return value of the target interface according to the test interface configuration when the target interface is intercepted, the method further includes:
acquiring the total configuration of an interface, wherein the total configuration of the interface contains information of the interface of a return value to be simulated;
and filtering the interfaces of the return values to be simulated from the interfaces of the associated systems, and adding the interfaces of the return values to be simulated to the test interface configuration.
The information of the interface that is to emulate the return value may be an identification of the interface. The interfaces which need to simulate the return value can be dynamically appointed through the general configuration of the configuration interfaces, then the interfaces can be filtered out and stored in the configuration of the testing interfaces collected by the unified access assembly, and then the interfaces which need to simulate the return value can be dynamically set.
In step S240, when the return value for simulating the target interface is determined, a simulated return value matching the target interface and the test environment is obtained.
In the embodiment of the present example, the unified gateway component stores the simulation return value, and the simulation return value matching the current test environment and the current call parameter of the target interface can be obtained according to the test environment. In some embodiments, the simulated return value may also be generated according to the test environment, the call parameters, and the test scenario implementation of the call target interface. The simulation return value, that is, the return value returned by the target interface in the simulated associated system according to the call parameter.
In one embodiment, each of the interfaces is provided with a simulation return value corresponding to different test environments, test scenes and call parameters; when determining to simulate the return value of the target interface, acquiring a simulated return value matching the target interface and the test environment, including:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
and acquiring a simulation return value of the test environment, the call parameter and the test scene which are matched and called with the target interface.
By acquiring the test environment, the call parameters and the test scene of the call target interface, the key information of the call target interface can be acquired, and then the simulated return values of the test environment, the call parameters and the test scene which are matched with the call target interface are acquired, so that the return values meeting the test requirements can be accurately acquired, and the test accuracy is ensured.
In one embodiment, when determining a return value for simulating the target interface, obtaining a simulated return value matching the target interface and the test environment includes:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
inputting a test environment, a call parameter and a test scene for calling the target interface into a return value generation model, so that the return value generation model generates a simulated return value matched with the target interface and the test environment.
The return value generation model is a machine learning model trained in advance. The test environment, the call parameters and the test scene of the call target interface are obtained, and the key information of the call target interface can be obtained.
The test environment, the call parameters and the test scene of the call target interface are input into a return value generation model, and the return value generation model can generate a simulated return value matched with the target interface and the test environment in real time, so that the test is further ensured to be effectively carried out.
In one embodiment, the training method of the return value generation model includes:
collecting an interface sample set, wherein the interface sample set comprises a test environment, a calling parameter and a test scene of an interface, and the interface sample sets a corresponding simulation return value sample;
and taking the interface sample set as an input of a return value generation model, taking the simulation return value sample as an expected output, and training the accuracy of the return value generation model to reach a preset threshold value.
The interface samples are collected and used as input, the return value generation model can be controlled to output simulated return value samples reaching a preset accuracy rate by continuously adjusting the parameters of the return value generation model, and training of the return value generation model is achieved.
In step S250, a simulation return value matching the target interface is returned to the system, so as to complete the test of the system calling the target interface.
In the embodiment of the present example, the simulation return value matching the target interface is returned to the system, and the system may perform response processing in the subsequent system according to the simulation return value, thereby implementing a test of the system calling the target interface.
FIG. 4 shows a block diagram of a system joint test apparatus according to an embodiment of the present application.
As shown in fig. 4, the system joint test apparatus 400 is applied to a unified gateway component, where the unified gateway component belongs to the system, the unified gateway component is used for the system to call interfaces of multiple associated systems, and an interceptor, a simulation return value, and a test interface configuration of the interfaces are arranged in the unified gateway component; the device comprises:
the obtaining module 410 may be configured to obtain a test environment of the system call target interface when the system starts a test;
the interception module 420 may be configured to determine whether to open the interceptor according to the test environment, and intercept the target interface when the interceptor is opened;
the determining module 430 may be configured to determine whether to simulate a return value of the target interface according to the test interface configuration when the target interface is intercepted;
the simulation module 440 may be configured to, when determining a return value for simulating the target interface, obtain a simulated return value matching the target interface and the test environment;
feedback module 450 may be used to return a simulated return value to the system that matches the target interface to complete the test for the system to invoke the target interface.
It should be noted that although in the above detailed description several modules or units of the device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the application. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.
FIG. 5 schematically shows a block diagram of an electronic device according to an embodiment of the application.
It should be noted that the electronic device 500 shown in fig. 5 is only an example, and should not bring any limitation to the functions and the scope of the application of the embodiments.
As shown in fig. 5, the electronic apparatus 500 includes a Central Processing Unit (CPU)501 that can perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)502 or a program loaded from a storage section 508 into a Random Access Memory (RAM) 503. In the RAM503, various programs and data necessary for system operation are also stored. The CPU 501, ROM 502, and RAM503 are connected to each other via a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.
The following components are connected to the I/O interface 505: an input portion 506 including a keyboard, a mouse, and the like; an output portion 507 including a display such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage portion 508 including a hard disk and the like; and a communication section 509 including a network interface card such as a LAN (local area network) card, a modem, or the like. The communication section 509 performs communication processing via a network such as the internet. The driver 510 is also connected to the I/O interface 505 as necessary. A removable medium 511 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 510 as necessary, so that a computer program read out therefrom is mounted into the storage section 508 as necessary.
In particular, according to embodiments of the present application, the processes described below with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication section 509, and/or installed from the removable medium 511. The computer program executes various functions defined in the system of the present application when executed by a Central Processing Unit (CPU) 501.
It should be noted that the computer readable medium shown in the present application may be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In this application, however, a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF (radio frequency), etc., or any suitable combination of the foregoing.
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present application may be implemented by software, or may be implemented by hardware, and the described units may also be disposed in a processor. Wherein the names of the elements do not in some way constitute a limitation on the elements themselves.
As another aspect, the present application also provides a computer-readable medium, which may be contained in the electronic device described in the above embodiments; or may exist separately without being assembled into the electronic device. The computer readable medium carries one or more programs which, when executed by an electronic device, cause the electronic device to implement the method described in the above embodiments.
It should be noted that although in the above detailed description several modules or units of the device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the application. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiments of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to execute the method according to the embodiments of the present application.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the embodiments disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains.
It will be understood that the present application is not limited to the embodiments that have been described above and shown in the drawings, but that various modifications and changes can be made without departing from the scope thereof.

Claims (10)

1. A system joint test method is characterized in that the method is applied to a unified entrance component, the unified entrance component belongs to the system, the unified entrance component is used for the system to call interfaces of a plurality of associated systems, and an interceptor, an analog return value and a test interface configuration of the interfaces are arranged in the unified entrance component; the method comprises the following steps:
when the system starts testing, obtaining a testing environment of the system calling target interface;
determining whether the interceptor is opened or not according to the test environment, and intercepting the target interface when the interceptor is opened;
when the target interface is intercepted, determining whether to simulate a return value of the target interface according to the configuration of the test interface;
when the return value simulating the target interface is determined, acquiring a simulated return value matching the target interface and the test environment;
and returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
2. The method of claim 1, wherein the determining whether to turn on the interceptor according to the test environment and intercepting the target interface when the interceptor is turned on comprises:
acquiring a switch configuration file corresponding to the test environment, wherein the switch configuration file contains switch configuration information of the interceptor;
and determining whether to turn on the interceptor according to the switch configuration information so as to turn on the interceptor, and intercepting the target interface when the interceptor is turned on.
3. The method of claim 1, wherein the target interface is plural, and the determining whether to turn on the interceptor according to the test environment and intercepting the target interface when the interceptor is turned on comprises:
acquiring test environments and interface related information of a plurality of target interfaces;
inputting the test environment and interface related information of the target interfaces into a preset interception analysis model to obtain a target interface to be intercepted;
and opening an interceptor corresponding to the target interface to be intercepted so as to intercept the target interface to be intercepted.
4. The method of claim 1, wherein before determining whether to emulate a return value of the target interface according to the test interface configuration when the target interface is intercepted, further comprising:
acquiring the total configuration of an interface, wherein the total configuration of the interface contains information of the interface of a return value to be simulated;
and filtering the interfaces of the return values to be simulated from the interfaces of the associated systems, and adding the interfaces of the return values to be simulated to the test interface configuration.
5. The method of claim 1, wherein each of the interfaces is configured to provide simulated return values corresponding to different test environments, test scenarios, and call parameters; when determining to simulate the return value of the target interface, acquiring a simulated return value matching the target interface and the test environment, including:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
and acquiring a simulation return value of the test environment, the call parameter and the test scene which are matched and called with the target interface.
6. The method of claim 1, wherein obtaining a simulated return value that matches the target interface and the test environment when determining a return value that simulates the target interface comprises:
acquiring a test environment, a call parameter and a test scene for calling the target interface;
inputting a test environment, a call parameter and a test scene for calling the target interface into a return value generation model, so that the return value generation model generates a simulated return value matched with the target interface and the test environment.
7. The method of claim 6, wherein the training method of the return value generation model comprises:
collecting an interface sample set, wherein the interface sample set comprises a test environment, a calling parameter and a test scene of an interface, and the interface sample sets a corresponding simulation return value sample;
and taking the interface sample set as an input of a return value generation model, taking the simulation return value sample as an expected output, and training the accuracy of the return value generation model to reach a preset threshold value.
8. A system combined test device is characterized in that the device is applied to a unified entrance assembly, the unified entrance assembly belongs to the system, the unified entrance assembly is used for the system to call interfaces of a plurality of associated systems, and an interceptor, an analog return value and a test interface configuration of the interfaces are arranged in the unified entrance assembly; the device comprises:
the acquisition module is used for acquiring the test environment of the system call target interface when the system starts a test;
the interception module is used for determining whether the interceptor is opened or not according to the test environment and intercepting the target interface when the interceptor is opened;
the determining module is used for determining whether to simulate a return value of the target interface according to the test interface configuration when the target interface is intercepted;
the simulation module is used for acquiring a simulation return value matched with the target interface and the test environment when the return value for simulating the target interface is determined;
and the feedback module is used for returning the simulation return value matched with the target interface to the system so as to finish the test of calling the target interface by the system.
9. A computer program medium having computer readable instructions stored thereon which, when executed by a processor of a computer, cause the computer to perform the method of any one of claims 1-7.
10. An electronic device, comprising: a memory storing computer readable instructions; a processor reading computer readable instructions stored by the memory to perform the method of any of claims 1-7.
CN202011541846.8A 2020-12-22 2020-12-22 System joint test method and related device Pending CN112685291A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011541846.8A CN112685291A (en) 2020-12-22 2020-12-22 System joint test method and related device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011541846.8A CN112685291A (en) 2020-12-22 2020-12-22 System joint test method and related device

Publications (1)

Publication Number Publication Date
CN112685291A true CN112685291A (en) 2021-04-20

Family

ID=75451257

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011541846.8A Pending CN112685291A (en) 2020-12-22 2020-12-22 System joint test method and related device

Country Status (1)

Country Link
CN (1) CN112685291A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113590483A (en) * 2021-07-30 2021-11-02 北京京东振世信息技术有限公司 Case operation method and device
WO2021238596A1 (en) * 2020-05-26 2021-12-02 腾讯科技(深圳)有限公司 Interface calling method and apparatus, and computer-readable storage medium

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021238596A1 (en) * 2020-05-26 2021-12-02 腾讯科技(深圳)有限公司 Interface calling method and apparatus, and computer-readable storage medium
US11809882B2 (en) 2020-05-26 2023-11-07 Tencent Technology (Shenzhen) Company Limited Interface calling method and apparatus, and computer-readable storage medium
CN113590483A (en) * 2021-07-30 2021-11-02 北京京东振世信息技术有限公司 Case operation method and device

Similar Documents

Publication Publication Date Title
CN105786695B (en) Data test method and system
CN112685291A (en) System joint test method and related device
CN112052172B (en) Rapid test method and device for third-party channel and electronic equipment
Gao et al. What is AI software testing? and why
CN103530209B (en) A kind of code keypad automated testing method
CN111176984A (en) Signal-oriented automatic test implementation method
CN112433944A (en) Service testing method, device, computer equipment and storage medium
CN105279196A (en) Test script generation method and apparatus
US11663113B2 (en) Real time fault localization using combinatorial test design techniques and test case priority selection
KR20180054255A (en) Apparatus and Method for verifying automation based robustness using mutation Application Programming Interface
CN109710240A (en) Flow chart decomposition method and system
Setiawan et al. Vulnerability analysis using the interactive application security testing (iast) approach for government x website applications
CN116225886A (en) Test case generation method, device, equipment, storage medium and program product
Baresi et al. Test oracles for simulink-like models
CN111176995B (en) Test method and test system based on big data test case
CN114840410A (en) Test analysis method and device, computer equipment and storage medium
CN115833964A (en) Performance test method and performance test system of dual-mode communication module
CN116841898A (en) Test case and test script generation method, device, system and medium
CN111948526A (en) Test and measurement system for parallel waveform analysis
Ostrowski et al. Knowledge-based software testing agent using evolutionary learning with cultural algorithms
CN112799956B (en) Asset identification capability test method, device and system device
CN104731705A (en) Dirty data propagation path finding method based on complex network
CN110795338B (en) Front-end and back-end interaction-based automatic testing method and device and electronic equipment
CN114138679A (en) Test data construction method and device, computer readable medium and electronic equipment
CN108958726A (en) A kind of method and apparatus of data mining

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination