CN112685188A - Embedded memory management method and device based on global byte array - Google Patents

Embedded memory management method and device based on global byte array Download PDF

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Publication number
CN112685188A
CN112685188A CN202110302248.3A CN202110302248A CN112685188A CN 112685188 A CN112685188 A CN 112685188A CN 202110302248 A CN202110302248 A CN 202110302248A CN 112685188 A CN112685188 A CN 112685188A
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memory
pool
blocks
memory pool
management
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任文龙
刘嵩义
温奎
罗勇
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Sichuan Jiuzhou Electric Group Co Ltd
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Sichuan Jiuzhou Electric Group Co Ltd
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Abstract

The invention discloses an embedded memory management method and device based on a global byte array, wherein the device comprises a memory pool and a memory manager; the memory pool is created by defining a global byte array in an embedded system, and the memory pool is divided into a plurality of memory blocks with fixed sizes; the memory manager comprises a memory pool use state and a single-direction linked list, wherein the memory pool use state is used for indicating the use condition of the memory blocks, and the single-direction linked list is used for hanging the idle memory blocks in the memory pool; the memory manager is used for providing dynamic memory management for the outside. The invention realizes high-efficiency and reliable memory management on the basis of the global byte array and supports the use of a complex data structure in embedded software design.

Description

Embedded memory management method and device based on global byte array
Technical Field
The invention belongs to the technical field of embedded technology and Internet of things, and particularly relates to an embedded memory management method and device based on a global byte array.
Background
With the rapid development of the intelligent technology and the internet of things technology, various devices are interconnected and intercommunicated, embedded devices begin to bear more and more functions, more and more modules need to be integrated, and the scale and complexity of the development of embedded software are higher and higher. In order to cope with the high complexity of software functions, currently, embedded software is developed based on an embedded operating system (such as FreeRTOS, DSP BIOS, etc.) to implement various concurrent functions, so memory management of the embedded operating system becomes an important aspect in embedded software development, and the real-time performance and stability of the memory management are of great importance to the performance of the embedded software.
The memory management mechanism of the embedded system generally comprises two types of static allocation and dynamic allocation, wherein the static allocation well allocates the memory space required by the executable program in the software compiling stage, for example, the global variable in the software is the allocation method, and the method has the defects of not being flexible enough and not dynamically supporting memory application and release; dynamic allocation generally adopts heap memory management, an embedded system needs to allocate memory space of a system heap when initializing, pins of the mechanism need to process memory fragments and memory recovery, and the performance of the mechanism is a potential risk point for a program under the scene of frequent and dynamic changes of the memory. In addition, a software engineer easily forgets memory release to cause memory leakage when using dynamic allocation, the problem is difficult to find and is a pain point in software design, and therefore, global variables are required to be adopted in actual embedded software design to avoid the memory leakage problem.
The embedded software is generally oriented to the professional field, and the application scene has specificity, so that technical indexes are planned for each function when the requirement is formulated, and further, appropriate hardware is selected to reduce the cost, so that the total usage amount of the memory can be estimated in advance, and the use scene of dynamic memory allocation is small and controllable. Therefore, the existing software development of the embedded system uses a large amount of static allocation methods based on global variables, and the problems of insufficient memory or leakage or potential performance caused by the release of dynamic memory application are avoided to the utmost extent, so that the reliability of software is improved, and the consequences caused by the insufficient memory or leakage or potential performance problems are that complex data structures (such as linked lists and hash tables) are difficult to use in software design, the complexity and redundancy of the software design are high, and the readability is poor.
Disclosure of Invention
In order to solve the technical problems of high complexity, high redundancy and the like of the existing static allocation method based on the global variable, the invention provides an embedded memory management device based on the global byte array, which solves the problems and is used for avoiding a dynamic memory manager of an embedded operating system, realizing efficient and reliable memory management on the basis of the global byte array and supporting the use of a complex data structure in embedded software design.
The invention is realized by the following technical scheme:
an embedded memory management device based on a global byte array comprises a memory pool and a memory manager;
the memory pool is created by defining a global byte array in an embedded system, and the memory pool is divided into a plurality of memory blocks with fixed sizes;
the memory manager comprises a memory pool use state and a single-direction linked list, wherein the memory pool use state is used for indicating the use condition of the memory blocks, and the single-direction linked list is used for hanging the idle memory blocks in the memory pool;
the memory manager is used for providing dynamic memory management for the outside.
Preferably, the memory pool usage status of the present invention includes, but is not limited to, a memory pool first address, a size of the memory pool, a size of each memory chunk, a total number of memory chunks, a usage number of the memory chunks, and a free number of the memory chunks.
Preferably, the one-way linked list is created by defining an array, and the size of the array is the same as the total number of the memory blocks in the memory pool; the nodes of the single linked list include the first address of the memory block or the offset of the memory block relative to the first address of the memory pool.
On the other hand, the invention also provides a method for the embedded memory management device based on the global byte array, which comprises the following steps:
initializing the memory manager;
and providing dynamic memory management based on the initialized memory manager.
Preferably, the initialization process of the present invention includes:
calculating the use state of the memory pool according to the size of the memory pool and the size of each memory block;
and clearing all memory blocks and hanging the memory blocks into the single-direction linked list.
Preferably, the step of externally providing dynamic memory management based on the initialized memory manager includes, but is not limited to, dynamic memory application management, dynamic memory release management, and a reset interface;
specifically, the dynamic memory application management process of the present invention includes:
judging whether an idle memory block exists currently according to the use state of the current memory pool, if so, returning to the first node of the unidirectional chain table, pointing the head of the unidirectional chain table to the next node and updating the use state of the memory pool; if not, directly returning a null value.
Specifically, the dynamic memory release management process of the present invention includes:
setting all memory spaces of the memory blocks to be released to zero;
inserting the memory block after being set to zero into a first node position of the one-way linked list;
and updating the using state of the memory pool.
Specifically, the interface resetting process of the present invention includes:
and under the condition that the size of the memory pool and the size of the memory block are not changed, carrying out an initialization process.
The invention has the following advantages and beneficial effects:
compared with the prior art, the embedded memory management device based on the global byte array provided by the invention adopts the global byte array as the memory pool, supports dynamic application and release of memory blocks with fixed size, has the algorithm complexity of O (1), and has extremely high real-time performance and reliability, thereby effectively supporting the application of a complex data structure in embedded software design, simplifying the implementation logic of embedded software, reducing the complexity of the software, and improving the reliability of the software.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
FIG. 1 is a diagram illustrating a global byte array structure defined in the present invention.
FIG. 2 is a schematic flow chart of the method of the present invention.
FIG. 3 is a diagram illustrating an initialization state according to the present invention.
FIG. 4 is a schematic diagram of a computer device according to the present invention.
Fig. 5 is a schematic diagram of a dynamic memory application process according to the present invention.
Fig. 6 is a schematic diagram illustrating a state after the dynamic memory application according to the present invention.
Fig. 7 is a schematic diagram illustrating a dynamic memory release process according to the present invention.
Fig. 8 is a diagram illustrating a state after the dynamic release of the memory according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.
Example 1
Compared with the existing static allocation method based on the global variable, which has the problems that complex data structures such as a linked list and a hash table are difficult to use in software design, the complexity and redundancy of software design implementation are high, the readability is poor, and the like, the embodiment provides the embedded memory management device based on the global byte array.
The device of the embodiment comprises a memory pool and a memory manager;
the memory pool is created by defining a global byte array in the embedded system, and the memory pool is divided into a plurality of memory blocks with fixed sizes;
the memory manager comprises a memory pool use state and a single-direction linked list, wherein the memory pool use state is used for indicating the use condition of the memory blocks, and the single-direction linked list is used for hanging idle memory blocks in the memory pool;
the memory manager is used for providing dynamic memory management for the outside.
The global byte array and the single-linked list structure defined in this embodiment are shown in fig. 1, in this embodiment, a global byte array with a size of mxn is constructed as a memory pool, where N is the size of a memory block, and M is the maximum number of the memory block, then the memory pool is divided into M memory blocks B1 and B2 … BM, the single-linked list created in this embodiment includes M single-linked list node arrays, and values of M and N generally depend on specific application requirements.
The memory pool usage status of this embodiment includes, but is not limited to, a memory pool first address, a size of the memory pool, a size of each memory block, a total number of the memory blocks, a usage number of the memory blocks, and an idle number of the memory blocks.
The single direction linked list of this embodiment is created by defining an array, the size of the array is the same as the total number of the memory chunks in the memory pool, and the node of the single direction linked list includes, but is not limited to, the first address of the memory chunk or the offset of the memory chunk with respect to the first address of the memory pool.
In this embodiment, as shown in fig. 2, the method for implementing embedded memory management based on the embedded memory management device includes the following steps:
step one, initializing a memory manager;
and step two, providing dynamic memory management for the external based on the initialized memory manager.
In the initialization process of the memory manager in this embodiment, all the use states are calculated according to the size of the memory pool and the size of each memory block, all the memory blocks are cleared, and the cleared memory blocks are linked to the single-direction linked list.
Specifically, as shown in the initialization state diagram of fig. 3, the initialization process of this embodiment mainly includes the following steps:
step 1, taking a defined M multiplied by N global byte array as a memory pool to be completely cleared;
and 2, sequentially mounting the defined single linked list node arrays to form a single linked list, and pointing each node to the head address of each memory block. That is, the nodes and memory chunks of the single linked list are mapped one by one, the 1 st node points to the 1 st memory chunk, the 2 nd node points to the 2 nd memory chunk, and so on, the mth node points to the mth memory chunk (i.e., as shown in the figures, Elm1-B1, Elm2-B2, Elm3-B3 … ElmM-BM).
The dynamic memory management implemented based on the memory manager in this embodiment includes processes of dynamic memory application, dynamic memory release, interface reset, and the like.
The dynamic memory application management process of the embodiment includes:
judging whether an idle memory block exists currently according to the use state of the current memory pool, if so, returning to the first node of the unidirectional chain table, pointing the head of the unidirectional chain table to the next node and updating the use state of the memory pool; if not, directly returning a null value.
The dynamic memory release management process of this embodiment includes:
setting all memory spaces of the memory blocks to be released to zero; inserting the memory block after being set to zero into a first node position of the one-way linked list; and updating the using state of the memory pool.
The reset interface process of the present embodiment includes:
and under the condition that the size of the memory pool and the size of the memory block are not changed, the initialization process is carried out in other processes.
The method proposed in this embodiment is described by taking a hash table of a link method as an example:
in a radar-related device platform, a radar often sends a found target to other embedded devices for secondary processing and processing, the number of detection targets sent by the radar is usually the same in size and fixed in content, the data updating frequency is approximately in the magnitude of tens of milliseconds, and each detection target is uniquely identified by a batch number. In the secondary processing stage, an array mode is often adopted to traverse all the detected targets, the batch number of each target corresponds to the array subscript one by one, and therefore the batch number of the detected target must be limited in a smaller range, the method is poor in flexibility and low in performance, especially under the condition that the radar detection capability is strong but the actual number of the targets is smaller, a lot of useless work needs to be done in each array traversal, if the maximum detected targets of the radars are 1000, the data content of each target is 100 bytes, the batch number range is generally set to be 1-1024, the target storage and processing are carried out by using 1024 arrays, and when the actual targets are 10, the maximum calculation resource waste is caused by 1024 traversals each time. In this scenario, a better method is to use a hash table to establish a mapping relationship from a batch number to data to solve the above-mentioned problems, the hash table usually adopts a link method in practical application, needs efficient dynamic memory management support, and is often difficult to satisfy in an embedded device, on one hand, the performance of dynamic memory application and release cannot be evaluated, thereby causing poor portability, and on the other hand, potential memory leakage risk, the method provided by this embodiment can effectively solve the above-mentioned problems, by directly applying for a 1024 × 100 global byte array as a memory pool, providing dynamic memory block application and release with a fixed size of 100 bytes, building the hash table on the basis of this, further performing traversal and secondary processing according to the actual target number, avoiding memory exhaustion, using a one-way linked list to support memory application and release operations with a complexity of O (1), the functional requirements and the memory allocation are well balanced.
The embodiment also provides a computer device for executing the method of the embodiment.
As shown in particular in fig. 4, the computer device includes a processor, a memory, and a system bus; various device components including a memory and a processor are connected to the system bus. A processor is hardware used to execute computer program instructions through basic arithmetic and logical operations in a computer system. Memory is a physical device used for temporarily or permanently storing computing programs or data (e.g., program state information). The system bus may be any of several types of bus structures including a memory bus or memory controller, a peripheral bus, and a local bus. The processor and the memory may be in data communication via a system bus. Including read-only memory (ROM) or flash memory (not shown), and Random Access Memory (RAM), which typically refers to main memory loaded with an operating system and computer programs.
Computer devices typically include a storage device. The storage device may be selected from a variety of computer readable media, which refers to any available media that can be accessed by a computer device, including both removable and non-removable media. For example, computer-readable media includes, but is not limited to, flash memory (micro SD cards), CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer device.
A computer device may be logically connected in a network environment to one or more network terminals. The network terminal may be a personal computer, a server, a router, a smart phone, a tablet, or other common network node. The computer apparatus is connected to the network terminal through a network interface (local area network LAN interface). A Local Area Network (LAN) refers to a computer network formed by interconnecting within a limited area, such as a home, a school, a computer lab, or an office building using a network medium. WiFi and twisted pair wiring ethernet are the two most commonly used technologies to build local area networks.
It should be noted that other computer systems including more or less subsystems than computer devices can also be suitable for use with the invention.
As described in detail above, the computer device adapted to the present embodiment can perform the specified operations of the method of the embedded memory management device based on the global byte array. The computer device performs these operations in the form of software instructions executed by a processor in a computer-readable medium. These software instructions may be read into memory from a storage device or from another device via a local area network interface. The software instructions stored in the memory cause the processor to perform the method of processing group membership information described above. Furthermore, the present invention can be implemented by hardware circuits or by a combination of hardware circuits and software instructions. Thus, implementation of the present embodiments is not limited to any specific combination of hardware circuitry and software.
Example 2
In this embodiment, a dynamic memory application management is performed based on the management method provided in embodiment 1, specifically as shown in fig. 5, a dynamic memory application management process in this embodiment specifically includes:
step S11, determining whether there is a free memory block according to the free number of the memory blocks in the memory pool, if the free number is greater than zero, there is an available memory space, and execute step S12, if the free number is equal to zero, there is no available memory space, and directly return a null value.
Step S12, temporarily storing the first address of the first node of the unidirectional chain table, and pointing the head of the unidirectional chain table to the next node.
Step S13, updating the memory pool usage status: reducing the idle number of the using state of the memory pool by one, and adding one to the using number;
and step S14, returning the first address of the first node of the temporarily stored one-way linked list.
Specifically, as shown in fig. 6, a state diagram after 2 times of memory dynamic applications (where blocks filled with oblique lines are represented as memory blocks after application, and blocks filled with squares are represented as used memory blocks), in this embodiment, a first memory block head address pointed by a 1 st node is returned by a 1 st memory application, a second memory block head address pointed by a 2 nd node is returned by a 2 nd application, each application is directly returned to a node pointed by a head of a singly linked list, and time complexity is a constant.
Example 3
In this embodiment, a dynamic memory release management is performed based on the management method provided in embodiment 1, specifically as shown in fig. 7, a dynamic memory release management process in this embodiment specifically includes:
step S21, setting all memory space of the memory block to be released to zero, so as to be convenient for direct use next time;
step S22, adding one to the idle number of the memory pool, and subtracting one from the used number;
step S23, insert the memory block to be released into the first node of the singly linked list.
Specifically, as shown in fig. 8, in a state diagram after 1-time memory dynamic release (where blocks filled with squares represent used memory blocks), in this embodiment, assuming that the 1 st time released memory block is the first memory block, the subscript of the node corresponding to the unidirectional linked list is equal to (memory block header address-memory pool header address)/N = (B1-B1)/N =0, and then the 1 st node is inserted into the 1 st position of the unidirectional linked list, where time complexity is constant.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (8)

1. An embedded memory management device based on a global byte array is characterized by comprising a memory pool and a memory manager;
the memory pool is created by defining a global byte array in an embedded system, and the memory pool is divided into a plurality of memory blocks with fixed sizes;
the memory manager comprises a memory pool use state and a single-direction linked list, wherein the memory pool use state is used for indicating the use condition of the memory blocks, and the single-direction linked list is used for hanging the idle memory blocks in the memory pool;
the memory manager is used for providing dynamic memory management for the outside.
2. The embedded memory management device according to claim 1, wherein the memory pool usage status includes a memory pool head address, a size of the memory pool, a size of each memory block, a total number of the memory blocks, a usage number of the memory blocks, and an idle number of the memory blocks.
3. The embedded memory management device based on the global byte array as claimed in claim 1, wherein the single direction chain table is created by defining an array, and the size of the array is the same as the total number of memory blocks in the memory pool;
the nodes of the single linked list include the first address of the memory block or the offset of the memory block relative to the first address of the memory pool.
4. A method for an embedded memory management device based on a global byte array according to any one of claims 1 to 3, comprising the following steps:
initializing the memory manager;
and providing dynamic memory management based on the initialized memory manager.
5. The method of claim 4, wherein the initialization process comprises:
calculating the use state of the memory pool according to the size of the memory pool and the size of each memory block;
and clearing all memory blocks and hanging the memory blocks into the single-direction linked list.
6. The method according to claim 4, wherein the step of providing the dynamic memory management to the outside based on the initialized memory manager includes dynamic memory application management, and the specific process includes:
judging whether an idle memory block exists currently according to the use state of the current memory pool, if so, returning to the first node of the unidirectional chain table, pointing the head of the unidirectional chain table to the next node and updating the use state of the memory pool; if not, directly returning a null value.
7. The method according to claim 4, wherein the step of providing the dynamic memory management to the outside based on the initialized memory manager includes dynamic memory release management, and the specific process includes:
setting all memory spaces of the memory blocks to be released to zero;
inserting the memory block after being set to zero into a first node position of the one-way linked list;
and updating the using state of the memory pool.
8. The method according to claim 4, wherein the step of providing the dynamic memory management to the outside based on the initialized memory manager comprises resetting an interface, and the specific process comprises:
and under the condition that the size of the memory pool and the size of the memory block are not changed, carrying out an initialization process.
CN202110302248.3A 2021-03-22 2021-03-22 Embedded memory management method and device based on global byte array Pending CN112685188A (en)

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