CN112684840A - Audio acquisition device and electronic equipment - Google Patents
Audio acquisition device and electronic equipment Download PDFInfo
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- CN112684840A CN112684840A CN202011521124.6A CN202011521124A CN112684840A CN 112684840 A CN112684840 A CN 112684840A CN 202011521124 A CN202011521124 A CN 202011521124A CN 112684840 A CN112684840 A CN 112684840A
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Abstract
The embodiment of the application provides an audio acquisition device and electronic equipment. This audio acquisition device includes: LDO supply circuit, receiving circuit and control unit. The LDO power supply circuit is used for providing direct current bias voltage, the LDO power supply circuit is electrically connected with the receiving circuit, and the receiving circuit is electrically connected with the control unit; the power supply rejection ratio of the LDO power supply circuit between 100Hz and 8KHz is more than or equal to 40 dB. Therefore, the control unit has good microphone voice performance in the training of the far-field voice awakening words and the optimization process of the performance indexes, the overall design of the hardware architecture is optimized, and the component cost of the whole hardware architecture is reduced.
Description
Technical Field
The embodiment of the application relates to the technical field of far-field voice, in particular to an audio acquisition device and electronic equipment.
Background
Electret microphones (mic) have the characteristics of simple structure, good electroacoustic performance and low price, and are widely applied to electronic equipment of household appliances such as televisions, refrigerators, air conditioners and the like at present.
Typically, microphone arrays in electronic devices need to be biased by a dc bias voltage on the output pins. However, due to training of far-field voice wake-up words and optimization of performance indexes, the signal-to-noise ratio of the microphone array is very high, and especially the frequency band of 100 Hz-300 Hz must meet the requirements.
Therefore, how to provide a stable dc bias voltage to the microphone array is an urgent problem to be solved.
Disclosure of Invention
The embodiment of the application provides an audio acquisition device and electronic equipment, which can provide stable direct current bias voltage for a microphone array, so that the audio acquisition device has good microphone voice performance in the training of far-field voice awakening words and the optimization process of performance indexes, the overall design of a hardware framework is optimized, and the component cost of the whole hardware framework is reduced.
In a first aspect, an embodiment of the present application provides an audio acquisition apparatus, including: LDO supply circuit, receiving circuit and control unit.
The LDO power supply circuit is used for providing direct current bias voltage, the LDO power supply circuit is electrically connected with the receiving circuit, and the receiving circuit is electrically connected with the control unit; the power supply rejection ratio of the LDO power supply circuit between 100Hz and 8KHz is more than or equal to 40 dB.
By the device of the first aspect, based on the connection relationship between the LDO power supply circuit and the receiving circuit, the LDO power supply circuit can provide a direct current bias voltage for the receiving circuit, and the power supply rejection ratio of the LDO power supply circuit between 100Hz and 8KHz is greater than or equal to 40dB, so that the possibility of introducing noise of other devices into the original audio signal collected by the receiving circuit is reduced. Based on the connection relationship between the receiving circuit and the control unit, the receiving circuit can provide a signal with a high signal-to-noise ratio to the control unit. Therefore, the far-field voice interaction function of the electronic equipment is improved, the awakening rate and the recognition rate of the electronic equipment in a complex scene are improved, the competitiveness and the user experience of a product are improved, the scheme of the audio acquisition device is strong in universality, low in cost and high in signal-to-noise ratio, the overall design of a hardware framework is optimized, and the accuracy of data in a voice algorithm and the effectiveness of model training are guaranteed.
In some possible designs, the LDO power supply circuit has a power supply rejection ratio of 85dB or greater at 1 KHz. Therefore, the LDO power supply circuit is convenient to select, and the LDO power supply circuit is ensured to introduce less noise, so that the LDO power supply circuit provides stable direct current bias voltage for the receiving circuit.
In some possible designs, a module with analog-to-digital conversion function is provided in the control unit, and the receiving circuit is used for outputting analog signals. Therefore, the whole framework is simplified, other components do not need to be added, and the cost is reduced.
In some possible designs, the audio capture device further comprises: a coupling circuit; the receiving circuit is electrically connected with the coupling circuit, and the coupling circuit is electrically connected with the control unit.
In some possible designs, when the microphone array in the receiving circuit is two microphones, the coupling circuit includes: the first coupling capacitor, the second coupling capacitor, the third coupling capacitor and the fourth coupling capacitor.
The first output end of the microphone array is electrically connected with the first end of the first coupling capacitor, the second end of the first coupling capacitor is electrically connected with the first input end of the control unit, the second output end of the microphone array is electrically connected with the first end of the second coupling capacitor, the second end of the second coupling capacitor is electrically connected with the second input end of the control unit, the third output end of the microphone array is electrically connected with the first end of the third coupling capacitor, the second end of the third coupling capacitor is electrically connected with the third input end of the control unit, the fourth output end of the microphone array is electrically connected with the first end of the fourth coupling capacitor, and the second end of the fourth coupling capacitor is electrically connected with the fourth input end of the control unit.
Therefore, the coupling circuit can carry out low-pass filtering on the analog signal output by the receiving circuit, so that the control unit can receive the analog signal with good performance.
In some possible designs, the receiving circuit includes: a microphone array and a high pass filter circuit. The microphone array is electrically connected with the high-pass filter circuit, and the high-pass filter circuit is electrically connected with the control unit.
In some possible designs, when the microphone array is two microphones, the high-pass filter circuit includes: a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a second resistor, a third resistor, a fourth resistor and a fifth resistor;
a first output end of the receiving circuit is electrically connected with a first end of the second resistor, a second end of the second resistor is respectively electrically connected with a first input end of the control unit and a first end of the sixth capacitor, a second output end of the receiving circuit is electrically connected with a first end of the third resistor, a second end of the third resistor is respectively electrically connected with a second input end of the control unit and a first end of the seventh capacitor, a third output end of the receiving circuit is electrically connected with a first end of the fourth resistor, a second end of the fourth resistor is respectively electrically connected with a third input end of the control unit and a first end of the eighth capacitor, a fourth output end of the receiving circuit is electrically connected with a first end of the fifth resistor, a second end of the fifth resistor is respectively electrically connected with a fourth input end of the control unit and a first end of the ninth capacitor, a second end of the sixth capacitor and a second end of the seventh capacitor, the second end of the eighth capacitor and the second end of the ninth capacitor are both grounded.
Therefore, the coupling circuit can carry out high-pass filtering on the analog signal output by the receiving circuit, so that the control unit can receive the analog signal with good performance.
In some possible designs, the LDO supply circuit includes: LDO steady voltage chip, first electric capacity, second electric capacity, third electric capacity, fourth electric capacity, fifth electric capacity and first resistance.
The first end of LDO steady voltage chip is used for exporting direct current bias voltage, the first end and the receiving circuit electricity of LDO steady voltage chip are connected, the first end of LDO steady voltage chip still is connected with the first end of first electric capacity and the first end electricity of second electric capacity respectively, the third end of LDO steady voltage chip is connected with the first end electricity of the first end of third electric capacity and first end electricity of first resistance respectively, the second end of first resistance is used for the electricity to connect enabling signal, the fourth end of LDO steady voltage chip is used for the electricity to be connected with supply voltage, the fourth end of LDO steady voltage chip still is connected with the first end electricity of the first end of fourth electric capacity and the first end electricity of fifth electric capacity respectively, the second end and the fifth end of LDO steady voltage chip, the second end of first electric capacity, the second end of second electric capacity, the second end of fourth electric capacity and the second end of.
In a second aspect, an embodiment of the present application provides an electronic device, including: the audio capture device of the first aspect and any one of the possible designs of the first aspect.
In some possible designs, the electronic device is a television, a refrigerator, or an air conditioner.
Drawings
FIG. 1 is a schematic diagram of an apparatus for audio acquisition;
fig. 2 is a schematic structural diagram of an audio acquisition apparatus according to an embodiment of the present application;
FIG. 3 is a graph illustrating a power supply rejection ratio of an LDO power supply circuit according to an embodiment of the present application;
fig. 4 is a schematic structural diagram of an LDO power supply circuit according to an embodiment of the present application;
5A-5B are waveform diagrams of a supply voltage of an LDO regulator chip provided by an embodiment of the present application without and with an LDO supply circuit electrically connected thereto;
fig. 6 is a schematic structural diagram of an audio acquisition device according to an embodiment of the present application.
Description of reference numerals:
100a — means for audio acquisition; 102 a-microphone array; 101 a-ADC; 103 a-SoC;
100-an audio acquisition device; 101-LDO supply circuit; 102 — a receiving circuit; 103-a control unit; 104-a coupling circuit; 1021-a microphone array; 1022 — high pass filter circuit.
Detailed Description
In the embodiments of the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of the singular or plural items. For example, at least one (one) of a alone, b alone, or c alone, may represent: a alone, b alone, c alone, a and b in combination, a and c in combination, b and c in combination, or a, b and c in combination, wherein a, b and c may be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
With the continuous development of far-field voice technology, electronic devices with far-field voice interaction function have been widely used in people's life and study. The electronic device may include, but is not limited to, a television, a sound box, an air conditioner, a refrigerator, and other intelligent devices.
Taking a television as an example, when a user wants to inquire about the current weather condition of the television, the user can send a corresponding voice instruction to the television. The microphone array in the television can collect voice instructions sent by users. And the television identifies the far-field voice awakening words for the voice command. After the identification is successful, the television can send the processed audio data to the cloud server. And the cloud server performs voice recognition and semantic understanding on the processed audio data. And the cloud server transmits the synthesized voice data to the television. The television outputs the synthesized voice data, namely the current weather condition. Therefore, the far-field voice interaction function of the electronic equipment is realized.
It should be noted that, in addition to the way of interacting with the cloud server, the television may also perform speech recognition and semantic understanding on the processed audio data by itself, which is not limited in the embodiment of the present application.
At present, training of far-field voice wake-up words and optimization of performance indexes have high practical requirements on original audio signals collected by a microphone array in electronic equipment, such as original audio signals with high signal-to-noise ratio. Also, the stability of the dc bias voltage has a large impact on the noise introduced by the original audio signal. Therefore, how to provide a stable dc bias voltage to the microphone array is an urgent problem to be solved.
The embodiment of the application provides a device 100a for audio acquisition.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an apparatus for audio acquisition. As shown in fig. 1, the apparatus for audio capture 100a may include: a microphone array 102a, an analog-to-digital converter (ADC) 101a, and a System on Chip (SoC) 103 a. The microphone array 102a is electrically connected to the ADC 101a, and the ADC 101a is electrically connected to the SoC 103 a.
In the embodiment of the present application, parameters such as the number and the type of the microphones in the microphone array 102a are not limited. For example, the types of microphones may include digital microphones and analog microphones. For convenience of illustration, the microphone array 102a in fig. 1 is illustrated by taking mic1 and mic2 as examples.
The microphone array 102a collects the raw audio signal, the microphone array 102a transmits the raw audio signal to the ADC 101a in the form of a differential signal (schematically illustrated in fig. 1 by the labels "MICN 1, MICP 1" and "MICN 2, MICP 2"), and the ADC 101a converts the differential signal into a Pulse Density Modulation (PDM) signal. The ADC 101a transmits the PDM signal to the SoC 103a, and the SoC 103a processes the PDM signal.
The microphone array 102a incorporates an amplifier (amplifier) and requires an external dc bias voltage. In fig. 1, the dc bias voltage (illustrated in fig. 1 by the reference "MCIBIAS") is supplied by the ADC 101 a. That is, the ADC 101a supplies a dc bias voltage to the microphone array 102a so that the gain is adjusted by the ADC 101 a. Because the ADC 101a and the DC bias voltage use the same voltage, the noise consistency is good, and the ADC 101a also has a suppression effect on the noise, thereby meeting the practical requirements of training of far-field voice awakening words and optimizing performance indexes on the high signal-to-noise ratio of the microphone array 102 a.
Illustratively, the embodiment of the present application further provides an audio acquisition apparatus 100.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an audio acquisition device according to an embodiment of the present application. As shown in fig. 2, the audio capture device 100 according to the embodiment of the present application may include: a low dropout regulator (LDO) power supply circuit 101, a receiving circuit 102, and a control unit 103.
The LDO power supply circuit 101 is electrically connected to the receiving circuit 102, and the LDO power supply circuit 101 is configured to provide a dc bias voltage to the receiving circuit 102 (illustrated in fig. 2 by the label "MCIBIAS"). The receiving circuit 102 is electrically connected to the control unit 103. The embodiment of the present application does not limit the specific implementation manner of the LDO power supply circuit 101.
The receiving circuit 102 is used for acquiring an original audio signal. For example, the receiving circuit 102 may be provided with a microphone array 1021, and the present application does not limit parameters such as the number and types of microphones in the microphone array 1021. For example 2mic, 4mic or 8 mic. Thus, LDO supply circuit 101 may provide a dc bias voltage to each mic. For convenience of explanation, in fig. 2, the microphone array 1021 in the receiving circuit 102 is illustrated by mic1 and mic2 as examples.
In addition, the embodiment of the present application does not limit the specific implementation manner of the control unit 103. For example, the control unit 103 may be an SoC.
In some embodiments, a module (e.g., an analog-to-digital converter (ADC)) with an analog-to-digital conversion function is disposed in the control unit 103, so that the receiving circuit 102 outputs analog signals to the control unit 103 (illustrated in fig. 2 by using differential signals "MICN 1, MICP 1" and differential signals "MICN 2, MICP 2" as examples).
Referring to fig. 3, fig. 3 is a schematic diagram illustrating a Power Supply Rejection Ratio (PSRR) curve of the LDO Power supply circuit 101 according to an embodiment of the present application. In fig. 3, the abscissa is Frequency (Frequency) in Hz, and the ordinate is Power Supply Rejection Ratio (PSRR) in dB. As shown in FIG. 3, each curve represents a power supply rejection ratio of 40dB or greater for LDO power supply circuit 101 between 100Hz-8 KHz.
Just because the power supply rejection ratio of the LDO power supply circuit 101 between 100Hz and 8KHz is greater than or equal to 40dB, excessive noise is not introduced into the receiving circuit 102 when the original audio signal is collected, thereby avoiding the influence of the noise on the original audio signal, enabling the receiving circuit 102 to output a signal with a high signal-to-noise ratio to the control unit 103, and ensuring the training of far-field voice wake-up words and the performance of optimizing performance indexes.
The power supply ripple rejection ratio (PSRR) is a ratio of an input power variation (in volts) to a converter output variation (in volts), and is usually expressed in decibels. In the embodiment of the present application, the Power Supply Rejection Ratio (PSRR) of the LDO power supply circuit 101 is higher, so that the influence of the LDO power supply circuit 101 providing the dc bias voltage to each mic is smaller when the supply voltage of the LDO power supply circuit 101 (i.e. the supply voltage labeled "VCC _ IO" in fig. 4) changes. Therefore, compared to a DC-to-DC converter (DC-to-DC converter), the LDO power supply circuit 101 can be selected in the embodiments of the present application.
In addition, the embodiment of the application can also determine the LDO power supply circuit 101 by selecting the power supply rejection ratio of the LDO power supply circuit 101. In some embodiments, the LDO power supply circuit 101 has a power supply rejection ratio of 85dB or greater at 1 KHz.
At the same time, the ADC is eliminated compared to the arrangement of fig. 1, and the cost of the LDO supply circuit 101 is much lower than the ADC. In general, the cost of the LDO power supply circuit 101 is 1 gross cost, and the cost of the ADC is 10 yuan. Therefore, the component cost of the whole hardware architecture is reduced, and the overall design of the hardware architecture is optimized.
In the embodiment of the application, based on the connection relation between the LDO power supply circuit and the receiving circuit, the LDO power supply circuit can provide direct current bias voltage for the receiving circuit, and the power supply rejection ratio of the LDO power supply circuit between 100Hz and 8KHz is more than or equal to 40dB, so that the possibility of introducing noise of other devices into the original audio signal collected by the receiving circuit is reduced. Based on the connection relationship between the receiving circuit and the control unit, the receiving circuit can provide a signal with a high signal-to-noise ratio to the control unit. Therefore, the far-field voice interaction function of the electronic equipment is improved, the awakening rate and the recognition rate of the electronic equipment in a complex scene are improved, the competitiveness and the user experience of a product are improved, the scheme of the audio acquisition device is strong in universality, low in cost and high in signal-to-noise ratio, the overall design of a hardware framework is optimized, and the accuracy of data in a voice algorithm and the effectiveness of model training are guaranteed.
Based on the foregoing description, the LDO power supply circuit 101 may be an integrated chip, or may include a circuit composed of a plurality of components, and the embodiment of the present application does not limit the specific implementation manner of the LDO power supply circuit 101.
Next, with reference to fig. 4, a specific implementation of the LDO power supply circuit 101 is described.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an LDO power supply circuit according to an embodiment of the present application. As shown in fig. 4, the LDO power supply circuit 101 may include: the LDO voltage stabilizing chip N comprises an LDO voltage stabilizing chip N, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5 and a first resistor R1.
A first end of the LDO regulator chip N is configured to output a dc bias voltage (indicated by a mark "MCIBIAS" in fig. 4), the first end of the LDO regulator chip N is electrically connected to the receiving circuit 102, the first end of the LDO regulator chip N is further electrically connected to a first end of the first capacitor C1 and a first end of the second capacitor C2, a third end of the LDO regulator chip N is electrically connected to a first end of the third capacitor C3 and a first end of the first resistor R1, a second end of the first resistor R1 is electrically connected to an enable signal (indicated by a mark "MCI _ LED _ EN" in fig. 4), a fourth end of the LDO regulator chip N is electrically connected to a power supply voltage (indicated by a mark "VCC _ IO" in fig. 4), a fourth end of the LDO regulator chip N is further electrically connected to a first end of the fourth capacitor C4 and a first end of the fifth capacitor C5, and a second end and a fifth end of the LDO regulator chip N are electrically connected to a second end of the receiving circuit 102, a, The second terminal of the first capacitor C1, the second terminal of the second capacitor C2, the second terminal of the fourth capacitor C4, and the second terminal of the fifth capacitor C5 are all grounded.
The enable signal and the supply voltage may be provided by an electronic device, and the specific implementation manner of the enable signal and the supply voltage is not limited in the embodiments of the present application.
Based on the foregoing description, before the receiving circuit 102 transmits the analog signal to the control unit 103, the audio acquisition device 100 according to the embodiment of the application may perform filtering and the like on the analog signal, so that the control unit 103 can receive the analog signal with good performance, which is beneficial to simplifying the processing of the control unit 103 on the analog signal.
Referring to fig. 5A-5B, fig. 5A-5B are waveform diagrams illustrating a supply voltage of an LDO regulator chip N according to an embodiment of the present application when the LDO power supply circuit is not electrically connected and the LDO power supply circuit is electrically connected. In fig. 5A-5B, the abscissa is voltage in millivolts (mV) and the ordinate is time in microseconds (μ S).
As shown in fig. 5A-5B, the ripple amplitude on the curve 2 in fig. 5B is smaller than that on the curve 1 in fig. 5A, and it can be seen that the noise introduced by the power supply voltage after electrically connecting the LDO power supply circuit 101 is smaller, which is beneficial for the LDO power supply circuit 101 to provide a stable dc bias voltage to the receiving circuit 102.
Next, with reference to fig. 6, another specific implementation of the audio capture device 100 will be described.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an audio acquisition device according to an embodiment of the present application. On the basis of the apparatus structure shown in fig. 2, as shown in fig. 6, the audio acquisition apparatus 100 of the embodiment of the present application may further include: a coupling circuit 104.
The receiving circuit 102 is electrically connected to the coupling circuit 104, and the coupling circuit 104 is electrically connected to the control unit 103. Based on the foregoing electrical connection relationship, the coupling circuit 104 may perform low-pass filtering on the analog signal transmitted from the receiving circuit 102 to the control unit 103, so that the control unit 103 can receive the analog signal with good performance.
The present application does not limit the specific implementation manner of the coupling circuit 104. In some embodiments, as shown in fig. 6, when the microphone array 1021 in the receiving circuit 102 is 2mic (illustrated by the labels "mic 1 and mic 2" in fig. 6), the coupling circuit 104 may include: a first coupling capacitor C11, a second coupling capacitor C12, a third coupling capacitor C13 and a fourth coupling capacitor C14.
A first output terminal of the receiving circuit 102 is electrically connected to a first terminal of a first coupling capacitor C11, a second terminal of the first coupling capacitor C11 is electrically connected to a first input terminal of the control unit 103, a second output terminal of the receiving circuit 102 is electrically connected to a first terminal of a second coupling capacitor C12, a second terminal of the second coupling capacitor C12 is electrically connected to a second input terminal of the control unit 103, a third output terminal of the receiving circuit 102 is electrically connected to a first terminal of a third coupling capacitor C13, a second terminal of the third coupling capacitor C13 is electrically connected to a third input terminal of the control unit 103, a fourth output terminal of the receiving circuit 102 is electrically connected to a first terminal of a fourth coupling capacitor C14, and a second terminal of the fourth coupling capacitor C14 is electrically connected to a fourth input terminal of the control unit 103.
Based on the above description, the first output terminal of the receiving circuit 102 and the second output terminal of the receiving circuit 102 can transmit the differential signal of the mic1 (indicated by the labels "MICN 1, MICP 1" in fig. 6) in the microphone array 1021, and the differential signal of the mic1 is filtered by the first coupling capacitor C11 and the second coupling capacitor C12 respectively and is coupled to the control unit 103 at the same time.
The third output terminal of the receiver circuit 102 and the fourth output terminal of the receiver circuit 102 may transmit a differential signal of the mic2 (indicated by the labels "MICN 2, MICP 2" in fig. 6) in the microphone array 1021, and the differential signal of the mic2 is filtered by the third coupling capacitor C13 and the fourth coupling capacitor C14 to filter signals below 100Hz and is simultaneously coupled to the control unit 103.
Therefore, the control unit 103 can receive the analog signal with good performance, which is beneficial to ensuring the accuracy of the voice algorithm recording data and the effectiveness of model training, improving the awakening rate and the recognition rate of the electronic equipment in a complex scene, and improving the competitiveness and the user experience of the product. Based on the above description, in the embodiment of the present application, the receiving circuit 102 may include various implementations.
With continued reference to fig. 6, a specific implementation of the receive circuit 102 will be described.
In some embodiments, as shown in fig. 6, the receiving circuit 102 may include: a microphone array 1021 and a high pass filter circuit 1022. The microphone array 1021 is electrically connected to a high-pass filter circuit 1022, and the high-pass filter circuit 1022 is electrically connected to the control unit 103.
Based on the aforementioned electrical connection relationship, the high-pass filtering circuit 1022 may perform high-pass filtering on the original audio signal collected by the microphone array 1021, so that the receiving circuit 102 may output an analog signal with good performance to the control unit 103.
The embodiment of the present application does not limit the specific implementation of the sum high-pass filter circuit 1022.
In some embodiments, as shown in fig. 6, when the microphone array 1021 is 2mic (illustrated by the labels "mic 1 and mic 2" in fig. 6), the high-pass filter circuit 1022 may include: the capacitor comprises a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5.
A first output terminal of the microphone array 1021 (i.e., the first terminal of the microphone array 1021 is the mic 1) is electrically connected to a first terminal of a second resistor R2, a second terminal of a second resistor R2 is electrically connected to a first input terminal of the control unit 103 and a first terminal of a sixth capacitor C6, respectively, a second output terminal of the microphone array 1021 (i.e., the second terminal of the microphone array 1021 is the mic 1) is electrically connected to a first terminal of a third resistor R3, a second terminal of the third resistor R3 is electrically connected to a second input terminal of the control unit 103 and a first terminal of a seventh capacitor C7, respectively, a third output terminal of the microphone array 1021 (i.e., the first terminal of the microphone array 1021 is the mic 2) is electrically connected to a first terminal of a fourth resistor R4, a second terminal of the fourth resistor R4 is electrically connected to a third input terminal of the control unit 103 and a first terminal of an eighth capacitor C8, respectively, a fourth output terminal of the microphone array 1021 (i.e., the second terminal of the microphone array 1021 is electrically connected to a second terminal of the mic 7362) is electrically, a second end of the fifth resistor R5 is electrically connected to the fourth input terminal of the control unit 103 and the first end of the ninth capacitor C9, respectively, and a second end of the sixth capacitor C6, a second end of the seventh capacitor C7, a second end of the eighth capacitor C8, and a second end of the ninth capacitor C9 are all grounded.
Based on the above description, the first output terminal of the mic1 in the microphone array 1021 can transmit differential signals (indicated by the symbol "MICN 1" in fig. 6), and through the high-pass filtering effect of the second resistor R2 and the sixth capacitor C6, signals above 8KHz can be filtered out, and the circuit architecture is simplified.
The second output terminal of the mic1 of the microphone array 1021 can transmit differential signals (indicated by the symbol "MICP 1" in FIG. 6), and through the high-pass filtering effect of the third resistor R3 and the seventh capacitor C7, signals above 8KHz can be filtered, and the circuit architecture is simplified.
The first output terminal of the mic2 in the microphone array 1021 can transmit differential signals (indicated by the symbol "MICN 2" in FIG. 6), and through the high-pass filtering effect of the fourth resistor R4 and the eighth capacitor C8, signals above 8KHz can be filtered, and the circuit architecture is simplified.
The second output terminal of the mic2 in the microphone array 1021 can transmit differential signals (indicated by the symbol "MICP 2" in fig. 6), and through the high-pass filtering effect of the fifth resistor R5 and the ninth capacitor C9, signals above 8KHz can be filtered, and the circuit architecture is simplified.
Therefore, the control unit 103 can receive the analog signal with good performance, which is beneficial to ensuring the accuracy of the voice algorithm recording data and the effectiveness of model training, improving the awakening rate and the recognition rate of the electronic equipment in a complex scene, and improving the competitiveness and the user experience of the product.
It should be noted that, in addition to being disposed in the receiving circuit 102 together with the microphone array 1021, the high-pass filter circuit 1022 may also be disposed separately, or may be disposed together with the coupling circuit 104, which is not limited in this embodiment of the present application.
In addition, based on the above description, when the microphone array 1021 is 4mic, 8mic or other numbers of mics, each mic outputs a differential signal in a differential manner, which can refer to the implementation manner of the mic1 or the mic2 in 2mic of the microphone array 1021, and is not described herein again.
Exemplarily, the embodiment of the application also provides an electronic device. The electronic device may include: a housing and the audio capture device of the previous embodiments.
The embodiment of the present application does not limit the specific implementation manner of the electronic device. In some embodiments, the electronic device may include, but is not limited to, a television, a sound box, an air conditioner, a refrigerator, and other smart devices.
The electronic device of the embodiment of the application can be used for executing the aforementioned technical scheme of the audio acquisition device, and the implementation principle and the technical effect are similar, which are not described herein again.
Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.
Claims (10)
1. An audio acquisition device, comprising:
the LDO power supply circuit, the receiving circuit and the control unit;
the LDO power supply circuit is used for providing a direct current bias voltage, the LDO power supply circuit is electrically connected with the receiving circuit, and the receiving circuit is electrically connected with the control unit; the power supply rejection ratio of the LDO power supply circuit between 100Hz and 8KHz is more than or equal to 40 dB.
2. The apparatus of claim 1, wherein the LDO power supply circuit has a power supply rejection ratio of 85dB or greater at 1 KHz.
3. The device according to claim 1 or 2, wherein the control unit is provided with a module with analog-to-digital conversion function, and the receiving circuit is used for outputting analog signals.
4. The apparatus of any of claims 1-3, wherein the audio capture device further comprises: a coupling circuit; the receiving circuit is electrically connected with the coupling circuit, and the coupling circuit is electrically connected with the control unit.
5. The apparatus of claim 4, wherein when the microphone array in the receive circuit is two microphones, the coupling circuit comprises: the first coupling capacitor, the second coupling capacitor, the third coupling capacitor and the fourth coupling capacitor;
the first output end of the microphone array is electrically connected with the first end of the first coupling capacitor, the second end of the first coupling capacitor is electrically connected with the first input end of the control unit, the second output end of the microphone array is electrically connected with the first end of the second coupling capacitor, the second end of the second coupling capacitor is electrically connected with the second input end of the control unit, the third output end of the microphone array is electrically connected with the first end of the third coupling capacitor, the second end of the third coupling capacitor is electrically connected with the third input end of the control unit, the fourth output end of the microphone array is electrically connected with the first end of the fourth coupling capacitor, and the second end of the fourth coupling capacitor is electrically connected with the fourth input end of the control unit.
6. The apparatus of any of claims 1-5, wherein the receive circuit comprises: a microphone array and a high-pass filter circuit; the microphone array is electrically connected with the high-pass filter circuit, and the high-pass filter circuit is electrically connected with the control unit.
7. The apparatus of claim 6, wherein when the microphone array is two microphones, the high pass filter circuit comprises: a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a second resistor, a third resistor, a fourth resistor and a fifth resistor;
a first output end of the receiving circuit is electrically connected to a first end of the second resistor, a second end of the second resistor is electrically connected to a first input end of the control unit and a first end of the sixth capacitor, respectively, a second output end of the receiving circuit is electrically connected to a first end of the third resistor, a second end of the third resistor is electrically connected to a second input end of the control unit and a first end of the seventh capacitor, respectively, a third output end of the receiving circuit is electrically connected to a first end of the fourth resistor, a second end of the fourth resistor is electrically connected to a third input end of the control unit and a first end of the eighth capacitor, respectively, a fourth output end of the receiving circuit is electrically connected to a first end of the fifth resistor, and a second end of the fifth resistor is electrically connected to a fourth input end of the control unit and a first end of the ninth capacitor, respectively, the second end of the sixth capacitor, the second end of the seventh capacitor, the second end of the eighth capacitor and the second end of the ninth capacitor are all grounded.
8. The apparatus of any of claims 1-7, wherein the LDO supply circuit comprises: the LDO voltage stabilizing chip comprises an LDO voltage stabilizing chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a first resistor;
the first end of the LDO voltage stabilizing chip is used for outputting the direct current bias voltage, the first end of the LDO voltage stabilizing chip is electrically connected with the receiving circuit, the first end of the LDO voltage stabilization chip is also electrically connected with the first end of the first capacitor and the first end of the second capacitor respectively, a third end of the LDO voltage stabilization chip is respectively and electrically connected with a first end of the third capacitor and a first end of the first resistor, the second end of the first resistor is used for being electrically connected with an enabling signal, the fourth end of the LDO voltage stabilizing chip is used for being electrically connected with a power supply voltage, the fourth end of the LDO voltage stabilization chip is respectively and electrically connected with the first end of the fourth capacitor and the first end of the fifth capacitor, the second end and the fifth end of the LDO voltage stabilization chip, the second end of the first capacitor, the second end of the second capacitor, the second end of the fourth capacitor and the second end of the fifth capacitor are all grounded.
9. An electronic device, comprising: the audio capture device of any of claims 1-8.
10. The apparatus of claim 9, wherein the electronic device is a television, a refrigerator, or an air conditioner.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011521124.6A CN112684840A (en) | 2020-12-21 | 2020-12-21 | Audio acquisition device and electronic equipment |
| PCT/CN2021/081502 WO2022001200A1 (en) | 2020-07-03 | 2021-03-18 | Display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011521124.6A CN112684840A (en) | 2020-12-21 | 2020-12-21 | Audio acquisition device and electronic equipment |
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| CN112684840A true CN112684840A (en) | 2021-04-20 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202011521124.6A Pending CN112684840A (en) | 2020-07-03 | 2020-12-21 | Audio acquisition device and electronic equipment |
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Application publication date: 20210420 |