CN112671966A - Ear return delay detection device, method, electronic device and computer readable storage medium - Google Patents
Ear return delay detection device, method, electronic device and computer readable storage medium Download PDFInfo
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Abstract
The embodiment of the disclosure discloses an ear return delay detection device, an ear return delay detection method, electronic equipment and a computer readable storage medium. The ear return time delay detection method comprises the following steps: sound playing means for playing a first sound; the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound; a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal; computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal. The ear return time delay detection device solves the problem that the calculation time delay is complex and inaccurate through the mutual matching of a plurality of components.
Description
Technical Field
The present disclosure relates to the field of ear return delay detection, and in particular, to an ear return delay detection apparatus and method, an electronic device, and a computer-readable storage medium.
Background
With the rapid development of information technology, the mobile internet technology has also advanced dramatically. Whether the emergence of intelligent devices or the arrival of the 5G era or the application of technologies such as big data, AI intelligence and algorithms, flying wings are inserted into the electronic mobile devices. In real life, the social communication is diversified due to the technologies, especially, the smart phone breaks through the space-time limitation of the daily communication of human beings, is a comprehensive handheld mobile device really integrating massive information, network audio-visual, leisure and entertainment and the like, and meets the daily information demand and the social communication of people.
In the current device, a certain time delay is generated in the process from the time when the information is received to the time when the information is processed and displayed. For example, some current K-song APPs receive the singing sound of a user through a microphone, and then play the singing sound through a mobile phone audio link and an audio processing module of the K-song APP, wherein the microphone is the microphone of the earphone of the user, and the speaker is the speaker of the earphone of the user, so that the sound of the user has a time delay from the sound emission to the return to the ear of the user through the earphone, which is called as an ear return time delay.
The existing schemes for testing the ear return time delay are troublesome, have great limitation on scenes and are not high in efficiency. The first is to use artificial ears and artificial mouths for detection, which has great limitation on the field and expensive equipment; the other method is to manually acquire the ear return audio and manually calculate the ear return time delay through professional audio software, but the method is complex and inaccurate.
Disclosure of Invention
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
In order to solve the above technical problem, the embodiments of the present disclosure propose the following technical solutions.
In a first aspect, an embodiment of the present disclosure provides an ear return delay detection apparatus, including:
sound playing means for playing a first sound;
the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal;
computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal.
In a second aspect, an embodiment of the present disclosure provides an ear return delay detection method, including:
playing a first sound;
receiving the first sound and sending the first sound to the system to be tested;
receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
receiving the first sound and the second sound, and synthesizing the first sound and the second sound according to a receiving sequence to obtain a synthesized sound signal;
calculating a time delay between the first sound and the second sound from the synthesized sound signal.
In a third aspect, an embodiment of the present disclosure provides an electronic device, including: at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of the preceding second aspects.
In a fourth aspect, the disclosed embodiments provide a non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores computer instructions for causing a computer to perform the method of any of the foregoing second aspects.
The embodiment of the disclosure discloses an ear return delay detection device, an ear return delay detection method, electronic equipment and a computer readable storage medium. The ear return time delay detection method comprises the following steps: sound playing means for playing a first sound; the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound; a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal; computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal. The ear return time delay detection device solves the problem that the calculation time delay is complex and inaccurate through the mutual matching of a plurality of components.
The foregoing is a summary of the present disclosure, and for the purposes of promoting a clear understanding of the technical means of the present disclosure, the present disclosure may be embodied in other specific forms without departing from the spirit or essential attributes thereof.
Drawings
The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numbers refer to the same or similar elements. It should be understood that the drawings are schematic and that elements and features are not necessarily drawn to scale.
Fig. 1 is a schematic structural diagram of an ear return delay detection apparatus provided in an embodiment of the present disclosure;
fig. 2 is a schematic flowchart illustrating steps performed by an ear return delay detection apparatus according to an embodiment of the present disclosure;
fig. 3 is a schematic flow chart illustrating further steps performed by the ear return delay detection apparatus according to an embodiment of the present disclosure;
fig. 4 is a schematic flow chart illustrating further steps performed by the ear return delay detection apparatus according to an embodiment of the present disclosure;
fig. 5 is a schematic flow chart of an ear return delay detection method according to an embodiment of the present disclosure;
fig. 6 is a schematic structural diagram of an electronic device provided according to an embodiment of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order, and/or performed in parallel. Moreover, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "include" and variations thereof as used herein are open-ended, i.e., "including but not limited to". The term "based on" is "based, at least in part, on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions for other terms will be given in the following description.
It should be noted that the terms "first", "second", and the like in the present disclosure are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence relationship of the functions performed by the devices, modules or units.
It is noted that references to "a", "an", and "the" modifications in this disclosure are intended to be illustrative rather than limiting, and that those skilled in the art will recognize that "one or more" may be used unless the context clearly dictates otherwise.
The names of messages or information exchanged between devices in the embodiments of the present disclosure are for illustrative purposes only, and are not intended to limit the scope of the messages or information.
Fig. 1 is a schematic structural diagram of an ear return delay detection apparatus provided in an embodiment of the present disclosure. As shown in fig. 1, the ear return delay detection device includes a sound playing device 101, an earphone 102, a sound synthesizing device 103, and a computing device 104. Wherein the content of the first and second substances,
a sound playing device 101, configured to play a first sound;
the earphone 102 is connected to a system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
a sound synthesizing device 103, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal;
computing means 104 for computing a time delay between the first sound and the second sound from the synthesized sound signal.
The sound playing device 101 is configured to play a preset audio for detecting the ear return delay, where the first sound is generated when the sound playing device plays the audio.
Optionally, the system under test that earphone 102 is connected is intelligent terminal, if can only the cell-phone, including handling the procedure that the audio frequency was used etc. in the intelligent terminal, if in an application scene, including K song APP in the smart phone, the smart phone passes through the earphone microphone and receives first sound, later through cell-phone audio link and K song APP rethread earphone speaker broadcast go out in order to send the second sound, the content of first sound and second sound is the same, and the broadcast time of only second sound is later than the broadcast time of first sound.
Optionally, the sound synthesizing device 103 is a recording device for recording the first sound and the second sound, so that the synthesized sound signal includes the first sound signal and the second sound signal and the processing delay of the system under test is recorded in the synthesized sound signal.
Specifically, the sound synthesizing apparatus 103 is configured to:
receiving a first sound played by the sound playing device;
receiving a second sound played by the earphone;
combining the first sound and the second sound into one synthesized sound signal according to the reception order.
Optionally, the computing device is a processor or a device with a processor, and is configured to compute a time delay between the first sound and the second sound according to the synthesized sound signal. By the detection device, the synthesized sound signal can be conveniently and quickly obtained, and the time delay of the system to be detected can be calculated through the synthesized sound signal. The system to be tested is replaceable for the time delay detection device, that is, the time delay for detecting different systems to be tested can be replaced by different systems to be tested in the system to be tested connected with the earphone.
Further, as shown in fig. 1, the apparatus for detecting ear return delay further includes: a headset fixing device 105 to which the user fixes the headset 102. In order to make the detection more accurate, the ear return time detection device further comprises an earphone fixing device for fixing the earphone, so that the earphone is fixed at a position close to the sound playing device and the sound synthesizing device.
Optionally, the earphone fixing device 105 includes: a slot track 1051 for fixing a cable of the headset; a headset securing wire 1052 for securing a cable of a headset located in the wireway track. As shown in fig. 1, the headset securing device 105 includes two raceway rails 1051 in which two cables of a headset are disposed; every wire casing track includes two earphone fixed lines, and the direction of earphone fixed line is crossing with the orbital direction of wire casing to make the earphone fixed line can fix the cable of earphone, obtain the position that the earphone can be when receiving first sound and broadcast the second sound and do not change.
Optionally, the calculating means 104 is configured to calculate a time delay between the first sound and the second sound according to the synthesized sound signal, and includes the following steps:
step S201, acquiring a plurality of first sampling points of the synthesized sound signal;
step S202, calculating a plurality of autocorrelation coefficients of the synthesized sound signal according to the plurality of first sampling points;
step S203, acquiring a first synthesized sub-signal corresponding to the first sound from the synthesized sound signal;
step S204, determining the maximum correlation coefficient in the plurality of sub-correlation coefficients according to the first synthesized sub-signal;
step S205, calculating the time delay according to the maximum autocorrelation coefficient.
In this alternative embodiment, the synthesized sound signal is represented by a sampling rate and sampling points, and the synthesized sound signal is typically sampled from the analog sound signal using a sampling rate, such as 5KHz, 22KHz, 44KHz, 48KHz, etc., which represents the number of samples taken a second or the number of samples taken a second, such as 5KHz, i.e., 5000 samples per second, to obtain 5000 sampling points.
In the above step S201, a plurality of first sampling points in the synthesized sound signal is obtained, and the plurality of first sampling points may be all sampling points or some sampling points in the synthesized sound signal. Since the first sample points may represent the synthesized sound signal itself, in step S202, a plurality of autocorrelation coefficients of the synthesized sound signal may be obtained by correlation between a plurality of first sample points.
Further, when the step S202 is executed, the computing device 104 is further configured to execute the following steps:
step S301, forming a first sequence of the plurality of first sampling points according to a sequence;
step S302, a plurality of second sequences are sequentially intercepted from the first sequence according to the sequence of the first sampling points;
step S303, sequentially calculating correlation coefficients of the plurality of second sequences and the first sequence according to lengths of the plurality of second sequences to obtain the plurality of autocorrelation coefficients.
In the above step S301, the plurality of first sample points form a first sequence in an order, where the order is a sampling order of the first sample points, that is, an arrangement order of the sample points in the synthesized sound signal, and exemplarily, 100 sample points are x1 and x2 … … x100 in the synthesized sound signal, and the first sequence is [ x1, x2, … … x100 ]. Optionally, in order to facilitate subsequent calculation, the step S301 includes: and storing the plurality of first sampling points into a first array in sequence, wherein each first sampling point is an element in the first array. Assuming that the first array is numbered from 1, the 1 st position of the first array is stored in x1, the 1 st position is stored in x2, and the 100 th position of … … is stored in x100, so that each first sampling point is an element in the first data, and the first array forms the first sequence.
In step S302, a plurality of second sequences are extracted from the first sequence, and optionally, the sequence according to the first sampling point includes: and intercepting M-N +1 first sampling points as a second sequence from the Nth first sampling point, wherein the value of N is added with 1 every time of interception until N is larger than M. Wherein N is more than or equal to 1 and less than or equal to M, wherein M is the number of first sampling points or the length of the first sequence. As explained in the above example, the step S302 includes: and sequentially moving backward one bit from the first element in the first array to intercept a plurality of second sequences. Illustratively, the first sequence is [ x1, x2, … … x100], and the second sequence is [ x1, x2, … … x100], [ x2, x3, … … x100], [ x3, x4, … … x100] … …, [ x100], so as to intercept 100 second sequences; for convenience of subsequent calculation, the second sequence may also be stored in a second array, where the elements in the second array are denoted by y, and then the second sequence is [ y1, y2 … … y100] [ y2, y3, … … y100], [ y3, y4, … … y100] … …, [ y100 ].
In step S303, the correlation coefficients of the plurality of second sequences and the first sequence are sequentially calculated according to the lengths of the plurality of second sequences, so as to obtain the plurality of autocorrelation coefficients. In this step, the number of first sampling points participating in calculation in the first sequence is controlled according to the length of the plurality of second sequences. Optionally, the step S303 further includes:
sequentially intercepting a plurality of third sequences from the first array according to the lengths of the plurality of second sequences, wherein the plurality of third sequences are in one-to-one correspondence with the plurality of second sequences, and the lengths of the one-to-one correspondence third sequences are the same as the lengths of the second sequences;
and sequentially calculating the correlation coefficients between the one-to-one corresponding second sequence and the third sequence to obtain the plurality of autocorrelation coefficients.
Taking the above example as an example, if the plurality of second sequences are [ y1, y2 … … y100] [ y2, y3, … … y100], [ y3, y4, … … y100] … …, [ y100], and the number of the first group is [ x1, x2, … … x100], then the plurality of third sequences are sequentially extracted from the first group according to the length of the second sequences: [ x1, x2, … … x100], [ x1, x2, … … x99], [ x1, x2, … … x98] … …, [ x1], wherein the plurality of third sequences correspond to the plurality of second sequences one by one according to the length, and the corresponding third sequences have the same length as the second sequences. Then, the correlation coefficients between the two corresponding third sequences and the second sequence are sequentially calculated, so that a plurality of autocorrelation coefficients of the synthesized signal can be obtained.
Optionally, the autocorrelation coefficient is calculated by the following formula:
wherein n is the length of the third sequence and the second sequence. That is, the value of n is changed from the length M of the first sequence to 1 in a descending manner, and M autocorrelation coefficients are calculated. Illustratively, the M autocorrelation coefficients are stored in the third array, and a plurality of autocorrelation coefficients [ r1, r2, … … rM ] are obtained in sequence, where in the above example, when M is 100, the plurality of autocorrelation coefficients are [ r1, r2, … … r100 ].
Optionally, in step S203, the first synthesized sub-signal may be obtained by using the number of sampling points, where the sampling rate of the first sound is the same as the sampling rate of the synthesized sound signal, and since the sampling rates are the same, the number of sampling points obtained by sampling the same length signal is also the same, and thus the number of sampling points of the first synthesized sub-signal may be obtained by using the number of sampling points of the first sound. In some cases, the sampling rate of the first sound may be different from the sampling rate of the synthesized sound signal, so optionally, in this step, the first synthesized sub-signal may also be obtained by the length of the first sound. That is, even if the sampling rate is different, since the duration of the first sound and the duration of the first synthesized sub-signal are the same, the first synthesized sub-signal may be obtained by intercepting the length of the first sound from the start point of the synthesized sound signal by a corresponding length.
Since the first sound and the second sound are the same or similar in step S204, the component corresponding to the first sound and the component corresponding to the second sound are also the same or similar in the synthesized signal, and by sequentially moving the 1 st sample point of the sequence by the method in step S102, when the component corresponding to the first sound and the component corresponding to the second sound overlap, the obtained autocorrelation coefficient should be significantly higher than other autocorrelation coefficients, and thus the starting point of the component corresponding to the second sound in the synthesized sound signal can be obtained.
Optionally, when executing the step S204, the computing device 104 further performs the following steps:
step S401, acquiring the number of second sampling points corresponding to the first synthesized sub-signal, wherein the second sampling points are a part of the plurality of first sampling points;
step S402, calculating a maximum autocorrelation coefficient among a plurality of autocorrelation coefficients whose positions are arranged after the number of the second sample points among the plurality of autocorrelation coefficients.
In step S401, after obtaining the first synthesized sub-signal, the number of corresponding second sampling points of the first synthesized sub-signal is obtained, and since the first synthesized sub-signal is a part of the synthesized signal, the second sampling points are a part of the plurality of first sampling points.
Since the component corresponding to the first sound and the component corresponding to the second sound are the same or similar in the synthesized sound signal, two autocorrelation coefficients are significantly higher than other autocorrelation coefficients in the process of calculating the autocorrelation coefficients, that is, when the component corresponding to the first sound and the component corresponding to the first sound coincide, the component corresponding to the first sound and the component corresponding to the second sound coincide. Therefore, the position of the component corresponding to the second sound in the synthesized sound signal can be determined by finding the maximum autocorrelation coefficient as long as the condition that the component corresponding to the first sound and the component corresponding to the first sound are overlapped is eliminated.
Thus, in step S402, a plurality of autocorrelation coefficients whose positions are after the number of the second sampling points are extracted from the third array, and the maximum autocorrelation coefficient is determined from the autocorrelation coefficients, where the position of the maximum autocorrelation coefficient in the third array is the position of the component corresponding to the second signal in the synthesized signal. For example, as an implementation manner, if the number of the second sampling points is k, the first k elements in the third array are set to 0, and then the maximum value of all elements in the third array is calculated, which is the maximum autocorrelation coefficient. In the above example, if the third array is [ r1, r2, … … r100], and the number of the second sampling points is 10, the first 10 elements of the third array are set to 0, and the third array is obtained as: 0,0, … …,0, r11 … … r100, from which the maximum autocorrelation coefficient in the third array and its position in the third array can be derived.
In the above step S205, after obtaining the maximum autocorrelation coefficient, the start position of the component corresponding to the second sound is obtained, and the time length from the start position of the synthesized signal to the start position of the component corresponding to the second sound is the delay.
Optionally, when executing the step S205, the computing device 104 further performs the following steps:
calculating the time delay according to the position of the maximum autocorrelation system in the plurality of autocorrelation coefficients and the sampling frequency of the synthesized sound signal.
The position of the maximum autocorrelation coefficient in the autocorrelation coefficients is the position of the maximum autocorrelation coefficient in the third array, that is, the position of the first sample point of the component corresponding to the second sound in the first sequence. The positions of the sampling points are related to the sampling rate and time, if the sampling rate is 2Hz, namely 2 times of sampling per second, the 5 th sampling point is generated in the 2.5 th second, and the time delay from the 5 th sampling point to the 1 st sampling point is 2.5 seconds, so that the time delay can be calculated according to the positions and the sampling rate. In this alternative embodiment, the time delay is calculated as the quotient of the number of the position and the sampling frequency. Namely, the time delay is calculated by dividing the position number of the maximum coefficient of correlation in the third array by the sampling frequency. As in the above example, the time delay between the 5 th sample point and the first sample point is 5/2Hz — 2.5 seconds.
Fig. 5 is a diagram of an ear return delay detection method according to another embodiment of the present disclosure, which is executed by the ear return delay detection apparatus according to the foregoing embodiment. The ear return time delay detection method comprises the following steps:
step S501, playing a first sound;
step S502, receiving the first sound and sending the first sound to the system to be tested;
step S503, receiving a second sound obtained by processing the first sound from the system under test and playing the second sound;
step S504, receiving the first sound and the second sound, and synthesizing the first sound and the second sound according to the receiving sequence to obtain a synthesized sound signal;
step S505, calculating a time delay between the first sound and the second sound according to the synthesized sound signal.
The implementation details of the corresponding steps are the same as those of the steps executed by each part in the above-mentioned ear return delay detection apparatus, and are not described herein again.
The embodiment of the disclosure discloses an ear return delay detection device, an ear return delay detection method, electronic equipment and a computer readable storage medium. The ear return time delay detection method comprises the following steps: sound playing means for playing a first sound; the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound; a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal; computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal. The ear return time delay detection device solves the problem that the calculation time delay is complex and inaccurate through the mutual matching of a plurality of components.
In the above, although the steps in the above method embodiments are described in the above sequence, it should be clear to those skilled in the art that the steps in the embodiments of the present disclosure are not necessarily performed in the above sequence, and may also be performed in other sequences such as reverse, parallel, and cross, and further, on the basis of the above steps, other steps may also be added by those skilled in the art, and these obvious modifications or equivalents should also be included in the protection scope of the present disclosure, and are not described herein again.
Referring now to FIG. 6, a block diagram of an electronic device 600 suitable for use in implementing embodiments of the present disclosure is shown. The terminal device in the embodiments of the present disclosure may include, but is not limited to, a mobile terminal such as a mobile phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a vehicle terminal (e.g., a car navigation terminal), and the like, and a stationary terminal such as a digital TV, a desktop computer, and the like. The electronic device shown in fig. 6 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 6, electronic device 600 may include a processing means (e.g., central processing unit, graphics processor, etc.) 601 that may perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)602 or a program loaded from a storage means 608 into a Random Access Memory (RAM) 603. In the RAM 603, various programs and data necessary for the operation of the electronic apparatus 600 are also stored. The processing device 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input/output (I/O) interface 605 is also connected to bus 604.
Generally, the following devices may be connected to the I/O interface 605: input devices 606 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 607 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage 608 including, for example, tape, hard disk, etc.; and a communication device 609. The communication means 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. While fig. 6 illustrates an electronic device 600 having various means, it is to be understood that not all illustrated means are required to be implemented or provided. More or fewer devices may alternatively be implemented or provided.
In particular, according to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a non-transitory computer readable medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication means 609, or may be installed from the storage means 608, or may be installed from the ROM 602. The computer program, when executed by the processing device 601, performs the above-described functions defined in the methods of the embodiments of the present disclosure.
It should be noted that the computer readable medium in the present disclosure can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In contrast, in the present disclosure, a computer readable signal medium may comprise a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.
In some embodiments, the clients, servers may communicate using any currently known or future developed network Protocol, such as HTTP (HyperText Transfer Protocol), and may interconnect with any form or medium of digital data communication (e.g., a communications network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the Internet (e.g., the Internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed network.
The computer readable medium may be embodied in the electronic device; or may exist separately without being assembled into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: the above-described delay detection method is performed.
Computer program code for carrying out operations for the present disclosure may be written in any combination of one or more programming languages, including but not limited to an object oriented programming language such as Java, Smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present disclosure may be implemented by software or hardware. Where the name of an element does not in some cases constitute a limitation on the element itself.
The functions described herein above may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), systems on a chip (SOCs), Complex Programmable Logic Devices (CPLDs), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
According to one or more embodiments of the present disclosure, there is provided a latency detection apparatus including:
sound playing means for playing a first sound;
the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal;
computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal.
Further, the apparatus further comprises:
and the earphone fixing device is used for fixing the earphone.
Further, the earphone fixing device includes:
the wire groove track is used for fixing a cable of the earphone;
the earphone fixing wire is used for fixing a cable of an earphone located in the wire groove track.
Further, the computing device is configured to:
acquiring a plurality of first sampling points of the synthesized sound signal;
calculating a plurality of autocorrelation coefficients of the synthesized sound signal according to the plurality of first sampling points;
acquiring a first synthesized sub-signal corresponding to the first sound from the synthesized sound signal;
determining a largest correlation coefficient of the plurality of sub-correlation coefficients from the first synthesized sub-signal;
and calculating to obtain the time delay according to the maximum autocorrelation coefficient.
Further, the computing device is further configured to:
sequentially forming a first sequence of the plurality of first sampling points;
sequentially intercepting a plurality of second sequences from the first sequence according to the sequence of the first sampling points;
and sequentially calculating the correlation coefficients of the plurality of second sequences and the first sequence according to the lengths of the plurality of second sequences to obtain the plurality of autocorrelation coefficients.
Further, the computing device is further configured to:
storing the plurality of first sampling points into a first array in sequence, wherein each first sampling point is an element in the first array;
the sequentially intercepting a plurality of second sequences from the first sequence according to the order of the first sampling points comprises:
sequentially moving backward one bit from a first element in the first array to intercept a plurality of second sequences;
the sequentially calculating correlation coefficients of the plurality of second sequences and the first sequence according to the lengths of the plurality of second sequences to obtain the plurality of autocorrelation coefficients includes:
sequentially intercepting a plurality of third sequences from the first array according to the lengths of the plurality of second sequences, wherein the plurality of third sequences are in one-to-one correspondence with the plurality of second sequences, and the lengths of the one-to-one correspondence third sequences are the same as the lengths of the second sequences;
and sequentially calculating the correlation coefficients between the one-to-one corresponding second sequence and the third sequence to obtain the plurality of autocorrelation coefficients.
Further, the computing device is further configured to:
acquiring the number of second sampling points corresponding to the first synthesized subsignals, wherein the second sampling points are part of the plurality of first sampling points;
calculating a maximum autocorrelation coefficient among a plurality of autocorrelation coefficients that are positioned after the number of the second sample points among the plurality of autocorrelation coefficients.
Further, the computing device is further configured to:
calculating the time delay according to the position of the maximum autocorrelation coefficient in the plurality of autocorrelation coefficients and the sampling frequency of the synthesized sound signal.
Further, the computing device is further configured to:
and calculating the quotient of the number of the position and the sampling frequency as the time delay.
Further, the sound synthesizing apparatus is further configured to:
receiving a first sound played by the sound playing device;
receiving a second sound played by the earphone;
combining the first sound and the second sound into one synthesized sound signal according to the reception order.
According to one or more embodiments of the present disclosure, there is provided a latency detection method, including:
playing a first sound;
receiving the first sound and sending the first sound to the system to be tested;
receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
receiving the first sound and the second sound, and synthesizing the first sound and the second sound according to a receiving sequence to obtain a synthesized sound signal;
calculating a time delay between the first sound and the second sound from the synthesized sound signal.
According to one or more embodiments of the present disclosure, there is provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the latency detection method of any one of the preceding first aspects.
According to one or more embodiments of the present disclosure, there is provided a non-transitory computer-readable storage medium, characterized in that the non-transitory computer-readable storage medium stores computer instructions for causing a computer to execute the latency detection method of any one of the foregoing first aspects.
The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the disclosure herein is not limited to the particular combination of features described above, but also encompasses other embodiments in which any combination of the features described above or their equivalents does not depart from the spirit of the disclosure. For example, the above features and (but not limited to) the features disclosed in this disclosure having similar functions are replaced with each other to form the technical solution.
Claims (11)
1. An ear return delay detection device, comprising:
sound playing means for playing a first sound;
the earphone is connected with the system to be tested and used for receiving the first sound and sending the first sound to the system to be tested; the earphone is also used for receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
a sound synthesizing device, configured to receive the first sound and the second sound, and synthesize the first sound and the second sound according to a receiving order to obtain a synthesized sound signal;
computing means for computing a time delay between the first sound and the second sound from the synthesized sound signal.
2. The ear return delay detection apparatus of claim 1, further comprising:
and the earphone fixing device is used for fixing the earphone.
3. The ear return delay detection device of claim 2, wherein the headset securing device comprises:
the wire groove track is used for fixing a cable of the earphone;
the earphone fixing wire is used for fixing a cable of an earphone located in the wire groove track.
4. The ear return delay detection apparatus of claim 1, wherein the computing apparatus is configured to:
acquiring a plurality of first sampling points of the synthesized sound signal;
calculating a plurality of autocorrelation coefficients of the synthesized sound signal according to the plurality of first sampling points;
acquiring a first synthesized sub-signal corresponding to the first sound from the synthesized sound signal;
determining a largest correlation coefficient of the plurality of sub-correlation coefficients from the first synthesized sub-signal;
and calculating to obtain the time delay according to the maximum autocorrelation coefficient.
5. The ear return delay detection apparatus of claim 4, wherein the computing apparatus is further configured to:
sequentially forming a first sequence of the plurality of first sampling points;
sequentially intercepting a plurality of second sequences from the first sequence according to the sequence of the first sampling points;
and sequentially calculating the correlation coefficients of the plurality of second sequences and the first sequence according to the lengths of the plurality of second sequences to obtain the plurality of autocorrelation coefficients.
6. The ear return delay detection apparatus of claim 5, wherein the computing apparatus is further configured to:
storing the plurality of first sampling points into a first array in sequence, wherein each first sampling point is an element in the first array;
the sequentially intercepting a plurality of second sequences from the first sequence according to the order of the first sampling points comprises:
sequentially moving backward one bit from a first element in the first array to intercept a plurality of second sequences;
the sequentially calculating correlation coefficients of the plurality of second sequences and the first sequence according to the lengths of the plurality of second sequences to obtain the plurality of autocorrelation coefficients includes:
sequentially intercepting a plurality of third sequences from the first array according to the lengths of the plurality of second sequences, wherein the plurality of third sequences are in one-to-one correspondence with the plurality of second sequences, and the lengths of the one-to-one correspondence third sequences are the same as the lengths of the second sequences;
and sequentially calculating the correlation coefficients between the one-to-one corresponding second sequence and the third sequence to obtain the plurality of autocorrelation coefficients.
7. The ear return delay detection apparatus of claim 4, wherein the computing apparatus is further configured to:
acquiring the number of second sampling points corresponding to the first synthesized subsignals, wherein the second sampling points are part of the plurality of first sampling points;
calculating a maximum autocorrelation coefficient among a plurality of autocorrelation coefficients that are positioned after the number of the second sample points among the plurality of autocorrelation coefficients.
8. The ear return delay detection apparatus of claim 1, wherein the computing apparatus is further configured to:
calculating the time delay according to the position of the maximum autocorrelation coefficient in the plurality of autocorrelation coefficients and the sampling frequency of the synthesized sound signal.
9. The ear return delay detection apparatus of claim 1, wherein the computing apparatus is further configured to:
and calculating the quotient of the number of the position and the sampling frequency as the time delay.
10. The ear return delay detection apparatus of claim 1, wherein the sound synthesis apparatus is further configured to:
receiving a first sound played by the sound playing device;
receiving a second sound played by the earphone;
combining the first sound and the second sound into one synthesized sound signal according to the reception order.
11. An ear return delay detection method, comprising:
playing a first sound;
receiving the first sound and sending the first sound to the system to be tested;
receiving a second sound obtained by processing the first sound from the system to be tested and playing the second sound;
receiving the first sound and the second sound, and synthesizing the first sound and the second sound according to a receiving sequence to obtain a synthesized sound signal;
calculating a time delay between the first sound and the second sound from the synthesized sound signal.
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