CN112671494A - Method and device for automatically adjusting clock frequency offset - Google Patents
Method and device for automatically adjusting clock frequency offset Download PDFInfo
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Abstract
The application provides a method and a device for automatically adjusting clock frequency offset. Wherein the method comprises the following steps: acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency; determining a frequency offset adjustment step value corresponding to the communication specific frequency value according to the frequency offset adjustment step function curve and the communication specific frequency value; calculating and generating a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value; and adjusting the configuration value of the register according to the generated register value to be configured, thereby adjusting the clock frequency offset. Therefore, the value of the digital compensation crystal oscillator register can be configured more accurately, and the correction of the clock frequency offset of the nonlinear frequency band can be met. The local reference clock is more accurate, the carrier frequency output is more accurate, and the performance of correcting the frequency offset is better. Meanwhile, the step value of frequency adjustment does not need to be measured manually, and the difference of different printed circuit boards does not need to be considered for retesting.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for automatically adjusting a clock frequency offset.
Background
By adjusting the control value of the register, the output of the digitally compensated crystal oscillator local reference clock, and thus the output of the local carrier frequency, can be changed. Therefore, the clock frequency offset correction in the system synchronization process can be realized by adjusting the register configuration value. At present, two different control values are configured for a terminal register, manual measurement is performed on the output of carrier frequency, and a corresponding frequency offset stepping value can be obtained through calculation. And solidifying the frequency offset stepping value into a program to realize clock frequency offset correction in work.
The inventor finds that the frequency band supported by the terminal for working does not exist linearly, and the clock frequency offset correction method cannot meet the requirement of correcting the clock frequency offset of the nonlinear frequency band. Secondly, the impedance of the printed circuit board has batch difference, so that the output frequency is changed. At this time, the clock frequency offset correction cannot be realized according to the original register value, and the register value needs to be re-measured in time.
Therefore, it is desirable to provide a method and apparatus for automatically adjusting the clock frequency offset.
Disclosure of Invention
The embodiment of the application provides a method and a device for automatically adjusting clock frequency offset.
Specifically, a method for automatically adjusting a clock frequency offset includes:
acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency;
determining a frequency offset adjustment step value corresponding to the communication specific frequency value according to the frequency offset adjustment step function curve and the communication specific frequency value;
calculating and generating a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value;
and adjusting the configuration value of the register according to the generated register value to be configured, thereby adjusting the clock frequency offset.
Further, before the step of determining the frequency offset adjustment step size value corresponding to the communication specific frequency value according to the frequency offset adjustment step size function curve and the communication specific frequency value, generating a frequency offset adjustment step size function curve.
Further, generating a frequency offset adjustment step function curve comprises the following steps:
acquiring a first configuration value and a second configuration value of a register under the condition that a digital compensation crystal oscillator is in the same working frequency band;
respectively collecting radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency when the first configuration value, the second configuration value and different communication specific frequency values are synchronized;
respectively calculating frequency offset adjustment step values corresponding to the radio frequency offset values through a frequency offset adjustment step calculation function;
and fitting to generate a frequency offset adjustment step function curve according to the different communication specific frequency values and the multiple groups of frequency offset adjustment step values.
Further, before the step of obtaining the first configuration value and the second configuration value of the register of the digital compensated crystal oscillator in the same working frequency band, initializing system parameters.
Further, the register is provided with a maximum configuration value and a minimum configuration value; the first configuration value is set to a maximum configuration value and the second configuration value is set to a minimum configuration value.
Further, before the step of collecting the radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency when the synchronization is performed under the first configuration value, the second configuration value and different communication specific frequency values, a digital filter is used for performing radio frequency filtering.
Further, the digital filter is an Infinite Impulse Response (IIR) digital filter.
Further, at least 20 times of Infinite Impulse Response (IIR) digital filtering are carried out to complete radio frequency filtering.
Furthermore, in the whole communication frequency band of the narrowband internet of things, the radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency are respectively acquired when the first configuration value, the second configuration value and the different communication specific frequency values are synchronized by uniformly selecting at least 25 different communication specific frequency values.
Specifically, an apparatus for automatically adjusting a clock frequency offset includes:
the acquisition device is used for acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency;
the determining device is used for determining a frequency offset adjusting step value corresponding to the communication specific frequency value according to the frequency offset adjusting step function curve and the communication specific frequency value;
the calculating device is used for calculating and generating a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value;
and the adjusting device is used for adjusting the register configuration value according to the generated register to-be-configured value, so as to adjust the clock frequency offset.
The technical scheme provided by the embodiment of the application at least has the following beneficial effects:
by the method and the device for automatically adjusting the clock frequency offset, the value of the digital compensation crystal oscillator register can be accurately configured, so that the correction of the clock frequency offset of a nonlinear frequency band can be met. The local reference clock is more accurate, the carrier frequency output is more accurate, and the performance of correcting the frequency offset is better. Meanwhile, the step value of frequency adjustment does not need to be measured manually, and the difference of different printed circuit boards does not need to be considered for retesting.
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The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a flowchart of a method for automatically adjusting a clock frequency offset according to an embodiment of the present disclosure.
Fig. 2 is a schematic structural diagram of an apparatus for automatically adjusting a clock frequency offset according to an embodiment of the present disclosure.
100 apparatus for automatically adjusting clock frequency offset
11 acquisition device
12 determining device
13 computing device
14 adjusting device
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, the present application discloses a method for automatically adjusting a clock frequency offset, which includes:
s100: and acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency.
Specifically, when the clock frequency offset is generated, a communication specific frequency value of the digitally compensated crystal oscillator is obtained. Namely, the frequency output by the digital compensation crystal oscillator under the action of the oscillating circuit under the current working frequency point is obtained. The working frequency point is a specific frequency value currently used for communication of the digital compensation crystal oscillator. And acquiring a radio frequency offset value generated by the digital compensation crystal oscillator relative to the standard radio frequency, namely acquiring a frequency offset value generated by the frequency output by the digital compensation crystal oscillator after the action of the oscillating circuit relative to the standard radio frequency of the digital compensation crystal oscillator under the current working frequency point. Wherein, the frequency deviation refers to the amplitude of frequency modulation wave frequency swing. And local clock frequency offset correction can be carried out according to the property only by acquiring the radio frequency and the radio frequency offset value under the current working frequency point.
In detail, the clock may provide a standard clock signal for system synchronization, so that the clock frequency of the receiving end is the same as the clock frequency of the transmitting end. The clock signal has a fixed clock frequency. The clock signal is generated by the oscillation of a crystal oscillator under the oscillation circuit. The oscillator circuit always uses a feedback manner to make the oscillator oscillate. The oscillator is operated at a specific frequency by feeding back the corresponding parameters. A crystal is a precision electrical device that allows only its specific frequency to pass through. When we apply a voltage across the piezoelectric crystal, it only allows the same signal to pass as its own resonant frequency, so it can produce a very precise frequency. The magnitude of the frequency depends on the size and characteristics of the crystal. The digital compensation crystal oscillator can change the output of the local reference clock by adjusting the register configuration value of the digital compensation crystal oscillator, so that the output of the local radio frequency is changed. Therefore, the frequency offset correction is realized by adjusting the configuration value of the DCXO register of the digital compensation crystal oscillator when the system is synchronized. It follows that the relationship of the digitally compensated crystal oscillator register configuration values to the frequency of the generated local rf output is of paramount importance. By utilizing the relation, the register configuration value of the digital compensation crystal oscillator can be configured through the obtained frequency deviation, so that the frequency deviation correction is realized.
It can be understood that, in the process of automatically adjusting the clock frequency offset, both the communication specific frequency value of the digitally compensated crystal oscillator and the radio frequency offset value generated with respect to the standard radio frequency are obtained in the present application, and are used to obtain the communication specific frequency value of the digitally compensated crystal oscillator and the radio frequency offset value generated with respect to the standard radio frequency. Therefore, the communication specific frequency value of the digital compensated crystal oscillator and the radio frequency offset value generated relative to the standard radio frequency can be obtained in different ways. The described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
S200: and determining a frequency offset adjustment step value corresponding to the communication specific frequency value according to the frequency offset adjustment step function curve and the communication specific frequency value.
Specifically, after the communication specific frequency value of the digitally compensated crystal oscillator and the radio frequency offset value generated with respect to the standard radio frequency are obtained, frequency offset correction may be performed by using a relationship between the register configuration value of the digitally compensated crystal oscillator and the frequency of the generated local radio frequency output. Changes in the digitally compensated crystal oscillator register configuration values can change the load capacitance of the digitally compensated crystal oscillator. The value of the load capacitance determines the operating frequency of the oscillator circuit. By adjusting the load capacitance value, the working frequency of the oscillator can be adjusted to a standard value.
In detail, according to the frequency offset adjustment step function curve and the obtained communication specific frequency value of the digital compensation crystal oscillator, a frequency offset adjustment step value can be determined on the frequency offset adjustment step function curve. The ordinate in the frequency offset adjustment step function curve represents the frequency offset adjustment step, and the abscissa represents different communication specific frequency values. And bringing the obtained communication specific frequency value of the digital compensation crystal oscillator into the abscissa of the offset adjustment step function curve, and mapping the offset adjustment step function curve by carrying out frequency offset adjustment step function curve on the obtained communication specific frequency value of the digital compensation crystal oscillator. And finally, obtaining a vertical coordinate corresponding to the obtained communication specific frequency value of the digital compensation crystal oscillator, namely a clock frequency offset adjustment step value corresponding to a register to be configured under the current working frequency point.
Further, before the step of determining the frequency offset adjustment step size value corresponding to the communication specific frequency value according to the frequency offset adjustment step size function curve and the communication specific frequency value, generating a frequency offset adjustment step size function curve.
Specifically, the frequency offset adjustment step function curve needs to be generated before the step of determining the frequency offset adjustment step value corresponding to the obtained communication specific frequency value, so as to adjust the clock frequency offset subsequently. Otherwise, the frequency offset adjustment step value corresponding to the radio frequency of the communication specific frequency value cannot be determined according to the frequency offset adjustment step function curve and the radio frequency of the communication specific frequency value.
Further, generating a frequency offset adjustment step function curve comprises the following steps:
acquiring a first configuration value and a second configuration value of a register under the condition that a digital compensation crystal oscillator is in the same working frequency band;
respectively collecting radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency when the first configuration value, the second configuration value and different communication specific frequency values are synchronized;
respectively calculating frequency offset adjustment step values corresponding to the radio frequency offset values through a frequency offset adjustment step calculation function;
and fitting to generate a frequency offset adjustment step function curve according to the different communication specific frequency values and the multiple groups of frequency offset adjustment step values.
Specifically, the generation of the frequency offset adjustment step function curve requires collecting relevant values in the synchronization of the digital compensation crystal oscillator, and calculating the collected values to finally obtain a corresponding frequency offset adjustment step fitting curve. Therefore, the accurate frequency offset adjustment step value can be obtained subsequently, the register value to be configured is calculated, and more accurate frequency offset adjustment is finally realized. Rather than by calculating only one frequency adjustment step value and programming it. The clock frequency offset correction is carried out by only using one frequency adjustment step value, and certain errors exist. Since the frequencies are not linearly distributed over the entire frequency band.
In detail, in the current working frequency band, a first configuration value C of a register of the digital compensated crystal oscillator in the same working frequency band is obtained1And a second configuration value C2. Different register configuration values will result in different load capacitances. The load capacitance value determines the operating frequency of the oscillator circuit. Therefore, different clock output frequencies and different frequency offset values F generated by the digital compensated crystal oscillator relative to the standard RF frequency are generated under different register configuration valuesoffset. Then respectively collecting the first configuration values C1And a second configuration value C2And the radio frequency offset value F generated by the digital compensation crystal oscillator relative to each standard radio frequency when the synchronization is carried out under different communication specific frequency valuesoffset. At the first configuration value C of the register1In the process of system synchronization under different communication specific frequency values, different frequency deviation values F corresponding to various standard radio frequency frequencies are correspondingly generated1offset. At register second configuration value C2In the process of system synchronization under different communication specific frequency values, different frequency deviation values F corresponding to various standard radio frequency frequencies are correspondingly generated2offset. Collecting the frequency deviation value F relative to each standard radio frequency1offsetAnd a frequency offset value F2offsetAnd subsequent frequency offset adjustment step length calculation can be carried out. For example, registersA first configuration value C1The system synchronously generates a frequency offset value F corresponding to the standard radio frequency1offsetAre respectively A1、A2、A3、A4……An(ii) a Register second configuration value C2The system synchronously generates a frequency offset value F corresponding to the standard radio frequency2offsetAre respectively B1、B2、B3、B4……Bn. Then, for each frequency offset value A generated1、A2、A3、A4……AnAnd each frequency offset value B1、B2、B3、B4……BnAnd (5) collecting. And respectively calculating each frequency offset adjustment step value corresponding to each radio frequency offset value through a frequency offset adjustment step calculation function. The formula of the frequency offset adjustment STEP calculation function is STEP ═ F1offset-F2offset)/(C1-C2). Then, the generated frequency deviation values A1、A2、A3、A4……AnAnd each frequency offset value B1、B2、B3、B4……BnAnd respectively substituting the frequency deviation adjustment step values into a formula to calculate the frequency deviation adjustment step values. Through calculation, the corresponding frequency offset adjustment STEP value STEP can be obtained1、STEP2、STEP3、STEP4……STEPn. And fitting to generate a frequency offset adjustment step function curve according to the different communication specific frequency values and the multiple groups of frequency offset adjustment step values. Adjusting STEP value STEP for each generated frequency deviation1、STEP2、STEP3、STEP4……STEPnAnd carrying out frequency offset adjustment step length curve fitting on the obtained different communication specific frequency values. Then a frequency offset adjustment step function curve can be generated. According to the specific communication frequency value used in the actual communication process, the corresponding frequency offset adjustment step value can be determined in the curve.
It will be appreciated that the register configuration values and the resulting frequency offset value F relative to the standard rf frequency as described hereinoffsetAll in the process of automatically adjusting clock frequency deviation, is used for generating a frequency deviation adjustment step functionNumber curve. Thus, the register configuration values and the resulting frequency offset value F relative to the standard RF frequencyoffsetAnd the numerical value can be different according to actual conditions. The described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Further, before the step of obtaining the first configuration value and the second configuration value of the register of the digital compensated crystal oscillator in the same working frequency band, initializing system parameters.
Specifically, in the process of generating the frequency offset adjustment step function curve, before the step of obtaining the first configuration value and the second configuration value of the register of the digital compensation crystal oscillator in the same operating frequency band, the method further includes initializing system parameters. After initializing the system parameters, the system enters an automatic adjustment mode. The initialization system parameters are used for ensuring that the accuracy of the generation of a subsequent frequency offset adjustment step function curve is prevented from being influenced by data information which is not remained and is not cleared in the system in an automatic adjustment mode.
Further, the register is provided with a maximum configuration value and a minimum configuration value; the first configuration value is set to a maximum configuration value and the second configuration value is set to a minimum configuration value.
Specifically, in the process of generating the frequency offset adjustment step function curve, the digital compensation crystal oscillator corresponds to a load capacitance maximum value and a load capacitance minimum value. Therefore, the register corresponding to the digital compensation crystal oscillator is also correspondingly provided with the maximum configuration value and the minimum configuration value. In the process of generating the frequency offset adjustment step function curve, a first configuration value and a second configuration value of a register of the digital compensation crystal oscillator in the same working frequency band are obtained. The first configuration value is set as a maximum configuration value of a register corresponding to the digital compensation crystal oscillator, and the second configuration value is set as a minimum configuration value of the register corresponding to the digital compensation crystal oscillator. The first configuration value and the second configuration value of the register are respectively set as the maximum configuration value and the minimum configuration value of the register corresponding to the digital compensation crystal oscillator, so that the application range of the finally generated frequency offset adjustment step function curve is widest. Therefore, in the actual use process, the frequency offset adjusting step determined according to the frequency offset adjusting step function curve is more accurate.
Further, before the step of collecting the radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency when the synchronization is performed under the first configuration value, the second configuration value and different communication specific frequency values, a digital filter is used for performing radio frequency filtering.
Specifically, in the process of generating the frequency offset adjustment step function curve, a random interference signal inevitably exists in an output signal of the system in the synchronization process. These random interference signals cause corresponding errors in the output radio frequency. In order to make the generated frequency offset adjustment step function curve more accurate, the accuracy of the frequency and the radio frequency offset value output during synchronization needs to be ensured. Therefore, it is necessary to perform radio frequency filtering using a digital filter in synchronization. The radio frequency filtering changes the frequency content of the time signal by reducing or amplifying certain frequencies so that some frequency content remains unchanged while other frequency content becomes smaller in amplitude or is completely removed from the signal. Therefore, the method can be used for signal cleaning and signal analysis, and random interference signals can be removed. By separating the useful signal from the interfering signal, the interference immunity of the signal and the accuracy of the radio frequency output can be improved.
In detail, the digital filter calculates signals according to a program to achieve the purpose of filtering. By programming the memory of the digital filter, various filtering functions can be implemented. For the digital filter, the added function is to add programs, elements are not needed to be added, the influence of element errors is avoided, and the volume of a chip is not needed to be increased when the low-frequency signals are processed. The digital filtering method can get rid of the trouble that the analog filter is limited by elements. In the filtering process, with the increase of the filtering order, the transition band of the filter becomes narrower and narrower, so that the filtering effect is better. Common digital filters are Finite Impulse Response (FIR) filters and Finite Impulse Response (IIR) filters. Wherein the impulse response refers to the occurrence of the filter in the time domain.
Further, the digital filter is an Infinite Impulse Response (IIR) digital filter.
Specifically, when the first configuration value, the second configuration value and different communication specific frequency values are acquired respectively for synchronization, before the step of generating the radio frequency offset value relative to each standard radio frequency by the digital compensation crystal oscillator, the radio frequency filtering is performed by using a digital filter. Common digital filters are Finite Impulse Response (FIR) filters and Infinite Impulse Response (IIR) filters. Wherein the IIR filter may use a lower order than the FIR filter. Often an IIR filter of the fifth order is comparable to the filtering result of an FIR filter of the tens of orders. Therefore, a better filtering effect can be achieved by selecting first-order filtering. Although the higher the order, the more accurate the parameters such as cutoff frequency, etc., the more complicated the circuit structure is. (ii) a In addition, the filtering by using the IIR filter requires less calculation amount and has higher calculation speed. The method selects an Infinite Impulse Response (IIR) filter to carry out radio frequency filtering. The optimal filtering effect can be achieved through less calculation amount.
Further, at least 20 times of Infinite Impulse Response (IIR) digital filtering are carried out to complete radio frequency filtering.
Specifically, when synchronization is performed under the first configuration value, the second configuration value and different communication specific frequency values, before the step of generating radio frequency offset values by the digital compensation crystal oscillator relative to each standard radio frequency, Infinite Impulse Response (IIR) digital filtering needs to be performed on generated radio frequency signals. To remove random interference signals in the signal. When Infinite Impulse Response (IIR) digital filtering is carried out, the filtering expression is as follows: a ═ k1 × X (n) + k2 × X (n-1); n is the total number of data points in the input time series; x (n) is an input time series; a is the time series of the output. Wherein k is1A value of 4/32; k is a radical of2The value is 28/32. When n is 0, k1A value of 1, k2The value is 0. In addition, the expression represents first order filtering. Because the first-order filtering is selected, a better filtering effect can be achieved. And, the higher the order, the more accurate the parameters such as cut-off frequency, but the more complicated the circuit structure.
In detail, when Infinite Impulse Response (IIR) digital filtering is carried out for removing random interference signals, at least 20 times of IIR digital filtering are carried out under the same communication specific frequency value. And the IIR digital filtering is to collect the signal after each filtering and take the signal as the input signal again to carry out the next IIR digital filtering, and the steps are sequentially circulated until the IIR digital filtering is carried out for at least 20 times. The IIR digital filtering is performed at least 20 times because the 20 th IIR digital filtering is completed, and the data obtained at this time is found to be clean and glitch-free. If IIR digital filtering is continued for a greater number of times, more accurate and perfect data can be obtained. However, the condition of frequency offset adjustment step curve fitting can be met by carrying out 20 times of IIR digital filtering.
It can be understood that, in the process of automatically adjusting the clock frequency offset, the filtering times are all used for generating a frequency offset adjustment step function curve. Therefore, the number of the infinite impulse response IIR digital filtering can be different according to actual conditions. The described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Furthermore, in the whole communication frequency band of the narrowband internet of things, the radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency are respectively acquired when the first configuration value, the second configuration value and the different communication specific frequency values are synchronized by uniformly selecting at least 25 different communication specific frequency values.
Specifically, the narrowband Internet of Things NB-IoT (Narrow Band Internet of Things, NB-IoT for short) is constructed in a cellular network, consumes only about 180KHz of bandwidth, and can coexist with an existing network. The network can be directly deployed in a GSM network, a UMTS network or an LTE network, so that the deployment cost can be reduced and smooth upgrading can be realized. In addition, the narrowband internet of things technology supports cellular data connection of low-power-consumption equipment in a wide area network. The domestic narrowband internet of things NB-IoT mainly operates in B5 and B8 frequency bands. The interval of the frequency band corresponding to the B5 frequency band is 25 MHz; the interval between the B8 frequency bands and the corresponding frequency bands is 35 MHz. Therefore, a frequency offset adjustment curve is generated in the narrowband internet of things, and radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency are acquired respectively when the first configuration value, the second configuration value and different communication specific frequency values are synchronized by uniformly selecting at least 25 different communication specific frequency values to acquire corresponding radio frequency offset values. When 25 different communication specific frequency values are selected to acquire corresponding radio frequency offset values, the acquisition of the radio frequency offset is performed every 1MHz correspondingly. Therefore, the acquired frequency offset value can cover the working frequency band supported by the terminal in the maximum range. The determined frequency offset adjustment step value is more accurate, and therefore the value of a register corresponding to the DCXO is more accurately configured. Finally, the local reference clock after the register configuration is adjusted is more accurate, and the radio frequency output is more accurate.
S300: and calculating to generate a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value.
Specifically, after the frequency offset adjustment step corresponding to the communication specific frequency value is determined according to the frequency offset adjustment step function curve and the communication specific frequency value, the value to be configured of the register may be calculated. The configuration value calculation of the register can be carried out according to a calculation formula. Wherein the calculation formula is DCXO _ Val ═ Foffsetand/STEP. Wherein, FoffsetGenerating a radio frequency offset value for the acquired radio frequency relative to a standard radio frequency; the DCXO _ Val is a value to be configured of a DCXO register of the digital compensation crystal oscillator; STEP is the frequency offset adjustment STEP value determined according to the frequency offset adjustment STEP function curve. Comparing the obtained RF frequency offset value with the determined RF frequency offset valueThe step value is substituted into the calculation formula DCXO _ Val as FoffsetIn STEP, the value to be configured of the register can be calculated.
S400: and adjusting the configuration value of the register according to the generated register value to be configured, thereby adjusting the clock frequency offset.
Specifically, after the register to-be-configured value is generated by calculation, the register configuration value can be adjusted according to the configuration value. After the register configuration value is adjusted, the load capacitance of the DCXO is adjusted accordingly. Under the adjusted load capacitance value, the DCXO performs oscillation frequency adjustment, thereby completing the adjustment of the clock frequency offset. Eventually changing the output of the local radio frequency.
Referring to fig. 2, the present application discloses an apparatus 100 for automatically adjusting a clock frequency offset, comprising:
the acquisition device 11 is used for acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency;
a determining device 12, configured to determine, according to the frequency offset adjustment step function curve and the communication specific frequency value, a frequency offset adjustment step value corresponding to the communication specific frequency value;
a calculating device 13, configured to calculate and generate a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value;
and an adjusting device 14, configured to adjust the register configuration value according to the generated register to-be-configured value, so as to adjust the clock frequency offset.
It can be understood that, the matching module is used for matching the settlement information with the total price information of the order goods to be settled. When the matching results are inconsistent, different warning modes can be designed. The described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It is to be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, the statement that there is an element defined as "comprising" … … does not exclude the presence of other like elements in the process, method, article, or apparatus that comprises the element.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A method for automatically adjusting a clock frequency offset, comprising:
acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency;
determining a frequency offset adjustment step value corresponding to the communication specific frequency value according to the frequency offset adjustment step function curve and the communication specific frequency value;
calculating and generating a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value;
and adjusting the configuration value of the register according to the generated register value to be configured, thereby adjusting the clock frequency offset.
2. The method of automatically adjusting clock frequency offset according to claim 1, wherein before the step of determining the frequency offset adjustment step size corresponding to the specific communication frequency value according to the frequency offset adjustment step size function curve and the specific communication frequency value, further comprising generating a frequency offset adjustment step size function curve.
3. The method of automatically adjusting clock frequency offset according to claim 2, wherein generating a frequency offset adjustment step function curve comprises the steps of:
acquiring a first configuration value and a second configuration value of a register under the condition that a digital compensation crystal oscillator is in the same working frequency band;
respectively collecting radio frequency offset values generated by the digital compensation crystal oscillator relative to each standard radio frequency when the first configuration value, the second configuration value and different communication specific frequency values are synchronized;
respectively calculating frequency offset adjustment step values corresponding to the radio frequency offset values through a frequency offset adjustment step calculation function;
and fitting to generate a frequency offset adjustment step function curve according to the different communication specific frequency values and the multiple groups of frequency offset adjustment step values.
4. The method of automatically adjusting frequency deviation in clock signals of claim 3, wherein the step of obtaining the first and second configuration values of the register of the digitally compensated crystal oscillator in the same operating frequency band further comprises initializing system parameters.
5. The method of automatically adjusting frequency deviation of a clock as set forth in claim 3, wherein said register is set with a maximum configuration value and a minimum configuration value; the first configuration value is set to a maximum configuration value and the second configuration value is set to a minimum configuration value.
6. The method of automatically adjusting frequency deviation of a clock as claimed in claim 3, wherein the step of separately collecting the rf frequency deviation values generated by the digitally compensated crystal oscillator with respect to each standard rf frequency during synchronization of the first configuration value and the second configuration value with different communication specific frequency values further comprises rf filtering with a digital filter.
7. The method of automatically adjusting frequency deviation in clock form of claim 6 wherein said digital filter is an Infinite Impulse Response (IIR) digital filter.
8. The method of automatically adjusting clock frequency offset of claim 7 wherein the radio frequency filtering is performed at least 20 times by Infinite Impulse Response (IIR) digital filtering.
9. The method of claim 3, wherein the radio frequency offset generated by the digitally compensated crystal oscillator with respect to each standard radio frequency is collected by uniformly selecting at least 25 different communication specific frequency values to collect corresponding radio frequency offset values in the entire communication band of the narrowband internet of things, respectively, when the synchronization is performed under the first configuration value, the second configuration value, and the different communication specific frequency values.
10. An apparatus for automatically adjusting a clock frequency offset, comprising:
the acquisition device is used for acquiring a communication specific frequency value of the digital compensation crystal oscillator and a radio frequency offset value generated relative to a standard radio frequency;
the determining device is used for determining a frequency offset adjusting step value corresponding to the communication specific frequency value according to the frequency offset adjusting step function curve and the communication specific frequency value;
the calculating device is used for calculating and generating a register value to be configured according to the radio frequency offset value and the determined frequency offset adjustment step value;
and the adjusting device is used for adjusting the register configuration value according to the generated register to-be-configured value, so as to adjust the clock frequency offset.
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| CN113612717A (en) * | 2021-08-11 | 2021-11-05 | 深圳市欧瑞博科技股份有限公司 | Frequency offset calibration method and device, electronic equipment and storage medium |
| CN114629758A (en) * | 2022-03-14 | 2022-06-14 | Oppo广东移动通信有限公司 | Communication method and device, terminal device and storage medium |
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