CN112671027B - Method and system for controlling grid-connected power converter - Google Patents

Method and system for controlling grid-connected power converter Download PDF

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CN112671027B
CN112671027B CN202010221105.5A CN202010221105A CN112671027B CN 112671027 B CN112671027 B CN 112671027B CN 202010221105 A CN202010221105 A CN 202010221105A CN 112671027 B CN112671027 B CN 112671027B
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current
rgpio
voltage
phase alternating
grid
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CN112671027A (en
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吕京航
张月
赵铭
张炳夫
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Shenzhen Graduate School Harbin Institute of Technology
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Shenzhen Graduate School Harbin Institute of Technology
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Abstract

The invention provides a method for controlling a grid-connected power converter, which comprises the following steps: collecting three-phase alternating current voltage and three-phase alternating current on a public power grid; the three-phase alternating-current voltage is used as a first input quantity of a reference current generator; collecting the direct current bus voltage on the direct current side of the converter; observing the detected direct-current bus voltage through a reduced order generalized proportional integral observer RGPIO, wherein the obtained observed quantity is used as a second input quantity of the reference current generator; and taking the reference current output by the reference current generator and the collected three-phase alternating current as the input of a resonant super-spiral sliding mode controller RST-SMC to generate a PWM signal for controlling the converter.

Description

Method and system for controlling grid-connected power converter
Technical Field
The invention relates to the technical field of power electronics, in particular to a method and a system for controlling a grid-connected power converter.
Background
The last few years have witnessed widespread use of grid-connected converters in various industrial fields, such as the front-end of on-line Uninterruptible Power Supply (UPS) systems, alternating current/direct current hybrid micro-grids, railway electrification systems, etc. Typically, an outer voltage loop and an inner current loop are built into the control system, and a linear regulator (e.g., a PI controller) is employed in the voltage current loop control system. However, the main drawback of this method is that the performance of the system is limited by the PI parameters, which results in a very slow dynamic response under disturbances. Applying a deadbeat control strategy can improve response speed, but it is well known to be highly sensitive to parameter uncertainty.
In addition, several non-linear control strategies have been proposed for ac/dc converters, such as passive-based control strategies, model predictive control, and Sliding Mode Control (SMC). Among these control strategies, sliding mode control is of great interest due to its fast dynamic response, high robustness to uncertainty and good performance under various operating conditions.
In recent years, different sliding mode control strategies have been proposed for grid-connected power converters. Of these strategies, integral sliding-mode control and equivalent control are two popular examples of such methods. However, these methods all suffer from chattering, which causes higher harmonics in the converter output current. In order to suppress the chattering problem and adjust the ac signal, a control strategy based on a multi-resonant sliding mode surface (MRSS) is proposed in the prior art to suppress the current reference tracking error. However, the sliding mode control system is composed of a plurality of sliding mode surfaces, and the complexity is difficult to realize. Furthermore, the extensive calculation of MRSS inevitably hinders its application in low cost controllers. In order to solve the flutter problem and reduce the calculation load, the application of the supercoiling theory has been proposed in sliding mode control design in recent years.
The supercoiled sliding mode control has all the advantages of sliding mode control and is not influenced by the flutter problem. However, the conventional supercoiled sliding mode control can only adjust the current in the d-q coordinate system, which means that the method cannot guarantee zero steady-state error tracking in the coordinate system.
Therefore, there is a need to develop an enhanced ST-SMC that keeps the advantages of ST-SMCs while tracking AC signals.
Disclosure of Invention
To solve the above problems, the present invention provides a method for controlling a grid-connected power converter, comprising:
collecting three-phase alternating current voltage and three-phase alternating current on a public power grid;
the three-phase alternating-current voltage is used as a first input quantity of a reference current generator;
collecting the direct current bus voltage on the direct current side of the converter;
observing the detected direct-current bus voltage through a reduced order generalized proportional integral observer RGPIO, wherein the obtained observed quantity is used as a second input quantity of the reference current generator;
and taking the reference current output by the reference current generator and the collected three-phase alternating current as the input of a resonant super-spiral sliding mode controller RST-SMC to generate a PWM signal for controlling the converter.
In one embodiment, according to the method for controlling a grid-connected power converter of the present invention, it is preferable that the order of the reduced-order generalized proportional-integral observer RGPIO is 2.
In one embodiment, according to the method for controlling a grid-connected power converter of the present invention, it is preferable that the reduced-order generalized proportional-integral observer RGPIO is designed to:
Figure GDA0003463145800000021
wherein the content of the first and second substances,
Figure GDA0003463145800000022
u＝Ps，
Figure GDA0003463145800000023
Figure GDA0003463145800000024
is the gain of the reduced GPIO, z2And z3Is x2And x3Is determined by the estimated value of (c),
V2 DCand PsRespectively inputs for system status and control, Pext (S) is interference input for the system, ftotalRepresenting lumped interference.
In one embodiment, according to the method for controlling the grid-connected power converter of the present invention, it is preferable that when the reduced-order generalized proportional-integral observer RGPIO is embedded in the dc bus voltage control, the original device is modified to an ideal integrator with a bandwidth within the range of ω 0, and the original device is returned to outside the range of ω 0.
In one embodiment, the method for controlling a grid-connected power converter according to the present invention preferably employs an inner loop RST-SMC strategy to enable fast current regulation, the resonant supercoiled sliding mode controller RST-SMC being designed according to the following equation:
Figure GDA0003463145800000031
Figure GDA0003463145800000032
wherein the parameters
Figure GDA0003463145800000033
B is larger than M, M is the upper limit of the voltage amplitude of the power grid, and the parameter C is designed according to the design principle of the resonance controller.
According to another aspect of the present invention, there is also provided a system for controlling a grid-connected power converter, the system comprising:
the system comprises a first detection unit, a second detection unit and a control unit, wherein the first detection unit is used for collecting three-phase alternating current voltage and three-phase alternating current on a public power grid;
the second detection unit is used for acquiring the direct-current bus voltage on the direct-current side of the converter;
the reduced-order generalized proportional-integral observer RGPIO is used for observing the detected direct-current bus voltage to obtain an observed quantity;
the reference current generator is used for generating reference current according to the three-phase alternating current voltage and the observed direct current bus voltage and outputting the reference current;
and taking the reference current output by the reference current generator and the collected three-phase alternating current as the input of a resonant super-spiral sliding mode controller RST-SMC to generate a PWM signal for controlling the converter.
In one embodiment, according to the system for controlling a grid-connected power converter of the present invention, it is preferable that the order of the reduced-order generalized proportional-integral observer RGPIO is 2.
In one embodiment, the system for controlling a grid-connected power converter according to the present invention, preferably, the reduced-order generalized proportional-integral observer RGPIO is designed to:
Figure GDA0003463145800000034
wherein the content of the first and second substances,
Figure GDA0003463145800000035
u＝Ps，
Figure GDA0003463145800000036
Figure GDA0003463145800000037
is the gain of the reduced GPIO, z2And z3Is x2And x3Is determined by the estimated value of (c),
V2 DCand PsRespectively inputs for system status and control, Pext (S) is interference input for the system, ftotalRepresenting lumped interference.
In one embodiment, according to the method for controlling the grid-connected power converter of the present invention, it is preferable that when the reduced-order generalized proportional-integral observer RGPIO is embedded in the dc bus voltage control, the original device is modified to an ideal integrator with a bandwidth within the range of ω 0, and the original device is returned to outside the range of ω 0.
In one embodiment, the method for controlling a grid-connected power converter according to the present invention preferably employs an inner loop RST-SMC strategy to enable fast current regulation, the resonant supercoiled sliding mode controller RST-SMC being designed according to the following equation:
Figure GDA0003463145800000041
Figure GDA0003463145800000042
wherein the parameters
Figure GDA0003463145800000043
B > M, M isThe upper limit of the grid voltage amplitude, parameter C, is designed according to the design principle of the resonant controller.
The invention has the beneficial technical effects that: the invention can improve the system performance of the outer current ring and realize the fast and robust adjustment of the inner current ring. The RGPIO of the invention can eliminate the interference caused by the connection/disconnection of the load and also can eliminate the system parameter change caused by the load change, thereby improving the dynamic performance of the system. In addition, by utilizing the RST-SMC strategy for inner loop current regulation, zero steady-state current tracking capability can be ensured, and quick dynamic response can be realized under an alpha-beta coordinate system. In addition, the control system of the invention also has higher anti-interference capability, thereby reducing THD current.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1 shows a general system diagram of a configuration of a grid-tied power converter;
FIG. 2 shows a block diagram of an RGPIO-based dual-loop control architecture for a three-phase AC/DC converter in accordance with one embodiment of the present invention;
FIG. 3 shows a schematic diagram of an RGPIO-based RST-SMC strategy for a three-phase AC/DC converter in accordance with a further embodiment of the invention;
FIG. 4 shows a detailed block diagram of the RST-SMC proposed in accordance with the present invention;
FIG. 5 shows an equivalent transfer function of RGPIO in proposed DC bus voltage control according to the present invention;
FIG. 6 shows the movement of the poles as the DC bus capacitance changes from 1100 μ F to 3300 μ F;
FIGS. 7a and 7b show graphs of DC bus voltage and phase A current over time for load changes under PI control and under the control strategy of the present invention, respectively;
FIGS. 8a and 8b show graphs of DC bus voltage and active power over time with increasing DC bus reference voltage by PI control and by the control strategy of the present invention, respectively;
FIGS. 9a and 9b show experimental results of simulations of transient response when the reactive power step increases using a standard control strategy and the control strategy of the present invention, respectively; and
fig. 10a and 10b show the results of simulation experiments with steady state current with reactive power command using a standard control strategy and the control strategy of the present invention, respectively.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention are described in further detail below with reference to the accompanying drawings.
In past practice, PI controllers were typically employed to control the DC bus capacitor voltage of a three-phase AC/DC converter. However, the PI parameters are difficult to automatically adjust under load disturbances. In order to enhance the dynamic response of the DC bus voltage under various disturbances, a DC bus current sensor is installed and a feed-forward control strategy is added to the DC bus control. However, this approach may be undesirable from a reliability standpoint, and cannot be used to measure system uncertainty. To address this problem, several advanced control strategies have been devised to improve the dynamic performance of the dc bus using sensorless control structures.
In one prior art, a non-linear disturbance observer is used. It shows good performance but at the cost of complex parameter analysis and tuning. In another prior art, a singular value synthesis control strategy for dc bus voltage regulation was proposed, however, the design could only be based on the worst case scenario, which may degrade the performance of the controller under normal operating conditions.
Recently, an Enhanced State Observer (ESO) has been proposed that can actively compensate for interference and system uncertainty. However, ESO is only suitable for constant or slowly varying interference estimation. Unlike ESO, GPIOs can estimate various disturbances that can be described in terms of time and have been successfully applied to DC-DC converter control and motor drives. However, this method has not been applied to DC bus voltage disturbance suppression of a three-phase AC/DC converter.
The invention aims to improve the system performance of the outer voltage ring based on load disturbance and parameter uncertainty and realize quick and robust inner current ring adjustment. For this purpose, a resonance ST-SMC (RST-SMC) method based on Reduced GPIO (RGPIO) is provided. In particular, the proposed controller has a cascade structure consisting of two control loops. The outer loop uses RGPIO based proportional control to regulate the dc bus voltage, while the inner loop uses a RST-SMC controller to regulate the converter current.
First, for external dc bus voltage regulation loops, the connection/disconnection of the load can cause disturbances, which can affect the dynamic performance of the system. Furthermore, load variations may cause system parameters to vary. To overcome these problems, an RGPIO for real-time estimation, cancellation of interference and parameter uncertainty is proposed.
Secondly, a RST-SMC strategy for inner loop current regulation is proposed. By using the proposed control strategy, zero steady-state current tracking capability can be ensured, and rapid dynamic response can be realized under a coordinate system. In addition, the controller also has high anti-interference capability, so that the THD current is reduced.
Finally, the proposed control strategy is verified through experimental tests, and the control strategy shows good dynamic performance and has strong robustness to load disturbance.
In order that the principles of the invention may be more clearly understood, reference is now made to the following detailed description taken in conjunction with the accompanying drawings.
As shown in fig. 1, a typical grid-tied power converter system is shown. A three-phase AC/DC converter is employed as an interface between the grid and the load. In FIG. 1, adoptUsing an L-filter as the output filter of the converter, r being the parasitic resistance of the filter, VDCIs the DC bus voltage, VtIs the output voltage of the inverter, VgIs the grid voltage of the Point of Common Coupling (PCC). Assuming grid voltage balance, the system model in the frame of reference is expressed by assuming grid voltage balance, and the system model in the coordinate system is expressed as:
Figure GDA0003463145800000061
Figure GDA0003463145800000062
wherein, VgαAnd VgβRefers to the grid voltage, V, in the alpha-beta reference frametαAnd VtβIs the converter output voltage iαAnd iβRespectively, the output current in the alpha-beta reference frame.
The direct current bus voltage controller is responsible for keeping the direct current bus voltage constant by balancing the injection power and the direct current bus output active power. Thus, the power balance between the dc bus capacitors in fig. 1 is represented as:
Figure GDA0003463145800000063
wherein, VDCIs the DC bus voltage, C is the DC bus capacitance, PDC＝VDCIDCThe ac side terminal power equal to the rectifier is the external power flowing out from the dc capacitor. PlossIs the power loss in the converter circuit, expressed as:
Figure GDA0003463145800000064
Rprepresenting the total switching loss of the system. Equation (2) represents the instantaneous power balance between the DC side and the AC side of a three-phase AC/DC converter, whether on the left or right side of equation (2). Tong (Chinese character of 'tong')Over neglecting instantaneous power of the AC side filter, AC side terminal power PtEqual to the grid side power Ps. Therefore, in consideration of this fact, equation (1) can be expressed as:
Figure GDA0003463145800000065
next, a dc bus voltage controller design based on the outer loop RGPIO is performed. By applying the laplace transform to equation (3), the expression can be derived as:
Figure GDA0003463145800000071
wherein, V2 DCAnd PsInput for system status and control, P, respectivelyext(s) is the interference input to the system.
By rearranging equation (2), the following expression can be derived:
Figure GDA0003463145800000072
wherein f istotalRepresenting lumped disturbances, including external disturbances
Figure GDA0003463145800000073
And uncertainty in capacitance
Figure GDA0003463145800000074
And other unmodeled interference such as EMI of dc bus capacitance.
In the full-order GPIO design, the state space modeling of the dc bus is represented as:
Figure GDA0003463145800000075
wherein the content of the first and second substances,
Figure GDA0003463145800000076
u＝Ps，
Figure GDA0003463145800000077
in order to improve the estimation accuracy and be easy to realize practically, a new RGPIO is constructed for the direct current bus voltage control. As shown in FIG. 2, the control structure includes outer and inner loop control strategies. In order to avoid dynamic interaction between the outer loop dc bus voltage control and the inner loop current control, it is generally assumed that the dynamic response of the current loop is much faster than the dynamic response of the voltage loop, which means that the dynamics of the current loop can be neglected when designing the dc bus voltage control loop.
By rewriting equation (6), the following equation can be derived:
Figure GDA0003463145800000078
Figure GDA0003463145800000079
thus, RGPIO is designed as
Figure GDA00034631458000000710
Wherein the content of the first and second substances,
Figure GDA00034631458000000711
is the gain of the reduced GPIO, Z2And Z3Is X2And X3An estimate of (d). In the formula (9), variables
Figure GDA00034631458000000712
Cannot be measured directly, therefore, by
Figure GDA00034631458000000713
Operate to the left of the equationBy adding or subtracting
Figure GDA0003463145800000081
Term, the following observer equation is obtained:
Figure GDA0003463145800000082
as can be seen from equation (10), the signal ftotalAnd
Figure GDA0003463145800000083
can be observed by the proposed RGPIO. However, ESO cannot be estimated
Figure GDA0003463145800000084
Indeed, RGPIO can estimate the derivative of the lumped disturbance, which cannot be achieved by ESO-based observers. Meanwhile, the proposed RGPIO has the order of 2, and the reduced order characteristic can reduce the calculation load to a certain extent.
Subtracting the formula (7) from the formula (9) to obtain an error model of the proposed observer for stability analysis, wherein the error equation is as follows:
Figure GDA0003463145800000085
from equation (11), if both roots of the eigen-polynomial are in matrix AeThen the system will be Helvetz stable, i.e.
λ(s)＝s2+k1s+k2 (12)
In the left half-plane, to simplify the design process, it is assumed that the poles of the observer are all located at- ω0And is represented as: λ(s) = s2+k1s+k2=(s+ω0)2 (13)
Thus, beta1＝2ω0，β2＝ω0 2. As can be seen from equation (3), the parameter k1And k2Design of (c) and bandwidth of RGPIO (ω)0) It is related. Therefore, the key process is to select the appropriate bandwidth ω0. The bandwidth of the observer is typically chosen to be 5-15 times greater than the dc bus voltage controller bandwidth, taking into account the tradeoff between fast observation performance and noise sensitivity and immunity to interference. The bandwidth of the DC bus voltage controller is selected to be 20rad/s, and the bandwidth of the RGPIO is selected to be 300 rad/s.
Next, frequency domain analysis of RGPIO was performed.
By Z2-K1X1＝ξ2And Z3-K2X1＝ξ3Substituting, equation (10) is expressed as:
Figure GDA0003463145800000086
will k1＝2ω0，k2＝ω0 2After substituting to equation (14), the RGPIO is configured to:
Figure GDA0003463145800000091
equation (15) can be converted to a transfer function by the following equation:
Figure GDA0003463145800000092
Figure GDA0003463145800000093
when Z is2-K1X1＝ξ2And X1＝V2 DCWhen, K1＝2ω0. Therefore, by combining equation (11) and equation (12) and converting Z2-K1X1＝ξ2The transfer function resulting in the reduced order GPIO is shown in figure 5. From u0To V2 DCThe modified model of(s) can be expressed as a transfer function
Figure GDA0003463145800000094
Figure GDA0003463145800000095
From equation (18), the bandwidth ω at RGPIO0The system transfer function is simplified to an integrator, which is expressed as:
Figure GDA0003463145800000096
from equation (19), by incorporating RGPIO into the control strategy, the original device is modified to have a bandwidth at ω0Ideal integrators within range. It should be noted that the correction means is in excess of the bandwidth ω0And then returns to the original device.
Figure GDA0003463145800000097
Figure GDA0003463145800000098
Figure GDA0003463145800000101
It is noted that the active power reference (P)s_ref) Generated from the output of the dc bus voltage controller, shown in fig. 2, reactive power reference (Q)s_ref) Set to a desired value.
To achieve fast tracking of the current, a conventional SMC is typically used as the inner loop controller. However, a major drawback of conventional SMCs is the problem of chattering, which results in a discontinuously high switching frequency. To overcome this problem, ST-SMC is proposed. The design of the ST-SMC involves two steps. Firstly, a proper sliding mode surface is selected, so that the system state tends to zero. And secondly, the design of a control law is adopted, the system state is introduced into the sliding mode surface and is always kept on the sliding mode surface.
First, the sliding-mode surface equation of current control is defined as follows:
Figure GDA0003463145800000102
Figure GDA0003463145800000103
by introducing a selected Lyapunov function, the law is controlled everywhere:
Figure GDA0003463145800000104
wherein the content of the first and second substances,
Figure GDA0003463145800000105
according to equations (1), (23) and (24), the time derivative is expressed as:
Figure GDA0003463145800000106
therefore, the ST-SMC in equation (28) below can ensure that the appropriate positive values of A and B are chosen in equation (28)
Figure GDA0003463145800000107
Thus, the stability of the system is guaranteed:
Figure GDA0003463145800000111
in addition, in order to suppress grid voltage interference and realize zero steady-state reference tracking, a resonance term is added in equation (28)
Figure GDA0003463145800000112
The RST-SMC strategy finally designed in the Laplace domain is shown in equations (29) and (30):
Figure GDA0003463145800000113
Figure GDA0003463145800000114
wherein the parameters
Figure GDA0003463145800000115
B is greater than M, and M is the upper limit of the voltage amplitude of the power grid. The parameter C is designed according to the design principle of the resonant controller.
Thus, equations (29) and (30) show the dynamic behavior of the RST-SMC, the system disturbance is suppressed by the resonance term, and the ST-SMC forces the output current to follow the reference ac current on the sliding-mode surface with maximum stability.
As shown in fig. 4, a block diagram of the proposed RST-SMC control strategy according to the present invention is shown. The complete control system applied to the converter is shown in fig. 3, which includes the RGPIO based control and RST-SMC strategy proposed according to the present invention. In the DC bus voltage regulation, a proportional controller based on RGPIO is adopted to realize the DC bus voltage regulation and the load disturbance suppression, and meanwhile, an inner ring RST-SMC strategy is adopted to realize the rapid current regulation.
In practical applications, the performance of the current controller may be affected by the variation of the system parameters, and therefore, equation (27) can be expressed as:
Figure GDA0003463145800000116
where Δ L represents the inductance parameter variation. Furthermore, the grid voltage disturbances are suppressed and eliminated in view of the resonance term of the proposed controller, and if the positive control gains of a and B are set large enough, the system stability can still be met and expressed as:
Figure GDA0003463145800000121
wherein σαβ·sgn(σαβ)＞0，H＝[H1 H2]TExpressed by equation (33):
Figure GDA0003463145800000122
to verify the validity of the proposed control strategy, the AC/DC converter shown in fig. 1 was set up in the laboratory, with the system parameters as shown in table I.
TABLE I System parameters
Figure GDA0003463145800000123
The sampling frequency was chosen to be 10kHz, providing different experimental results from the standard control strategy (outer loop PI control versus inner loop PR control strategy) and the proposed control strategy, both of which were compared by the dSPACE controller control. The experimental results are shown in fig. 7-10 for the standard method and proposed control strategy.
A. Dynamic performance criteria under load step change
The dynamic behavior of the PI control strategy and the control strategy proposed according to the present invention under load disturbances is shown in fig. 7a-7b, where the external load suddenly changes from light load (1500 Ω) to full load (150 Ω). For fair comparison, the bandwidths of the two dc bus voltage controllers are the same, and it can be observed that both control laws can realize dc bus voltage regulation, but their dynamic performances are greatly different. More specifically, it is shown that with the PI control strategy, the dc bus voltage has an undershoot of 60V and it takes about 1s to track the reference voltage after the load change. In contrast, since the disturbances caused by load variations are actively cancelled by RGPIO, with the proposed control strategy the dc bus voltage drops only around 30V, with a recovery time of about 0.4 s. The lower graphs of fig. 7a and 7b are graphs of the a-phase output current as a function of load, respectively. The results show that the proposed control strategy has a faster speed than the PI control strategy.
B. Dynamic behavior at elevated DC bus voltages
And comparing the dynamic performance of the standard control strategy and the dynamic performance of the proposed control strategy under the condition of the change of the DC bus voltage requirement. The comparison results are shown in fig. 8a and 8 b. It is evident that both methods can regulate the dc bus voltage to a stable point. The voltage of the direct current bus is increased from 400V to 420V, and the PI control strategy needs 0.6s to reach a new steady state. However, the proposed control strategy only needs 0.3s to reach the same steady state operating point, and the response time is reduced by 50%. Meanwhile, the two control strategies have active power output overshoot, and the establishment time of the proposed control strategy is shorter than that of a PI control strategy.
C. Current loop performance with current reference step change
To verify the proposed current control strategy, a comparative test was performed on the PR control strategy with the proposed control strategy. To observe the differences between the two control strategies, the current is converted from a coordinate system to a d-q coordinate system. When the reference current on the q-axis is stepped from 0A to 8A, as can be seen from the upper graph of fig. 9a, in the PR control strategy the q-axis current has an overshoot of 2A, with a settling time of 5 ms; also, this step change results in an overshoot current of 1.7A on the d-axis. Whereas the overshoot of the proposed control method is 1A and the settling time is 2ms (see fig. 9 b). At the same time, the coupling impact of the proposed control strategy is almost the same as the PR control strategy.
D. THD of current at steady state
Fig. 10 shows a comparison of steady state current and reactive power command. It can be seen that the proposed current control strategy has better performance, in particular with a reduction of the 5 th and 7 th harmonics compared to the PR control strategy. Furthermore, better performance, especially with 5 th and 7 th harmonics, is reduced compared to PR control strategies. Furthermore, the current THD of the RGPIO-RST-SMC strategy is 1.3% and 1.6% of the standard strategy.
An RGPIO-based RST-SMC strategy is presented herein for a three-phase AC/DC converter. By applying the RGPIO-based control strategy to DC bus voltage regulation, the dynamic response of the system under disturbance is greatly improved and the setup time is shortened compared with the traditional method. The proposed RST-SMC current control strategy is used for reference tracking in a coordinate system under the condition of uncertain system parameters. Experimental results show the effectiveness of the proposed control strategy and demonstrate better performance compared to standard control strategies.
It is to be understood that the disclosed embodiments of this invention are not limited to the particular structures, process steps, or materials disclosed herein but are extended to equivalents thereof as would be understood by those ordinarily skilled in the relevant arts. It is also to be understood that the terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase "one embodiment" or "an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment.
Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (4)

1. A method for controlling a grid-connected power converter, the method comprising:
collecting three-phase alternating current voltage and three-phase alternating current on a public power grid;
the three-phase alternating-current voltage is used as a first input quantity of a reference current generator;
collecting the direct current bus voltage on the direct current side of the converter;
observing the detected direct-current bus voltage through a reduced order generalized proportional integral observer RGPIO, wherein the obtained observed quantity is used as a second input quantity of the reference current generator, and the order of the reduced order generalized proportional integral observer RGPIO is 2;
the reference current output by the reference current generator and the collected three-phase alternating current are used as the input of a resonant super-spiral sliding mode controller RST-SMC to generate a PWM signal for controlling the converter; wherein, the reduced order generalized proportional integral observer RGPIO is designed as follows:
Figure FDA0003463145790000011
wherein the content of the first and second substances,
Figure FDA0003463145790000012
u＝Ps，
Figure FDA0003463145790000013
Figure FDA0003463145790000014
is the gain of the reduced GPIO, z2And z3Is x2And x3Estimated value of, V2 DCAnd PsRespectively inputs for system status and control, Pext (S) is interference input for the system, ftotalRepresenting lumped interference, Rp representing the total switching loss of the system, and c being the direct current bus capacitance;
an inner loop RST-SMC strategy is adopted to enable fast current regulation, and the resonant super-helical sliding mode controller RST-SMC is designed according to the following formula:
Figure FDA0003463145790000015
Figure FDA0003463145790000016
wherein the parameters
Figure FDA0003463145790000017
B is larger than M, M is the upper limit of the voltage amplitude of the power grid, and the parameter C is designed according to the design principle of the resonance controller.
2. The method for controlling a grid-connected power converter according to claim 1, wherein the reduced-order generalized proportional-integral observer RGPIO modifies a primitive to a bandwidth at ω when embedded in a DC bus voltage control0Ideal integrator in the range of ω0Out of range returns to the original device.
3. A system for controlling a grid-tied power converter, the system comprising:
the system comprises a first detection unit, a second detection unit and a control unit, wherein the first detection unit is used for collecting three-phase alternating current voltage and three-phase alternating current on a public power grid;
the second detection unit is used for acquiring the direct-current bus voltage on the direct-current side of the converter;
the reduced-order generalized proportional-integral observer RGPIO is used for observing the detected direct-current bus voltage to obtain an observed quantity;
the reference current generator is used for generating reference current according to the three-phase alternating current voltage and the observed direct current bus voltage and outputting the reference current, wherein the order of the reduced-order generalized proportional-integral observer RGPIO is 2;
the reference current output by the reference current generator and the collected three-phase alternating current are used as the input of a resonant super-spiral sliding mode controller RST-SMC to generate a PWM signal for controlling the converter; wherein the reduced order generalized proportional integral observer RGPIO is designed to:
Figure FDA0003463145790000021
wherein the content of the first and second substances,
Figure FDA0003463145790000022
u＝Ps，
Figure FDA0003463145790000023
Figure FDA0003463145790000024
is the gain of the reduced GPIO, z2And z3Is x2And x3Estimated value of, V2 DCAnd PsRespectively inputs for system status and control, Pext (S) is interference input for the system, ftotalRepresenting lumped interference, RpRepresenting the total switching loss of the system, and c is the direct current bus capacitance;
an inner loop RST-SMC strategy is adopted to enable fast current regulation, and the resonant super-helical sliding mode controller RST-SMC is designed according to the following formula:
Figure FDA0003463145790000025
Figure FDA0003463145790000026
wherein the parameters
Figure FDA0003463145790000027
B is larger than M, M is the upper limit of the voltage amplitude of the power grid, and the parameter C is designed according to the design principle of the resonance controller.
4. The system for controlling a grid-connected power converter according to claim 3, wherein the reduced-order generalized proportional-integral observer RGPIO modifies a primitive to a bandwidth at ω when embedded in a DC bus voltage control0Ideal integrator in the range of ω0Out of range returns to the original device.
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