CN112670086A - Silicon integrated thin film capacitor with high energy storage density and preparation method thereof - Google Patents

Silicon integrated thin film capacitor with high energy storage density and preparation method thereof Download PDF

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CN112670086A
CN112670086A CN202011168094.5A CN202011168094A CN112670086A CN 112670086 A CN112670086 A CN 112670086A CN 202011168094 A CN202011168094 A CN 202011168094A CN 112670086 A CN112670086 A CN 112670086A
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马春蕊
刘明
范江奇
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Xian Jiaotong University
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Abstract

The invention relates to the field of energy storage thin film materials, in particular to a silicon integrated thin film capacitor with high energy storage density and a preparation method thereofA buffer layer on the surface and 0.88BaTiO arranged on the surface of the buffer layer3‑0.12Bi(Mg0.5Ti0.5)O3The thin film, the transition layer is a titanium layer, and the buffer layer is a Pt layer. Through reasonable structural design, the thin film capacitor can adopt a silicon-based substrate and has higher energy storage density. The silicon integrated high-energy-storage-density thin-film capacitor has excellent energy storage characteristics at room temperature, and has excellent thermal stability in a wide temperature range of-100-150 ℃.

Description

Silicon integrated thin film capacitor with high energy storage density and preparation method thereof
Technical Field
The invention relates to the field of energy storage thin film materials, in particular to a silicon integrated thin film capacitor with high energy storage density and a preparation method thereof.
Background
The energy crisis is a hot topic which is not negligible in recent years, and the energy storage technology closely related to the energy crisis is also highlighted. At present, lithium batteries, fuel cells, supercapacitors, dielectric capacitors, etc. are the methods for storing energy. The dielectric capacitor can be rapidly charged and discharged, and has excellent fatigue resistance and environmental suitability, compared to other methods. Therefore, the dielectric capacitor has an indispensable application value in the field of power electronic devices. Such as avionics, hybrid electric vehicles, pulse power systems, etc. The thin film dielectric capacitor has a volume of nanometer level, even considering the thickness of the substrate, of only 0.5mm, which is much smaller than the size of the ceramic, organic dielectric capacitor, and is very advantageous for reducing the size of the capacitor and the volume and weight of the electronic device.
However, thin film dielectric capacitors with high energy storage density and high operating temperature are mostly integrated in, for example, SrTiO3On such a single crystal substrate, a big problem of the substrate is that the substrate is expensive and the production cost is increased. Compared with the prior art, the silicon substrate is relatively cheap, which is beneficial to reducing the cost. Whereas an amorphous SiO layer is present on the silicon-based substrate2And incompatible with the crystal structure of the thin film, resulting in failure to fabricate high quality oxide thin film capacitors thereon. Considering from another aspect, in the present day where silicon integrated circuits are the mainstream, thin film dielectric capacitors grown on silicon substrates with high energy storage density are being explored to be more advantageous for practical applications.
Disclosure of Invention
The invention aims to overcome the problems in the prior art and provide a silicon-integrated thin film capacitor with high energy storage density and a preparation method thereof.
In order to achieve the purpose, the invention adopts the following technical scheme:
a silicon integrated thin film capacitor with high energy storage density comprises a silicon substrate, a transition layer arranged on the surface of the silicon substrate, a buffer layer arranged on the surface of the transition layer and 0.88BaTiO arranged on the surface of the buffer layer3-0.12Bi(Mg0.5Ti0.5)O3The thin film, the transition layer is a titanium layer, and the buffer layer is a Pt layer.
Preferably, the 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The thickness of the film is 460-490 nm.
Preferably, the Pt layer is (111) oriented.
Preferably, the silicon substrate is (001) oriented.
The invention also provides a preparation method of the silicon integrated thin film capacitor with high energy storage density, which comprises the following steps:
preparing a transition layer on the surface of a silicon substrate, preparing a buffer layer on the surface of the transition layer, and preparing 0.88BaTiO on the surface of the buffer layer through magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3A film; the transition layer is a titanium layer, and the buffer layer is a Pt layer.
Preferably, 0.88BaTiO is prepared on the surface of the buffer layer by magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3When in film forming:
firstly, a deposition cavity of a magnetron sputtering system is vacuumized to ensure that the vacuum degree in the deposition cavity is not less than 10-5mbar; introducing mixed gas of argon and oxygen with the volume ratio of 1/1 into the deposition chamber, so that the air pressure in the deposition chamber is 200 mbar; raising the temperature of the deposition cavity to 700 ℃, and then baking the whole structure with the silicon substrate, the transition layer and the buffer layer at 700 ℃ and 200mbar for 10min to remove attachments on the surface of the whole structure; then the deposition cavity is vacuumized to ensure that the vacuum degree of the deposition cavity is not less than 10-5mbar; then slowly introducing the mixed gas of argon and oxygen into the deposition cavity to ensure that the growth pressure required in the deposition cavity is 0.2mbar;
After the air pressure in the deposition cavity is stabilized, the growth time is adjusted, and 0.88BaTiO with preset thickness grows on the surface of the integral structure3-0.12Bi(Mg0.5Ti0.5)O3A film;
after the growth is finished, introducing the mixed gas of argon and oxygen into the deposition cavity to enable the air pressure of the deposition cavity to reach 200mbar, and annealing for 15min under the air pressure; and after the annealing is finished, the temperature is reduced to the room temperature.
Preferably, in a magnetron sputtering system, the target distance is 55mm, pre-sputtering is firstly carried out for 10-12 h through mixed gas at room temperature, and impurities on the surface of the target are removed, wherein the mixed gas is mixed gas of argon and oxygen, and the volume ratio of the argon to the oxygen is 1/1; then preparing 0.88BaTiO on the surface of the buffer layer by magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3A film;
the target material is BaTiO with the purity level of 4-5N3Powder, MgO2Powder, TiO2Powder of Bi2O3The powder is prepared by sintering, and the sintering temperature is 100-200 ℃ lower than the phase forming temperature of each system.
The invention has the following beneficial effects:
in the thin film capacitor of the present invention, 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The film is the existing BaTiO3Middle doped with Bi (Mg)0.5Ti0.5)O3By adding into BaTiO3Incorporating an appropriate proportion of Bi (Mg)0.5Ti0.5)O3Decrease BaTiO3Curie temperature (T) ofC) The peak of the dielectric temperature spectrum is flatter, the dependence of the material performance on the temperature is reduced, and the material can keep the performance stable in a wider temperature interval. 0.88BaTiO of the invention3-0.12Bi(Mg0.5Ti0.5)O3The film not only improves the energy storage density and efficiency of the film at room temperature, but also improves the energy storage characteristic of the film in a wide temperature area of-100 ℃ to 150 ℃. To use a silicon substrate on which an amorphous SiO layer is present2From0.88BaTiO of the invention3-0.12Bi(Mg0.5Ti0.5)O3Crystal structure of thin film and SiO2Incompatible, therefore, the invention is applied to silicon substrates and 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3A transition layer (titanium layer) and a buffer layer (Pt layer) are arranged between the films, wherein, 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The lattice constant of the film is about
Figure BDA0002746367570000031
The lattice constant of the Pt layer is about
Figure BDA0002746367570000032
0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The lattice constant of the thin film is close to that of the Pt layer, so that the thin film does not generate large lattice distortion. Thus 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The film can well grow on the surface of the Pt layer; according to the invention, the Ti layer is arranged between the Pt layer and the silicon substrate, and the Ti layer can diffuse into the Pt layer in the heat treatment process, so that the Ti layer plays a role in guiding the preferential growth of the film, and cannot influence the lattice constant of the film. Through the structural design, the energy storage density of the film capacitor at room temperature can reach 59.25J/cm3And the efficiency reaches 75.19 percent. The film capacitor also obtains better performance at high temperature of 150 ℃. The film capacitor of the invention belongs to a silicon integrated lead-free barium titanate-based energy storage capacitor, on one hand, the harm of the traditional lead-based energy storage film to the environment and human body is avoided, the invention meets the requirement of environmental protection in the current industrial production, and on the other hand, Pt/Ti/SiO used in the invention2The invention has very important practical significance based on the situation of wide-range application of silicon integrated circuits.
The capacitor prepared by the preparation method has the characteristics of high energy storage density, high energy storage efficiency and more convenience for practical application.
Drawings
FIG. 1 is a schematic structural diagram of a BT-BMT thin film prepared by the present invention;
FIG. 2 is a BT-BMT film (i.e., 0.88 BaTiO) of the present invention3-0.12Bi(Mg0.5Ti0.5)O3Film) cross-sectional scanning electron micrographs;
FIG. 3 is a theta-2 theta scan of a BT-BMT film of the present invention;
FIG. 4(a) is a graph of P-Eloop of a BT-BMT film of the present invention at room temperature, and FIG. 4(b) is a Weibull plot of breakdown field strength of the BT-BMT film of the present invention at room temperature;
FIG. 5 is a graph of energy storage density and energy storage efficiency of the BT-BMT thin film of the invention with electric field variation at room temperature;
FIG. 6(a) is a P-Eloop diagram of the BT-BMT film in a wide temperature range of-100 to 150 ℃, and FIG. 6(b) is a diagram of the energy storage density and the energy storage efficiency of the BT-BMT film in a wide temperature range of-100 to 150 ℃.
In the figure, 1-Pt upper electrode, 2-BT-BMT thin film, 3-Pt layer, 4-Ti layer, 5-SiO2Layer, 6-silicon substrate, 7-Pt bottom electrode.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Referring to fig. 1, the silicon integrated thin film capacitor with high energy storage density of the invention comprises a silicon substrate 6, a transition layer arranged on the surface of the silicon substrate 6, a buffer layer arranged on the surface of the transition layer and a BT-BMT thin film 2 arranged on the surface of the buffer layer, wherein the transition layer is a Ti layer 5, and the buffer layer is a Pt layer 4. After the BT-BMT film is obtained, a sample is partially polished, a square copper net with 100 meshes is selected as a mask plate to be plated with a platinum electrode, a Pt upper electrode 1 and a Pt lower electrode 7 are obtained, and the electrical property test is completed.
The invention relates to a silicon integrated thin film capacitor with high energy storage density, which comprises the following steps:
(1) firstly according to the chemical formula 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3Weighing a proper amount of BaTiO of 4-5N grade3Powder, MgO2Powder, TiO2Powder and Bi2O3And powder, performing ball milling, presintering, granulating, molding and sintering processes on the mixture of the four kinds of powder, and preparing the ceramic target by adopting the traditional solid-phase ceramic preparation process. In the process of preparing the ceramic target, the sintering temperature is 100-200 ℃ lower than the system phase forming temperature.
(2) The prepared ceramic target material is firstly polished by sand paper and then the surface of the ceramic target material is cleaned by an air gun, and then the ceramic target material is arranged in a magnetron sputtering system, wherein the target distance is 55mm, and argon/oxygen (Ar/O)2) Under the room-temperature sputtering environment with the mixed gas of 1/1, firstly, pre-sputtering for 10-12 h to remove impurities on the surface of the ceramic target.
(3) Selecting Pt (111)/Ti/SiO2Depositing a film on the/Si (001) substrate, pretreating before depositing, and adding Pt/Ti/SiO2Immersing the/Si substrate into alcohol, washing for 3-5 min by oscillation by using ultrasonic washing equipment, and washing the cleaned Pt/Ti/SiO2the/Si substrate is immediately placed into a deposition cavity of a magnetron sputtering system after being dried by nitrogen.
(4) Pumping the air pressure in the deposition chamber to a higher vacuum degree by using a multistage air pumping system formed by combining a mechanical pump and a molecular pump, wherein the vacuum degree is not less than 10-5mbar; then introducing argon/oxygen mixed gas required by film growth into the deposition chamber, wherein Ar/O in the mixed gas2The volume ratio is 1:1, and the air pressure in the cavity is 200 mbar; then adding Pt/Ti/SiO2Baking the/Si substrate at 700 deg.C under 200mbar for 10min to remove Pt/Ti/SiO2The surface of the Si substrate is attached; then the deposition cavity is vacuumized to ensure that the vacuum degree is not less than 10-5mbar; finally, argon/oxygen mixed gas is slowly introduced, and a mass flow meter is adjusted to the required growth pressure of 0.2 mbar.
(5) After the gas pressure is stabilized, the growth time is adjusted according to the thickness diagram shown in FIG. 2, in Pt/Ti/SiO2The growth of a thin film with a thickness of approximately 474nm is achieved on a/Si substrate.
(6) After the growth is finished, introducing mixed gas to enable the air pressure of the deposition cavity to reach 200mbar, and annealing the sample for 15min under the air pressure; and after the annealing is finished, cooling the temperature to room temperature, and taking out the sample to obtain the preferentially oriented BT-BMT film, which is shown in figure 3.
(7) After the lead-free film with high energy storage density is obtained, the lead-free film grows on Pt/Ti/SiO2And partially polishing a sample on the Si substrate, and selecting a square copper net with 100 meshes as a mask plate platinum-plated electrode to finish the electrical property test.
The method adopts a radio frequency magnetron sputtering technology, a BT-BMT film with preferred orientation is obtained on a silicon substrate through bombardment of plasma on a target, as shown in figure 2, the film with the thickness of 460-490 nm is obtained through adjustment of the sputtering time of the target, and the prepared BT-BMT film has higher breakdown field strength (as shown in figures 4(a), 4(b) and 5), and has excellent thermal stability and higher energy storage density and energy storage efficiency in a wide temperature range of-100-150 ℃ (as shown in figures 6(a) and 6 (b)).
The invention selects a proper silicon-based buffer layer and adjusts the growth pressure and temperature to the Pt/Ti/SiO2The BT-BMT film with preferred orientation grows on the Si substrate, and the lead-free environment-friendly film capacitor with high energy storage density, energy storage efficiency and good thermal stability is prepared on the silicon substrate and can be widely applied to the fields of dielectric materials, ferroelectric materials, piezoelectric materials and the like. The invention belongs to a barium titanate-based energy storage film, avoids the harm of the traditional lead-based energy storage film to the environment and human bodies, and meets the requirement of environmental protection in the current industrial production.
The properties of the obtained material are as follows:
FIG. 2 is a scanning electron microscope image of a BT-BMT lead-free thin film prepared by the present invention, wherein the thickness of the thin film is about 460 to 490 nm.
FIG. 3 is a theta-2 theta scan of a prepared BT-BMT lead-free film of the present invention; it can be seen that the film is a preferentially oriented single phase film. Fig. 4(a) is a room temperature P-E curve of the thin film sample according to the present invention, and it can be seen that the sample can still maintain a good P-Eloop at a field strength of 4.2MV/cm, which indicates that the sample thin film has no significant leakage current and can maintain a high efficiency. FIG. 4(b) shows the Weibull distribution of the breakdown field strength of the thin film sample according to the present invention, and it can be seen that the breakdown field strength of the BT-BMT sample is 4.48 MV/cm.
FIG. 5 is a drawing showingThe energy storage density and the energy storage efficiency of the BT-BMT film at room temperature are disclosed by the invention, and the energy storage density of a sample at room temperature is 59.25J/cm3The energy storage efficiency is 75.19%;
FIG. 6(a) is a P-E curve of the BT-BMT film in a wide temperature range of-100 deg.C to 150 deg.C, from which it can be seen that the film can maintain good performance at a field strength of 2MV/cm in a range of-100 deg.C to 150 deg.C. FIG. 6(b) shows the energy storage density and energy storage efficiency of the BT-BMT thin film in the range of-100 deg.C to 150 deg.C and at the field strength of 2 MV/cm. It can be seen that the film has a storage density of about 31.8J/cm at 150 deg.C3The energy storage efficiency is about 75.79%, and the energy storage density and the change rate of the energy storage efficiency are kept within 5% in the temperature range of-100 ℃ to 150 ℃.
The thin film capacitor of the invention can keep higher energy storage density and efficiency at high temperature, and the invention uses Pt/Ti/SiO2The thin film capacitor has great potential in silicon integrated circuits and wide-temperature energy storage.
The BT-BMT system lead-free film capacitor provided by the invention is a BT-BMT film obtained on a substrate by bombarding a target material by plasma by adopting a radio frequency magnetron sputtering technology. Firstly, synthesizing a BT-BMT ceramic target material by adopting high-purity powder and a traditional solid-phase preparation process of ceramic, and then realizing the growth of a BT-BMT film capacitor on a silicon substrate by bombarding the target material by plasma in the environment of high temperature and high oxygen pressure by utilizing a radio frequency magnetron sputtering technology; the thickness is controlled by controlling the sputtering time of the target material, and meanwhile, the performance of the energy storage film capacitor is predicted and regulated by regulating and controlling the growth temperature and the air pressure condition. Meanwhile, the thin film capacitor prepared by the invention has higher energy storage density and energy storage efficiency and excellent thermal stability in a wide temperature range.
The invention adjusts the temperature and the air pressure during sputtering to Pt/Ti/SiO2The BT-BMT thin film with the thickness of about 474nm is prepared on the/Si substrate. Through the test of the ferroelectric property of the sample and the statistics of Weibull distribution, the breakdown field strength of the BT-BMT sample is found to be 4.48 MV/cm. Through the direction ofBaTiO3Middle doped with Bi (Mg)0.5Ti0.5)O3The energy storage density and efficiency of the film at room temperature are improved, and the energy storage characteristic of the film in a wide temperature range of-100-150 ℃ is improved. The BT-BMT lead-free thin film capacitors of the present invention have at least the following advantages:
(1) the BT-BMT thin film prepared by the Pt layer and the Ti layer has single orientation, high quality and excellent performance. The method avoids the film quality problem caused by the fact that the film is directly deposited on the silicon substrate because the difference between the substrate and the film structure is too large.
(2) Incorporating an appropriate proportion of Bi (Mg)0.5Ti0.5)O3The Curie temperature (T) of the material is reducedC) The peak of the dielectric temperature spectrum is flatter, the dependence of the material performance on the temperature is reduced, and the material can keep the performance stable in a wider temperature interval.
(3) The material does not contain lead, does not cause pollution to the environment, and can be widely applied to various fields.

Claims (10)

1. The silicon integrated thin film capacitor with high energy storage density is characterized by comprising a silicon substrate, a transition layer arranged on the surface of the silicon substrate, a buffer layer arranged on the surface of the transition layer and 0.88BaTiO arranged on the surface of the buffer layer3-0.12Bi(Mg0.5Ti0.5)O3The thin film, the transition layer is a titanium layer, and the buffer layer is a Pt layer.
2. The silicon-integrated thin film capacitor with high energy storage density of claim 1, wherein the 0.88BaTiO3-0.12Bi(Mg0.5Ti0.5)O3The thickness of the film is 460-490 nm.
3. A silicon integrated thin film capacitor with high energy storage density as claimed in claim 1 wherein the Pt layer is (111) oriented.
4. A silicon integrated thin film capacitor with high energy storage density as claimed in claim 1 wherein the silicon substrate is (001) oriented.
5. A preparation method of a silicon integrated thin film capacitor with high energy storage density is characterized by comprising the following steps:
preparing a transition layer on the surface of a silicon substrate, preparing a buffer layer on the surface of the transition layer, and preparing 0.88BaTiO on the surface of the buffer layer through magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3A film; the transition layer is a titanium layer, and the buffer layer is a Pt layer.
6. The method for preparing the silicon-integrated thin film capacitor with high energy storage density as claimed in claim 5, wherein the 0.88BaTiO is prepared on the surface of the buffer layer by magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3When in film forming:
firstly, a deposition cavity of a magnetron sputtering system is vacuumized to ensure that the vacuum degree in the deposition cavity is not less than 10-5mbar; introducing mixed gas of argon and oxygen with the volume ratio of 1/1 into the deposition chamber, so that the air pressure in the deposition chamber is 200 mbar; raising the temperature of the deposition cavity to 700 ℃, and then baking the whole structure with the silicon substrate, the transition layer and the buffer layer at 700 ℃ and 200mbar for 10min to remove attachments on the surface of the whole structure; then the deposition cavity is vacuumized to ensure that the vacuum degree of the deposition cavity is not less than 10-5mbar; slowly introducing the mixed gas of argon and oxygen into the deposition cavity to ensure that the required growth pressure in the deposition cavity is 0.2 mbar;
after the air pressure in the deposition cavity is stabilized, the growth time is adjusted, and 0.88BaTiO with preset thickness grows on the surface of the integral structure3-0.12Bi(Mg0.5Ti0.5)O3A film;
after the growth is finished, introducing the mixed gas of argon and oxygen into the deposition cavity to enable the air pressure of the deposition cavity to reach 200mbar, and annealing for 15min under the air pressure; and after the annealing is finished, the temperature is reduced to the room temperature.
7. The method for manufacturing a thin film capacitor with integrated silicon and high energy storage density as claimed in claim 6, wherein in the magnetron sputtering system, the target distance is 55mm, and the target surface impurities are removed by pre-sputtering for 10-12 h with a mixed gas at room temperature, wherein the mixed gas is a mixed gas of argon and oxygen, and the volume ratio of argon to oxygen is 1/1; then preparing 0.88BaTiO on the surface of the buffer layer by magnetron sputtering3-0.12Bi(Mg0.5Ti0.5)O3A film;
the target material is BaTiO with the purity level of 4-5N3Powder, MgO2Powder, TiO2Powder of Bi2O3The powder is prepared by sintering, and the sintering temperature is 100-200 ℃ lower than the phase forming temperature of each system.
8. The method of claim 5, wherein the 0.88BaTiO thin film capacitor is formed by integrating silicon3-0.12Bi(Mg0.5Ti0.5)O3The thickness of the film is 460-490 nm.
9. The method of claim 5, wherein the Pt layer is (111) oriented.
10. The method of claim 5, wherein the silicon substrate is (001) oriented.
CN202011168094.5A 2020-10-27 2020-10-27 Silicon integrated thin film capacitor with high energy storage density and preparation method thereof Pending CN112670086A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023005008A1 (en) * 2021-07-26 2023-02-02 西安交通大学 Low-dielectric constant high-entropy film and preparation method therefor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103219153A (en) * 2013-03-26 2013-07-24 欧阳俊 High-voltage-resistant and high-energy-density capacitor and preparation method thereof
JP2015107905A (en) * 2013-10-24 2015-06-11 三菱マテリアル株式会社 Non-lead dielectric thin film, composition for forming this film, and method for forming this film
CN105016724A (en) * 2014-04-16 2015-11-04 三星电机株式会社 Dielectric ceramic composition and multilayer ceramic capacitor containing the same
CN110863184A (en) * 2019-11-29 2020-03-06 西安交通大学 Wide-working-temperature lead-free epitaxial film and preparation method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103219153A (en) * 2013-03-26 2013-07-24 欧阳俊 High-voltage-resistant and high-energy-density capacitor and preparation method thereof
JP2015107905A (en) * 2013-10-24 2015-06-11 三菱マテリアル株式会社 Non-lead dielectric thin film, composition for forming this film, and method for forming this film
CN105016724A (en) * 2014-04-16 2015-11-04 三星电机株式会社 Dielectric ceramic composition and multilayer ceramic capacitor containing the same
CN110863184A (en) * 2019-11-29 2020-03-06 西安交通大学 Wide-working-temperature lead-free epitaxial film and preparation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DO-KYUN KWON: "("Temperature Stable High Energy Density Capacitors using Complex Perovskite Thin Films"", 《IEEE》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023005008A1 (en) * 2021-07-26 2023-02-02 西安交通大学 Low-dielectric constant high-entropy film and preparation method therefor

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