CN112650647B - Information acquisition method, device, equipment and medium - Google Patents
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3017—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system is implementing multitasking
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The embodiment of the disclosure relates to an information acquisition method, device, equipment and medium, wherein the method comprises the following steps: responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the sub-process comprises target memory information of the first thread; modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after obtaining the target stack information of the first thread; and after the second thread is utilized to monitor that the subprocess is closed, reading the target stack information acquired by the subprocess. By adopting the technical scheme, thread jamming caused by current acquisition of stack information is eliminated, accurate stack information is acquired under the condition that threads are not suspended, and the influence on the running efficiency of the threads is avoided.
Description
Technical Field
The disclosure relates to the field of computer technology, and in particular, to an information acquisition method, an information acquisition device, and an information acquisition medium.
Background
With the continuous development of internet technology, intelligent terminals are becoming an integral part of people's study and life. In order to ensure the normal operation of the mobile terminal, debugging and monitoring of the mobile terminal are becoming more and more popular.
In an android system, obtaining stack information of a thread is a debugging monitoring means, for example, when a thread is stuck, the stack information of the thread is obtained to solve the problem of stuck. However, when the stack information of the thread is acquired at present, the accurate stack information can be acquired only by stopping the thread, so that the operating efficiency of the thread is affected.
Disclosure of Invention
In order to solve the above technical problems or at least partially solve the above technical problems, the present disclosure provides an information acquisition method, apparatus, device, and medium.
The embodiment of the disclosure provides an information acquisition method, which comprises the following steps:
responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and after the second thread is used for monitoring that the subprocess is closed, reading the target stack information acquired by the subprocess.
The embodiment of the disclosure also provides an information acquisition device, which comprises:
the process creation module is used for responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
the information acquisition module is used for modifying the pause attribute value in the target memory information into a pause value by utilizing the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and the information reading module is used for reading the target stack information acquired by the subprocess after the second thread is used for monitoring the subprocess to be closed.
The embodiment of the disclosure also provides an electronic device, which comprises: a processor; a memory for storing the processor-executable instructions; the processor is configured to read the executable instructions from the memory and execute the instructions to implement an information acquisition method according to an embodiment of the disclosure.
The present disclosure also provides a computer-readable storage medium storing a computer program for executing the information acquisition method as provided by the embodiments of the present disclosure.
Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages: the information acquisition scheme provided by the embodiment of the disclosure responds to a stack information acquisition request of a first thread, and is used for creating a sub-process of the main process, wherein the second thread is a first thread Cheng Chuangjian in the main process where the first thread is located; the memory information of the sub-process comprises target memory information of the first thread; modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after obtaining the target stack information of the first thread; and after the second thread is utilized to monitor that the subprocess is closed, reading the target stack information acquired by the subprocess. By adopting the technical scheme, the thread stack information is acquired after the suspension attribute value of the thread is modified by the subprocess of the main process, and the suspension state detection of the thread can be met because the suspension attribute value is modified, so that thread blocking caused by the current acquisition of the stack information is eliminated, accurate stack information is acquired under the condition of not suspending the thread, and the influence on the running efficiency of the thread is avoided.
Drawings
The above and other features, advantages, and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. The same or similar reference numbers will be used throughout the drawings to refer to the same or like elements. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.
Fig. 1 is a schematic flow chart of an information obtaining method according to an embodiment of the disclosure;
fig. 2 is a flowchart of another information obtaining method according to an embodiment of the present disclosure;
fig. 3 is a flowchart of another information obtaining method according to an embodiment of the disclosure;
fig. 4 is a schematic structural diagram of an information obtaining apparatus according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order and/or performed in parallel. Furthermore, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is based at least in part on. The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that the terms "first," "second," and the like in this disclosure are merely used to distinguish between different devices, modules, or units and are not used to define an order or interdependence of functions performed by the devices, modules, or units.
It should be noted that references to "one", "a plurality" and "a plurality" in this disclosure are intended to be illustrative rather than limiting, and those of ordinary skill in the art will appreciate that "one or more" is intended to be understood as "one or more" unless the context clearly indicates otherwise.
The names of messages or information interacted between the various devices in the embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.
At present, the acquisition of the stack information of the thread in the android system can be realized by the following steps: calling a pause (suspend) function to write 1, and pausing the thread; calling a debugging (dump) function to extract stack information of the thread; a resume function write-1 is called to resume the thread. When the stack information of the thread is obtained, the accurate stack information can be obtained only by stopping the thread, so that the operation efficiency of the thread is affected. In order to solve the above-described problems, embodiments of the present disclosure provide an information acquisition method, which is described below in connection with specific embodiments.
Fig. 1 is a schematic flow chart of an information acquisition method according to an embodiment of the present disclosure, where the method may be performed by an information acquisition apparatus, and the apparatus may be implemented by using software and/or hardware, and may be generally integrated in an electronic device. As shown in fig. 1, the method includes:
step 101, responding to a stack information acquisition request of a first thread, wherein the first thread is a second thread of a first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the sub-process comprises target memory information of the first thread.
The first thread can run in the android system, is not limited to the android system, can also run in other running systems developed based on the android system, or can run in an operating system similar to the android system, and the running efficiency of the thread is affected when the system acquires stack information. A stack information fetch request may be understood as a request triggered by a terminal when a problem occurs with a first thread for solving a problem based on stack information, e.g. when the first thread is stuck, the stack information fetch request may be triggered to solve a stuck problem based on stack information. The first thread may be any thread in operation, which is not limited in this disclosure, for example, the first thread may be a thread corresponding to an application program. The second thread is another thread in the main process other than the first thread.
In the embodiment of the disclosure, the information acquiring device may receive a stack information acquiring request of the first thread, respond to the stack information acquiring request, provide a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and call a rescheduling (Fork) function to create a sub-process of the main process where the first thread is located. The main process comprises a first thread and a second thread, the main process is a parent process of the created child process, and the second thread is used for monitoring the state of the child process and waiting for the child process to acquire stack information. The memory of the sub-process is independent of the memory of the main process, and the memory information of the sub-process can include the memory information of all threads of the main process, i.e. the target memory information of the first thread.
And 102, modifying the pause attribute value in the target memory information into a pause value by utilizing the subprocess, and closing the subprocess after acquiring the target stack information of the first thread.
The suspension attribute value may be a memory value of a suspension attribute, where the memory value may represent an operation state of the first thread by assigning different values. The pause value may be one of a plurality of values of a pause attribute value, and the pause value may be indicative of the first thread being in a pause state.
In an embodiment of the present disclosure, modifying a suspension attribute value in target memory information to a suspension value by using a sub-process includes: determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values; modifying the suspension attribute value to a suspension value based on the memory address of the suspension attribute value, wherein the suspension value is used to characterize the first thread as a suspension state.
The pause number attribute value may be a memory value of a pause number (pause) attribute. The above-mentioned modification to the pause attribute value requires that the memory address of the pause attribute value be determined first, and since the pause attribute of the system is not disclosed, the memory address of the pause attribute value is not a determined value, and thus in the embodiment of the present disclosure, it is necessary to dynamically determine the memory address of the pause attribute value. By searching the system source code by utilizing the subprocess, the memory address of the pause attribute value and the memory address of the pause number attribute value are always adjacent, so that the memory address of the pause number attribute value in the target memory information can be determined firstly, and the memory address of the pause attribute value is determined based on the memory address of the pause number attribute value in the embodiment of the disclosure.
Optionally, determining the memory address of the pause number attribute value using the sub-process includes: invoking a pause function by utilizing a subprocess to assign a pause attribute value to a first target value, and searching a target memory address for storing a second target value in target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value; if the number of target memory addresses is unique, the target memory address is determined to be the memory address of the pause number attribute value.
The suspension function refers to a function which acts on a thread to enable the thread to enter a suspension state, and particularly, the thread can be suspended by assigning a suspension attribute value of the thread as a suspension value. The first target value is one of a plurality of values of the pause attribute value, and the second target value is one of a plurality of values of the pause attribute value. The second target value is equal to the first target value multiplied by the number of cycles, and may specifically be determined by b=a×n, where B represents the second target value, a represents the first target value, and N represents the number of cycles, where the number of cycles refers to the number of times the target memory address is found.
In particular, the function symbol table of the system may be searched by using the sub-process to search the entry address of the pause function therein, wherein the function symbol table may be stored by using the executable file art. The suspending function is called by the sub-process based on the entry address of the suspending function to assign a first target value to the suspending attribute value of the first thread, and writing of the first target value cannot be achieved because the first thread is not included in the sub-process. And starting scanning from a starting memory address in the target memory information of the first thread, searching for a target memory address storing a second target value corresponding to the first target value, wherein if the number of the target memory addresses is unique, the target memory address is a memory address with a pause number attribute value, and the adjacent memory addresses of the target memory addresses are memory addresses with the pause attribute value, namely the memory address before or after the target memory address.
Optionally, the number of adjacent memory addresses of the target memory address is two, the two adjacent memory addresses may be sequentially determined as memory addresses of the suspension attribute value, and the target stack information may be obtained after modifying the memory value to the suspension value. If the target stack information is empty, the current adjacent memory address is not the memory address of the pause attribute value, and the other adjacent memory address is the memory address of the pause attribute value, and the target stack information can be acquired after modifying the memory value to the pause value. The number of adjacent memory addresses of the target memory address is two, but the acquisition of the target stack information is not affected.
In an embodiment of the present disclosure, the information obtaining method may further include: if the number of the target memory addresses is greater than one, the cycle number and the second target value are updated, and the target memory addresses storing the second target value are searched in the target memory information in a return mode until the number of the memory addresses of the target memory addresses is unique.
Searching a target memory address in the target memory information, if the target memory address is greater than one, indicating that the target memory address may not be the memory address of the pause number attribute value, adding one to the cycle number to obtain a new cycle number, and further obtaining a new second target value which is the product of the new cycle number and the first target value. And then returning to execute the step of searching the target memory addresses storing the second target value in the target memory information until the number of the target memory addresses is unique.
For example, assuming that the first target value is 2, the initial cycle number is 1, the second target value is 2*1 =2, if the number of target memory addresses for storing 2 is 5, the cycle number is 2, the second target value is 2×2=4, the search operation for the target memory address for storing 4 is continued, if the number of target memory addresses for storing 4 is 1, the target memory address is a memory address of the pause number attribute value, and then the adjacent memory addresses of the target memory addresses are memory addresses of the pause attribute value.
It should be understood that the above-mentioned operation of determining the memory address of the suspend attribute value may be performed before step 102, or may be performed before the information acquiring apparatus receives the stack information acquiring request, which is not limited in particular, so as to prepare for the subsequent modification of the suspend attribute value.
In the scheme, based on the adjacent relation between the pause number attribute value and the memory address of the pause attribute value, the memory address of the pause attribute value can be rapidly determined, and the subsequent modification of the pause attribute value is facilitated.
Specifically, after determining the memory address of the suspend attribute value by using the sub-process, the suspend attribute value on the memory address of the suspend attribute value may be modified to a suspend value, which is used to characterize the first thread as a suspend state, for example, the suspend value may be 1. And the function symbol table of the system can be searched by utilizing the subprocess so as to search the entry address of the debugging function, and the debugging function is called for the target memory information of the first thread based on the entry address of the debugging function so as to acquire the target stack information in the target memory information. The information retrieval means may then write the target stack information to the stack file and close the current sub-process.
In an embodiment of the present disclosure, acquiring target stack information of a first thread using a sub-process includes: invoking a debugging function by utilizing a subprocess, and verifying the pause attribute value according to a set time interval; if the pause attribute value is a pause value, the verification is passed, and target stack information of the first thread is acquired through the debugging function.
The set time interval refers to a preset verification interval time of the suspension state of the first thread, and the set time interval can be set according to actual situations. Specifically, in the process of calling the debug function by using the subprocess, the pause attribute value of the first thread can be verified according to the set time interval, and if the pause attribute value is the pause value, the first thread can be represented to be in a pause state, and the verification is passed. After the validation of the suspension attribute value is passed, the retrieval of the target stack information of the first thread may continue to be performed. In the embodiment of the disclosure, the sub-process is utilized to modify the pause attribute value in the target memory information in the first thread into the pause value, so that the verification can be passed.
In the above scheme, since the suspended attribute value has been modified before the sub-process obtains the stack information of the thread, the sub-process can be verified to pass when the debugging function is called, and the stack information of the thread can be asynchronously obtained, so that the thread in the main process can complete stack grabbing without any blocking.
And 103, after the second thread is utilized to monitor that the subprocess is closed, reading the target stack information acquired by the subprocess.
In the embodiment of the disclosure, after the information obtaining device obtains the target stack information of the first thread by using the sub-process, if the second thread in the main process monitors that the sub-process is closed, the target stack information obtained by the sub-process in the stack file can be read, so as to complete the grabbing of the target stack information of the first thread.
The information acquisition scheme provided by the embodiment of the disclosure responds to a stack information acquisition request of a first thread, and is used for creating a sub-process of the main process, wherein the second thread is a first thread Cheng Chuangjian in the main process where the first thread is located; the memory information of the sub-process comprises target memory information of the first thread; modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after obtaining the target stack information of the first thread; and after the second thread is utilized to monitor that the subprocess is closed, reading the target stack information acquired by the subprocess. By adopting the technical scheme, the thread stack information is acquired after the pause attribute value is modified by the subprocess of the main process, and the detection of the thread pause state can be satisfied because the pause attribute value is modified, so that thread blocking caused by the current acquisition of the stack information is eliminated, accurate stack information is acquired under the condition of not pausing the thread, and the influence on the thread operation efficiency is avoided.
Fig. 2 is a flow chart of another information acquisition method according to an embodiment of the present disclosure, where the information acquisition method is further optimized based on the above embodiment. As shown in fig. 2, the method includes:
in step 201, in response to a stack information obtaining request of the first thread, a second thread is a first thread Cheng Chuangjian in a main process where the first thread is located, and a sub-process of the main process is created.
Wherein the memory information of the sub-process comprises target memory information of the first thread
Step 202, calling a pause function by using a subprocess to assign a pause attribute value as a first target value.
Step 203, searching the target memory address storing the second target value in the target memory information.
The second target value is a product of the first target value and the cycle number, and the second target value is a value of the pause number attribute value. The pause attribute value is adjacent to the memory address of the pause number attribute value.
Step 204, if the number of the target memory addresses is unique, executing step 205; otherwise, step 206 is performed.
Step 205, determining the target memory address as the memory address of the pause number attribute value, and determining the adjacent memory address of the pause number attribute value as the memory address of the pause attribute value.
After step 205, step 207 may be performed.
Step 206, updating the number of loops and the second target value.
After step 206, the process returns to step 203.
Step 207, modifying the pause attribute value to a pause value by using the sub-process based on the memory address of the pause attribute value.
Step 208, shutting down the sub-process after obtaining the target stack information of the first thread using the sub-process.
In an embodiment of the present disclosure, acquiring, by using a sub-process, target stack information of a first thread may include: invoking a debugging function by utilizing a subprocess, and verifying the pause attribute value according to a set time interval; if the pause attribute value is a pause value, the verification is passed, and target stack information of the first thread is acquired through the debugging function.
Step 209, using the second thread to read the target stack information acquired by the sub-process after detecting that the sub-process is closed.
In the scheme, firstly, a sub-process of a main process is created, then, a memory address of a pause attribute of a target thread is searched in the sub-process, a pause attribute value is modified, judgment of a pause state of a system is bypassed, and then, a debugging function is called to acquire stack information of the target thread and transmit the stack information into the main process, wherein the target thread is the first thread. Fig. 3 is a schematic flow chart of still another information obtaining method according to an embodiment of the disclosure, and as shown in fig. 3, a specific process may include: step 301, creating a sub-process by Fork. By calling the Fork function, a sub-process of the main process where the target thread is located can be created, wherein the sub-process comprises a thread, and the memory information of the sub-process comprises the memory information of the target thread. And, the second thread may also be the first thread Cheng Chuangjian in the main process where the first thread is located. Step 301 may be followed by steps 302 and 308, with the operations performed in the sub-process including steps 302-307.
Step 302, find the entry addresses of dump function and suspend function. And searching the entry addresses of a dump function and a suspend function by searching a function symbol table of the system, wherein the dump function is a debugging function, and the suspend function is a pause function. Step 303 may be performed by looking at the system source discovery that the isSuspend attribute is always adjacent to the memory address of the susppdcount attribute. Step 303, invoking suspend (a). And calling a suspend function, and transmitting the result into A, wherein the suspend of the target thread is A.times.N, and N is the cycle number. Step 304, searching an address with a value of a×n: addrs. Addrs represents a result address set with a value of A x N, and starts scanning from the initial address of the target thread to find the memory address with a storage value of A x N. Alternatively, if Addrs already exist, scan directly from Addrs. Step 305, whether the Addrs number is 1. If the number of Addrs is 1, then Addrs [0] +1 or Addrs [0] -1 is the memory address of the isSuspend attribute, and step 306 is executed; otherwise, the number of loops N is updated, and the process returns to step 304. Step 306, addrs [0] =1. The memory value on the memory address of the isSuspend attribute is modified to 1, indicating that the suspend state has been reached. Step 307, call dump (). And calling dump functions for the target threads to acquire stack information. And writing the stack information into the file and exiting the current sub-process, wherein the memory of the sub-process is completely independent, so that no cleaning operation is needed. Step 308, the second thread in the main process waits for a sub-process. The second thread in the main process finds out that the sub-process exits, and can read the stack file to finish stack grabbing.
The embodiment of the disclosure can solve the problem that threads are suspended caused by acquiring the thread stacks, thereby achieving the purpose of acquiring the stacks at will without affecting the thread operation efficiency. According to the embodiment of the disclosure, through the memory independent characteristic when the subprocess is created by means of the Fork function in the Linux system, the memory address of the pause attribute of the thread is searched by searching the system function symbol table, the pause attribute value is modified, stack grabbing is realized, detection of the pause state in the system is bypassed, and the stack information of the truly pause-free and completely asynchronous grabbing thread is completed.
The information acquisition scheme provided by the embodiment of the disclosure responds to a stack information acquisition request of a first thread, and is used for creating a sub-process of the main process, wherein the second thread is a first thread Cheng Chuangjian in the main process where the first thread is located; the memory information of the sub-process comprises target memory information of the first thread; modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after obtaining the target stack information of the first thread; and after the second thread is utilized to monitor that the subprocess is closed, reading the target stack information acquired by the subprocess. By adopting the technical scheme, the thread stack information is acquired after the pause attribute value is modified by the subprocess of the main process, and the detection of the thread pause state can be satisfied because the pause attribute value is modified, so that thread blocking caused by the current acquisition of the stack information is eliminated, accurate stack information is acquired under the condition of not pausing the thread, and the influence on the thread operation efficiency is avoided.
Fig. 4 is a schematic structural diagram of an information acquisition device according to an embodiment of the present disclosure, where the device may be implemented by software and/or hardware, and may be generally integrated in an electronic device. As shown in fig. 4, the apparatus includes:
a process creation module 401, configured to respond to a stack information acquisition request of a first thread, create a sub-process of the main process for the first thread Cheng Chuangjian in the main process where the first thread is located; the memory information of the subprocess comprises target memory information of the first thread;
an information obtaining module 402, configured to modify a suspension attribute value in the target memory information to a suspension value by using the sub-process, and close the sub-process after obtaining the target stack information of the first thread;
and the information reading module 403 is configured to read, by using the second thread, the target stack information acquired by the sub-process after the sub-process is monitored to be closed.
Optionally, the information obtaining module 402 is specifically configured to:
determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values;
Modifying the pause attribute value to the pause value based on a memory address of the pause attribute value, wherein the pause value is used for representing that the first thread is in a pause state.
Optionally, the information obtaining module 402 is specifically configured to:
invoking a pause function by using the subprocess to assign the pause attribute value to a first target value, and searching a target memory address for storing a second target value in the target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value;
and if the number of the target memory addresses is unique, determining the target memory addresses as memory addresses with pause number attribute values.
Optionally, the information obtaining module 402 is specifically configured to:
if the number of the target memory addresses is greater than one, updating the cycle times and the second target numerical value, and returning to execute searching the target memory addresses storing the second target numerical value in the target memory information until the number of the memory addresses of the target memory addresses is unique.
Optionally, the information obtaining module 402 is specifically configured to:
Calling a debugging function by using the subprocess, and verifying the pause attribute value according to a set time interval;
and if the pause attribute value is a pause value, verifying to pass, and acquiring target stack information of the first thread through the debugging function.
The information acquisition device provided by the embodiment of the disclosure can execute the information acquisition method provided by any embodiment of the disclosure, and has the corresponding functional modules and beneficial effects of the execution method.
Fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. Referring now in particular to fig. 5, a schematic diagram of an electronic device 500 suitable for use in implementing embodiments of the present disclosure is shown. The electronic device 500 in the embodiments of the present disclosure may include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and the like, and stationary terminals such as digital TVs, desktop computers, and the like. The electronic device shown in fig. 5 is merely an example and should not be construed to limit the functionality and scope of use of the disclosed embodiments.
As shown in fig. 5, the electronic device 500 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 501, which may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 502 or a program loaded from a storage means 508 into a Random Access Memory (RAM) 503. In the RAM503, various programs and data required for the operation of the electronic apparatus 500 are also stored. The processing device 501, the ROM 502, and the RAM503 are connected to each other via a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.
In general, the following devices may be connected to the I/O interface 505: input devices 506 including, for example, a touch screen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; an output device 507 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage 508 including, for example, magnetic tape, hard disk, etc.; and communication means 509. The communication means 509 may allow the electronic device 500 to communicate with other devices wirelessly or by wire to exchange data. While fig. 5 shows an electronic device 500 having various means, it is to be understood that not all of the illustrated means are required to be implemented or provided. More or fewer devices may be implemented or provided instead.
In particular, according to embodiments of the present disclosure, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a non-transitory computer readable medium, the computer program comprising program code for performing the method shown in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication means 509, or from the storage means 508, or from the ROM 502. When the computer program is executed by the processing device 501, the above-described functions defined in the information acquisition method of the embodiment of the present disclosure are performed.
It should be noted that the computer readable medium described in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this disclosure, a computer-readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.
In some implementations, the clients, servers may communicate using any currently known or future developed network protocol, such as HTTP (HyperText Transfer Protocol ), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the internet (e.g., the internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed networks.
The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread; modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after acquiring the target stack information of the first thread; and after the second thread is used for monitoring that the subprocess is closed, reading the target stack information acquired by the subprocess.
Computer program code for carrying out operations of the present disclosure may be written in one or more programming languages, including, but not limited to, an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present disclosure may be implemented by means of software, or may be implemented by means of hardware. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a Complex Programmable Logic Device (CPLD), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
According to one or more embodiments of the present disclosure, the present disclosure provides an information acquisition method including:
responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and after the second thread is used for monitoring that the subprocess is closed, reading the target stack information acquired by the subprocess.
According to one or more embodiments of the present disclosure, in an information obtaining method, modifying, by using the sub-process, a suspension attribute value in the target memory information to a suspension value includes:
determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values;
Modifying the pause attribute value to the pause value based on a memory address of the pause attribute value, wherein the pause value is used for representing that the first thread is in a pause state.
According to one or more embodiments of the present disclosure, in an information obtaining method, determining a memory address of a pause number attribute value using the sub-process includes:
invoking a pause function by using the subprocess to assign the pause attribute value to a first target value, and searching a target memory address for storing a second target value in the target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value;
and if the number of the target memory addresses is unique, determining the target memory addresses as memory addresses with pause number attribute values.
According to one or more embodiments of the present disclosure, the present disclosure provides an information acquisition method, further including:
if the number of the target memory addresses is greater than one, updating the cycle times and the second target numerical value, and returning to execute searching the target memory addresses storing the second target numerical value in the target memory information until the number of the memory addresses of the target memory addresses is unique.
According to one or more embodiments of the present disclosure, in an information obtaining method, the obtaining, by using the sub-process, target stack information of the first thread includes:
calling a debugging function by using the subprocess, and verifying the pause attribute value according to a set time interval;
and if the pause attribute value is a pause value, verifying to pass, and acquiring target stack information of the first thread through the debugging function.
According to one or more embodiments of the present disclosure, the present disclosure provides an information acquisition apparatus including:
the process creation module is used for responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
the information acquisition module is used for modifying the pause attribute value in the target memory information into a pause value by utilizing the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and the information reading module is used for reading the target stack information acquired by the subprocess after the second thread is used for monitoring the subprocess to be closed.
According to one or more embodiments of the present disclosure, in the information acquisition device provided by the present disclosure, the information acquisition module is specifically configured to:
determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values;
modifying the pause attribute value to the pause value based on a memory address of the pause attribute value, wherein the pause value is used for representing that the first thread is in a pause state.
According to one or more embodiments of the present disclosure, in the information acquisition device provided by the present disclosure, the information acquisition module is specifically configured to:
invoking a pause function by using the subprocess to assign the pause attribute value to a first target value, and searching a target memory address for storing a second target value in the target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value;
and if the number of the target memory addresses is unique, determining the target memory addresses as memory addresses with pause number attribute values.
According to one or more embodiments of the present disclosure, in the information acquisition device provided by the present disclosure, the information acquisition module is specifically configured to:
if the number of the target memory addresses is greater than one, updating the cycle times and the second target numerical value, and returning to execute searching the target memory addresses storing the second target numerical value in the target memory information until the number of the memory addresses of the target memory addresses is unique.
According to one or more embodiments of the present disclosure, in the information acquisition device provided by the present disclosure, the information acquisition module is specifically configured to:
calling a debugging function by using the subprocess, and verifying the pause attribute value according to a set time interval;
and if the pause attribute value is a pause value, verifying to pass, and acquiring target stack information of the first thread through the debugging function.
According to one or more embodiments of the present disclosure, the present disclosure provides an electronic device comprising:
a processor;
a memory for storing the processor-executable instructions;
the processor is configured to read the executable instructions from the memory and execute the instructions to implement any of the information acquisition methods provided in the present disclosure.
According to one or more embodiments of the present disclosure, the present disclosure provides a computer-readable storage medium storing a computer program for executing any one of the information acquisition methods provided by the present disclosure.
The foregoing description is only of the preferred embodiments of the present disclosure and description of the principles of the technology being employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in this disclosure is not limited to the specific combinations of features described above, but also covers other embodiments which may be formed by any combination of features described above or equivalents thereof without departing from the spirit of the disclosure. Such as those described above, are mutually substituted with the technical features having similar functions disclosed in the present disclosure (but not limited thereto).
Moreover, although operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.
Claims (10)
1. An information acquisition method, the method comprising:
responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
modifying a pause attribute value in the target memory information into a pause value by using the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and after the second thread is used for monitoring that the subprocess is closed, reading the target stack information acquired by the subprocess.
2. The method of claim 1, wherein modifying the suspend attribute value in the target memory information to a suspend value using the sub-process comprises:
Determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values;
modifying the pause attribute value to the pause value based on a memory address of the pause attribute value, wherein the pause value is used for representing that the first thread is in a pause state.
3. The method of claim 2, wherein determining the memory address of the pause number attribute value using the sub-process comprises:
invoking a pause function by using the subprocess to assign the pause attribute value to a first target value, and searching a target memory address for storing a second target value in the target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value;
and if the number of the target memory addresses is unique, determining the target memory addresses as memory addresses with pause number attribute values.
4. A method according to claim 3, further comprising:
if the number of the target memory addresses is greater than one, updating the cycle times and the second target numerical value, and returning to execute searching the target memory addresses storing the second target numerical value in the target memory information until the number of the memory addresses of the target memory addresses is unique.
5. The method of claim 1, wherein obtaining target stack information for the first thread using the sub-process comprises:
calling a debugging function by using the subprocess, and verifying the pause attribute value according to a set time interval;
and if the pause attribute value is a pause value, verifying to pass, and acquiring target stack information of the first thread through the debugging function.
6. An information acquisition apparatus, characterized in that the apparatus comprises:
the process creation module is used for responding to a stack information acquisition request of a first thread, providing a second thread for the first thread Cheng Chuangjian in a main process where the first thread is located, and creating a sub-process of the main process; the memory information of the subprocess comprises target memory information of the first thread;
the information acquisition module is used for modifying the pause attribute value in the target memory information into a pause value by utilizing the subprocess, and closing the subprocess after acquiring the target stack information of the first thread;
and the information reading module is used for reading the target stack information acquired by the subprocess after the second thread is used for monitoring the subprocess to be closed.
7. The apparatus of claim 6, wherein the information acquisition module is specifically configured to:
determining the memory addresses of the pause number attribute values by utilizing the subprocesses, and determining the adjacent memory addresses of the pause number attribute values as the memory addresses of the pause attribute values;
modifying the pause attribute value to the pause value based on a memory address of the pause attribute value, wherein the pause value is used for representing that the first thread is in a pause state.
8. The apparatus of claim 7, wherein the information acquisition module is specifically configured to:
invoking a pause function by using the subprocess to assign the pause attribute value to a first target value, and searching a target memory address for storing a second target value in the target memory information, wherein the second target value is the product of the first target value and the cycle number, and the second target value is one value of the pause number attribute value;
and if the number of the target memory addresses is unique, determining the target memory addresses as memory addresses with pause number attribute values.
9. An electronic device, the electronic device comprising:
A processor;
a memory for storing the processor-executable instructions;
the processor is configured to read the executable instructions from the memory and execute the instructions to implement the information acquisition method according to any one of the preceding claims 1-5.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program for executing the information acquisition method according to any one of the preceding claims 1-5.
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