CN112649753B - Power module fault monitoring system and method and frequency converter - Google Patents
Power module fault monitoring system and method and frequency converter Download PDFInfo
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- CN112649753B CN112649753B CN202011482851.6A CN202011482851A CN112649753B CN 112649753 B CN112649753 B CN 112649753B CN 202011482851 A CN202011482851 A CN 202011482851A CN 112649753 B CN112649753 B CN 112649753B
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/40—Testing power supplies
- G01R31/42—AC power supplies
Abstract
The invention provides a power module fault monitoring system, a power module fault monitoring method and a frequency converter; the system comprises a control module, a driving module, a power module, an input signal sampling circuit and an output signal sampling circuit; the control module is connected with the driving module and used for outputting a pulse signal to the driving module so as to start the driving module; the input signal sampling circuit is connected with the driving module, is commonly connected with the power module and is used for collecting input signals of the power module; the output signal sampling circuit is connected with the power module and is used for collecting the output signal of the power module; the input signal sampling circuit and the output signal sampling circuit are both connected with the control module and are respectively used for feeding back an input signal and an output signal to the control module; the invention judges whether the power module has a fault or not by monitoring the input/output signal of the power module, and realizes accurate judgment of the fault part so as to improve the maintenance efficiency.
Description
Technical Field
The invention belongs to the technical field of power modules, and particularly relates to a power module fault monitoring system and method and a frequency converter.
Background
The power module is a core component of the frequency converter, is divided into an IPM module and a PIM module, generally works in a high-speed switch and high-current state, so that faults are easy to occur, and the damage of the power module mainly comprises the defects of an internal driving circuit, the damage of an IGBT (insulated gate bipolar transistor) of a power switch device and the like; the damage to the power module may be caused by various reasons, such as the bad power module itself, the control signal problem, and the overcurrent caused by the short circuit of the load.
At present, a power module mainly takes detection output current as protection to judge an input signal, whether the power module is bad or has the problem of an input control signal or has the problem of output load cannot be accurately judged, the requirement of the maintenance of a frequency converter on the professional skills of related personnel is high, but the professional skills of actual after-sales maintenance personnel are uneven, faults cannot be quickly and accurately diagnosed, misjudgment easily occurs, the maintenance efficiency is low or cannot be timely repaired, even the frequency converter is scrapped, and the economic burden is brought to enterprises due to the fact that the operation cost is increased.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a power module fault monitoring system, a power module fault monitoring method and a frequency converter, which are used to solve the problem that the prior art cannot accurately determine a power module fault, resulting in low maintenance efficiency.
To achieve the above and other related objects, the present invention provides a power module fault monitoring system, including: the device comprises a control module, a driving module, a power module, an input signal sampling circuit and an output signal sampling circuit; the control module is connected with the driving module and used for outputting a pulse signal to the driving module so as to start the driving module; the input signal sampling circuit is connected with the driving module, is commonly connected with the power module and is used for collecting input signals of the power module; the output signal sampling circuit is connected with the power module and is used for collecting the output signal of the power module; the input signal sampling circuit and the output signal sampling circuit are both connected with the control module and are respectively used for feeding back the input signal and the output signal to the control module; in a standby state, if the output signal detects a signal, the control module outputs the pulse signal to the driving module and judges whether the input signal is consistent with the pulse signal in time sequence so as to judge whether the power module has a fault; and under the running state, respectively judging whether the input signal and the output signal are consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
In an embodiment of the present invention, the input signal sampling circuit includes: the device comprises a first input sampling unit, a second input sampling unit and a third input sampling unit; the circuit structure composition and the internal circuit connection relationship of the first input sampling unit, the second input sampling unit and the third input sampling unit are the same; wherein the first input sampling unit comprises: the circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first triode, a first diode and a second diode; one end of the first capacitor is connected with the first end of the driving module and is commonly connected to the first input end of the power module, and the other end of the first capacitor is respectively connected with the anode of the first diode and one end of the fourth resistor; one end of the second capacitor is connected with the second end of the driving module and is commonly connected to the second input end of the power module, and the other end of the second capacitor is respectively connected with the anode of the second diode and one end of the fifth resistor; the other end of the fourth resistor is connected with the other end of the fifth resistor, and the fourth resistor and the fifth resistor are grounded together; the cathode of the first diode is connected with the cathode of the second diode and is commonly connected to one end of the third resistor; the other end of the third resistor is respectively connected with one end of the second resistor and the base electrode of the first triode; a collector of the first triode is respectively connected with one end of the first resistor and the first end of the control module, and an emitter of the first triode is connected with the other end of the second resistor and is commonly grounded; the other end of the first resistor is connected with a first power supply.
In an embodiment of the present invention, the output signal sampling circuit includes: the first output sampling unit, the second output sampling unit and the third output sampling unit; the first output sampling unit, the second output sampling unit and the third output sampling unit have the same circuit structure composition and the same internal circuit connection relationship, the first output sampling unit is also respectively connected with the second output sampling unit and the third output sampling unit, and the second output sampling unit is connected with the third output sampling unit; wherein the first output sampling unit includes: the circuit comprises a sixteenth resistor, a nineteenth resistor, a first rectifier bridge and a first optocoupler; one end of the nineteenth resistor is connected with the first output end of the power module, and the other end of the nineteenth resistor is respectively connected with the first end of the first rectifier bridge and the second output sampling unit; the second end of the first rectifier bridge is connected with the first end of the first optical coupler, the third end of the first rectifier bridge is connected with the third output sampling unit, and the fourth end of the first rectifier bridge is connected with the second end of the first optical coupler; a fourth end of the first optocoupler is connected with one end of the sixteenth resistor and a fourth end of the control module respectively; the other end of the sixteenth resistor is connected with a fourth power supply.
In an embodiment of the present invention, the power module includes: a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, and a sixth switching device; the first end of the first switching device is connected with the second end of the fourth switching device and is commonly connected to the first end of the output signal sampling circuit, the third end of the first switching device is connected with the fifth end of the driving module, and the third end of the fourth switching device is connected with the sixth end of the driving module; a second end of the second switching device is connected with a first end of the fifth switching device and is commonly connected to a second end of the output signal sampling circuit, a third end of the second switching device is connected with a second end of the driving module, and a third end of the fifth switching device is connected with a first end of the driving module; a first end of the third switching device is connected with a second end of the sixth switching device and is commonly connected to a third end of the output signal sampling circuit, a third end of the third switching device is connected with a third end of the driving module, and a third end of the sixth switching device is connected with a fourth end of the driving module; the second end of the first switching device is respectively connected with the second end of the third switching device and the second end of the fifth switching device, and the second ends of the first switching device and the fifth switching device are connected to the anode of the bus voltage in common; and the first end of the fourth switching device is respectively connected with the first end of the sixth switching device and the first end of the second switching device and is commonly connected to the cathode of the bus voltage.
In an embodiment of the present invention, in an operating state, the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, and the sixth switching device sequentially commutate once at an interval of 60 °, and a turn-on sequence of each period is: the first, second, and third switching devices are turned on → the second, third, and fourth switching devices are turned on → the third, fourth, and fifth switching devices are turned on → the fourth, fifth, and sixth switching devices are turned on → the fifth, sixth, and first switching devices are turned on → the sixth, first, and second switching devices are turned on.
In an embodiment of the present invention, the control module employs a DSP chip; the driving module adopts a buffer driving chip.
The invention provides a frequency converter, comprising: the power module fault monitoring system and the variable frequency motor are arranged; and the variable frequency motor is connected with the power module fault monitoring system.
The invention provides a power module fault monitoring method realized by adopting the power module fault monitoring system, which comprises the following steps: sampling an output signal of the power module in a standby state; if the output signal detects a signal, the control module outputs a pulse signal to the driving module and judges whether the input signal is consistent with the pulse signal in time sequence so as to judge whether the power module has a fault; in the operating state, sampling an input signal of the power module and an output signal of the power module respectively; and respectively judging whether the sampled input signal and the sampled output signal are consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
In an embodiment of the present invention, determining whether the input signal is consistent with the timing sequence of the pulse signal to determine whether the power module fails includes the following steps: if the input signal is consistent with the pulse signal in time sequence, the power module is considered to be in fault; if the input signal is inconsistent with the pulse signal time sequence, the front end of the power module is considered to be in fault or the front end and the power module are considered to be in fault; wherein the front end comprises: the control module and the drive module.
In an embodiment of the present invention, the determining whether the sampled input signal and the sampled output signal are consistent with the timing sequence of the pulse signal to determine whether the power module has a fault includes the following steps: if the input signal is consistent with the pulse signal in time sequence, and the output signal is inconsistent with the pulse signal in time sequence, the power module is considered to be in fault; and if the input signal is inconsistent with the pulse signal in time sequence, judging that the front end of the power module fails or the front end and the power module both fail.
As described above, the power module fault monitoring system, method and frequency converter according to the present invention have the following advantages:
(1) compared with the prior art, the invention judges whether the power module has a fault or not by monitoring the input/output signal of the power module, and realizes accurate judgment of the fault part so as to improve the maintenance efficiency.
(2) The invention can automatically detect the input/output signal of the power module in the standby state, and when the signal is detected to be abnormal, the corresponding fault code is reported and the power module is not allowed to start to work, so as to protect the safety of the power module and the load and avoid the potential safety hazard brought to the safe operation of the system by starting and operating in the fault state.
(3) The invention can automatically detect the input/output signal of the power module in the running state, and when the abnormal signal is detected, the power module immediately stops working and reports a corresponding fault code so as to protect the safety of the power module and the load and avoid the potential safety hazard brought to the safe running of the system by starting running in the fault state.
(4) The control method is practical, the adopted circuit structure is simple, the cost is low, and the safe and reliable operation and the energy efficiency stable operation of the whole machine system are guaranteed, so that the economic benefit is improved.
Drawings
Fig. 1 is a block diagram illustrating an operation of a power module fault monitoring system according to an embodiment of the present invention.
Fig. 2 is a circuit diagram of a power module fault monitoring system according to an embodiment of the invention.
FIG. 3 is a timing diagram of the pulse signal output by the control module and the input/output sampling signal of the power module according to the present invention.
Fig. 4 is a circuit diagram of an inverter circuit in a power module according to an embodiment of the invention.
Fig. 5 is a schematic structural diagram of a frequency converter according to an embodiment of the invention.
Fig. 6 is a flowchart illustrating a power module fault monitoring method according to an embodiment of the present invention operating in a standby state.
Fig. 7 is a flow chart of an embodiment of the power module fault monitoring method of the present invention operating in an active state.
Description of the reference symbols
1 control module
2 drive module
3 power module
4 input signal sampling circuit
401 first input sampling unit
402 second input sampling unit
403 third input sampling unit
5 output signal sampling circuit
501 first output sampling unit
502 second output sampling unit
503 third output sampling unit
51 power module fault monitoring system
52 frequency conversion motor
S11-S12
S21-S22
Detailed Description
The following description of the embodiments of the present invention is provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
Compared with the prior art, the power module fault monitoring system, the power module fault monitoring method and the frequency converter judge whether the power module has a fault or not by monitoring the input/output signal of the power module, and accurately judge the fault part so as to improve the maintenance efficiency; the invention can automatically detect the input/output signal of the power module in the standby state, and when the signal is detected to be abnormal, the corresponding fault code is reported and the power module is not allowed to start to work so as to protect the safety of the power module and the load and avoid the potential safety hazard brought to the safe operation of the system by starting and operating in the fault state; the invention can automatically detect the input/output signal of the power module in the running state, and when the signal is detected to be abnormal, the invention immediately stops working and reports a corresponding fault code so as to protect the safety of the power module and a load and avoid the potential safety hazard brought to the safe running of a system by starting running in the fault state; the control method is practical, adopts a circuit with simple structure and low cost, and provides guarantee for the safe and reliable operation and the stable energy efficiency operation of the whole system, thereby improving the economic benefit.
As shown in fig. 1 and fig. 2, in an embodiment, the power module fault monitoring system of the present invention is applied to a frequency converter, and the power module fault monitoring system includes a control module 1, a driving module 2, a power module 3, an input signal sampling circuit 4, and an output signal sampling circuit 5.
Specifically, the control module 1 is connected to the driving module 2, and configured to output a pulse signal to the driving module 2 to start the driving module 2; the input signal sampling circuit 4 is connected with the driving module 2, is commonly connected to the power module 3, and is used for collecting input signals of the power module 3; the output signal sampling circuit 5 is connected with the power module 3 and is used for collecting the output signal of the power module 3; the input signal sampling circuit 4 and the output signal sampling circuit 5 are both connected to the control module 1, and are respectively configured to feed back the input signal and the output signal to the control module 1.
It should be noted that, in the standby state, the input signal and the output signal do not detect the existence of the signal under the normal condition, and if the output signal detects the existence of the signal, it indicates that there is an abnormality, at this time, the control module 1 outputs the pulse signal to the driving module 2, and determines whether the input signal acquired by the input signal sampling circuit 4 is in time sequence with the pulse signal, so as to determine whether the power module 3 has a fault; in the operating state, whether the input signal collected by the input signal sampling circuit 4 and the output signal collected by the output signal sampling circuit 5 are consistent with the pulse signal time sequence or not is respectively judged, so as to judge whether the power module 3 has a fault or not.
In one embodiment, the control module 1 employs a DSP chip (corresponding to U1 in fig. 2); the driving module 2 adopts a buffer driving chip (corresponding to U2 in FIG. 2); the power module 3 employs a three-phase power module (corresponding to U3 in fig. 2).
Preferably, the buffer driving chip adopts a chip structure of 74HC541 model.
In an embodiment, the input signal sampling circuit 4 includes a first input sampling unit 401, a second input sampling unit 402, and a third input sampling unit 403, where the first input sampling unit 401, the second input sampling unit 402, and the third input sampling unit 403 are respectively used to sample three input signals corresponding to the power module 3.
It should be noted that the circuit structure composition and the internal circuit connection relationship of the first input sampling unit 401, the second input sampling unit 402, and the third input sampling unit 403 are all the same.
As shown in fig. 2, in an embodiment, the first input sampling unit 401 includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first transistor Q1, a first diode (corresponding to the upper diode in D1 of fig. 2), and a second diode (corresponding to the lower diode in D1 of fig. 2).
It should be noted that the first diode and the second diode are packaged together, and as a whole, correspond to D1 in fig. 2.
Specifically, one end of the first capacitor C1 is connected to the first end (corresponding to WH1 in fig. 2) of the driving module 2, and is commonly connected to the first input end (corresponding to WH of U3 in fig. 2) of the power module 3, and the other end of the first capacitor C1 is respectively connected to the anode of the first diode and one end of the fourth resistor R4 (serving as a load resistor of the first capacitor C1); one end of the second capacitor C2 is connected to the second end (corresponding to WL1 in fig. 2) of the driving module 2, and is commonly connected to the second input end (corresponding to WL end of U3 in fig. 2) of the power module 3, and the other end of the second capacitor C2 is respectively connected to the anode of the second diode and one end of the fifth resistor R5; the other end of the fourth resistor R4 is connected with the other end of the fifth resistor R5, and is commonly grounded (corresponding to GND in FIG. 2); the cathode of the first diode is connected with the cathode of the second diode and is commonly connected to one end of the third resistor R3; the other end of the third resistor R3 is respectively connected with one end of the second resistor R2 (serving as a bias resistor of the base of the first triode Q1) and the base of the first triode Q1; the collector of the first transistor Q1 is respectively connected to one end of the first resistor R1 (which is a pull-up resistor of the collector of the first transistor Q1) and a first end of the control module 1 (which corresponds to the P21 end of U1 in fig. 2), and the emitter of the first transistor Q1 is connected to the other end of the second resistor R2 and is commonly grounded (which corresponds to GND in fig. 2); the other end of the first resistor R1 is connected with a first power supply of 5V.
Similarly, with reference to fig. 2, the second input sampling unit 402 includes a third capacitor C3, a fourth capacitor C4, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a second transistor Q2, a third diode (corresponding to the upper diode in D2 of fig. 2), and a fourth diode (corresponding to the lower diode in D2 of fig. 2).
Note that the third diode and the fourth diode are packaged together, and as a whole, correspond to D2 in fig. 2.
Specifically, one end of the third capacitor C3 is connected to the second end (corresponding to VH1 in fig. 2) of the driving module 2, and is commonly connected to the third input end (corresponding to VH of U3 in fig. 2) of the power module 3, and the other end of the third capacitor C3 is respectively connected to the anode of the third diode and one end of the ninth resistor R9 (serving as a load resistor of the third capacitor C3); one end of the fourth capacitor C4 is connected to the third terminal (corresponding to VL1 in fig. 2) of the driving module 2, and is commonly connected to the fourth input terminal (corresponding to VL of U3 in fig. 2) of the power module 3, and the other end of the fourth capacitor C4 is respectively connected to the anode of the fourth diode and one end of the tenth resistor R10; the other end of the ninth resistor R9 is connected with the other end of the tenth resistor R10 and is commonly grounded (corresponding to GND in FIG. 2); the cathode of the third diode is connected with the cathode of the fourth diode and is commonly connected to one end of the eighth resistor R8; the other end of the eighth resistor R8 is respectively connected with one end of the seventh resistor R7 (serving as a bias resistor of the base of the second triode Q2) and the base of the second triode Q2; the collector of the second transistor Q2 is respectively connected to one end of the sixth resistor R6 (which is a pull-up resistor of the collector of the second transistor Q2) and the second end of the control module 1 (which corresponds to the P22 end of U1 in fig. 2), and the emitter of the second transistor Q2 is connected to the other end of the seventh resistor R7, and is commonly grounded (which corresponds to GND in fig. 2); the other end of the sixth resistor R1 is connected with a first power supply of 5V.
Similarly, with reference to fig. 2, the third input sampling unit 403 includes a fifth capacitor C5, a sixth capacitor C6, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a third transistor Q3, a fifth diode (corresponding to the upper diode in D3 of fig. 2) and a sixth diode (corresponding to the lower diode in D3 of fig. 2).
It should be noted that the fifth diode and the sixth diode are packaged together, and as a whole, correspond to D3 in fig. 2.
Specifically, one end of the fifth capacitor C5 is connected to a fifth end (corresponding to the UH1 in fig. 2) of the driving module 2, and is commonly connected to a fifth input end (corresponding to the UH end of U3 in fig. 2) of the power module 3, and the other end of the fifth capacitor C5 is respectively connected to an anode of the fifth diode and one end of the fourteenth resistor R14 (serving as a load resistor of the fifth capacitor C5); one end of the sixth capacitor C6 is connected to the sixth terminal (corresponding to UL1 in fig. 2) of the driving module 2, and is commonly connected to the sixth input terminal (corresponding to UL terminal of U3 in fig. 2) of the power module 3, and the other end of the sixth capacitor C6 is respectively connected to the anode of the sixth diode and one end of the fifteenth resistor R15; the other end of the fourteenth resistor R14 is connected to the other end of the fifteenth resistor R15 and is commonly grounded (corresponding to GND in FIG. 2); the cathode of the fifth diode is connected with the cathode of the sixth diode and is commonly connected to one end of the thirteenth resistor R13; the other end of the thirteenth resistor R13 is respectively connected to one end of the twelfth resistor R12 (which is a bias resistor of the base of the third transistor Q3) and the base of the third transistor Q3; the collector of the third triode Q3 is respectively connected with one end of the eleventh resistor R11 (which is a pull-up resistor of the collector of the third triode Q3) and the third end of the control module 1 (which corresponds to the P23 end of U1 in fig. 2), the emitter of the third triode Q3 is connected with the other end of the twelfth resistor R12, and the emitters are commonly grounded (which corresponds to GND in fig. 2); the other end of the eleventh resistor R11 is connected with a first power supply of 5V.
Furthermore, because the phenomenon of simultaneous conduction of the upper bridge and the lower bridge cannot occur during the control of the power module 3, the input signal sampling circuit of the power module 3 samples the drive signals of the upper bridge and the lower bridge to share one port; specifically, as shown in fig. 2, "sharing a port" means that two signals are finally combined into 1 signal by the sampling circuit and then sent to the DSP port for detection, for example, the WH1 and the WL1 pass through C1/C2, D1, and Q1 respectively and then reach the P21 pin of the DSP chip, that is, the P21 pin is used as a shared port for detecting the WH1/WL1 input sampling signals.
As shown in fig. 2, in an embodiment, the output signal sampling circuit 5 includes a first output sampling unit 501, a second output sampling unit 502 and a third output sampling unit 503, and the first output sampling unit 501, the second output sampling unit 502 and the third output sampling unit 503 are respectively used for sampling three output signals corresponding to the power module 3.
It should be noted that the circuit structure composition and the internal circuit connection relationship of the first output sampling unit 501, the second output sampling unit 502, and the third output sampling unit 503 are the same, and the first output sampling unit 501 is further connected to the second output sampling unit 502 and the third output sampling unit 503 respectively, and the second output sampling unit 502 is connected to the third output sampling unit 503.
As shown in fig. 2, in an embodiment, the first output sampling unit 501 includes a sixteenth resistor R16, a nineteenth resistor R19, a first rectifier bridge DN1 and a first optical coupler PC 1.
Specifically, one end of the nineteenth resistor R19 is connected to the first output end (corresponding to the U end in fig. 2) of the power module 3, and the other end of the nineteenth resistor R19 is connected to the first end (R) of the first rectifier bridge DN1 and the second output sampling unit 502, respectively; a second end of the first rectifier bridge DN1 is connected with a first end (corresponding to the end 1 of the PC1 in fig. 2) of the first optical coupler PC1, a third end of the first rectifier bridge DN1 is connected with the third output sampling unit 503, and a fourth end of the first rectifier bridge DN1 is connected with a second end (corresponding to the end 2 of the PC1 in fig. 2) of the first optical coupler PC 1; a fourth end (corresponding to the 4 end of the PC1 in fig. 2) of the first optocoupler PC1 is connected with one end of the sixteenth resistor R16 and a fourth end (corresponding to the P11 end of the U1 in fig. 2) of the control module 1, respectively; the other end of the sixteenth resistor R16 is connected to a fourth power supply of 5V.
Similarly, referring to fig. 2, the second output sampling unit 502 includes a seventeenth resistor R17, a twentieth resistor R20, a second rectifier bridge DN2 and a second optical coupler PC 2.
Specifically, one end of the twentieth resistor R20 is connected to the second output terminal (corresponding to the V terminal in fig. 2) of the power module 3, and the other end of the twentieth resistor R20 is connected to the first end (R) of the second rectifier bridge DN2 and the third output sampling unit 503 respectively; a second end of the second rectifier bridge DN2 is connected with a first end (corresponding to the end 1 of PC2 in fig. 2) of the second optical coupler PC2, a third end of the second rectifier bridge DN2 is connected with the other end of a nineteenth resistor R19 in the first output sampling unit 501, and a fourth end of the second rectifier bridge DN2 is connected with a second end (corresponding to the end 2 of PC2 in fig. 2) of the second optical coupler PC 2; a fourth end (corresponding to the end 4 of PC1 in fig. 2) of the second optocoupler PC2 is connected to one end of the seventeenth resistor R17 and a fifth end (corresponding to the end P12 of U1 in fig. 2) of the control module 1, respectively; the other end of the seventeenth resistor R17 is connected with a fourth power supply of 5V.
Similarly, referring to fig. 2, the third output sampling unit 503 includes an eighteenth resistor R16, a twenty-first resistor R21, a third rectifier bridge DN3 and a third optocoupler PC 3.
Specifically, one end of the twenty-first resistor R21 is connected to a third output end (corresponding to the W end in fig. 2) of the power module 3, and the other end of the twenty-first resistor R21 is connected to the first end of the third rectifier bridge DN3 and the third end of the first rectifier bridge DN1 in the first output sampling unit 501, respectively; a second end (corresponding to the end 1 of the PC3 in fig. 2) of the third rectifier bridge DN3 is connected with a first end (corresponding to the end 2 of the PC3 in fig. 2) of the third optocoupler PC3, a third end (corresponding to the end 1 of the PC3 in fig. 2) of the third rectifier bridge DN3 is connected with the other end of the twentieth resistor R20 in the second output sampling unit 502, and a fourth end (corresponding to the end 2 of the PC3 in fig. 2) of the third rectifier bridge DN3 is connected with a second end (corresponding to the end 2 of the PC3 in fig. 2) of the third optocoupler PC 3; a fourth end (corresponding to the end 4 of PC3 in fig. 2) of the third optocoupler PC3 is connected to one end of the eighteenth resistor R18 and a sixth end (corresponding to the end P13 of U1 in fig. 2) of the control module 1, respectively; the other end of the eighteenth resistor R18 is connected with a fourth power supply of 5V.
As shown in fig. 3, a timing chart of a pulse signal (PWM signal) output by the control module (DSP) and an input/output sampling signal of the power module in an operation state is shown; UH is a U-phase upper bridge driving signal of the power module; UL is a U-phase lower bridge driving signal of the power module; VH is a V-phase upper bridge driving signal of the power module; VL is a V-phase lower bridge driving signal of the power module; WH is a W-phase upper bridge driving signal of the power module; WL is a power module W-phase lower bridge driving signal; p21 is the power module WH/WL input signal; p22 is the power module VH/VL input signal; p23 is the power module UH/UL input signal; p11 is the U/W output signal of the power module; p12 is the power module V/U output signal; p13 is the power module W/V output signal.
As shown in fig. 4, in an embodiment, the power module includes a first switching device VT1, a second switching device VT2, a third switching device VT3, a fourth switching device VT4, a fifth switching device VT5, and a sixth switching device VT 6.
It should be noted that the first switching device VT1, the second switching device VT2, the third switching device VT3, the fourth switching device VT4, the fifth switching device VT5, and the sixth switching device VT6 form an inverter circuit, and are integrated on the power module 3 (corresponding to U3 in fig. 2).
Specifically, a first end (i) of the first switching device VT1 is connected to a second end (ii) of the fourth switching device VT4, and is commonly connected to a first end (corresponding to the U end of U3 in fig. 2) of the output signal sampling circuit 5, a third end (iii) of the first switching device VT1 is connected to a fifth end (corresponding to the UH1 end of U2 in fig. 2) of the driving module 2, and a third end (iii) of the fourth switching device VT4 is connected to a sixth end (corresponding to the UL1 end of U2 in fig. 2) of the driving module 2; a second end of the second switching device VT2 is connected to a first end of the fifth switching device VT5, and is commonly connected to a second end (corresponding to the W end of U3 in fig. 2) of the output signal sampling circuit 5, a third end of the second switching device VT2 is connected to a second end (corresponding to the WL1 end of U2 in fig. 2) of the driving module 2, and a third end of the fifth switching device VT5 is connected to a first end (corresponding to the WH1 end of U2 in fig. 2) of the driving module 2; a first end (i) of the third switching device VT3 is connected to a second end (ii) of the sixth switching device VT6, and is commonly connected to a third end (V end corresponding to U3 in fig. 2) of the output signal sampling circuit 5, a third end (iii) of the third switching device VT3 is connected to a third end (VH 1 end corresponding to U2 in fig. 2) of the driving module 2, and a third end (iii) of the sixth switching device VT6 is connected to a fourth end (VL 1 end corresponding to U2 in fig. 2) of the driving module 2; a second end of the first switching device VT1 is respectively connected to a second end of the third switching device VT3 and a second end of the fifth switching device VT5, and is commonly connected to a positive electrode of a bus voltage (corresponding to the DCP in fig. 4); a first end (r) of the fourth switching device VT4 is connected to a first end (r) of the sixth switching device VT6 and a first end (r) of the second switching device, respectively, and is commonly connected to a negative electrode of the bus voltage (corresponding to DCN in fig. 4).
Preferably, the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device and the sixth switching device all adopt Insulated Gate Bipolar Transistors (IGBTs).
It should be noted that, in fig. 4, a diode is connected in parallel between the first terminal and the second terminal of each of the first switching device VT1, the second switching device VT2, the third switching device VT3, the fourth switching device VT4, the fifth switching device VT5 and the sixth switching device VT6, in fact, the diode is not a truly parallel diode, but refers to a diode structure inside the first switching device VT1, the second switching device VT2, the third switching device VT3, the fourth switching device VT4, the fifth switching device VT5 and the sixth switching device VT6, and the purpose shown here is to indicate the direction of current flowing in the first switching device VT1, the second switching device VT2, the third switching device VT3, the fourth switching device VT4, the fifth switching device VT5 and the sixth switching device 6.
In an embodiment, in an operating state, the first switching device VT1, the second switching device VT2, the third switching device VT3, the fourth switching device VT4, the fifth switching device VT5, and the sixth switching device VT6 sequentially commutate once at an interval of 60 °, and a turn-on sequence of each cycle is: the first switching device VT1, the second switching device VT2 and the third switching device VT3 are turned on → the second switching device VT2, the third switching device VT3 and the fourth switching device VT4 are turned on → the third switching device VT3, the fourth switching device VT4 and the fifth switching device VT5 are turned on → the fourth switching device VT4, the fifth switching device VT5 and the sixth switching device VT6 are turned on → the fifth switching device VT5, the sixth switching device VT6 and the first switching device VT1 are turned on → the sixth switching device VT6, the first switching device VT1 and the second switching device VT2 are turned on.
It should be noted that, in combination with the above, it can be seen that the 6 switching devices all work in a complementary state, for example, the upper tube VT1 of the U-phase bridge arm is turned on, and the lower tube VT4 must be turned off; with reference to fig. 2, fig. 3, and fig. 4, it is assumed that the output signal UH/WL/VH of the DSP chip U1 is all high level, after passing through the buffer driving chip U2, the output of UH1/WL1/VH1 is high level, one path of the output signal is coupled to the base triode of Q3/Q2/Q1 through the capacitor C5/C3/C2 to be turned on, and the DSP chip P23/P22/P21 is turned from high level to low level; the other path is sent to a corresponding pin of a power module U3, VT1VT2VT3 in the power module U3 is conducted, UW/VW output voltage (DCP-DCN) is reduced through a resistor R19/R20/R21 and rectified through DN1/DN3, an optical coupler PC1/PC3 is conducted, and a P11/P13 signal is converted from high level to low level.
It should be noted that the working principle of the power module fault monitoring system is as follows:
with reference to fig. 2, when the frequency converter is powered on and standby, the 6-channel PWM driving signal of the DSP chip U1 keeps low level, the output signal of the buffer driving chip U2 also keeps low level, the voltage at both ends of the coupling capacitor of the input signal sampling circuit of the power module U3 does not change, the base of the first triode Q1 keeps low level and is not conducted, the P21 is high level, and similarly, the P22/P23 also keeps high level; meanwhile, 6-path IGBTs in the power module U3 also keep a cut-off state, the U/V/W output voltage is 0, the first optical coupler PC1 cannot be conducted, the output of the fourth end of the first optical coupler PC1 is at a high level, namely P11 is at a high level, and similarly, P22/P23 also keeps at a high level; when the output sampling feedback signal P11/P12/P13 is monitored to be abnormal during standby, the phenomenon that the IGBT in the power module U3 is abnormally conducted is indicated, and in order to further judge whether the problem of the input signal of the power module U3 or the problem caused by the internal damage of the power module U3, the path which is monitored to be abnormal in the output sampling feedback signal needs to be verified; specifically, the DSP chip U1 outputs a pulse signal only to the upper bridge arm IGBT of the path of the abnormal signal, and monitors whether the input signal sampled by the corresponding input sampling circuit is consistent with the DSP output pulse signal timing sequence, and if not, it is a failure of the front end of the power module U3 (the buffer driving chip U2 and/or the port of the DSP chip U1 itself), or both the front end and the power module U3 are failed; if consistent, it is an internal failure of power module U3.
When the frequency converter operates, when the DSP chip U1 monitors that an input signal sampled by the power module U3 is inconsistent with a preset logic signal (pulse signal) output by the DSP chip U1, the DSP chip U1 determines that the front end (buffer driving chip U2 fault and/or DSP chip U1 pin) of the power module U3 is faulty, or both the front end and the power module U3 are faulty; when the DSP chip U1 monitors that the input signal sampled by the power module U3 is consistent with the preset logic signal output by the DSP chip U1, and the output signal sampled by the power module U3 is inconsistent with the preset logic signal output by the DSP chip U1, the DSP chip U1 determines that the power module U3 is faulty.
As shown in fig. 5, in an embodiment, the frequency converter of the present invention includes the power module fault monitoring system 51 and the variable frequency motor 52.
Specifically, the inverter motor 52 is connected to the power module fault monitoring system 51.
It should be noted that, the working principle of the frequency converter refers to the above discussion of the power module fault monitoring system, and is not described in detail herein.
As shown in fig. 6, in an embodiment, the power module fault monitoring method implemented by the power module fault monitoring system of the present invention is applied to a frequency converter; specifically, when operating in a standby state, the power module fault monitoring method comprises the following steps:
And step S11, sampling the output signal of the power module.
If the output signal detects a signal, step S12 is executed.
And step S12, the control module outputs a pulse signal to the driving module and judges whether the input signal is consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
In one embodiment, determining whether the input signal is consistent with the timing sequence of the pulse signal to determine whether the power module fails includes:
(121) and if the input signal is consistent with the pulse signal in time sequence, the power module is considered to be in fault.
(122) And if the input signal is inconsistent with the pulse signal time sequence, judging that the front end of the power module fails or the front end and the power module both fail.
It should be noted that the front end includes the control module and the driving module.
As shown in fig. 7, in an embodiment, when operating in the operating state, the power module fault monitoring method includes the following steps:
and step S21, sampling the input signal of the power module and the output signal of the power module respectively.
And step S22, respectively judging whether the sampled input signal and the sampled output signal are consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
In an embodiment, the determining whether the sampled input signal and the sampled output signal are consistent with the pulse signal timing sequence to determine whether the power module has a fault includes the following steps:
(221) and if the input signal is consistent with the pulse signal time sequence, and the output signal is inconsistent with the pulse signal time sequence, determining that the power module is in fault.
(222) And if the input signal is inconsistent with the pulse signal time sequence, judging that the front end of the power module fails or the front end and the power module both fail.
The steps S11 and S12 are steps corresponding to the power module failure monitoring method in the standby state; step S21 and step S22 are steps of a power module failure monitoring method in the corresponding operating state; the steps in the two different states are executed independently, and in practical application, the power module fault monitoring method in one state is selected to be executed in an alternative mode.
It should be noted that the working principle of the power module fault monitoring method is the same as that of the power module fault monitoring system, and is not described herein again.
It should be noted that the protection scope of the power module fault monitoring method according to the present invention is not limited to the execution sequence of the steps listed in this embodiment, and all the solutions implemented by adding, subtracting, and replacing steps in the prior art according to the principle of the present invention are included in the protection scope of the present invention.
It should be noted that the power module fault monitoring system of the present invention can implement the power module fault monitoring method of the present invention, but the implementation apparatus of the power module fault monitoring method of the present invention includes, but is not limited to, the structure of the power module fault monitoring system described in this embodiment, and all the structural modifications and substitutions of the prior art made according to the principle of the present invention are included in the protection scope of the present invention.
In summary, compared with the prior art, the system, the method and the frequency converter for monitoring the power module fault judge whether the power module has the fault by monitoring the input/output signal of the power module, and accurately judge the fault part so as to improve the maintenance efficiency; the invention can automatically detect the input/output signal of the power module in a standby state, and when the signal is detected to be abnormal, the corresponding fault code is reported and the power module is not allowed to start to work so as to protect the safety of the power module and the load and avoid the potential safety hazard brought to the safe operation of the system by starting and operating in the fault state; the invention can automatically detect the input/output signal of the power module in the running state, and when the abnormal signal is detected, the invention immediately stops working and reports the corresponding fault code to protect the safety of the power module and the load and avoid the potential safety hazard brought to the safe running of the system by starting running in the fault state; the control method is practical, the adopted circuit structure is simple, the cost is low, and the safe and reliable operation and the energy efficiency stable operation of the whole machine system are guaranteed, so that the economic benefit is improved; therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (9)
1. A power module fault monitoring system, comprising: the device comprises a control module, a driving module, a power module, an input signal sampling circuit and an output signal sampling circuit;
the control module is connected with the driving module and used for outputting a pulse signal to the driving module so as to start the driving module;
the input signal sampling circuit is connected with the driving module, is commonly connected with the power module and is used for collecting input signals of the power module;
the output signal sampling circuit is connected with the power module and is used for collecting the output signal of the power module;
the input signal sampling circuit and the output signal sampling circuit are both connected with the control module and are respectively used for feeding back the input signal and the output signal to the control module; the input signal sampling circuit includes: the device comprises a first input sampling unit, a second input sampling unit and a third input sampling unit; the circuit structure composition and the internal circuit connection relationship of the first input sampling unit, the second input sampling unit and the third input sampling unit are the same; wherein the content of the first and second substances,
The first input sampling unit includes: the circuit comprises a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first triode, a first diode and a second diode;
one end of the first capacitor is connected with the first end of the driving module and is commonly connected to the first input end of the power module, and the other end of the first capacitor is respectively connected with the anode of the first diode and one end of the fourth resistor;
one end of the second capacitor is connected with the second end of the driving module and is commonly connected to the second input end of the power module, and the other end of the second capacitor is respectively connected with the anode of the second diode and one end of the fifth resistor;
the other end of the fourth resistor is connected with the other end of the fifth resistor, and the fourth resistor and the fifth resistor are grounded together;
the cathode of the first diode is connected with the cathode of the second diode and is commonly connected to one end of the third resistor;
the other end of the third resistor is respectively connected with one end of the second resistor and the base electrode of the first triode;
a collector of the first triode is respectively connected with one end of the first resistor and the first end of the control module, and an emitter of the first triode is connected with the other end of the second resistor and is commonly grounded;
The other end of the first resistor is connected with a first power supply;
in a standby state, if the output signal detects a signal, the control module outputs the pulse signal to the driving module and judges whether the input signal is consistent with the pulse signal in time sequence so as to judge whether the power module has a fault;
and under the running state, respectively judging whether the input signal and the output signal are consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
2. The power module fault monitoring system of claim 1, wherein the output signal sampling circuit comprises: the first output sampling unit, the second output sampling unit and the third output sampling unit; the first output sampling unit, the second output sampling unit and the third output sampling unit have the same circuit structure composition and the same internal circuit connection relationship, the first output sampling unit is also respectively connected with the second output sampling unit and the third output sampling unit, and the second output sampling unit is connected with the third output sampling unit; wherein the content of the first and second substances,
The first output sampling unit includes: the device comprises a sixteenth resistor, a nineteenth resistor, a first rectifier bridge and a first optocoupler;
one end of the nineteenth resistor is connected with the first output end of the power module, and the other end of the nineteenth resistor is respectively connected with the first end of the first rectifier bridge and the second output sampling unit;
the second end of the first rectifier bridge is connected with the first end of the first optical coupler, the third end of the first rectifier bridge is connected with the third output sampling unit, and the fourth end of the first rectifier bridge is connected with the second end of the first optical coupler;
a fourth end of the first optocoupler is connected with one end of the sixteenth resistor and a fourth end of the control module respectively;
the other end of the sixteenth resistor is connected with a fourth power supply.
3. The power module fault monitoring system of claim 1, wherein the power module comprises: a first switching device, a second switching device, a third switching device, a fourth switching device, a fifth switching device, and a sixth switching device;
a first end of the first switching device is connected with a second end of the fourth switching device and is commonly connected to a first end of the output signal sampling circuit, a third end of the first switching device is connected with a fifth end of the driving module, and a third end of the fourth switching device is connected with a sixth end of the driving module;
A second end of the second switching device is connected with a first end of the fifth switching device and is commonly connected to a second end of the output signal sampling circuit, a third end of the second switching device is connected with a second end of the driving module, and a third end of the fifth switching device is connected with a first end of the driving module;
the first end of the third switching device is connected with the second end of the sixth switching device and is commonly connected to the third end of the output signal sampling circuit, the third end of the third switching device is connected with the third end of the driving module, and the third end of the sixth switching device is connected with the fourth end of the driving module;
the second end of the first switching device is respectively connected with the second end of the third switching device and the second end of the fifth switching device, and the second ends of the first switching device and the fifth switching device are commonly connected to the anode of the bus voltage;
and the first end of the fourth switching device is respectively connected with the first end of the sixth switching device and the first end of the second switching device and is commonly connected to the cathode of the bus voltage.
4. The power module fault monitoring system of claim 3, wherein in an operating state, the first switching device, the second switching device, the third switching device, the fourth switching device, the fifth switching device, and the sixth switching device are sequentially commutated once at 60 ° intervals, and a conduction sequence of each cycle is: the first, second, and third switching devices are turned on → the second, third, and fourth switching devices are turned on → the third, fourth, and fifth switching devices are turned on → the fourth, fifth, and sixth switching devices are turned on → the fifth, sixth, and first switching devices are turned on → the sixth, first, and second switching devices are turned on.
5. The power module fault monitoring system of claim 1, wherein the control module employs a DSP chip; the driving module adopts a buffer driving chip.
6. A frequency converter, comprising: the power module fault monitoring system and inverter motor of any of claims 1-5;
and the variable frequency motor is connected with the power module fault monitoring system.
7. A power module fault monitoring method implemented with the power module fault monitoring system of any one of claims 1 to 5, comprising the steps of:
sampling an output signal of the power module in a standby state;
if the output signal detects a signal, the control module outputs a pulse signal to the driving module and judges whether the input signal is consistent with the pulse signal in time sequence so as to judge whether the power module has a fault;
in the operating state, sampling an input signal of the power module and an output signal of the power module respectively;
and respectively judging whether the sampled input signal and the sampled output signal are consistent with the pulse signal time sequence so as to judge whether the power module has a fault.
8. The power module fault monitoring method of claim 7, wherein determining whether the input signal is in time sequence with the pulse signal to determine whether the power module is faulty comprises:
if the input signal is consistent with the pulse signal in time sequence, the power module is considered to be in fault;
if the input signal is inconsistent with the pulse signal time sequence, the front end of the power module is considered to be in fault or the front end and the power module are considered to be in fault; wherein the front end comprises: the control module and the drive module.
9. The power module fault monitoring method of claim 7, wherein separately determining whether the sampled input signal and output signal are in time sequence with the pulse signal to determine whether the power module is faulty comprises:
if the input signal is consistent with the pulse signal time sequence, and the output signal is inconsistent with the pulse signal time sequence, the power module is considered to be in fault;
and if the input signal is inconsistent with the pulse signal time sequence, judging that the front end of the power module fails or the front end and the power module both fail.
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