CN112637590A

CN112637590A - Video encoder, video decoder and corresponding methods

Info

Publication number: CN112637590A
Application number: CN202010809881.7A
Authority: CN
Inventors: 赵寅; 杨海涛
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-09-24
Filing date: 2020-08-12
Publication date: 2021-04-09

Abstract

The application discloses a video image decoding method, which comprises the following steps: determining a current chroma pixel (coordinate C (0,0)) to be restored of the current image block; determining four adjacent chroma pixels of the chroma pixel to be restored, namely a left chroma pixel, a right chroma pixel, an upper chroma pixel and a lower chroma pixel (coordinates are C (-1,0), C (1,0), C (0, -1) and C (0,1) respectively)); correcting the value of the current chrominance pixel at least according to the value of at least one luminance pixel corresponding to the current chrominance pixel and four adjacent chrominance pixels and a preset filter; reconstructing the current image block based on the modified values of the current chroma pixels. The decoding efficiency can be improved by implementing the method and the device.

Description

Video encoder, video decoder and corresponding methods

Technical Field

The disclosed embodiments relate generally to the field of video encoding, and more particularly, to video encoders, video decoders, and corresponding methods.

Background

Video encoding (video encoding and decoding) is widely used in digital video applications such as broadcast digital television, video dissemination over the internet and mobile networks, real-time session applications such as video chat and video conferencing, DVD and blu-ray discs, video content capture and editing systems, and security applications for camcorders.

With the development of the hybrid block-based video coding scheme in the h.261 standard in 1990, new video coding techniques and tools have been developed and form the basis for new video coding standards. Other Video Coding standards include MPEG-1 Video, MPEG-2 Video, ITU-T H.262/MPEG-2, ITU-T H.263, ITU-T H.264/MPEG-4 part 10 Advanced Video Coding (AVC), ITU-T H.265/High Efficiency Video Coding (HEVC) …, and extensions to such standards, such as scalability and/or 3D (three-dimensional) extensions. As video creation and usage becomes more widespread, video traffic becomes the largest burden on communication networks and data storage. One of the goals of most video coding standards is therefore to reduce the bit rate without sacrificing picture quality compared to previous standards. Even though the latest High Efficiency Video Coding (HEVC) can compress video about twice as much as AVC without sacrificing picture quality, there is still a need for a new technology to further compress video relative to HEVC.

Disclosure of Invention

The embodiment of the invention discloses a video encoder, a video decoder and a corresponding method, which can improve the decoding efficiency.

A first aspect discloses a video image decoding method, including: determining a current chroma pixel (coordinate C (0,0)) to be restored of the current image block; determining four adjacent chroma pixels of the chroma pixel to be restored, namely a left chroma pixel, a right chroma pixel, an upper chroma pixel and a lower chroma pixel (coordinates are C (-1,0), C (1,0), C (0, -1) and C (0,1) respectively)); correcting the value of the current chrominance pixel at least according to the value of at least one luminance pixel corresponding to the current chrominance pixel and four adjacent chrominance pixels and a preset filter; reconstructing the current image block based on the modified values of the current chroma pixels.

With reference to the first aspect, in an implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four adjacent chroma pixels and a preset filter includes: and correcting the value of the current chroma pixel according to the product of the values of the two luma pixels corresponding to the current chroma pixel and the first coefficient of the filter, the product of the values of the two luma pixels corresponding to the left adjacent chroma pixel and the second coefficient of the filter, the product of the values of the two luma pixels corresponding to the right adjacent chroma pixel and the third coefficient of the filter, the product of the values of the two luma pixels corresponding to the upper adjacent chroma pixel and the fourth coefficient of the filter, and the product of the values of the two luma pixels corresponding to the lower adjacent chroma pixel and the fifth coefficient of the filter.

With reference to the first aspect or any one of the foregoing implementation manners of the first aspect, in another implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter includes: correcting the value of the current chrominance pixel according to the following mathematical formula:

D＝((L(Xl0，Yl0)+L(Xl0，Yl0+Sz))*Coeff(0)+(L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(1)+(L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(2)+(L(Xl3，Yl3)+L(Xl3，Yl3+Sz))*Coeff(3)+(L(Xl4，Yl4)+L(Xl4，Yl4+Sz))*Coeff(4)+offset)＞＞shift

d denotes a correction value of the current chrominance pixel, Coeff (0) to Coeff (4) denote first to fifth coefficients of the filter, respectively, L (Xl0, Yl0) and L (Xl0, Yl0+ Sz) denote values of two luminance pixels corresponding to the current chrominance pixel, L (Xl1, Yl1) and L (Xl1, Yl1+ Sz) denote values of two luminance pixels corresponding to the left chrominance pixel, L (Xl2, Yl2) and L (Xl2, Yl2+ Sz) denote values of two luminance pixels corresponding to the right chrominance pixel, L (Xl3, Yl3) and L (Xl3, Yl3+ Sz) denote values of two luminance pixels corresponding to the upper chrominance pixel, and L (Xl4, Yl4) and L4 denote values of two luminance pixels corresponding to the lower chrominance pixels 4, Xl 4+ Sz).

With reference to the first aspect or any one of the foregoing implementation manners of the first aspect, in another implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of an upper-side luma pixel corresponding to the current chroma pixel and a first coefficient of the filter, the product of the value of a lower-side luma pixel corresponding to the current chroma pixel and a second coefficient of the filter, the product of the values of two luma pixels corresponding to the left-side adjacent chroma pixel and a third coefficient of the filter, the product of the values of two luma pixels corresponding to the right-side adjacent chroma pixel and a fourth coefficient of the filter, the product of the values of two luma pixels corresponding to the upper-side adjacent chroma pixel and a fifth coefficient of the filter, and the product of the values of two luma pixels corresponding to the lower-side adjacent chroma pixel and a sixth coefficient of the filter.

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+((L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(2)+((L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(3)+((L(Xl3，Yl3)+L(Xl3，Yl3+Sz))*Coeff(4)+((L(Xl4，Yl4)+L(Xl4，Yl4+Sz))*Coeff(5)+offset)＞＞shift

d denotes a correction value of the current chrominance pixel, Coeff (0) to Coeff (5) denote first to sixth coefficients of the filter, respectively, L (Xl0, Yl0) and L (Xl0, Yl0+ Sz) denote values of two luminance pixels corresponding to the current chrominance pixel, L (Xl1, Yl1) and L (Xl1, Yl1+ Sz) denote values of two luminance pixels corresponding to the left chrominance pixel, L (Xl2, Yl2) and L (Xl2, Yl2+ Sz) denote values of two luminance pixels corresponding to the right chrominance pixel, L (Xl3, Yl3) and L (Xl3, Yl3+ Sz) denote values of two luminance pixels corresponding to the upper chrominance pixel, and L (Xl4, Yl4) and L4 denote values of two luminance pixels corresponding to the lower chrominance pixels 4, Xl 4+ Sz).

With reference to the first aspect or any one of the foregoing implementation manners of the first aspect, in another implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the left-side adjacent chroma pixel and the third coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the right-side adjacent chroma pixel and the fourth coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the upper-side adjacent chroma pixel and the fifth coefficient of the filter, and the product of the value of the lower-side brightness pixel corresponding to the lower-side adjacent chroma pixel and the sixth coefficient of the filter.

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+L(Xl1，Yl1)*Coeff(2)+L(Xl2，Yl2+Sz)*Coetf(3)+L(Xl3，Yl3)*Coeff(4)+L(Xl4，Yl4+Sz)*Coeff(5)+offset)＞＞shift

d denotes a correction value of the current chroma pixel, Coeff (0) to Coeff (5) denote first to sixth coefficients of the filter, respectively, L (Xl0, Yl0) and L (Xl0, Yl0+ Sz) denote values of two luminance pixels corresponding to the current chroma pixel, L (Xl1, Yl1) denotes a value of an upper luminance pixel corresponding to the left chroma pixel, L (Xl2, Yl2+ Sz) denotes a value of a lower luminance pixel corresponding to the right chroma pixel, L (Xl3, Yl3) denotes a value of an upper luminance pixel corresponding to the upper chroma pixel, and L (Xl4, Yl4+ Sz) denotes a value of a lower luminance pixel corresponding to the lower chroma pixel.

With reference to the first aspect or any one of the foregoing implementation manners of the first aspect, in another implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter includes: according to the product of the values of the two luminance pixels corresponding to the current chrominance pixel and the first coefficient of the filter, the product of the values of the two luminance pixels corresponding to the left adjacent chrominance pixel and the second coefficient of the filter, the product of the values of the two luminance pixels corresponding to the right adjacent chrominance pixel and the third coefficient of the filter, the product of the values of the two luminance pixels corresponding to the upper adjacent chrominance pixel and the fourth coefficient of the filter, the product of the values of the two luminance pixels corresponding to the lower adjacent chrominance pixel and the fifth coefficient of the filter, the product of the values of the upper luminance pixel corresponding to the left adjacent chrominance pixel, the value of the lower luminance pixel corresponding to the left adjacent chrominance pixel, the value of the upper luminance pixel corresponding to the right adjacent chrominance pixel and the value of the right adjacent chrominance pixel And correcting the value of the current chroma pixel by multiplying the value of the lower-side luma pixel corresponding to the chroma pixel by a seventh coefficient of the filter, and multiplying the value of the right-side luma pixel of the upper-side luma pixel corresponding to the left-side adjacent chroma pixel, the value of the right-side luma pixel of the lower-side luma pixel corresponding to the left-side adjacent chroma pixel, the value of the left-side luma pixel of the upper-side luma pixel corresponding to the right-side adjacent chroma pixel and the value of the left-side luma pixel of the lower-side luma pixel corresponding to the right-side adjacent chroma pixel by a sixth coefficient of the filter.

D＝((L(Xl0，Yl0)+L(Xl0，Yl0+Sz))*Coeff(0)+((L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(1)+((L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(2)+((L(Xl3，Yl3)+L(Xl3，Yl3+Sz))*Coeff(3)+((L(Xl4，Yl4)+L(Xl4，Yl4+Sz))*Coeff(4)+((L(Xl0-1，Yl0)+L(Xl0+1，Yl0))*Coeff(5)+((L(Xl0-1，Yl0+Sz)+L(Xl0+1，Yl0+Sz))*Coeff(5)+((L(Xl0-2，Yl0-Sz)+L(Xl0+2，Yl0-Sz))*Coeff(6)+(L(Xl0-2，Yl0+Sz*2)+L(Xl0+2，Yl0+Sz*2))*Coeff(6)+offset)＞＞shift

d denotes a correction value of the current chroma pixel, Coeff (0) to Coeff (6) denote first to seventh coefficients of the filter, L (Xl0, Yl0) and L (Xl0, Yl0+ Sz) denote values of two luminance pixels corresponding to the current chroma pixel, L (Xl1, Yl1) and L (Xl1, Yl1+ Sz) denote values of two luminance pixels corresponding to the left chroma pixel, L (Xl2, Yl2) and L (Xl2, Yl2+ Sz) denote values of two luminance pixels corresponding to the right chroma pixel, L (Xl3, Yl3) and L (Xl3, Yl3+ Sz) denote values of two luminance pixels corresponding to the upper chroma pixel, L (Xl4, Yl4) and L56, L8653 + Xl 861, and L8653-867, respectively, and L867-Xl 863, and Xl0+ Sz 865, yl0+ Sz) and L (Xl0+1, Yl0+ Sz) respectively represent a value of a right luminance pixel of an upper luminance pixel corresponding to the left adjacent chrominance pixel, a value of a right luminance pixel of a lower luminance pixel corresponding to the left adjacent chrominance pixel, a value of a left luminance pixel of an upper luminance pixel corresponding to the right adjacent chrominance pixel, and a value of a left luminance pixel of a lower luminance pixel corresponding to the right adjacent chrominance pixel; l (Xl0-2, Yl0-Sz), L (Xl0+2, Yl0-Sz), L (Xl0-2, Yl0+ Sz x 2) and L (Xl0+2, Yl0+ Sz 2) respectively represent the value of the upper luminance pixel corresponding to the left adjacent chroma pixel, the value of the lower luminance pixel corresponding to the left adjacent chroma pixel, the value of the upper luminance pixel corresponding to the right adjacent chroma pixel, and the value of the lower luminance pixel corresponding to the right adjacent chroma pixel.

With reference to the first aspect or any one of the foregoing implementation manners of the first aspect, in another implementation manner of the first aspect, the modifying the value of the current chroma pixel according to the value of at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the values of the two brightness pixels corresponding to the left-side adjacent chroma pixel and the third coefficient of the filter, the product of the values of the two brightness pixels corresponding to the right-side adjacent chroma pixel and the fourth coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the upper-side adjacent chroma pixel and the fifth coefficient of the filter, and the product of the value of the lower-side brightness pixel corresponding to the lower-side adjacent chroma pixel and the sixth coefficient of the filter.

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+((L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(2)+((L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(3)+(L(Xl3，Yl3)*Coeff(4)+L(Xl4，Yl4+Sz)*Coeff(5)+offset)＞＞shift。

a second aspect discloses a video image decoding method, the method comprising: determining a current chroma pixel (coordinate C (0,0)) to be restored of the current image block; correcting the value of the current chrominance pixel according to the value of an upper luminance pixel, the value of a lower luminance pixel, the value of a left luminance pixel of the upper luminance pixel, the value of an upper luminance pixel of the upper luminance pixel, the value of a lower luminance pixel of the lower luminance pixel, the value of a right luminance pixel of the lower luminance pixel and a preset filter, wherein the upper luminance pixel corresponds to the current chrominance pixel; reconstructing the current image block based on the modified values of the current chroma pixels.

With reference to the second aspect, in an implementation manner of the second aspect, the modifying the value of the current chroma pixel according to the value of the upper luma pixel corresponding to the current chroma pixel, the value of the lower luma pixel, the value of the left luma pixel of the upper luma pixel, the value of the upper luma pixel, the value of the lower luma pixel, and the value of the right luma pixel of the lower luma pixel, and a preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the left-side brightness pixel of the upper-side brightness pixel and the third coefficient of the filter, the product of the value of the upper-side brightness pixel and the fifth coefficient of the filter, the product of the value of the lower-side brightness pixel and the sixth coefficient of the filter, and the product of the value of the right-side brightness pixel of the lower-side brightness pixel and the fourth coefficient of the filter.

With reference to the second aspect or any one of the foregoing embodiments of the second aspect, in another implementation of the second aspect, the modifying the value of the current chroma pixel according to the value of the upper luma pixel, the value of the lower luma pixel, the value of the left luma pixel of the upper luma pixel, the value of the upper luma pixel, the value of the lower luma pixel, the value of the right luma pixel of the lower luma pixel, and a preset filter includes: correcting the value of the current chrominance pixel according to the following mathematical formula:

D＝(L(X0，Y0)*Coeff(0)+L(X1，Y1)*Coeff(1)+L(X0-1，Y0)*Coeff(2)+L(X1+1，Y1)*Coeff(3)+(L(X0，Y0-1)*Coeff(4)+L(X1，Y1+1)*Coeff(5)+offset)＞＞shift

wherein X0 ═ X1 ═ Xc0 ═ Sx, Y0 ═ Yc0 ═ Sy, and Y1 ═ Y0+ 1.

A third aspect provides a video image decoding method, the method comprising: determining a current chroma pixel (coordinate C (0,0)) to be restored of the current image block; determining an offset value to be used; determining 4 luminance pixels which need to be used for correcting the value of the current chrominance pixel according to the offset value; correcting the value of the current chrominance pixel according to the value of the upper luminance pixel and the value of the lower luminance pixel corresponding to the current chrominance pixel, the values of the 4 luminance pixels and a preset filter; reconstructing the current image block based on the modified values of the current chroma pixels.

With reference to the third aspect, in an embodiment of the third aspect, the offset value is 1; the 4 luminance pixels include: a left luminance pixel of the upper luminance pixels, an upper luminance pixel of the upper luminance pixels, a lower luminance pixel of the lower luminance pixels, and a right luminance pixel of the lower luminance pixels.

With reference to the third aspect or any one of the foregoing embodiments of the third aspect, in another implementation of the third aspect, the modifying the value of the current chroma pixel according to the value of the upper luma pixel and the value of the lower luma pixel corresponding to the current chroma pixel, and the values of the 4 luma pixels, and the preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the left-side brightness pixel of the upper-side brightness pixel and the third coefficient of the filter, the product of the value of the upper-side brightness pixel and the fifth coefficient of the filter, the product of the value of the lower-side brightness pixel and the sixth coefficient of the filter, and the product of the value of the right-side brightness pixel of the lower-side brightness pixel and the fourth coefficient of the filter.

With reference to the third aspect or any one of the preceding embodiments of the third aspect, in another embodiment of the third aspect, the offset value is 2; the 4 luminance pixels include: the chrominance signal processing circuit comprises an upper luminance pixel corresponding to a left adjacent chrominance pixel of the current chrominance pixel, a lower luminance pixel corresponding to a right adjacent chrominance pixel of the current chrominance pixel, an upper luminance pixel corresponding to an upper adjacent chrominance pixel of the current chrominance pixel, and a lower luminance pixel corresponding to a lower adjacent chrominance pixel of the current chrominance pixel.

With reference to the third aspect or any one of the foregoing embodiments of the third aspect, in another implementation of the third aspect, the modifying the value of the current chroma pixel according to the value of the upper luma pixel and the value of the lower luma pixel corresponding to the current chroma pixel, and the values of the 4 luma pixels, and the preset filter includes: and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the left-side adjacent chroma pixel and the third coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the right-side adjacent chroma pixel and the fourth coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the upper-side adjacent chroma pixel and the fifth coefficient of the filter, and the product of the value of the lower-side brightness pixel corresponding to the lower-side adjacent chroma pixel and the sixth coefficient of the filter.

With reference to the third aspect or any one of the foregoing embodiments of the third aspect, in another implementation of the third aspect, the modifying the value of the current chroma pixel according to the value of the upper luma pixel and the value of the lower luma pixel corresponding to the current chroma pixel, and the values of the 4 luma pixels, and the preset filter includes: correcting the value of the current chrominance pixel according to the following mathematical formula:

D＝(L(X0，Y0)*Coeff(0)+L(X1，Y1)*Coeff(1)+L(X0-S，Y0)*Coeff(2)+L(X1+S，Y1)*Coeff(3)+(L(X0，Y0-S)*Coeff(4)+L(X1，Y1+S)*Coeff(5)+offset)＞＞shift

wherein X0 ═ X1 ═ Xc0 ═ Sx, Y0 ═ Yc0 ═ Sy, Y1 ═ Y0+1, and S is the offset.

A fourth aspect provides a video decoder comprising: means for performing the method as described in any one of the first aspect and embodiments thereof, the second aspect and embodiments thereof, the third aspect and embodiments thereof.

A fifth aspect provides a video encoding and decoding apparatus, comprising: a non-volatile memory and a processor coupled to each other, the processor calling program code stored in the memory to perform a method as described in any one of the first aspect and an implementation of the first aspect, the second aspect and an implementation of the second aspect, and the third aspect and an implementation of the third aspect.

A sixth aspect provides a computer readable storage medium having stored thereon a computer program which, when run on a processor, implements the method according to any one of the first aspect and embodiments of the first aspect, the second aspect and embodiments of the second aspect, and the third aspect and embodiments of the third aspect.

The foregoing and other objects are achieved by the subject matter of the independent claims. Other implementations are apparent from the dependent claims, the description and the drawings.

It should be understood that the second to sixth aspects of the present application are consistent with the technical solution of the first aspect of the present application, and the beneficial effects obtained by the aspects and the corresponding possible implementation are similar, and are not described again.

The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description and drawings, and from the claims.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments or the background art of the present application, the drawings required to be used in the embodiments or the background art of the present application will be described below.

FIG. 1A is a block diagram of an example of a video encoding and decoding system 10 for implementing embodiments of the present application;

FIG. 1B is a block diagram of an example of a video coding system 40 for implementing embodiments of the present application;

FIG. 2 is a block diagram of an example structure of an encoder 20 for implementing embodiments of the present application;

FIG. 3 is a block diagram of an example structure of a decoder 30 for implementing embodiments of the present application;

FIG. 4 is a block diagram of an example of a video coding apparatus 400 for implementing an embodiment of the present application;

FIG. 5 is a block diagram of another example of an encoding device or a decoding device for implementing embodiments of the present application;

fig. 6 is a schematic diagram of a 5x5 diamond-shaped chrominance filter (left) and a 7x7 diamond-shaped luminance filter (right) in a VVC;

FIG. 7 is a schematic representation of CCALF;

FIG. 8 shows the filter coefficients of CCALF in the JFET-P0080 proposal;

FIG. 9 shows an exemplary diagram of CCALF filter coefficients according to one embodiment;

FIG. 10 shows an exemplary diagram of CCALF filter coefficients according to an embodiment of another embodiment;

FIG. 11 shows an exemplary diagram of CCALF filter coefficients according to an embodiment of another embodiment;

FIG. 12 shows an exemplary diagram of CCALF filter coefficients according to an embodiment of another embodiment;

FIG. 13 shows an exemplary diagram of CCALF filter coefficients according to an embodiment of another embodiment;

fig. 14 is a diagram showing an example of CCALF filter coefficients according to an embodiment of another embodiment.

In the following, identical reference signs refer to identical or at least functionally equivalent features, if no specific remarks are made with respect to the identical reference signs.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings. In the following description, reference is made to the accompanying drawings which form a part hereof and in which is shown by way of illustration specific aspects of embodiments of the application or in which specific aspects of embodiments of the application may be employed. It should be understood that embodiments of the present application may be used in other ways and may include structural or logical changes not depicted in the drawings. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present application is defined by the appended claims. For example, it should be understood that the disclosure in connection with the described methods may equally apply to the corresponding apparatus or system for performing the methods, and vice versa. For example, if one or more particular method steps are described, the corresponding apparatus may comprise one or more units, such as functional units, to perform the described one or more method steps (e.g., a unit performs one or more steps, or multiple units, each of which performs one or more of the multiple steps), even if such one or more units are not explicitly described or illustrated in the figures. On the other hand, for example, if a particular apparatus is described based on one or more units, such as functional units, the corresponding method may comprise one step to perform the functionality of the one or more units (e.g., one step performs the functionality of the one or more units, or multiple steps, each of which performs the functionality of one or more of the plurality of units), even if such one or more steps are not explicitly described or illustrated in the figures. Further, it is to be understood that features of the various exemplary embodiments and/or aspects described herein may be combined with each other, unless explicitly stated otherwise.

The technical scheme related to the embodiment of the application can be applied to the existing video coding standards (such as H.264, HEVC and the like), and can also be applied to the future video coding standards (such as H.266 standard). The terminology used in the description of the embodiments section of the present application is for the purpose of describing particular embodiments of the present application only and is not intended to be limiting of the present application. Some concepts that may be involved in embodiments of the present application are briefly described below.

Video coding generally refers to processing a sequence of pictures that form a video or video sequence. In the field of video coding, the terms "picture", "frame" or "image" may be used as synonyms. Video encoding as used in this application (or this disclosure) refers to video encoding or video decoding. Video encoding is performed on the source side, typically including processing (e.g., by compressing) the original video picture to reduce the amount of data required to represent the video picture (and thus more efficiently store and/or transmit). Video decoding is performed at the destination side, typically involving inverse processing with respect to the encoder, to reconstruct the video pictures. Embodiments refer to video pictures (or collectively pictures, as will be explained below) "encoding" should be understood to refer to "encoding" or "decoding" of a video sequence. The combination of the encoding part and the decoding part is also called codec (encoding and decoding).

A video sequence comprises a series of images (pictures) which are further divided into slices (slices) which are further divided into blocks (blocks). Video coding performs the coding process in units of blocks, and in some new video coding standards, the concept of blocks is further extended. For example, in the h.264 standard, there is a Macroblock (MB), which may be further divided into a plurality of prediction blocks (partitions) that can be used for predictive coding. In the High Efficiency Video Coding (HEVC) standard, basic concepts such as a Coding Unit (CU), a Prediction Unit (PU), and a Transform Unit (TU) are adopted, and various block units are functionally divided, and a brand new tree-based structure is adopted for description. For example, a CU may be partitioned into smaller CUs according to a quadtree, and the smaller CUs may be further partitioned to form a quadtree structure, where the CU is a basic unit for partitioning and encoding an encoded image. There is also a similar tree structure for PU and TU, and PU may correspond to a prediction block, which is the basic unit of predictive coding. The CU is further partitioned into PUs according to a partitioning pattern. A TU may correspond to a transform block, which is a basic unit for transforming a prediction residual. However, CU, PU and TU are basically concepts of blocks (or image blocks).

For example, in HEVC, a CTU is split into multiple CUs by using a quadtree structure represented as a coding tree. A decision is made at the CU level whether to encode a picture region using inter-picture (temporal) or intra-picture (spatial) prediction. Each CU may be further split into one, two, or four PUs according to the PU split type. The same prediction process is applied within one PU and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying a prediction process based on the PU split type, the CU may be partitioned into Transform Units (TUs) according to other quadtree structures similar to the coding tree used for the CU. In recent developments of video compression techniques, the coding blocks are partitioned using Quad-tree and binary tree (QTBT) partition frames. In the QTBT block structure, a CU may be square or rectangular in shape.

Herein, for convenience of description and understanding, an image block to be processed in a current image may be referred to as a current block or a to-be-processed image block, for example, in encoding, referring to a block currently being encoded; in decoding, refers to the block currently being decoded. A decoded image block in a reference picture used for predicting the current block is referred to as a reference block, i.e. a reference block is a block that provides a reference signal for the current block, wherein the reference signal represents pixel values within the image block. A block in the reference picture that provides a prediction signal for the current block may be a prediction block, wherein the prediction signal represents pixel values or sample values or a sampled signal within the prediction block. For example, after traversing multiple reference blocks, a best reference block is found that will provide prediction for the current block, which is called a prediction block.

In the case of lossless video coding, the original video picture can be reconstructed, i.e., the reconstructed video picture has the same quality as the original video picture (assuming no transmission loss or other data loss during storage or transmission). In the case of lossy video coding, the amount of data needed to represent the video picture is reduced by performing further compression, e.g., by quantization, while the decoder side cannot fully reconstruct the video picture, i.e., the quality of the reconstructed video picture is lower or worse than the quality of the original video picture.

Several video coding standards of h.261 belong to the "lossy hybrid video codec" (i.e., the combination of spatial and temporal prediction in the sample domain with 2D transform coding in the transform domain for applying quantization). Each picture of a video sequence is typically partitioned into non-overlapping sets of blocks, typically encoded at the block level. In other words, the encoder side typically processes, i.e., encodes, video at the block (video block) level, e.g., generates a prediction block by spatial (intra-picture) prediction and temporal (inter-picture) prediction, subtracts the prediction block from the current block (currently processed or block to be processed) to obtain a residual block, transforms the residual block and quantizes the residual block in the transform domain to reduce the amount of data to be transmitted (compressed), while the decoder side applies the inverse processing portion relative to the encoder to the encoded or compressed block to reconstruct the current block for representation. In addition, the encoder replicates the decoder processing loop such that the encoder and decoder generate the same prediction (e.g., intra-prediction and inter-prediction) and/or reconstruction for processing, i.e., encoding, subsequent blocks.

As used herein, the term "block" may be a portion of a picture or frame. For ease of description, embodiments of the present invention are described with reference to general Video Coding (VVC) or High Efficiency Video Coding (HEVC) developed by the Video Coding Experts Group (VCEG) of the ITU-T Video Coding Experts Group and the JCT-VC (Joint Video Coding, MPEG) of the Joint working Group of Video Coding of the ISO/IEC moving Picture Experts Group. Those of ordinary skill in the art understand that embodiments of the present invention are not limited to HEVC or VVC. May refer to CU, PU, and TU. In HEVC, the CTU is split into CUs by using a quadtree structure represented as a coding tree. A decision is made at the CU level whether to encode a picture region using inter-picture (temporal) or intra-picture (spatial) prediction. Each CU may be further split into one, two, or four PUs according to the PU split type. The same prediction process is applied within one PU and the relevant information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying a prediction process based on the PU split type, the CU may be partitioned into Transform Units (TUs) according to other quadtree structures similar to the coding tree used for the CU. In recent developments of video compression techniques, the coding blocks are partitioned using Quad-tree and binary tree (QTBT) partition frames. In the QTBT block structure, a CU may be square or rectangular in shape. In the VVC, a Coding Tree Unit (CTU) is first divided by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree structure. The binary tree leaf nodes are called Coding Units (CUs), and the segments are used for prediction and transform processing without any other segmentation. This means that the block sizes of CU, PU and TU in the QTBT coding block structure are the same. Also, it has been proposed to use multiple partitions, such as ternary tree partitions, with QTBT block structures.

Video coding generally refers to processing a sequence of pictures that form a video or video sequence. In the field of video coding, the terms "picture", "frame" or "image" may be used as synonyms. Video encoding as used herein means video encoding or video decoding. Video encoding is performed on the source side, typically including processing (e.g., by compressing) the original video picture to reduce the amount of data required to represent the video picture for more efficient storage and/or transmission. Video decoding is performed at the destination side, typically involving inverse processing with respect to the encoder, to reconstruct the video pictures. Embodiments are directed to video picture "encoding" to be understood as referring to "encoding" or "decoding" of a video sequence. The combination of the encoding part and the decoding part is also called codec (encoding and decoding).

The system architecture to which the embodiments of the present application apply is described below. Referring to fig. 1A, fig. 1A schematically shows a block diagram of a video encoding and decoding system 10 to which an embodiment of the present application is applied. As shown in fig. 1A, video encoding and decoding system 10 may include a source device 12 and a destination device 14, source device 12 generating encoded video data, and thus source device 12 may be referred to as a video encoding apparatus. Destination device 14 may decode the encoded video data generated by source device 12, and thus destination device 14 may be referred to as a video decoding apparatus. Various implementations of source apparatus 12, destination apparatus 14, or both may include one or more processors and memory coupled to the one or more processors. The memory can include, but is not limited to, RAM, ROM, EEPROM, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures that can be accessed by a computer, as described herein. Source apparatus 12 and destination apparatus 14 may comprise a variety of devices, including desktop computers, mobile computing devices, notebook (e.g., laptop) computers, tablet computers, set-top boxes, telephone handsets such as so-called "smart" phones, televisions, cameras, display devices, digital media players, video game consoles, on-board computers, wireless communication devices, or the like.

Although fig. 1A depicts source apparatus 12 and destination apparatus 14 as separate apparatuses, an apparatus embodiment may also include the functionality of both source apparatus 12 and destination apparatus 14 or both, i.e., source apparatus 12 or corresponding functionality and destination apparatus 14 or corresponding functionality. In such embodiments, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and/or software, or using separate hardware and/or software, or any combination thereof.

A communication connection may be made between source device 12 and destination device 14 over link 13, and destination device 14 may receive encoded video data from source device 12 via link 13. Link 13 may comprise one or more media or devices capable of moving encoded video data from source apparatus 12 to destination apparatus 14. In one example, link 13 may include one or more communication media that enable source device 12 to transmit encoded video data directly to destination device 14 in real-time. In this example, source apparatus 12 may modulate the encoded video data according to a communication standard, such as a wireless communication protocol, and may transmit the modulated video data to destination apparatus 14. The one or more communication media may include wireless and/or wired communication media such as a Radio Frequency (RF) spectrum or one or more physical transmission lines. The one or more communication media may form part of a packet-based network, such as a local area network, a wide area network, or a global network (e.g., the internet). The one or more communication media may include routers, switches, base stations, or other apparatuses that facilitate communication from source apparatus 12 to destination apparatus 14.

Source device 12 includes an encoder 20, and in the alternative, source device 12 may also include a picture source 16, a picture preprocessor 18, and a communication interface 22. In one implementation, the encoder 20, the picture source 16, the picture preprocessor 18, and the communication interface 22 may be hardware components of the source device 12 or may be software programs of the source device 12. Described below, respectively:

the picture source 16, which may include or be any type of picture capturing device, may be used, for example, to capture real-world pictures, and/or any type of picture or comment generating device (for screen content encoding, some text on the screen is also considered part of the picture or image to be encoded), such as a computer graphics processor for generating computer animated pictures, or any type of device for obtaining and/or providing real-world pictures, computer animated pictures (e.g., screen content, Virtual Reality (VR) pictures), and/or any combination thereof (e.g., Augmented Reality (AR) pictures). The picture source 16 may be a camera for capturing pictures or a memory for storing pictures, and the picture source 16 may also include any kind of (internal or external) interface for storing previously captured or generated pictures and/or for obtaining or receiving pictures. When picture source 16 is a camera, picture source 16 may be, for example, an integrated camera local or integrated in the source device; when the picture source 16 is a memory, the picture source 16 may be an integrated memory local or integrated, for example, in the source device. When the picture source 16 comprises an interface, the interface may for example be an external interface receiving pictures from an external video source, for example an external picture capturing device such as a camera, an external memory or an external picture generating device, for example an external computer graphics processor, a computer or a server. The interface may be any kind of interface according to any proprietary or standardized interface protocol, e.g. a wired or wireless interface, an optical interface.

The picture can be regarded as a two-dimensional array or matrix of pixel elements (picture elements). The pixels in the array may also be referred to as sampling points. The number of sampling points of the array or picture in the horizontal and vertical directions (or axes) defines the size and/or resolution of the picture. To represent color, three color components are typically employed, i.e., a picture may be represented as or contain three sample arrays. For example, in RBG format or color space, a picture includes corresponding arrays of red, green, and blue samples. However, in video coding, each pixel is typically represented in a luminance/chrominance format or color space, e.g. for pictures in YUV format, comprising a luminance component (sometimes also indicated with L) indicated by Y and two chrominance components indicated by U and V. The luminance (luma) component Y represents luminance or gray level intensity (e.g., both are the same in a gray scale picture), while the two chrominance (chroma) components U and V represent chrominance or color information components. Accordingly, a picture in YUV format includes a luma sample array of luma sample values (Y), and two chroma sample arrays of chroma values (U and V). Pictures in RGB format can be converted or transformed into YUV format and vice versa, a process also known as color transformation or conversion. If the picture is black and white, the picture may include only an array of luminance samples. In the embodiment of the present application, the pictures transmitted from the picture source 16 to the picture processor may also be referred to as raw picture data 17.

Picture pre-processor 18 is configured to receive original picture data 17 and perform pre-processing on original picture data 17 to obtain pre-processed picture 19 or pre-processed picture data 19. For example, the pre-processing performed by picture pre-processor 18 may include trimming, color format conversion (e.g., from RGB format to YUV format), toning, or de-noising.

An encoder 20 (or video encoder 20) for receiving the pre-processed picture data 19, processing the pre-processed picture data 19 with a relevant prediction mode (such as the prediction mode in various embodiments herein), thereby providing encoded picture data 21 (structural details of the encoder 20 will be described further below based on fig. 2 or fig. 4 or fig. 5). In some embodiments, the encoder 20 may be configured to perform various embodiments described hereinafter to implement the application of the chroma block prediction method described herein on the encoding side.

A communication interface 22, which may be used to receive encoded picture data 21 and may transmit encoded picture data 21 over link 13 to destination device 14 or any other device (e.g., memory) for storage or direct reconstruction, which may be any device for decoding or storage. Communication interface 22 may, for example, be used to encapsulate encoded picture data 21 into a suitable format, such as a data packet, for transmission over link 13.

Destination device 14 includes a decoder 30, and optionally destination device 14 may also include a communication interface 28, a picture post-processor 32, and a display device 34. Described below, respectively:

communication interface 28 may be used to receive encoded picture data 21 from source device 12 or any other source, such as a storage device, such as an encoded picture data storage device. The communication interface 28 may be used to transmit or receive the encoded picture data 21 by way of a link 13 between the source device 12 and the destination device 14, or by way of any type of network, such as a direct wired or wireless connection, any type of network, such as a wired or wireless network or any combination thereof, or any type of private and public networks, or any combination thereof. Communication interface 28 may, for example, be used to decapsulate data packets transmitted by communication interface 22 to obtain encoded picture data 21.

Both communication interface 28 and communication interface 22 may be configured as a one-way communication interface or a two-way communication interface, and may be used, for example, to send and receive messages to establish a connection, acknowledge and exchange any other information related to a communication link and/or data transfer, such as an encoded picture data transfer.

A decoder 30 (otherwise referred to as decoder 30) for receiving the encoded picture data 21 and providing decoded picture data 31 or decoded pictures 31 (structural details of the decoder 30 will be described further below based on fig. 3 or fig. 4 or fig. 5). In some embodiments, the decoder 30 may be configured to perform various embodiments described hereinafter to implement the application of the chroma block prediction method described herein on the decoding side.

A picture post-processor 32 for performing post-processing on the decoded picture data 31 (also referred to as reconstructed picture data) to obtain post-processed picture data 33. Post-processing performed by picture post-processor 32 may include: color format conversion (e.g., from YUV format to RGB format), toning, trimming or resampling, or any other process may also be used to transmit post-processed picture data 33 to display device 34.

A display device 34 for receiving the post-processed picture data 33 for displaying pictures to, for example, a user or viewer. Display device 34 may be or may include any type of display for presenting the reconstructed picture, such as an integrated or external display or monitor. For example, the display may include a Liquid Crystal Display (LCD), an Organic Light Emitting Diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a Digital Light Processor (DLP), or any other display of any kind.

Although fig. 1A depicts source device 12 and destination device 14 as separate devices, device embodiments may also include the functionality of both source device 12 and destination device 14 or both, i.e., source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such embodiments, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and/or software, or using separate hardware and/or software, or any combination thereof.

It will be apparent to those skilled in the art from this description that the existence and (exact) division of the functionality of the different elements, or source device 12 and/or destination device 14 as shown in fig. 1A, may vary depending on the actual device and application. Source device 12 and destination device 14 may comprise any of a variety of devices, including any type of handheld or stationary device, such as a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camcorder, a desktop computer, a set-top box, a television, a camera, an in-vehicle device, a display device, a digital media player, a video game console, a video streaming device (e.g., a content service server or a content distribution server), a broadcast receiver device, a broadcast transmitter device, etc., and may not use or use any type of operating system.

Both encoder 20 and decoder 30 may be implemented as any of a variety of suitable circuits, such as one or more microprocessors, Digital Signal Processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combinations thereof. If the techniques are implemented in part in software, an apparatus may store instructions of the software in a suitable non-transitory computer-readable storage medium and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered one or more processors.

In some cases, the video encoding and decoding system 10 shown in fig. 1A is merely an example, and the techniques of this application may be applicable to video encoding settings (e.g., video encoding or video decoding) that do not necessarily involve any data communication between the encoding and decoding devices. In other examples, the data may be retrieved from local storage, streamed over a network, and so on. A video encoding device may encode and store data to a memory, and/or a video decoding device may retrieve and decode data from a memory. In some examples, the encoding and decoding are performed by devices that do not communicate with each other, but merely encode data to and/or retrieve data from memory and decode data.

Referring to fig. 1B, fig. 1B is an illustrative diagram of an example of a video coding system 40 including the encoder 20 of fig. 2 and/or the decoder 30 of fig. 3, according to an example embodiment. Video coding system 40 may implement a combination of the various techniques of the embodiments of the present application. In the illustrated embodiment, video coding system 40 may include an imaging device 41, an encoder 20, a decoder 30 (and/or a video codec implemented by logic circuitry 47 of a processing circuit 46), an antenna 42, one or more processors 43, one or more memories 44, and/or a display device 45.

As shown in fig. 1B, the imaging device 41, the antenna 42, the processing circuit 46, the logic circuit 47, the encoder 20, the decoder 30, the processor 43, the memory 44, and/or the display device 45 are capable of communicating with each other. As discussed, although video coding system 40 is depicted with encoder 20 and decoder 30, in different examples video coding system 40 may include only encoder 20 or only decoder 30.

In some instances, antenna 42 may be used to transmit or receive an encoded bitstream of video data. Additionally, in some instances, display device 45 may be used to present video data. In some examples, logic circuitry 47 may be implemented by processing circuitry 46. The processing circuit 46 may comprise application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, or the like. Video decoding system 40 may also include an optional processor 43, which optional processor 43 similarly may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, or the like. In some examples, the logic 47 may be implemented in hardware, such as video encoding specific hardware, and the processor 43 may be implemented in general purpose software, an operating system, and so on. In addition, the Memory 44 may be any type of Memory, such as a volatile Memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or a nonvolatile Memory (e.g., flash Memory, etc.), and the like. In a non-limiting example, storage 44 may be implemented by a speed cache memory. In some instances, logic circuitry 47 may access memory 44 (e.g., to implement an image buffer). In other examples, logic circuitry 47 and/or processing circuitry 46 may include memory (e.g., cache, etc.) for implementing image buffers, etc.

In some examples, encoder 20, implemented by logic circuitry, may include an image buffer (e.g., implemented by processing circuitry 46 or memory 44) and a graphics processing unit (e.g., implemented by processing circuitry 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include an encoder 20 implemented by logic circuitry 47 to implement the various modules discussed with reference to fig. 2 and/or any other encoder system or subsystem described herein. Logic circuitry may be used to perform various operations discussed herein.

In some examples, decoder 30 may be implemented by logic circuitry 47 in a similar manner to implement the various modules discussed with reference to decoder 30 of fig. 3 and/or any other decoder system or subsystem described herein. In some examples, logic circuit implemented decoder 30 may include an image buffer (implemented by processing circuit 44 or memory 44) and a graphics processing unit (e.g., implemented by processing circuit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include a decoder 30 implemented by logic circuitry 47 to implement the various modules discussed with reference to fig. 3 and/or any other decoder system or subsystem described herein.

In some instances, antenna 42 may be used to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data related to the encoded video frame, indicators, index values, mode selection data, etc., discussed herein, such as data related to the encoding partition (e.g., transform coefficients or quantized transform coefficients, (as discussed) optional indicators, and/or data defining the encoding partition). Video coding system 40 may also include a decoder 30 coupled to antenna 42 and used to decode the encoded bitstream. The display device 45 is used to present video frames.

It should be understood that for the example described with reference to encoder 20 in the embodiments of the present application, decoder 30 may be used to perform the reverse process. With respect to signaling syntax elements, decoder 30 may be configured to receive and parse such syntax elements and decode the associated video data accordingly. In some examples, encoder 20 may entropy encode the syntax elements into an encoded video bitstream. In such instances, decoder 30 may parse such syntax elements and decode the relevant video data accordingly.

It should be noted that the video image encoding method described in the embodiment of the present application occurs at the encoder 20, the video image decoding method described in the embodiment of the present application occurs at the decoder 30, and the encoder 20 and the decoder 30 in the embodiment of the present application may be a video standard protocol such as h.263, h.264, HEVV, MPEG-2, MPEG-4, VP8, VP9, or a codec corresponding to a next generation video standard protocol (e.g., h.266).

Referring to fig. 2, fig. 2 shows a schematic/conceptual block diagram of an example of an encoder 20 for implementing embodiments of the present application. In the example of fig. 2, encoder 20 includes a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter 220, a Decoded Picture Buffer (DPB) 230, a prediction processing unit 260, and an entropy encoding unit 270. Prediction processing unit 260 may include inter prediction unit 244, intra prediction unit 254, and mode selection unit 262. Inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The encoder 20 shown in fig. 2 may also be referred to as a hybrid video encoder or a video encoder according to a hybrid video codec.

For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260, and the entropy encoding unit 270 form a forward signal path of the encoder 20, and, for example, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the Decoded Picture Buffer (DPB) 230, the prediction processing unit 260 form a backward signal path of the encoder, wherein the backward signal path of the encoder corresponds to a signal path of a decoder (see the decoder 30 in fig. 3).

The encoder 20 receives, e.g., via an input 202, a picture 201 or an image block 203 of a picture 201, e.g., a picture in a sequence of pictures forming a video or a video sequence. Image block 203 may also be referred to as a current picture block or a picture block to be encoded, and picture 201 may be referred to as a current picture or a picture to be encoded (especially when the current picture is distinguished from other pictures in video encoding, such as previously encoded and/or decoded pictures in the same video sequence, i.e., a video sequence that also includes the current picture).

An embodiment of the encoder 20 may comprise a partitioning unit (not shown in fig. 2) for partitioning the picture 201 into a plurality of blocks, e.g. image blocks 203, typically into a plurality of non-overlapping blocks. The partitioning unit may be used to use the same block size for all pictures in a video sequence and a corresponding grid defining the block size, or to alter the block size between pictures or subsets or groups of pictures and partition each picture into corresponding blocks.

In one example, prediction processing unit 260 of encoder 20 may be used to perform any combination of the above-described segmentation techniques.

Like picture 201, image block 203 is also or can be considered as a two-dimensional array or matrix of sample points having sample values, although its size is smaller than picture 201. In other words, the image block 203 may comprise, for example, one sample array (e.g., a luma array in the case of a black and white picture 201) or three sample arrays (e.g., a luma array and two chroma arrays in the case of a color picture) or any other number and/or class of arrays depending on the color format applied. The number of sampling points in the horizontal and vertical directions (or axes) of the image block 203 defines the size of the image block 203.

The encoder 20 as shown in fig. 2 is used to encode a picture 201 block by block, e.g. performing encoding and prediction for each image block 203.

The residual calculation unit 204 is configured to calculate a residual block 205 based on the picture image block 203 and the prediction block 265 (further details of the prediction block 265 are provided below), e.g. by subtracting sample values of the prediction block 265 from sample values of the picture image block 203 sample by sample (pixel by pixel) to obtain the residual block 205 in the sample domain.

The transform processing unit 206 is configured to apply a transform, such as a Discrete Cosine Transform (DCT) or a Discrete Sine Transform (DST), on the sample values of the residual block 205 to obtain transform coefficients 207 in a transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients and represent the residual block 205 in the transform domain.

The transform processing unit 206 may be used to apply integer approximations of DCT/DST, such as the transform specified for HEVC/h.265. Such integer approximations are typically scaled by some factor compared to the orthogonal DCT transform. To maintain the norm of the residual block processed by the forward transform and the inverse transform, an additional scaling factor is applied as part of the transform process. The scaling factor is typically selected based on certain constraints, e.g., the scaling factor is a power of 2 for a shift operation, a trade-off between bit depth of transform coefficients, accuracy and implementation cost, etc. For example, a specific scaling factor may be specified on the decoder 30 side for the inverse transform by, for example, inverse transform processing unit 212 (and on the encoder 20 side for the corresponding inverse transform by, for example, inverse transform processing unit 212), and correspondingly, a corresponding scaling factor may be specified on the encoder 20 side for the forward transform by transform processing unit 206.

Quantization unit 208 is used to quantize transform coefficients 207, e.g., by applying scalar quantization or vector quantization, to obtain quantized transform coefficients 209. Quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209. The quantization process may reduce the bit depth associated with some or all of transform coefficients 207. For example, an n-bit transform coefficient may be rounded down to an m-bit transform coefficient during quantization, where n is greater than m. The quantization level may be modified by adjusting a Quantization Parameter (QP). For example, for scalar quantization, different scales may be applied to achieve finer or coarser quantization. Smaller quantization steps correspond to finer quantization and larger quantization steps correspond to coarser quantization. An appropriate quantization step size may be indicated by a Quantization Parameter (QP). For example, the quantization parameter may be an index of a predefined set of suitable quantization step sizes. For example, a smaller quantization parameter may correspond to a fine quantization (smaller quantization step size) and a larger quantization parameter may correspond to a coarse quantization (larger quantization step size), or vice versa. The quantization may comprise a division by a quantization step size and a corresponding quantization or inverse quantization, e.g. performed by inverse quantization 210, or may comprise a multiplication by a quantization step size. Embodiments according to some standards, such as HEVC, may use a quantization parameter to determine the quantization step size. In general, the quantization step size may be calculated based on the quantization parameter using a fixed point approximation of an equation that includes division. Additional scaling factors may be introduced for quantization and dequantization to recover the norm of the residual block that may be modified due to the scale used in the fixed point approximation of the equation for the quantization step size and quantization parameter. In one example implementation, the inverse transform and inverse quantization scales may be combined. Alternatively, a custom quantization table may be used and signaled from the encoder to the decoder, e.g., in a bitstream. Quantization is a lossy operation, where the larger the quantization step size, the greater the loss.

The inverse quantization unit 210 is configured to apply inverse quantization of the quantization unit 208 on the quantized coefficients to obtain inverse quantized coefficients 211, e.g., to apply an inverse quantization scheme of the quantization scheme applied by the quantization unit 208 based on or using the same quantization step as the quantization unit 208. The dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211, corresponding to transform coefficients 207, although the loss due to quantization is typically not the same as the transform coefficients.

The inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by the transform processing unit 206, for example, an inverse Discrete Cosine Transform (DCT) or an inverse Discrete Sine Transform (DST), to obtain an inverse transform block 213 in the sample domain. The inverse transform block 213 may also be referred to as an inverse transform dequantized block 213 or an inverse transform residual block 213.

The reconstruction unit 214 (e.g., summer 214) is used to add the inverse transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain the reconstructed block 215 in the sample domain, e.g., to add sample values of the reconstructed residual block 213 to sample values of the prediction block 265.

Optionally, a buffer unit 216 (or simply "buffer" 216), such as a line buffer 216, is used to buffer or store the reconstructed block 215 and corresponding sample values, for example, for intra prediction. In other embodiments, the encoder may be used to use the unfiltered reconstructed block and/or corresponding sample values stored in buffer unit 216 for any class of estimation and/or prediction, such as intra prediction.

For example, an embodiment of encoder 20 may be configured such that buffer unit 216 is used not only to store reconstructed block 215 for intra prediction 254, but also for loop filter 220 unit (not shown in fig. 2), and/or such that buffer unit 216 and decoded picture buffer unit 230 form one buffer, for example. Other embodiments may be used to use filtered block 221 and/or blocks or samples from decoded picture buffer 230 (neither shown in fig. 2) as input or basis for intra prediction 254.

The loop filter unit 220 (or simply "loop filter" 220) is used to filter the reconstructed block 215 to obtain a filtered block 221, so as to facilitate pixel transition or improve video quality. Loop filter unit 220 is intended to represent one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an Adaptive Loop Filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although loop filter unit 220 is shown in fig. 2 as an in-loop filter, in other configurations, loop filter unit 220 may be implemented as a post-loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221. The decoded picture buffer 230 may store the reconstructed encoded block after the loop filter unit 220 performs a filtering operation on the reconstructed encoded block.

Embodiments of encoder 20 (correspondingly, loop filter unit 220) may be configured to output loop filter parameters (e.g., sample adaptive offset information), e.g., directly or after entropy encoding by entropy encoding unit 270 or any other entropy encoding unit, e.g., such that decoder 30 may receive and apply the same loop filter parameters for decoding.

Decoded Picture Buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use by encoder 20 in encoding video data. DPB 230 may be formed from any of a variety of memory devices, such as Dynamic Random Access Memory (DRAM) including Synchronous DRAM (SDRAM), Magnetoresistive RAM (MRAM), Resistive RAM (RRAM), or other types of memory devices. The DPB 230 and the buffer 216 may be provided by the same memory device or separate memory devices. In a certain example, a Decoded Picture Buffer (DPB) 230 is used to store filtered blocks 221. Decoded picture buffer 230 may further be used to store other previous filtered blocks, such as previous reconstructed and filtered blocks 221, of the same current picture or of a different picture, such as a previous reconstructed picture, and may provide the complete previous reconstructed, i.e., decoded picture (and corresponding reference blocks and samples) and/or the partially reconstructed current picture (and corresponding reference blocks and samples), e.g., for inter prediction. In a certain example, if reconstructed block 215 is reconstructed without in-loop filtering, Decoded Picture Buffer (DPB) 230 is used to store reconstructed block 215.

Prediction processing unit 260, also referred to as block prediction processing unit 260, is used to receive or obtain image block 203 (current image block 203 of current picture 201) and reconstructed picture data, e.g., reference samples of the same (current) picture from buffer 216 and/or reference picture data 231 of one or more previously decoded pictures from decoded picture buffer 230, and to process such data for prediction, i.e., to provide prediction block 265, which may be inter-predicted block 245 or intra-predicted block 255.

The mode selection unit 262 may be used to select a prediction mode (e.g., intra or inter prediction mode) and/or a corresponding prediction block 245 or 255 used as the prediction block 265 to calculate the residual block 205 and reconstruct the reconstructed block 215.

Embodiments of mode selection unit 262 may be used to select prediction modes (e.g., from those supported by prediction processing unit 260) that provide the best match or the smallest residual (smallest residual means better compression in transmission or storage), or that provide the smallest signaling overhead (smallest signaling overhead means better compression in transmission or storage), or both. The mode selection unit 262 may be configured to determine a prediction mode based on Rate Distortion Optimization (RDO), i.e., select a prediction mode that provides the minimum rate distortion optimization, or select a prediction mode in which the associated rate distortion at least meets the prediction mode selection criteria.

The prediction processing performed by the example of the encoder 20 (e.g., by the prediction processing unit 260) and the mode selection performed (e.g., by the mode selection unit 262) will be explained in detail below.

As described above, the encoder 20 is configured to determine or select the best or optimal prediction mode from a set of (predetermined) prediction modes. The prediction mode set may include, for example, intra prediction modes and/or inter prediction modes.

The intra prediction mode set may include 35 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in h.265, or may include 67 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes as defined in h.266 under development.

In a possible implementation, the set of inter prediction modes may for example comprise a skip (skip) mode and a merge (merge) mode depending on available reference pictures (i.e. at least partially decoded pictures stored in the DBP 230, for example, as described above) and other inter prediction parameters, for example depending on whether the best matching reference block is searched using the entire reference picture or only a part of the reference picture, for example a search window area of an area surrounding the current block, and/or depending on whether pixel interpolation, such as half-pixel and/or quarter-pixel interpolation, is applied, for example. In a specific implementation, the inter prediction mode set may include a skip with motion vector difference (MMVD) mode or a merge MMVD mode in the embodiment of the present application. In one example, intra-prediction unit 254 may be used to perform any combination of the inter-prediction techniques described below.

In addition to the above prediction mode, embodiments of the present application may also apply a skip mode and/or a direct mode.

The prediction processing unit 260 may further be configured to partition the image block 203 into smaller block partitions or sub-blocks, for example, by iteratively using quad-tree (QT) partitions, binary-tree (BT) partitions, or triple-tree (TT) partitions, or any combination thereof, and to perform prediction, for example, for each of the block partitions or sub-blocks, wherein mode selection includes selecting a tree structure of the partitioned image block 203 and selecting a prediction mode to apply to each of the block partitions or sub-blocks.

The inter prediction unit 244 may include a Motion Estimation (ME) unit (not shown in fig. 2) and a Motion Compensation (MC) unit (not shown in fig. 2). The motion estimation unit is used to receive or obtain a picture image block 203 (current picture image block 203 of current picture 201) and a decoded picture 231, or at least one or more previously reconstructed blocks, e.g., reconstructed blocks of one or more other/different previously decoded pictures 231, for motion estimation. For example, the video sequence may comprise a current picture and a previously decoded picture 31, or in other words, the current picture and the previously decoded picture 31 may be part of, or form, a sequence of pictures forming the video sequence.

For example, the encoder 20 may be configured to select a reference block from a plurality of reference blocks of the same or different one of a plurality of other pictures and provide the reference picture and/or an offset (spatial offset) between a position (X, Y coordinates) of the reference block and a position of the current block to a motion estimation unit (not shown in fig. 2) as an inter prediction parameter. This offset is also called a motion vector or Motion Vector (MV).

The motion compensation unit is configured to obtain inter-prediction parameters and perform inter-prediction based on or using the inter-prediction parameters to obtain an inter-prediction block 245. The motion compensation performed by the motion compensation unit (not shown in fig. 2) may involve taking or generating a prediction block based on a motion/block vector determined by motion estimation (possibly performing interpolation to sub-pixel precision). Interpolation filtering may generate additional pixel samples from known pixel samples, potentially increasing the number of candidate prediction blocks that may be used to encode a picture block. Upon receiving the motion vector for the PU of the current picture block, motion compensation unit 246 may locate the prediction block in one reference picture list to which the motion vector points. Motion compensation unit 246 may also generate syntax elements associated with the blocks and video slices for use by decoder 30 in decoding picture blocks of the video slices.

Specifically, the inter prediction unit 244 may transmit a syntax element including an inter prediction parameter (e.g., indication information for selecting an inter prediction mode for current block prediction after traversing a plurality of inter prediction modes) to the entropy encoding unit 270. In a possible application scenario, if there is only one inter prediction mode, the inter prediction parameters may not be carried in the syntax element, and the decoding end 30 can directly use the default prediction mode for decoding. It will be appreciated that the inter prediction unit 244 may be used to perform any combination of inter prediction techniques.

The intra prediction unit 254 is used to obtain, for example, a picture block 203 (current picture block) of the same picture and one or more previously reconstructed blocks, e.g., reconstructed neighboring blocks, to be received for intra estimation. For example, the encoder 20 may be configured to select an intra-prediction mode from a plurality of (predetermined) intra-prediction modes.

Embodiments of encoder 20 may be used to select an intra prediction mode based on optimization criteria, such as based on a minimum residual (e.g., an intra prediction mode that provides a prediction block 255 that is most similar to current picture block 203) or a minimum code rate distortion.

The intra-prediction unit 254 is further configured to determine the intra-prediction block 255 based on the intra-prediction parameters as the selected intra-prediction mode. In any case, after selecting the intra-prediction mode for the block, intra-prediction unit 254 is also used to provide intra-prediction parameters, i.e., information indicating the selected intra-prediction mode for the block, to entropy encoding unit 270. In one example, intra-prediction unit 254 may be used to perform any combination of intra-prediction techniques.

Specifically, the above-described intra prediction unit 254 may transmit a syntax element including an intra prediction parameter (such as indication information of selecting an intra prediction mode for current block prediction after traversing a plurality of intra prediction modes) to the entropy encoding unit 270. In a possible application scenario, if there is only one intra-prediction mode, the intra-prediction parameters may not be carried in the syntax element, and the decoding end 30 may directly use the default prediction mode for decoding.

Entropy encoding unit 270 is configured to apply an entropy encoding algorithm or scheme (e.g., a Variable Length Coding (VLC) scheme, a Context Adaptive VLC (CAVLC) scheme, an arithmetic coding scheme, a Context Adaptive Binary Arithmetic Coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), Probability Interval Partitioning Entropy (PIPE) coding, or other entropy encoding methods or techniques) to individual or all of quantized residual coefficients 209, inter-prediction parameters, intra-prediction parameters, and/or loop filter parameters (or not) to obtain encoded picture data 21 that may be output by output 272 in the form of, for example, encoded bitstream 21. The encoded bitstream may be transmitted to video decoder 30, or archived for later transmission or retrieval by video decoder 30. Entropy encoding unit 270 may also be used to entropy encode other syntax elements of the current video slice being encoded.

Other structural variations of video encoder 20 may be used to encode the video stream. For example, the non-transform based encoder 20 may quantize the residual signal directly without the transform processing unit 206 for certain blocks or frames. In another embodiment, encoder 20 may have quantization unit 208 and inverse quantization unit 210 combined into a single unit.

Specifically, in the embodiment of the present application, the encoder 20 may be used to implement the video image encoding method described in the following embodiments.

It should be understood that other structural variations of the video encoder 20 may be used to encode the video stream. For example, for some image blocks or image frames, video encoder 20 may quantize the residual signal directly without processing by transform processing unit 206 and, correspondingly, without processing by inverse transform processing unit 212; alternatively, for some image blocks or image frames, the video encoder 20 does not generate residual data and accordingly does not need to be processed by the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, and the inverse transform processing unit 212; alternatively, video encoder 20 may store the reconstructed image block directly as a reference block without processing by filter 220; alternatively, the quantization unit 208 and the inverse quantization unit 210 in the video encoder 20 may be merged together. The loop filter 220 is optional, and in the case of lossless compression coding, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, and the inverse transform processing unit 212 are optional. It should be appreciated that the inter prediction unit 244 and the intra prediction unit 254 may be selectively enabled according to different application scenarios.

Referring to fig. 3, fig. 3 shows a schematic/conceptual block diagram of an example of a decoder 30 for implementing embodiments of the present application. Video decoder 30 is operative to receive encoded picture data (e.g., an encoded bitstream) 21, e.g., encoded by encoder 20, to obtain a decoded picture 231. During the decoding process, video decoder 30 receives video data, such as an encoded video bitstream representing picture blocks of an encoded video slice and associated syntax elements, from video encoder 20.

In the example of fig. 3, decoder 30 includes entropy decoding unit 304, inverse quantization unit 310, inverse transform processing unit 312, reconstruction unit 314 (e.g., summer 314), buffer 316, loop filter 320, decoded picture buffer 330, and prediction processing unit 360. The prediction processing unit 360 may include an inter prediction unit 344, an intra prediction unit 354, and a mode selection unit 362. In some examples, video decoder 30 may perform a decoding pass that is substantially reciprocal to the encoding pass described with reference to video encoder 20 of fig. 2.

Entropy decoding unit 304 is to perform entropy decoding on encoded picture data 21 to obtain, for example, quantized coefficients 309 and/or decoded encoding parameters (not shown in fig. 3), such as any or all of inter-prediction, intra-prediction parameters, loop filter parameters, and/or other syntax elements (decoded). The entropy decoding unit 304 is further for forwarding the inter-prediction parameters, the intra-prediction parameters, and/or other syntax elements to the prediction processing unit 360. Video decoder 30 may receive syntax elements at the video slice level and/or the video block level.

Inverse quantization unit 310 may be functionally identical to inverse quantization unit 110, inverse transform processing unit 312 may be functionally identical to inverse transform processing unit 212, reconstruction unit 314 may be functionally identical to reconstruction unit 214, buffer 316 may be functionally identical to buffer 216, loop filter 320 may be functionally identical to loop filter 220, and decoded picture buffer 330 may be functionally identical to decoded picture buffer 230.

Prediction processing unit 360 may include inter prediction unit 344 and intra prediction unit 354, where inter prediction unit 344 may be functionally similar to inter prediction unit 244 and intra prediction unit 354 may be functionally similar to intra prediction unit 254. The prediction processing unit 360 is typically used to perform block prediction and/or to obtain a prediction block 365 from the encoded data 21, as well as to receive or obtain (explicitly or implicitly) prediction related parameters and/or information about the selected prediction mode from, for example, the entropy decoding unit 304.

When the video slice is encoded as an intra-coded (I) slice, intra-prediction unit 354 of prediction processing unit 360 is used to generate a prediction block 365 for the picture block of the current video slice based on the signaled intra-prediction mode and data from previously decoded blocks of the current frame or picture. When a video frame is encoded as an inter-coded (i.e., B or P) slice, inter prediction unit 344 (e.g., a motion compensation unit) of prediction processing unit 360 is used to generate a prediction block 365 for the video block of the current video slice based on the motion vectors and other syntax elements received from entropy decoding unit 304. For inter prediction, a prediction block may be generated from one reference picture within one reference picture list. Video decoder 30 may construct the reference frame list using default construction techniques based on the reference pictures stored in DPB 330: list 0 and list 1.

Prediction processing unit 360 is used to determine prediction information for the video blocks of the current video slice by parsing the motion vectors and other syntax elements, and to generate a prediction block for the current video block being decoded using the prediction information. In an example of the present application, prediction processing unit 360 uses some of the syntax elements received to determine a prediction mode (e.g., intra or inter prediction) for encoding video blocks of a video slice, an inter prediction slice type (e.g., B-slice, P-slice, or GPB-slice), construction information for one or more of a reference picture list of the slice, a motion vector for each inter-coded video block of the slice, an inter prediction state for each inter-coded video block of the slice, and other information to decode video blocks of a current video slice. In another example of the present disclosure, the syntax elements received by video decoder 30 from the bitstream include syntax elements received in one or more of an Adaptive Parameter Set (APS), a Sequence Parameter Set (SPS), a Picture Parameter Set (PPS), or a slice header.

Inverse quantization unit 310 may be used to inverse quantize (i.e., inverse quantize) the quantized transform coefficients provided in the bitstream and decoded by entropy decoding unit 304. The inverse quantization process may include using quantization parameters calculated by video encoder 20 for each video block in the video slice to determine the degree of quantization that should be applied and likewise the degree of inverse quantization that should be applied.

Inverse transform processing unit 312 is used to apply an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to produce a block of residuals in the pixel domain.

The reconstruction unit 314 (e.g., summer 314) is used to add the inverse transform block 313 (i.e., reconstructed residual block 313) to the prediction block 365 to obtain the reconstructed block 315 in the sample domain, e.g., by adding sample values of the reconstructed residual block 313 to sample values of the prediction block 365.

Loop filter unit 320 (either during or after the encoding cycle) is used to filter reconstructed block 315 to obtain filtered block 321 to facilitate pixel transitions or improve video quality. In one example, loop filter unit 320 may be used to perform any combination of the filtering techniques described below. Loop filter unit 320 is intended to represent one or more loop filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, such as a bilateral filter, an Adaptive Loop Filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although loop filter unit 320 is shown in fig. 3 as an in-loop filter, in other configurations, loop filter unit 320 may be implemented as a post-loop filter.

Decoded video block 321 in a given frame or picture is then stored in decoded picture buffer 330, which stores reference pictures for subsequent motion compensation.

Decoder 30 is used to output decoded picture 31, e.g., via output 332, for presentation to or viewing by a user.

Other variations of video decoder 30 may be used to decode the compressed bitstream. For example, decoder 30 may generate an output video stream without loop filter unit 320. For example, the non-transform based decoder 30 may directly inverse quantize the residual signal without the inverse transform processing unit 312 for certain blocks or frames. In another embodiment, video decoder 30 may have inverse quantization unit 310 and inverse transform processing unit 312 combined into a single unit.

Specifically, in the embodiment of the present application, the decoder 30 is used to implement the video image decoding method described in the following embodiments.

It should be understood that other structural variations of the video decoder 30 may be used to decode the encoded video bitstream. For example, video decoder 30 may generate an output video stream without processing by filter 320; alternatively, for some image blocks or image frames, the quantized coefficients are not decoded by entropy decoding unit 304 of video decoder 30 and, accordingly, do not need to be processed by inverse quantization unit 310 and inverse transform processing unit 312. Loop filter 320 is optional; and the inverse quantization unit 310 and the inverse transform processing unit 312 are optional for the case of lossless compression. It should be understood that the inter prediction unit and the intra prediction unit may be selectively enabled according to different application scenarios.

It should be understood that, in the encoder 20 and the decoder 30 of the present application, the processing result of a certain link may be further processed and then output to the next link, for example, after the links such as interpolation filtering, motion vector derivation, or loop filtering, the processing result of the corresponding link is further subjected to operations such as Clip or shift.

For example, the motion vector of the control point of the current image block derived according to the motion vector of the adjacent affine coding block, or the derived motion vector of the sub-block of the current image block may be further processed, which is not limited in the present application. For example, the value range of the motion vector is constrained to be within a certain bit width. Assuming that the allowed bit-width of the motion vector is bitDepth, the motion vector ranges from-2 ^ (bitDepth-1) to 2^ (bitDepth-1) -1, where the "^" symbol represents the power. And if the bitDepth is 16, the value range is-32768-32767. And if the bitDepth is 18, the value range is-131072-131071. As another example, the value of the motion vector (e.g., the motion vector MV of four 4x4 sub-blocks within an 8x8 image block) is constrained such that the maximum difference between the integer part of the four 4x4 sub-blocks MV is no more than N pixels, e.g., no more than one pixel.

Referring to fig. 4, fig. 4 is a schematic structural diagram of a video coding apparatus 400 (e.g., a video encoding apparatus 400 or a video decoding apparatus 400) provided by an embodiment of the present application. Video coding apparatus 400 is suitable for implementing the embodiments described herein. In one embodiment, video coding device 400 may be a video decoder (e.g., decoder 30 of fig. 1A) or a video encoder (e.g., encoder 20 of fig. 1A). In another embodiment, video coding device 400 may be one or more components of decoder 30 of fig. 1A or encoder 20 of fig. 1A described above.

Video coding apparatus 400 includes: an ingress port 410 and a reception unit (Rx)420 for receiving data, a processor, logic unit or Central Processing Unit (CPU)430 for processing data, a transmitter unit (Tx)440 (or simply transmitter 440) and an egress port 450 for transmitting data, and a storage 460 (such as a memory 460) for storing data. Video coding device 400 may also include an optical-to-electrical conversion component and an electrical-to-optical (EO) component coupled with ingress port 410, receiver unit 420 (or simply receiver 420), transmitter unit 440, and egress port 450 for egress or ingress of optical or electrical signals.

The processor 430 is implemented by hardware and software. Processor 430 may be implemented as one or more CPU chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. Processor 430 is in communication with inlet port 410, receiver unit 420, transmitter unit 440, outlet port 450, and memory 460. Processor 430 includes a coding module 470 (e.g., encoding module 470 or decoding module 470). The encoding/decoding module 470 implements embodiments disclosed herein to implement the chroma block prediction methods provided by embodiments of the present application. For example, the encoding/decoding module 470 implements, processes, or provides various encoding operations. Accordingly, substantial improvements are provided to the functionality of the video coding apparatus 400 by the encoding/decoding module 470 and affect the transition of the video coding apparatus 400 to different states. Alternatively, the encode/decode module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

The memory 460, which may include one or more disks, tape drives, and solid state drives, may be used as an over-flow data storage device for storing programs when such programs are selectively executed, and for storing instructions and data that are read during program execution. The memory 460 may be volatile and/or nonvolatile, and may be Read Only Memory (ROM), Random Access Memory (RAM), random access memory (TCAM), and/or Static Random Access Memory (SRAM).

Referring to fig. 5, fig. 5 is a simplified block diagram of an apparatus 500 that may be used as either or both of source device 12 and destination device 14 in fig. 1A according to an example embodiment. Apparatus 500 may implement the techniques of this application. In other words, fig. 5 is a schematic block diagram of an implementation manner of an encoding apparatus or a decoding apparatus (simply referred to as a decoding apparatus 500) of the embodiment of the present application. Among other things, the decoding device 500 may include a processor 510, a memory 530, and a bus system 550. Wherein the processor is connected with the memory through the bus system, the memory is used for storing instructions, and the processor is used for executing the instructions stored by the memory. The memory of the coding device stores program code, and the processor may invoke the program code stored in the memory to perform various video image encoding or decoding methods described herein, particularly video encoding or decoding methods in various inter-prediction modes or intra-prediction modes. To avoid repetition, it is not described in detail here.

In the embodiment of the present application, the processor 510 may be a Central Processing Unit (CPU), and the processor 510 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

The memory 530 may include a Read Only Memory (ROM) device or a Random Access Memory (RAM) device. Any other suitable type of memory device may also be used for memory 530. Memory 530 may include code and data 531 to be accessed by processor 510 using bus 550. Memory 530 may further include an operating system 533 and application programs 535, the application programs 535 including at least one program that allows processor 510 to perform the video encoding or decoding methods described herein, and in particular the video image prediction methods or inter-prediction methods described herein. For example, the application programs 535 may include applications 1 through N, which further include a video encoding or decoding application (simply a video coding application) that performs the video encoding or decoding methods described herein.

The bus system 550 may include a power bus, a control bus, a status signal bus, and the like, in addition to a data bus. For clarity of illustration, however, the various buses are designated in the figure as bus system 550.

Optionally, the translator device 500 may also include one or more output devices, such as a display 570. In one example, the display 570 may be a touch-sensitive display that incorporates a display with a touch-sensitive unit operable to sense touch input. A display 570 may be connected to the processor 510 via the bus 550.

The jfet-O0636 proposal proposes a cross-component adaptive loop filter (CCALF) method for correcting a chroma pixel according to the filter values of a plurality of luminance pixels around the chroma pixel. The luminance pixel is a luminance pixel that is not subjected to Adaptive Loop Filter (ALF), and may be, for example, a reconstructed pixel obtained by adding a prediction pixel and a residual pixel, or a pixel obtained by deblocking filtering a reconstructed pixel, or a pixel obtained by deblocking filtering and SAO processing a reconstructed pixel. The chrominance pixels are pixels subjected to chrominance adaptive loop filtering. Luma adaptive loop filtering e.g. the 7x7 diamond shaped (7x7 diamond) filter luma ALF based on luma gradient classification in h.266/VVC; chroma adaptive loop filtering is based on a 5x5 diamond shaped (5x5 diamond) filter luminance ALF in, for example, h.266/VVC, as shown in fig. 6. For more description of luminance ALF and chrominance ALF, see the introduction to section 3.7.1 of jfet-O2002.

The CCALF method proposed by jfet-O0636 is as follows, where YUV is in the format YUV4:2:0, for example, as shown in fig. 7:

1. analyzing the code stream to obtain a CCALF filter coefficient; wherein CCALF filter coefficients are determined for Cb pixels and Cr pixels, respectively.

2. The correction of chrominance pixels (Cb pixels and Cr pixels may be used) in chrominance image after chrominance ALF

a) Luminance pixels at preset positions in a 5x6 area around a chrominance pixel are obtained, and the correspondence between the luminance pixels and filter coefficients is shown as the numbers in fig. 8 according to the description in jfet-P0080. Where the current chroma pixel is C (0,0), it is located between luma

pixels

4 and 7 in YUV4:2:0 format. Let C (0,0) be (Xc0, Yc0) with respect to the coordinates of the upper left corner of the chrominance image, the coordinates of the luminance pixel 4 are (Xc0 × 2, Yc0 × 2) with respect to the upper left corner of the luminance image, and the coordinates of the luminance pixel 4 are (Xc0 × 2, Yc0 × 2+1) with respect to the upper left corner of the luminance image. Pixel 0 corresponds to coefficient No. 0 of the filter coefficients, pixel 1 corresponds to coefficient No. 1 of the filter coefficients, pixel 12 (4 in total) corresponds to coefficient No. 12 of the filter coefficients, and pixel 13 (2 in total) corresponds to coefficient No. 13 of the filter coefficients.

b) The luminance pixels at the preset positions (i.e. the luminance pixels with digital identifiers in fig. 8) are multiplied by the corresponding filter coefficients and summed to obtain the correction amount D. Wherein, pixel 0 is multiplied by coefficient number 0 in the filter coefficients, pixel 1 is multiplied by coefficient number 1 in the filter coefficients, four pixels 12 are multiplied by coefficient number 12 in the filter coefficients, and 2 pixels 13 are multiplied by coefficient number 13 in the filter coefficients.

c) The correction amount D is added to the chroma pixel C (0,0) to obtain a chroma pixel C1(0, 0).

The method in the JFET-P0080 proposal requires a 14-tap filter and is computationally complex. Therefore, the present invention proposes an additional CCALF filter with a smaller number of taps.

The first embodiment is as follows:

the method comprises the following steps: analyzing the code stream to obtain a CCALF filter coefficient; wherein CCALF filter coefficients are determined for Cb pixels and Cr pixels, respectively. Same as JFET-P0080.

Step two: the correction of chrominance pixels (Cb pixels and Cr pixels may be used) in chrominance image after chrominance ALF

a) Luminance pixels at preset positions in a 5 × 6 area around the chrominance pixels are acquired, and the correspondence between the luminance pixels and the filter coefficients is shown by the numbers in fig. 9, fig. 10, fig. 11, fig. 12, fig. 13, or fig. 14.

b) And multiplying the brightness pixel at the preset position by the corresponding filter coefficient and summing to obtain a correction quantity D. Wherein, pixel 0 is multiplied by coefficient number 0 in the filter coefficients, pixel 1 is multiplied by coefficient number 1 in the filter coefficients, and so on. The Cb pixel uses a filter corresponding to Cb, and a correction quantity D is superposed on the Cb pixel; similarly, the Cr pixel uses a filter corresponding to Cr, and the correction amount D is superimposed on the Cr pixel.

The CCALF filter in fig. 9 includes 5 coefficients (also referred to as a 5-tap filter), and assuming that the coordinates of C (0,0) with respect to the upper left corner of the chrominance image are (Xc0, Yc0), the correction amount D is calculated by the following filtering:

find the corresponding luminance pixels of C (0,0), C (-1,0), C (0, -1), C (0,1), respectively as follows:

c (0,0) corresponds to two luminance pixels, pixel 0 in fig. 9, with coordinates (Xl0, Yl0) and (Xl0, Yl0+ Sz), respectively;

c (-1,0) corresponds to two luminance pixels, pixel 1 in FIG. 9, with coordinates (Xl1, Yl1) and (Xl1, Yl1+ Sz), respectively;

c (1,0) corresponds to two luminance pixels, pixel 2 in fig. 9, with coordinates (Xl2, Yl2) and (Xl2, Yl2+ Sz), respectively;

c (0, -1) corresponds to two luminance pixels, pixel 3 in FIG. 9, with coordinates (Xl3, Yl3) and (Xl3, Yl3+ Sz), respectively;

c (0,1) corresponds to two luminance pixels, pixel 4 in FIG. 9, with coordinates (Xl4, Yl4) and (Xl4, Yl4+ Sz), respectively;

Xl0＝Xc0*Sx，Yl0＝Yc0*Sy

Xl1＝Xc0*Sx-Sx，Yl1＝Yc0*Sy

Xl2＝Xc0*Sx+Sx，Yl2＝Yc0*Sy

Xl3＝Xc0*Sx，Yl3＝Yc0*Sy-Sy*WP

Xl4＝Xc0*Sx，Yl4＝Yc0*Sy+Sy*WP

wherein, for YUV4:2:0 format, Sx is 2, Sy is 2, Sz is 1; for YUV4:2:2 format, Sx ═ 1, Sy ═ 2, Sz ═ 0, or Sz ═ 1; for YUV4:4:4 format, Sx ═ 1, Sy ═ 1, Sz ═ 0; when Sz is 0, each chroma pixel can be considered to correspond to only one luma pixel, such as C (0,0) to (Xl0, Yl0), or C (0, -1) to (Xl3, Yl 3). WP is a preset constant, which is generally greater than or equal to the width of the luminance image.

It should be noted that this correspondence is particularly applicable to the case where the chrominance pixel is located between the upper and lower luminance pixels (as shown in Figure 6-1 in VVC draft 6) when YUV4:2:0 is used. When chroma downsampling is performed in other manners, such as when a chroma pixel coincides with a certain luma pixel, Sz may be set to 0, i.e., each chroma corresponds to a luma pixel, such as C (0,0) corresponds to (Xl0, Yl0), and further such as C (0, -1) corresponds to (Xl3, Yl 3).

Wherein shift and offset are preset constants, such as shift 7, offset 1 < (shift-1); coeff (i) denotes the filter coefficients.

As another way, the average value of a plurality of luminance pixels corresponding to the chrominance pixels may be multiplied by the filter coefficient (it should be noted that, if one chrominance pixel corresponds to two identical luminance pixels, the average value is identical to the luminance pixel value, and may also be regarded as corresponding to 1 luminance pixel). In this case, the method for calculating the chroma correction value D under the filter corresponding to fig. 9 may be:

D＝(((L(Xl0，Yl0)+L(Xl0，Yl0+Sz)+1)＞＞1)*Coeff(0)+((L(Xl1，Yl1)+L(Xl1，Yl1+Sz)+1)＞＞1)*Coeff(1)+((L(Xl2，Yl2)+L(Xl2，Yl2+Sz)+1)＞＞1)*Coeff(2)+((L(Xl3，Yl3)+L(Xl3，Yl3+Sz)+1)＞＞1)*Coeff(3)+((L(Xl4，Yl4)+L(Xl4，Yl4+Sz)+1)＞＞1)*Coeff(4)+offset)＞＞shift

the filter of fig. 10 includes 6 coefficients, wherein two luminance pixels corresponding to C (0,0) correspond to different filter coefficients, and the correction value D is calculated by:

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+(L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(2)+(L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(3)+(L(Xl3，Yl3)+L(Xl3，Yl3+Sz))*Coeff(4)+(L(Xl4，Yl4)+L(Xl4，Yl4+Sz))*Coeff(5)+offset)＞＞shift

The filter of fig. 11 includes 6 coefficients, where C (-1,0), C (0, -1), and C (0,1) correspond to one luminance pixel, and is a simplification of the filter of fig. 10, and the correction value D is calculated by the following method:

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+L(Xl1，Yl1)*Coeff(2)+L(Xl2，Yl2+Sz)*Coeff(3)+L(Xl3，Yl3)*Coeff(4)+L(Xl4，Yl4+Sz)*Coeff(5)+offset)＞＞shift

the filter of fig. 12 includes 7 coefficients, wherein 2 taps are added to the filter of fig. 9, and the correction value D is calculated by:

D＝((L(Xl0，Yl0)+L(Xl0，Yl0+Sz))*Coeff(0)+(L(Xl1，Yl1)+L(Xl1，Yl1+Sz))*Coeff(1)+(L(Xl2，Yl2)+L(Xl2，Yl2+Sz))*Coeff(2)+(L(Xl3，Yl3)+L(Xl3，Yl3+Sz))*Coeff(3)+(L(Xl4，Yl4)+L(Xl4，Yl4+Sz))*Coeff(4)+(L(Xl0-1，Yl0)+L(Xl0+1，Yl0))*Coeff(5)+(L(Xl0-1，Yl0+Sz)+L(Xl0+1，Yl0+Sz))*Coeff(5)+(L(Xl0-2，Yl0-Sz)+L(Xl0+2，Yl0-Sz))*Coeff(6)+(L(Xl0-2，Yl0+Sz*2)+L(Xl0+2，Yl0+Sz*2))*Coeff(6)+offset)＞＞shift

the filter of fig. 13 includes 6 coefficients, where C (0, -1) and C (0,1) correspond to a luminance pixel, and is a simplification of the filter of fig. 10, and the correction value D is calculated by:

D＝(L(Xl0，Yl0)*Coeff(0)+L(Xl0，Yl0+Sz)*Coeff(1)+(L(Xl1，Yl1)+L(Xl1，Yl1+Sz)*Coeff(2)+(L(Xl2，Yl2)+L(Xl2，Yl2+Sz)*Coeff(3)+L(Xl3，Yl3)*Coeff(4)+L(Xl4，Yl4+Sz)*Coeff(5)+offset)＞＞shift

the filter of fig. 14 includes 6 coefficients, and the correction value D is calculated by the method:

wherein X0 ═ X1 ═ Xc0 ═ Sx, Y0 ═ Yc0 ═ Sy, Y1 ═ Y0+1, and S is a preset constant, and represents a positional deviation; corresponding to fig. 14, S is 1.

The filter of fig. 11 can also be represented by the above formula, where S is 2.

Using this method, two luminance pixels L (X0, Y0) and L (X1, Y1) are first found from the current filtered chrominance pixel, where X0 ═ X1 and Y1 ═ Y0+ 1. Taking brightness pixels L (X0-S, Y0) and L (X0, Y0-S) with the left side and the upper side of L (X0, Y0) and the distance of S brightness pixels; taking a luminance pixel L (X1+ S, Y1) and L (X1, Y1+ S) with the space between the right side and the lower side of L (X1, Y1) being S luminance pixels; and filtering the six luminance pixels to obtain a correction value D.

Example two:

Step two: and analyzing the code stream to obtain a position offset constant S in the CCALF. The position shift constant S may be represented, for example, by a flag bit, a value of 1 for S equal to 2 and a value of 0 for S equal to 1. The flag is identified in an ALF data syntax structure (as in the 7.3.2.14 Adaptive loop filter data syntax structure in VVC) in the Sequence Parameter Set (SPS) or in the Adaptation Parameter Set (APS).

Step three: correcting the chroma pixels (Cb and Cr) in the chroma ALF chroma image according to the position offset constant S, including

a) If S is 1, a luminance pixel at a preset position in a 3x4 area around the chrominance pixel C (0,0) is obtained, and the luminance pixel is filtered by using the filter in fig. 14, so as to obtain a correction amount D.

b) If S is 2, a luminance pixel at a preset position in a 5 × 6 area around the chrominance pixel C (0,0) is obtained, and the luminance pixel is filtered by using the filter in fig. 11, so as to obtain a correction amount D.

Arithmetic operator

The arithmetic operator is defined as 0.

Arithmetic operator definition

Logical operators

The logical operator definition is seen at 0.

Logical operator definition

Logical operators	Definition of
		a&&b	AND logic operation between a and b
a\|\|b	Logical operation of OR between a and b
		！	Logical not operation

Relational operators

The relational operator is defined as 0.

Relational operator definition

Relational operators	Definition of
		＞	Is greater than
＞＝	Greater than or equal to
		＜	Is less than
＜＝	Is less than or equal to
		＝＝	Is equal to
！＝	Is not equal to

Bit operator

The bit operator is defined as 0.

Bit operator definition

Bit operator	Definition of
		&	And operation
\|	OR operation
		～	Negation operation
a＞＞b	A is shifted to the right by b bits in the form of a 2's complement integer. This operation is defined only when b takes a positive number
		a＜＜b	A is shifted left by b bits in the form of a 2's complement integer representation. This operation is defined only when b takes a positive number

Assignment of value

The assignment operation is defined as 0.

Assignment operation definition

Assignment operation	Definition of
		＝	Assignment operators
++	In increments, x + + corresponds to x + 1. When used for array subscript, the variable values are solved before the self-addition operation
		--	Decreasing, x-corresponds to x-1. When used for array subscript, the variable values are first solved before the self-subtraction operation
+＝	Self-adding a given value, for example, x + ═ 3 corresponds to x ═ x +3, and x + ═ (-3) corresponds to x ═ x + (-3)
		-＝	From a given value, for example, x-3 corresponds to x-3, and x-3 corresponds to x-3

Mathematical function

The mathematical functions are defined in equations (1) to (11).

In the formula:

x-the argument x.

In the formula:

x-the argument x.

Clip1(x)＝Clip3(0，2^BitDepth-1，x)........................(3)

In the formula:

x is the independent variable x;

BitDepth-the precision of the coded samples.

In the formula:

x is the independent variable x;

i- — lower bound;

j-upper bound.

Median(x，y，z)＝x+y+z-Min(x，Min(y，z))-Max(x，Max(y，z))............(5)

In the formula:

x is the independent variable x;

y-the independent variable y;

z-the independent variable z.

In the formula:

x is the independent variable x;

y-the argument y.

In the formula:

x is the independent variable x;

y-the argument y.

In the formula:

x-the argument x.

Log(x)＝log₂ x................................(9)

In the formula:

x-the argument x.

Ln(x)＝log_e x................................(10)

In the formula:

x is the independent variable x;

e-the base of the natural logarithm, with a value of 2.718281828 ….

Rounding(x，s)＝Sign(x)×((Abs(x)+(1＜＜(s-1)))＞＞s)s≥1..............(11)

In the formula:

x is the independent variable x;

s-the independent variable s.

Structural relation symbol

The structural relationship is defined as 0.

Structural relation symbol

Structural relation symbol	Definition of
		-＞	For example: a- > b means that a is a structure and b is a member variable of a

Those of skill in the art will appreciate that the functions described in connection with the various illustrative logical blocks, modules, and algorithm steps described in the disclosure herein may be implemented as hardware, software, firmware, or any combination thereof. If implemented in software, the functions described in the various illustrative logical blocks, modules, and steps may be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. The computer-readable medium may include a computer-readable storage medium, which corresponds to a tangible medium, such as a data storage medium, or any communication medium including a medium that facilitates transfer of a computer program from one place to another (e.g., according to a communication protocol). In this manner, a computer-readable medium may generally correspond to (1) a non-transitory tangible computer-readable storage medium, or (2) a communication medium, such as a signal or carrier wave. A data storage medium may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code and/or data structures for implementing the techniques described herein. The computer program product may include a computer-readable medium.

By way of example, and not limitation, such computer-readable storage media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the instructions are transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. It should be understood, however, that the computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but are instead directed to non-transitory tangible storage media. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

The instructions may be executed by one or more processors, such as one or more Digital Signal Processors (DSPs), general purpose microprocessors, Application Specific Integrated Circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Thus, the term "processor," as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. Additionally, in some aspects, the functions described by the various illustrative logical blocks, modules, and steps described herein may be provided within dedicated hardware and/or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques may be fully implemented in one or more circuits or logic elements.

The techniques of this application may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an Integrated Circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this application to emphasize functional aspects of means for performing the disclosed techniques, but do not necessarily require realization by different hardware units. Indeed, as described above, the various units may be combined in a codec hardware unit, in conjunction with suitable software and/or firmware, or provided by an interoperating hardware unit (including one or more processors as described above).

The above description is only an exemplary embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for decoding video images, the method comprising:

determining a current chroma pixel (coordinate C (0,0)) to be restored of the current image block;

determining four adjacent chroma pixels of the chroma pixel to be restored, namely a left chroma pixel, a right chroma pixel, an upper chroma pixel and a lower chroma pixel (coordinates are C (-1,0), C (1,0), C (0, -1) and C (0,1) respectively));

correcting the value of the current chrominance pixel at least according to the value of at least one luminance pixel corresponding to the current chrominance pixel and four adjacent chrominance pixels and a preset filter;

reconstructing the current image block based on the modified values of the current chroma pixels.

2. The method of claim 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

and correcting the value of the current chroma pixel according to the product of the values of the two luma pixels corresponding to the current chroma pixel and the first coefficient of the filter, the product of the values of the two luma pixels corresponding to the left adjacent chroma pixel and the second coefficient of the filter, the product of the values of the two luma pixels corresponding to the right adjacent chroma pixel and the third coefficient of the filter, the product of the values of the two luma pixels corresponding to the upper adjacent chroma pixel and the fourth coefficient of the filter, and the product of the values of the two luma pixels corresponding to the lower adjacent chroma pixel and the fifth coefficient of the filter.

3. The method according to claim 1 or 2, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

correcting the value of the current chrominance pixel according to the following mathematical formula:

D＝((L(Xl0,Yl0)+L(Xl0,Yl0+Sz))*Coeff(0)

+(L(Xl1,Yl1)+L(Xl1,Yl1+Sz))*Coeff(1)

+(L(Xl2,Yl2)+L(Xl2,Yl2+Sz))*Coeff(2)

+(L(Xl3,Yl3)+L(Xl3,Yl3+Sz))*Coeff(3)

+(L(Xl4,Yl4)+L(Xl4,Yl4+Sz))*Coeff(4)+offset)>>shift

4. The method of claim 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

and correcting the value of the current chroma pixel according to the product of the value of an upper-side luma pixel corresponding to the current chroma pixel and a first coefficient of the filter, the product of the value of a lower-side luma pixel corresponding to the current chroma pixel and a second coefficient of the filter, the product of the values of two luma pixels corresponding to the left-side adjacent chroma pixel and a third coefficient of the filter, the product of the values of two luma pixels corresponding to the right-side adjacent chroma pixel and a fourth coefficient of the filter, the product of the values of two luma pixels corresponding to the upper-side adjacent chroma pixel and a fifth coefficient of the filter, and the product of the values of two luma pixels corresponding to the lower-side adjacent chroma pixel and a sixth coefficient of the filter.

5. The method according to claim 4 or 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

D＝(L(Xl0,Yl0)*Coeff(0)+L(Xl0,Yl0+Sz)*Coeff(1)

+((L(Xl1,Yl1)+L(Xl1,Yl1+Sz))*Coeff(2)

+((L(Xl2,Yl2)+L(Xl2,Yl2+Sz))*Coeff(3)

+((L(Xl3,Yl3)+L(Xl3,Yl3+Sz))*Coeff(4)

+((L(Xl4,Yl4)+L(Xl4,Yl4+Sz))*Coeff(5)+offset)>>shift

6. The method of claim 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the left-side adjacent chroma pixel and the third coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the right-side adjacent chroma pixel and the fourth coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the upper-side adjacent chroma pixel and the fifth coefficient of the filter, and the product of the value of the lower-side brightness pixel corresponding to the lower-side adjacent chroma pixel and the sixth coefficient of the filter.

7. The method according to claim 6 or 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a preset filter comprises:

D＝(L(Xl0,Yl0)*Coeff(0)+L(Xl0,Yl0+Sz)*Coeff(1)

+L(Xl1,Yl1)*Coeff(2)

+L(Xl2,Yl2+Sz)*Coeff(3)

+L(Xl3,Yl3)*Coeff(4)

+L(Xl4,Yl4+Sz)*Coeff(5)+offset)>>shift

8. The method of claim 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

according to the product of the values of the two luminance pixels corresponding to the current chrominance pixel and the first coefficient of the filter, the product of the values of the two luminance pixels corresponding to the left adjacent chrominance pixel and the second coefficient of the filter, the product of the values of the two luminance pixels corresponding to the right adjacent chrominance pixel and the third coefficient of the filter, the product of the values of the two luminance pixels corresponding to the upper adjacent chrominance pixel and the fourth coefficient of the filter, the product of the values of the two luminance pixels corresponding to the lower adjacent chrominance pixel and the fifth coefficient of the filter, the product of the values of the upper luminance pixel corresponding to the left adjacent chrominance pixel, the value of the lower luminance pixel corresponding to the left adjacent chrominance pixel, the value of the upper luminance pixel corresponding to the right adjacent chrominance pixel and the value of the right adjacent chrominance pixel And correcting the value of the current chroma pixel by multiplying the value of the lower-side luma pixel corresponding to the chroma pixel by a seventh coefficient of the filter, and multiplying the value of the right-side luma pixel of the upper-side luma pixel corresponding to the left-side adjacent chroma pixel, the value of the right-side luma pixel of the lower-side luma pixel corresponding to the left-side adjacent chroma pixel, the value of the left-side luma pixel of the upper-side luma pixel corresponding to the right-side adjacent chroma pixel and the value of the left-side luma pixel of the lower-side luma pixel corresponding to the right-side adjacent chroma pixel by a sixth coefficient of the filter.

9. The method according to claim 8 or 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

D＝((L(Xl0,Yl0)+L(Xl0,Yl0+Sz))*Coeff(0)

+((L(Xl1,Yl1)+L(Xl1,Yl1+Sz))*Coeff(1)

+((L(Xl2,Yl2)+L(Xl2,Yl2+Sz))*Coeff(2)

+((L(Xl3,Yl3)+L(Xl3,Yl3+Sz))*Coeff(3)

+((L(Xl4,Yl4)+L(Xl4,Yl4+Sz))*Coeff(4)

+((L(Xl0-1,Yl0)+L(Xl0+1,Yl0))*Coeff(5)

+((L(Xl0-1,Yl0+Sz)+L(Xl0+1,Yl0+Sz))*Coeff(5)

+((L(Xl0-2,Yl0-Sz)+L(Xl0+2,Yl0-Sz))*Coeff(6)

+(L(Xl0-2,Yl0+Sz*2)+L(Xl0+2,Yl0+Sz*2))*Coeff(6)+offset)>>shift

10. The method of claim 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the values of the two brightness pixels corresponding to the left-side adjacent chroma pixel and the third coefficient of the filter, the product of the values of the two brightness pixels corresponding to the right-side adjacent chroma pixel and the fourth coefficient of the filter, the product of the value of the upper-side brightness pixel corresponding to the upper-side adjacent chroma pixel and the fifth coefficient of the filter, and the product of the value of the lower-side brightness pixel corresponding to the lower-side adjacent chroma pixel and the sixth coefficient of the filter.

11. The method according to claim 10 or 1, wherein the modifying the value of the current chroma pixel according to the value of the at least one luma pixel corresponding to each of the current chroma pixel and four neighboring chroma pixels and a predetermined filter comprises:

D＝(L(Xl0,Yl0)*Coeff(0)+L(Xl0,Yl0+Sz)*Coeff(1)

+((L(Xl1,Yl1)+L(Xl1,Yl1+Sz))*Coeff(2)

+((L(Xl2,Yl2)+L(Xl2,Yl2+Sz))*Coeff(3)

+(L(Xl3,Yl3)*Coeff(4)

+L(Xl4,Yl4+Sz)*Coeff(5)+offset)>>shift。

12. a method for decoding video images, the method comprising:

correcting the value of the current chrominance pixel according to the value of an upper luminance pixel, the value of a lower luminance pixel, the value of a left luminance pixel of the upper luminance pixel, the value of an upper luminance pixel of the upper luminance pixel, the value of a lower luminance pixel of the lower luminance pixel, the value of a right luminance pixel of the lower luminance pixel and a preset filter, wherein the upper luminance pixel corresponds to the current chrominance pixel;

13. The method of claim 12, wherein the modifying the value of the current chroma pixel according to the value of the upper luma pixel, the value of the lower luma pixel, the value of the left luma pixel of the upper luma pixel, the value of the upper luma pixel, the value of the lower luma pixel, the value of the right luma pixel of the lower luma pixel, and a predetermined filter comprises:

and correcting the value of the current chroma pixel according to the product of the value of the upper-side brightness pixel corresponding to the current chroma pixel and the first coefficient of the filter, the product of the value of the lower-side brightness pixel corresponding to the current chroma pixel and the second coefficient of the filter, the product of the value of the left-side brightness pixel of the upper-side brightness pixel and the third coefficient of the filter, the product of the value of the upper-side brightness pixel and the fifth coefficient of the filter, the product of the value of the lower-side brightness pixel and the sixth coefficient of the filter, and the product of the value of the right-side brightness pixel of the lower-side brightness pixel and the fourth coefficient of the filter.

14. The method according to claim 12 or 13, wherein the modifying the value of the current chroma pixel according to the value of the upper luma pixel, the value of the lower luma pixel, the value of the left luma pixel of the upper luma pixel, the value of the upper luma pixel, the value of the lower luma pixel, the value of the right luma pixel of the lower luma pixel, and a predetermined filter comprises:

D＝(L(X0,Y0)*Coeff(0)+L(X1,Y1)*Coeff(1)

+L(X0-1,Y0)*Coeff(2)+L(X1+1,Y1)*Coeff(3)

+(L(X0,Y0-1)*Coeff(4)+L(X1,Y1+1)*Coeff(5)+offset)>>shift

wherein X0 ═ X1 ═ Xc0 ═ Sx, Y0 ═ Yc0 ═ Sy, and Y1 ═ Y0+ 1.

15. A method for decoding video images, the method comprising:

determining an offset value to be used;

determining 4 luminance pixels which need to be used for correcting the value of the current chrominance pixel according to the offset value;

correcting the value of the current chrominance pixel according to the value of the upper luminance pixel and the value of the lower luminance pixel corresponding to the current chrominance pixel, the values of the 4 luminance pixels and a preset filter;

16. The method of claim 15, wherein the offset value is 1;

the 4 luminance pixels include: a left luminance pixel of the upper luminance pixels, an upper luminance pixel of the upper luminance pixels, a lower luminance pixel of the lower luminance pixels, and a right luminance pixel of the lower luminance pixels.

17. The method of claim 16, wherein the modifying the value of the current chroma pixel according to the upper and lower luma pixel values corresponding to the current chroma pixel and the 4 luma pixel values and the default filter comprises:

18. The method of claim 15, wherein the offset value is 2;

the 4 luminance pixels include: the chrominance signal processing circuit comprises an upper luminance pixel corresponding to a left adjacent chrominance pixel of the current chrominance pixel, a lower luminance pixel corresponding to a right adjacent chrominance pixel of the current chrominance pixel, an upper luminance pixel corresponding to an upper adjacent chrominance pixel of the current chrominance pixel, and a lower luminance pixel corresponding to a lower adjacent chrominance pixel of the current chrominance pixel.

19. The method of claim 18, wherein the modifying the value of the current chroma pixel according to the upper and lower luma pixel values corresponding to the current chroma pixel and the 4 luma pixel values and the default filter comprises:

20. The method according to claims 15 to 19, wherein the modifying the value of the current chroma pixel according to the upper and lower luma pixel values corresponding to the current chroma pixel and the 4 luma pixel values and the default filter comprises:

D＝(L(X0,Y0)*Coeff(0)+L(X1,Y1)*Coeff(1)

+L(X0-S,Y0)*Coeff(2)+L(X1+S,Y1)*Coeff(3)

+(L(X0,Y0-S)*Coeff(4)+L(X1,Y1+S)*Coeff(5)+offset)>>shift

21. A video decoder, comprising:

means for performing a method as described in any of claims 1-20.

22. A video encoding and decoding apparatus comprising: a non-volatile memory and a processor coupled to each other, the processor calling program code stored in the memory to perform the method as described in any one of claims 1-20.

23. A computer-readable storage medium, in which a computer program is stored which, when run on a processor, implements the method of any one of claims 1-20.