CN112636859A - IEEE1588 protocol time calibration method based on linear regression algorithm - Google Patents

IEEE1588 protocol time calibration method based on linear regression algorithm Download PDF

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CN112636859A
CN112636859A CN202011537547.7A CN202011537547A CN112636859A CN 112636859 A CN112636859 A CN 112636859A CN 202011537547 A CN202011537547 A CN 202011537547A CN 112636859 A CN112636859 A CN 112636859A
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time
value
timestamp
ieee1588 protocol
register
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CN112636859B (en
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王红春
金星
王国栋
程德玉
王波
张盼红
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Xi'an Yunwei Zhilian Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays

Abstract

The invention discloses an IEEE1588 protocol time calibration method based on a linear regression algorithm, which comprises the following steps of 1, calculating to obtain a time deviation value; subtract the value from the system timestamp register system _ time; step 2, calculating the current time deviation value and a time stamp in a corresponding sync frame, calculating the time stamp and storing the time stamp into a time stamp table; step 3, calculating the values of a and b; step 4, calculating a frequency compensation value; step 5, storing a compensation value by a register addend; step 6, when the hardware crystal oscillator generates time counting, adding the counting period duration of the hardware crystal oscillator and the value in the register addend in the step 5 to the value of the timestamp register system _ time obtained in the step 1 to obtain the current value of the system timestamp register system _ time, namely completing the calibration of the system time; and 7, the system receives a new IEEE1588 protocol and repeatedly executes the steps 2 to 6. The invention predicts the integral correction time deviation by a linear regression algorithm, and has high synchronization precision; meanwhile, the time deviation correction speed is high, and the time deviation jitter is small.

Description

IEEE1588 protocol time calibration method based on linear regression algorithm
Technical Field
The invention belongs to the field of computer network communication, and particularly relates to an IEEE1588 protocol time calibration method based on a linear regression algorithm.
Background
In the field of modern industrial manufacturing, a large system is often divided into a plurality of subsystems and sub-nodes, and the nodes work cooperatively, so that the time of each node device is required to be consistent. However, most of the hardware time measurement is based on a counting type time measurement method of a crystal oscillator, and since the frequency of each crystal oscillator cannot be completely the same, the time of different hardware devices is inconsistent. Therefore, a certain mechanism is needed to perform time synchronization on the hardware devices on the network at certain time intervals, so as to provide a basic time synchronization service for the whole network.
The ethernet-based time synchronization method is specified in the standard IEEE1588-2008(version 2) for ethernet. The method has the characteristics of simple realization, high synchronization precision, standardization and wide application, and is widely applied to real-time industrial Ethernet. The time deviation of the master node and the slave node is calculated through an IEEE1588 protocol, and then the system clock of the slave node is calibrated, so that the master clock and the slave clock tend to be consistent. As shown in fig. 1, the principle of time synchronization of IEEE1588 is that one device serves as a Master device (Master), one or more devices serve as a plurality of Slave devices (Slave), and the Slave corrects the time of the Slave by calculating a time offset with the Master, so that the time of the Slave coincides with the Master.
However, the IEEE1588 protocol does not provide a specific time calibration method, and a general method is to directly subtract an offset value from the system time to calibrate, so that the method is poor in accuracy and large in clock jitter, and finally the time synchronization precision is deteriorated.
Disclosure of Invention
In view of the above problems in the prior art, an object of the present invention is to provide an IEEE1588 protocol efficient time calibration method based on a linear regression algorithm.
In order to achieve the purpose, the invention provides the following technical scheme for solving the problem:
an IEEE1588 protocol time calibration method based on a linear regression algorithm specifically comprises the following steps:
step 1, calculating to obtain a time deviation value t by using an IEEE1588 protocolb(ii) a Subtract t from the system timestamp register system _ timebObtaining an updated system timestamp register system _ time;
step 2, calculating to obtain the current time deviation value t by using an IEEE1588 protocolbAnd the corresponding time stamp ts in the sync frame, x is calculated using the following equationiAnd yiAnd x isiAnd yiStore in a timestamp table as a set of data:
yi＝ts-tb
Figure BDA0002853968620000021
wherein i is a natural number, and ts is a time stamp when the system receives a sync frame of an IEEE1588 protocol for the ith time; t is tbThe time offset value is calculated by using an IEEE1588 protocol for the ith time; the initial value of a is 1, and values after the initial value are obtained by calculation and dynamic according to the step 3 in the cycle of the (i-1) th time; x is the number ofiAnd yiX and y when receiving an IEEE1588 protocol for the ith time, wherein x is a standard timestamp, namely a timestamp of a master end, and y is a local actual timestamp, namely the timestamp of a slave end;
and 3, calculating the values of a and b, wherein the formula is as follows:
Figure BDA0002853968620000022
Figure BDA0002853968620000023
when i is less than or equal to 100, n is equal to i, when i is more than 100, n is equal to 100, and the first group of data in the time stamp table is deleted, so that 100 groups of data are kept in the time stamp table, namely, the sum of the data in the formula is at most 100 groups of data;
step 4, calculating a frequency compensation value trThe formula is as follows:
tr＝(a-1)*Δt+b
wherein, DeltatThe value of (1) is 1 second;
step 5, setting a register addend for storing the frequency compensation value t calculated in step 4r；
Step 6, when the hardware crystal oscillator generates time counting, adding the counting period duration of the hardware crystal oscillator and the value in the register addend in the step 5 to the updated value of the system timestamp register system _ time obtained in the step 1 to obtain the current value of the system timestamp register system _ time, namely completing the calibration of the system time;
and 7, receiving a new IEEE1588 protocol by the system, enabling i to be i +1, and turning to the step 2.
Further, in the step 5, the register addend is a 32-bit register.
Further, in step 6, the counting period duration of the hardware crystal oscillator is 1 s.
Further, in step 7, the IEEE1588 protocol is received every 100us to 10s, and 1s is taken.
Compared with the prior art, the invention has the following beneficial effects:
1. the synchronization precision is high. The linear regression algorithm is used for predicting the integral correction time deviation, and the influence caused by the correction time deviation process is considered.
2. The time deviation correction speed is high. And (3) calculating a prediction deviation value by using a linear regression algorithm after collecting least three times of historical deviation data. On the basis of not changing the IEEE1588 standard, efficient time calibration is realized, and the method is compatible with the original system.
3. The jitter of the time offset is small. Due to the fact that the clock is calibrated in the mode of the frequency compensation value, clock jitter generated by the method is smaller than that generated by the traditional method of directly modifying the clock.
Drawings
FIG. 1 is an IEEE1588 time-synchronized Ethernet architecture;
FIG. 2 is a diagram illustrating the variation of the time offset from the Master with time in a conventional clock calibration method;
FIG. 3 is a graph showing the time deviation from Master as a function of time when a clock is calibrated using a frequency compensation value and a linear regression algorithm;
fig. 4 is a schematic diagram of conventional clock calibration.
FIG. 5 is a schematic diagram of linear regression analysis of slave and master.
FIG. 6 is an algorithmic flow chart of the method of the present invention.
The invention is further explained below with reference to the drawings and the detailed description.
Detailed Description
Based on a plurality of technical problems in the prior art, the design idea of the invention is as follows: 1) and time calibration, namely adding a compensation value to the frequency of the system clock to correct the time deviation. 2) And calculating a frequency compensation value by using a linear regression algorithm according to the deviation value synchronously obtained by IEEE1588 each time. The specific design process is as follows:
1. correcting a clock using a clock frequency compensation value
As shown in fig. 2, the conventional clock calibration directly corrects the system time, i.e., after calculating the time offset according to the IEEE1588 protocol, the offset is subtracted from the system time. Since the time offset increases with time and the calibration is corrected at intervals, the time offset will have a relatively large jitter.
The invention uses the frequency compensation value to calibrate the clock, namely, when the hardware crystal oscillator generates time count, a compensation value is added, thereby the system time is calibrated. The compensation value acts on the whole timing process, and the condition that the time deviation is gradually increased along with the time does not occur. As can be seen from fig. 3, the time-offset jitter of the whole system can become smaller and more gradual.
2. Linear regression calculation of frequency compensation values
As shown in fig. 4, in the conventional clock calibration, the offset value is calculated to the correction time, and data transmission and calculation of a plurality of software and hardware modules are performed in the middle of the calibration, so that the delay of time correction is too large, and the synchronization precision is too high.
Since the whole time correction process is performed by data transmission, calculation of the offset value, correction of the clock, and the like, the actual real offset value should be the calculated offset value + the calibration time. Namely:
tr＝tb+tc
wherein t isrIs the actual deviation, tbIs the time offset value, t, calculated by IEEE1588cIs the time consumed by the calibration process, i.e., t1+ t2+ t3 in the figure. When the clock is directly corrected, tcThe value of (c) is ignored and the overall calibration result becomes less accurate.
Linear Regression (Linear Regression) is a statistical analysis that uses Regression analysis in mathematical statistics to determine the quantitative relationship of interdependence between two or more variables. As shown in FIG. 5, in the present invention, the input variable is the time deviation value t between slave and master calculated by IEEE1588 protocolbAnd the time stamp ts when the sync frame of the IEEE1588 protocol is received is subjected to linear regression analysis to obtain a time calibration value tr(i.e., frequency offset).
The linear regression here includes an independent variable and a dependent variable, and the relationship between the independent variable and the dependent variable can be approximated by a straight line, so the linear regression here is a unitary linear regression:
y ═ ax + b (equation 1)
Wherein, x is a standard timestamp, that is, a timestamp of the master end, and y is a local actual timestamp, that is, a timestamp of the slave end. a and b are coefficients.
According to the least squares method, the calculation formula for a and b is as follows:
Figure BDA0002853968620000041
Figure BDA0002853968620000042
xiand yiX and y obtained by timing are calculated by the following formula:
yi＝ts-tb(formula 4)
Figure BDA0002853968620000043
Wherein ts is a time stamp when a sync frame of the IEEE1588 protocol is received, and tbThe time deviation value of slave and master calculated by IEEE1588 protocol is shown. The initial value of a is 1, and the subsequent values are calculated dynamically according to the formula 2.
Finally, the time calibration values after regression analysis are:
tr＝(a-1)*Δt+ b (equation 6)
Where ΔtThe value of (1) is 1 second, a frequency compensation value is calculated through regression analysis, then a system clock is corrected, and the whole synchronization precision can be improved to be within 100 nanoseconds from microsecond level of a traditional method.
Example 1:
following the design concept of the present invention, the method for calibrating IEEE1588 protocol efficient time based on linear regression algorithm in this embodiment specifically includes the following steps:
step 1, calculating to obtain a time deviation value t by using an IEEE1588 protocolb(ii) a Subtract t from the system timestamp register system _ timebObtaining an updated system timestamp register system _ time;
since the frequency compensation value is compensated for the system time of 1 second, the compensation value cannot be greater than 1 second, and the step can reduce the system time deviation to be within 1 ms.
Step 2, calculating to obtain the current time deviation value t by using an IEEE1588 protocolbAnd the corresponding time stamp ts in the sync frame, x is calculated using the following equationiAnd yiAnd x isiAnd yiStore in a timestamp table as a set of data:
yi＝ts-tb
Figure BDA0002853968620000051
wherein i is a natural number, and ts is a time stamp when the system receives a sync frame of an IEEE1588 protocol for the ith time; t is tbThe time offset value is calculated by using an IEEE1588 protocol for the ith time; the initial value of a is 1, and values after the initial value are obtained by calculation and dynamic according to the step 3 in the cycle of the (i-1) th time; x is the number ofiAnd yiX and y when receiving an IEEE1588 protocol for the ith time, wherein x is a standard timestamp, namely a timestamp of a master end, and y is a local actual timestamp, namely the timestamp of a slave end;
and 3, calculating the values of a and b, wherein the formula is as follows:
Figure BDA0002853968620000052
Figure BDA0002853968620000053
when i is less than or equal to 100, n is equal to i, when i is more than 100, n is equal to 100, and the first group of data in the time stamp table is deleted, so that 100 groups of data are kept in the time stamp table, namely, the sum of the data in the formula is at most 100 groups of data;
step 4, calculating a frequency compensation value trThe formula is as follows:
tr＝(a-1)*Δt+b
wherein, DeltatThe value of (2) is 1 second.
In the steps, the linear regression algorithm is used for predicting the integral correction time deviation, and the influence caused by the correction time deviation process is considered, so that the synchronization precision is greatly improved compared with the prior art.
Step 5, setting a 32-bit register addend for storing the frequency compensation value t calculated in step 4r；
Step 6, when the hardware crystal oscillator generates time counting, adding the updated value of the system timestamp register system _ time obtained in the step 1 to the counting cycle duration (generally 1s) of the hardware crystal oscillator and the value in the register addend in the step 5 to obtain the current value of the system timestamp register system _ time, namely completing the calibration of the system time;
and 7, receiving a new IEEE1588 protocol by the system, enabling i to be i +1, and turning to the step 2.
The IEEE1588 protocol is generally received every 100us-10s, and is generally 1 s;
according to the scheme, the timestamp register system _ time is subtracted by t through the step 1bObtaining an updated timestamp register, namely removing the time deviation to realize the primary adjustment of the system time; and 2-6, adding the frequency compensation value dynamically updated by the linear regression algorithm to the updated timestamp register system _ time, namely correcting the deviation of the system time removal, realizing fine adjustment of the system time and overcoming the defect of low synchronization precision in the prior art. Furthermore, the dynamic fine adjustment of the system time is realized by dynamically cycling the process in real time.
Through experiments, when the clock is directly corrected by using the time deviation value, the time deviation value of the system is 323 +/-30 ns. After the linear regression algorithm of the invention is used for correction, the time deviation value of the system is-2.3 +/-20 ns.

Claims (4)

1. An IEEE1588 protocol time calibration method based on a linear regression algorithm is characterized by comprising the following steps:
step 1, calculating to obtain a time deviation value t by using an IEEE1588 protocolb(ii) a Subtract t from the system timestamp register system _ timebObtaining an updated system timestamp register system _ time;
step 2, calculating to obtain the current time offset by using an IEEE1588 protocolDifference tbAnd the corresponding time stamp ts in the sync frame, x is calculated using the following equationiAnd yiAnd x isiAnd yiStore in a timestamp table as a set of data:
yi＝ts-tb
Figure FDA0002853968610000011
wherein i is a natural number, and ts is a time stamp when the system receives a sync frame of an IEEE1588 protocol for the ith time; t is tbThe time offset value is calculated by using an IEEE1588 protocol for the ith time; the initial value of a is 1, and values after the initial value are obtained by calculation and dynamic according to the step 3 in the cycle of the (i-1) th time; x is the number ofiAnd yiX and y when receiving an IEEE1588 protocol for the ith time, wherein x is a standard timestamp, namely a timestamp of a master end, and y is a local actual timestamp, namely the timestamp of a slave end;
and 3, calculating the values of a and b, wherein the formula is as follows:
Figure FDA0002853968610000012
Figure FDA0002853968610000013
when i is less than or equal to 100, n is equal to i, when i is more than 100, n is equal to 100, and the first group of data in the time stamp table is deleted, so that 100 groups of data are kept in the time stamp table, namely, the sum of the data in the formula is at most 100 groups of data;
step 4, calculating a frequency compensation value trThe formula is as follows:
tr＝(a-1)*Δt+b
wherein, DeltatThe value of (1) is 1 second;
step 5, setting a register addend for the storage step4 calculated frequency compensation value tr；
Step 6, when the hardware crystal oscillator generates time counting, adding the counting period duration of the hardware crystal oscillator and the value in the register addend in the step 5 to the updated value of the system timestamp register system _ time obtained in the step 1 to obtain the current value of the system timestamp register system _ time, namely completing the calibration of the system time;
and 7, receiving a new IEEE1588 protocol by the system, enabling i to be i +1, and turning to the step 2.
2. The IEEE1588 protocol time calibration method based on linear regression algorithm of claim 1, wherein in the step 5, the register addend is a 32-bit register.
3. The IEEE1588 protocol time calibration method based on linear regression algorithm of claim 1, wherein in the step 6, a counting period duration of the hardware crystal oscillator is 1 s.
4. The IEEE1588 protocol time calibration method based on linear regression algorithm as claimed in claim 1, wherein in step 7, the IEEE1588 protocol is received every 100us-10s, and 1s is taken.
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