CN112634833A - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
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- CN112634833A CN112634833A CN202110019366.3A CN202110019366A CN112634833A CN 112634833 A CN112634833 A CN 112634833A CN 202110019366 A CN202110019366 A CN 202110019366A CN 112634833 A CN112634833 A CN 112634833A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
Abstract
The application provides a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: a driving module, a compensation module, a node reset module, a light emitting control module and a light emitting device (D1); the driving module comprises a driving transistor (T1), the compensation module comprises a data transistor (T2) and a compensation transistor (T3), the driving transistor (T1) is a polycrystalline silicon thin film transistor, and the data transistor (T2) and the compensation transistor (T3) are both oxide transistors. The data transistor (T2) and the compensation transistor (T3) of the compensation module in the pixel circuit are made of oxide thin film transistors, the thin film transistors in the driving module, the node reset module and the light-emitting control module are made of polysilicon thin film transistors, and the pixel circuit is provided with a stable display effect by combining the oxide thin film transistors and the polysilicon thin film transistors.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a pixel circuit, a driving method thereof, and a display panel.
Background
With the development of Display technology, Organic Light Emitting Diode (OLED) Display devices are increasingly widely used, and compared with Liquid Crystal displays, OLED displays have the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, fast response speed, and the like. The pixel circuit design is the core technical content of the OLED display, and has important research significance.
In the prior art, a thin film transistor in a pixel circuit is usually formed by a Low Temperature Poly-silicon (LTPS) process, and the thin film transistor formed by the LTPS process has a large leakage current, so that the problem of flicker and the like easily occurs when Low frequency display is adopted, and the display quality is affected.
Disclosure of Invention
The application provides a pixel circuit, a driving method thereof and a display panel, which are used for stabilizing the display effect of the pixel circuit.
In order to realize the functions, the technical scheme provided by the application is as follows:
a pixel circuit, comprising: the device comprises a driving module, a compensation module, a node reset module, a light-emitting control module and a light-emitting device D1;
the driving module is connected to the first node A, the second node B and the compensation module;
the compensation module is connected to the first node A, the second node B and the driving module;
the node resetting module is connected to a third node C and the compensation module;
the light emitting control module is connected to a first node A, a second node B and a third node C;
the driving module comprises a driving transistor T1, the compensation module comprises a data transistor T2 and a compensation transistor T3, the driving transistor T1 is a polysilicon thin film transistor, and the data transistor T2 and the compensation transistor T3 are oxide thin film transistors.
In the pixel circuit of the present application, the pixel circuit further includes a fourth node Q, the gate of the Data transistor T2 is connected to the second Scan signal Scan2, the first terminal of the Data transistor T2 is connected to the Data signal Data, and the second terminal of the Data transistor T2 is connected to the first node a;
the gate of the compensation transistor T3 is connected to the second Scan signal Scan2, the first terminal of the compensation transistor T3 is connected to the fourth node Q, and the second terminal of the compensation transistor T3 is connected to the second node B.
In the pixel circuit of the present application, the compensation module further includes a storage capacitor C1 connected in series between a first voltage terminal Vdd and the gate of the driving transistor T1;
a first terminal of the storage capacitor C1 is connected to a first voltage terminal Vdd and a first terminal of the first switching transistor T5, and a second terminal of the storage capacitor C1 is connected to a fourth node Q.
In the pixel circuit of the present application, the node reset block includes a first reset transistor T7 and a second reset transistor T4;
a first terminal of the first reset transistor T7 is connected to a first initialization signal VI1, a second terminal of the first reset transistor T7 is connected to a third node C, and a gate of the first reset transistor T7 is connected to a first Scan signal Scan 1;
a first terminal of the second reset transistor T4 is connected to a second initialization signal VI2, a second terminal of the second reset transistor T4 is connected to a fourth node Q, and a gate of the second reset transistor T4 is connected to a first Scan signal Scan 1.
In the pixel circuit of the present application, the first initialization signal VI1 and the second initialization signal VI2 are both positive voltage signals during the light emitting period.
In the pixel circuit of the present application, the light emission control module includes a first switching transistor T5 and a second switching transistor T6;
a first terminal of the first switching transistor T5 is connected to a first voltage terminal Vdd, a second terminal of the first switching transistor T5 is connected to a first node a, and a gate of the first switching transistor T5 is connected to a light emission control signal EM;
the first terminal of the second switching transistor T6 is connected to the second node B, the second terminal of the second switching transistor T6 is connected to the third node C, and the gate of the second switching transistor T6 is connected to the scan signal (EM).
In the pixel circuit of the present application, the anode of the light emitting device D1 is connected to the third node C, and the cathode of the light emitting device D1 is connected to the low potential power supply signal Vss.
The present application further provides a driving method of a pixel circuit, including any one of the pixel circuits described above, the driving method of the pixel circuit including:
initialization phase t 1: the first and second Scan signals Scan1 and Scan2 are at a low level, the emission control signal EM is at a high level, the first and second reset transistors T7 and T4 are turned on in response to the first Scan signal Scan1, the first initialization signal VI1 is transmitted to the anode of the light emitting device D1 through the first reset transistor T7, and the anode voltage of the light emitting device D1 is initialized; the second initialization signal VI2 is transmitted to the gate of the driving transistor T1 through the second reset transistor T4, initializing the gate voltage of the driving transistor T1;
compensation phase t 2: the second Scan signal Scan2 is at a low level, the first Scan signal Scan1 and the emission control signal EM are at a high level, the Data transistor T2 and the compensation transistor T3 are turned on in response to the second Scan signal Scan2, the Data signal Data) is transmitted to the first terminal of the driving transistor T1 through the Data transistor T2, the compensation transistor T3 is turned on so that the driving transistor T1 is diode-connected, the Data signal Data having a function of compensating for the threshold voltage is transmitted to the gate of the driving transistor T1 through the driving transistor T1 and the compensation transistor T3, and the threshold voltage of the driving transistor T1 is compensated;
lighting phase t 3: the first Scan signal Scan1 is at a high level, the second Scan signal Scan2 and the emission control signal EM are at a low level, the first initialization signal VI1 and the second initialization signal VI2 are positive voltage signals, the first switching transistor T5 and the second switching transistor T6 are turned on in response to the emission control signal EM, if the gate voltage of the driving transistor T1 turns on the driving transistor T1 in a compensation stage, the driving transistor T1 generates a driving current to drive the light emitting device D1 to emit light, and the gate voltage of the driving transistor T1 and the anode voltage of the light emitting device D1 are maintained stable by the first reset transistor T7 and the second reset transistor T4, so that the stability of light emission of the light emitting device D1 is ensured.
The application also provides a display panel, which comprises any one of the pixel circuits and a driving chip electrically connected with the pixel circuit.
In the display panel of the present application, the display panel includes a display area and a bezel area adjacent to the display area;
the pixel circuit includes a first initialization signal line and a second initialization signal line;
the driving chip is located in the frame area, the first initialization signal line and the second initialization signal line are electrically connected with the driving chip, and the first initialization signal line and the second initialization signal line extend from the frame area to the display area.
The beneficial effect of this application: the data transistor T2 and the compensation transistor T3 of the compensation module in the pixel circuit are made of oxide thin film transistors, the thin film transistors in the driving module, the node reset module and the light emitting control module are made of polysilicon thin film transistors, and the pixel circuit is made to have a stable display effect by arranging the combination of the oxide thin film transistors and the polysilicon thin film transistors in the pixel circuit.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a pixel circuit module according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a pixel circuit structure according to an embodiment of the present disclosure;
fig. 3 is a timing diagram illustrating an operation of a pixel circuit driving method according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the prior art, a thin film transistor in a pixel circuit is usually formed by a Low Temperature Poly-Silicon (LTPS) process, and the thin film transistor formed by the LTPS process has a large leakage current, so that the problem of flicker and the like easily occurs when Low frequency display is adopted, and the display quality is affected. Based on this, the application provides a pixel circuit, a driving method thereof and a display panel, which are used for stabilizing the display effect of the pixel circuit.
Referring to fig. 1 and fig. 2, the present application provides a pixel circuit, including: the light-emitting device comprises a driving module, a compensation module, a node reset module, a light-emitting control module and a light-emitting device D1.
The driving module is connected to the first node A, the second node B and the compensation module; the compensation module is connected to the first node A, the second node B and the driving module; the node reset module 103 is connected to a third node C and the compensation module; the lighting control module 104 is connected to a first node a, a second node B, and a third node C.
In this application, the driving module includes a driving transistor T1, the compensation module includes a data transistor T2 and a compensation transistor T3, the driving transistor T1 is a polysilicon thin film transistor, and the data transistor T2 and the compensation transistor T3 are oxide thin film transistors.
The data transistor T2 and the compensation transistor T3 which are different from the polysilicon thin film transistor in type are arranged in the pixel circuit compensation module, further, the data transistor T2 and the compensation transistor T3 adopt oxide thin film transistors, and the combination of the oxide thin film transistors and the polysilicon thin film transistors is arranged in the pixel circuit, so that the pixel circuit has stable display effect.
The technical solution of the present application will now be described with reference to specific embodiments.
Example one
Referring to fig. 2, a pixel circuit structure according to an embodiment of the present disclosure is shown.
In the present embodiment, there is provided a pixel circuit including: a driving module 101, a compensation module 102, a node reset module 103, a light emitting control module 104, and a light emitting device D1.
In this embodiment, the pixel circuit includes a first node a, a second node B, a third node C and a fourth node Q, and the driving module 101 is connected to the first node a, the second node B and the fourth node Q; the compensation module 102 is connected to a first node a, a second node B and a fourth node Q; the node reset module 103 is connected to a third node C and a fourth node Q; the light emitting control module is connected to a first node A, a second node B and a third node C
In this embodiment, the driving module includes a driving transistor T1, a first terminal of the driving transistor T1 is connected to the first node a, a second terminal of the driving transistor T1 is connected to the second node B, and a gate of the driving transistor T1 is connected to the fourth node Q.
Further, in the present embodiment, the first terminal of the driving transistor T1 is a source, and the second terminal of the driving transistor T1 is a drain.
In the present embodiment, the compensation module 102 includes a data transistor T2 and a compensation transistor T3.
A gate of the Data transistor T2 is connected to the second Scan signal Scan2, a first terminal of the Data transistor T2 is connected to the Data signal Data), and a second terminal of the Data transistor T2 is connected to the first node a.
It should be noted that, in the embodiment, the first terminal of the data transistor T2 is a source or a drain, and the second terminal of the data transistor T2 is a source or a drain, which is not limited in the embodiment.
The gate of the compensation transistor T3 is connected to the second Scan signal Scan2, the first terminal of the compensation transistor T3 is connected to the fourth node Q, and the second terminal of the compensation transistor T3 is connected to the second node B. Further, in the present embodiment, the first terminal of the compensation transistor T3 is a source, and the second terminal of the compensation transistor T3 is a drain.
In this embodiment, the compensation module 102 further includes a storage capacitor C1 connected in series between the first voltage terminal Vdd and the gate of the driving transistor T1, wherein the storage capacitor C1 is used for maintaining the gate voltage of the driving transistor T1.
A first terminal of the storage capacitor C1 is connected to a first voltage terminal Vdd and a first terminal of the first switching transistor T5, and a second terminal of the storage capacitor C1 is connected to a fourth node Q.
In the present embodiment, the Data transistor T2 is used for transmitting the Data signal Data to the source of the driving transistor T1 and preventing the first voltage signal Vdd loaded by the first voltage terminal Vdd from flowing into the Data signal line through the Data transistor T2; the compensation transistor T3 is used for transmitting a Data signal Data having the effect of compensating the threshold voltage to the gate of the driving transistor T1 to compensate the threshold voltage of the driving transistor T1.
In this embodiment, the data transistor T2 and the compensation transistor T3 are both oxide transistors, and the leakage current of the oxide transistor in the off state is significantly smaller than that of the low temperature polysilicon thin film transistor in the off state, so that the display effect is improved in the light emitting stage.
Further, in the present embodiment, the data transistor T2 and the compensation transistor T3 are both N-type oxide thin film transistors.
In the present embodiment, the node reset module 103 includes a first reset transistor T7 and a second reset transistor T4.
A first terminal of the first reset transistor T7 is connected to the first initialization signal VI1, a second terminal of the first reset transistor T7 is connected to the third node C, and a gate of the first reset transistor T7 is connected to the first Scan signal Scan 1.
It should be noted that, in the present embodiment, the first end of the first reset transistor T7 is a source or a drain, and the second end of the first reset transistor T7 is a source or a drain, which is not limited in the present embodiment.
A first terminal of the second reset transistor T4 is connected to the second initialization signal VI2, a second terminal of the second reset transistor T4 is connected to the fourth node Q, and a gate of the second reset transistor T4 is connected to the first Scan signal Scan 1.
It should be noted that, in the present embodiment, the first terminal of the second reset transistor T4 is a source or a drain, and the second terminal of the second reset transistor T4 is a source or a drain, which is not limited in the present embodiment.
In the present embodiment, the first reset transistor T7 is used to transmit the first initialization signal VI1 to the anode of the light emitting device D1, initialize the anode voltage of the light emitting device D1, and keep the voltage of the anode of the light emitting device D1 stable during the light emitting period; the second reset transistor T4 is used for transmitting the second initialization signal VI2 to the gate of the driving transistor T1 and maintaining the gate voltage of the driving transistor T1 stable during the light emitting period.
Further, both the first initialization signal VI1 and the second initialization signal VI2 are positive voltage signals during the light emitting period, so that the source and the drain of the first reset transistor T7 are equipotential, and the source and the drain of the second reset transistor T4 are equipotential, thereby reducing the leakage current of the first reset transistor T7 and the second reset transistor T4, so as to maintain the gate voltage of the driving transistor T1 and the anode voltage of the light emitting device D1 stable during the light emitting period, and ensure the stability of light emission of the light emitting device D1.
In the present embodiment, the light emission control module 104 includes a first switching transistor T5 and a second switching transistor T6, and the first switching transistor T5 and the second switching transistor T6 are used to control the light emitting device D1 to emit light.
The first terminal of the first switching transistor T5 is connected to a first voltage terminal Vdd, the second terminal of the first switching transistor T5 is connected to a first node a, and the gate of the first switching transistor T5 is connected to the emission control signal EM.
It should be noted that, in the embodiment, the first terminal of the first switch transistor T5 is a source or a drain, and the second terminal of the first switch transistor T5 is a source or a drain, which is not limited in the embodiment.
The first terminal of the second switching transistor T6 is connected to the second node B, the second terminal of the second switching transistor T6 is connected to the third node C, and the gate of the second switching transistor T6 is connected to the scan signal (EM).
It should be noted that, in the embodiment, the first terminal of the second switch transistor T6 is a source or a drain, and the second terminal of the second switch transistor T6 is a source or a drain, which is not limited in the embodiment.
In the present embodiment, the driving transistor T1, the first reset transistor T7, the second reset transistor T4, the first switching transistor T5 and the second switching transistor T6 are all polysilicon thin film transistors; the data transistor T2 and the compensation transistor T3 are both oxide thin film transistors, and this embodiment provides a stable display effect for the pixel circuit by providing a combination of oxide thin film transistors and polysilicon thin film transistors in the pixel circuit.
Example two
The present embodiment further provides a driving method of the pixel circuit, and in particular, referring to fig. 3, a working timing diagram of the driving method of the pixel circuit provided in the present embodiment includes that t1 is an initialization phase, t2 is a compensation phase, and t3 is a light emitting phase.
In this embodiment, the driving method of the pixel circuit includes:
initialization phase t 1: the first and second Scan signals Scan1 and Scan2 are at a low level, the emission control signal EM is at a high level, the first and second reset transistors T7 and T4 are turned on in response to the first Scan signal Scan1, the first initialization signal VI1 is transmitted to the anode of the light emitting device D1 through the first reset transistor T7, and the anode voltage of the light emitting device D1 is initialized; the second initialization signal VI2 is transmitted to the gate of the driving transistor T1 through the second reset transistor T4, and initializes the gate voltage of the driving transistor T1.
Compensation phase t 2: the second Scan signal Scan2 is at a low level, the first Scan signal Scan1 and the emission control signal EM are at a high level, the Data transistor T2 and the compensation transistor T3 are turned on in response to the second Scan signal Scan2, the Data signal Data) is transmitted to the first terminal of the driving transistor T1 through the Data transistor T2, the compensation transistor T3 is turned on so that the driving transistor T1 is diode-connected, the Data signal Data having a function of compensating for a threshold voltage is transmitted to the gate of the driving transistor T1 through the driving transistor T1 and the compensation transistor T3, and the threshold voltage of the driving transistor T1 is compensated.
Lighting phase t 3: the first Scan signal Scan1 is at a high level, the second Scan signal Scan2 and the emission control signal EM are at a low level, the first initialization signal VI1 and the second initialization signal VI2 are positive voltage signals, the first switching transistor T5 and the second switching transistor T6 are turned on in response to the emission control signal EM, if the gate voltage of the driving transistor T1 turns on the driving transistor T1 in a compensation stage, the driving transistor T1 generates a driving current to drive the light emitting device D1 to emit light, and the gate voltage of the driving transistor T1 and the anode voltage of the light emitting device D1 are maintained stable by the first reset transistor T7 and the second reset transistor T4, so that the stability of light emission of the light emitting device D1 is ensured.
In this embodiment, the first terminal of the driving transistor T1 is a source, and the second terminal of the driving transistor T1 is a drain.
Referring to fig. 2, in the present embodiment, the data transistor T2 and the compensation transistor T3 are both oxide transistors, and the leakage current of the oxide transistor in the off state is significantly smaller than that of the low temperature polysilicon thin film transistor in the off state, so at this stage, the low leakage current characteristic of the compensation transistor T3 is utilized to reduce the influence of the second node B on the voltage of the fourth node Q as much as possible, thereby improving the voltage stability of the fourth node Q and further improving the light emitting stability of the pixel; meanwhile, the Data transistor T2 is used as a poly-oxide LTPO switch, and the mutual influence between the two ends of the Data transistor T2 can be reduced by using the low leakage current characteristic of the oxide transistor, so that the accuracy, stability and controllability of the Data signal Data) and the first voltage terminal Vdd signal can be ensured.
Further, in the light emitting period T3, the second initialization signal VI2 connected to the first end of the second reset transistor T4 may be replaced with a positive voltage signal having a magnitude close to that of the Data signal Data), so as to better prevent the second reset transistor T4 from leaking current and ensure the voltage of the fourth node Q to be stable; meanwhile, the first initialization signal VI1 connected to the first terminal of the first reset transistor T7 may be replaced by a positive voltage signal close to Vdd-Date, where Vdd is a signal provided by the first voltage terminal, and Data represents a signal loaded by the Data line, so as to better prevent the first reset transistor T7 from leaking current, and ensure that the voltage of the anode of the light emitting device D1 input by the first reset transistor T7 is stable.
It should be noted that, in this embodiment, the changes of the first initialization signal VI1 and the second initialization signal VI2 in the initialization phase t1 and the light emitting phase t3 may be implemented by a driving chip, which is not limited in this embodiment.
EXAMPLE III
Referring to fig. 4, a structure of a display panel provided in the embodiment of the present application is schematically illustrated.
The present embodiment provides a display panel including the pixel circuit, and the display panel further includes a driving chip 50 electrically connected to the pixel circuit 300.
In this embodiment, the display panel includes a display area 201 and a bezel area 202 adjacent to the display area 201; the pixel circuit 300 includes a first initialization signal line 301 and a second initialization signal line 302.
The driving chip 50 is located in the frame region 202, the first initialization signal line 301 and the second initialization signal line 302 are connected to the driving chip 50, and the first initialization signal line 301 and the second initialization signal line 302 extend from the frame region 202 to the display region 201.
Further, the first initialization signal line 301 and the second initialization signal line 302 are longitudinally wired in the lower frame of the display panel, so that the effect of a narrow frame of the display panel is achieved.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The pixel circuit, the driving method thereof, and the display panel provided in the embodiments of the present application are described in detail above, and a specific example is applied in the present application to explain the principle and the implementation of the present application, and the description of the above embodiments is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A pixel circuit, comprising: a driving module, a compensation module, a node reset module, a light emitting control module and a light emitting device (D1);
the driving module is connected to a first node (A), a second node (B) and the compensation module;
the compensation module is connected to a first node (A), a second node (B) and the driving module;
the node reset module is connected to a third node (C) and the compensation module;
the light emitting control module is connected to a first node (A), a second node (B) and a third node (C);
the driving module comprises a driving transistor (T1), the compensation module comprises a data transistor (T2) and a compensation transistor (T3), the driving transistor (T1) is a polycrystalline silicon thin film transistor, and the data transistor (T2) and the compensation transistor (T3) are both oxide thin film transistors.
2. The pixel circuit according to claim 1, further comprising a fourth node (Q), wherein the gate of the Data transistor (T2) is connected to the second Scan signal (Scan2), the first terminal of the Data transistor (T2) is connected to the Data signal (Data), and the second terminal of the Data transistor (T2) is connected to the first node (a);
the gate of the compensation transistor (T3) is connected to the second Scan signal (Scan2), the first terminal of the compensation transistor (T3) is connected to the fourth node (Q), and the second terminal of the compensation transistor (T3) is connected to the second node (B).
3. The pixel circuit according to claim 2, wherein the compensation module further comprises a storage capacitor (C1) connected in series between the first voltage terminal (Vdd) and the gate of the drive transistor (T1);
a first terminal of the storage capacitor (C1) is connected to a first voltage terminal (Vdd) and a first terminal of the first switching transistor (T5), and a second terminal of the storage capacitor (C1) is connected to a fourth node (Q).
4. The pixel circuit of claim 3, wherein the node reset module comprises a first reset transistor (T7) and a second reset transistor (T4);
a first terminal of the first reset transistor (T7) is connected to a first initialization signal (VI1), a second terminal of the first reset transistor (T7) is connected to a third node (C), and a gate of the first reset transistor (T7) is connected to a first Scan signal (Scan 1);
the first terminal of the second reset transistor (T4) is connected to the second initialization signal (VI2), the second terminal of the second reset transistor (T4) is connected to the fourth node (Q), and the gate of the second reset transistor (T4) is connected to the first Scan signal (Scan 1).
5. The pixel circuit according to claim 4, wherein the first initialization signal (VI1) and the second initialization signal (VI2) are both positive voltage signals during the light-emitting phase.
6. The pixel circuit according to claim 1, wherein the light emission control module comprises a first switching transistor (T5) and a second switching transistor (T6);
a first terminal of the first switching transistor (T5) is connected to a first voltage terminal (Vdd), a second terminal of the first switching transistor (T5) is connected to a first node (a), and a gate of the first switching transistor (T5) is connected to a light emission control signal (EM);
a first terminal of the second switching transistor (T6) is connected to the second node (B), a second terminal of the second switching transistor (T6) is connected to the third node (C), and a gate of the second switching transistor (T6) is connected to a scan signal (EM).
7. The pixel circuit according to claim 1, wherein an anode of the light emitting device (D1) is connected to the third node (C), and a cathode of the light emitting device (D1) is connected to a low potential power signal (Vss).
8. A method of driving a pixel circuit according to any one of claims 1 to 7, comprising:
initialization phase (t 1): a first Scan signal (Scan1) and a second Scan signal (Scan2) are at a low level, a light emission control signal (EM) is at a high level, the first reset transistor (T7) and the second reset transistor (T4) are turned on in response to the first Scan signal (Scan1), the first initialization signal (VI1) is transmitted to the anode of the light emitting device (D1) through the first reset transistor (T7), and the anode voltage of the light emitting device (D1) is initialized; the second initialization signal (VI2) is transmitted to the gate of the driving transistor (T1) through the second reset transistor (T4), initializing the gate voltage of the driving transistor (T1);
compensation phase (t 2): the second Scan signal (Scan2) is at a low level, the first Scan signal (Scan1) and the emission control signal (EM) are at a high level, the Data transistor (T2) and the compensation transistor (T3) are turned on in response to the second Scan signal (Scan2), the Data signal (Data) is transmitted to the first terminal of the driving transistor (T1) through the Data transistor (T2), the compensation transistor (T3) is turned on so that the driving transistor (T1) is diode-connected, the Data signal (Data) having a function of compensating for a threshold voltage is transmitted to the gate of the driving transistor (T1) through the driving transistor (T1) and the compensation transistor (T3), and the threshold voltage of the driving transistor (T1) is compensated;
luminescent phase (t 3): the first Scan signal (Scan1) is at a high level, the second Scan signal (Scan2) and the emission control signal (EM) are at a low level, the first initialization signal (VI1) and the second initialization signal (VI2) are positive voltage signals, the first switching transistor (T5) and the second switching transistor (T6) are turned on in response to the emission control signal (EM), and if the gate voltage of the driving transistor (T1) turns on the driving transistor (T1) in a compensation phase, the driving transistor (T1) generates a driving current to drive the light emitting device (D1) to emit light, and the gate voltage of the driving transistor (T1) and the anode voltage of the light emitting device (D1) are maintained stable by the first reset transistor (T7) and the second reset transistor (T4), so that the stability of the light emission of the light emitting device (D1) is ensured.
9. A display panel comprising the pixel circuit according to any one of claims 1 to 7, and further comprising a driver chip electrically connected to the pixel circuit.
10. The display panel according to claim 9, wherein the display panel includes a display area and a bezel area adjacent to the display area;
the pixel circuit includes a first initialization signal line and a second initialization signal line;
the driving chip is located in the frame area, the first initialization signal line and the second initialization signal line are electrically connected with the driving chip, and the first initialization signal line and the second initialization signal line extend from the frame area to the display area.
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Application publication date: 20210409 |