CN112631883B - PCIe data transmission pressure manufacturing method, system and electronic equipment - Google Patents

PCIe data transmission pressure manufacturing method, system and electronic equipment Download PDF

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Publication number
CN112631883B
CN112631883B CN202011479196.9A CN202011479196A CN112631883B CN 112631883 B CN112631883 B CN 112631883B CN 202011479196 A CN202011479196 A CN 202011479196A CN 112631883 B CN112631883 B CN 112631883B
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data request
pcie
time
end point
response
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CN112631883A (en
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倪亚路
叶鹏玉
黄玲
李婧
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Chengdu Haiguang Integrated Circuit Design Co Ltd
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Chengdu Haiguang Integrated Circuit Design Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3433—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment for load management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G06F11/3428—Benchmarking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)

Abstract

The embodiment of the invention discloses a PCIe data transmission pressure manufacturing method and a PCIe data transmission pressure manufacturing system, which belong to the technical field of processors, and the method comprises the following steps: the operating system initiates an initial data request for End Point to a PCIe Host; the PCIe Host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point; the EndPoint pauses responding to the data request according to the type of the data request; and after the End Point waits for a preset first time, restoring the response to the data request of the pause response. The method and the device can accumulate the TLP packet to a certain extent in the pressure test process, so as to reach the aim of traversing the Tag domain in the TLP packet as much as possible.

Description

PCIe data transmission pressure manufacturing method, system and electronic equipment
Technical Field
The invention belongs to the technical field of processors, and particularly relates to a PCIe data transmission pressure manufacturing method, a PCIe data transmission pressure manufacturing system and electronic equipment.
Background
The high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIe) protocol has the characteristics of point-to-point, high bandwidth and reliable transmission, supports active power management, supports error reporting, supports functions such as hot plug and the like.
The conventional PCIe data transmission performance test is implemented based on a normal communication process between a PCIe protocol communication main End (PCIe Host) and a PCIe protocol communication device End (End Point), but the number of PCIe transaction layer data packets (Transaction Layer Packet, TLP packets) manufactured under the conventional technical scheme is very limited, so that the pressure performance of PCIe data transmission cannot be effectively evaluated, and meanwhile, due to the limited number of TLP packets, the number of Tag fields in the corresponding packets is also very limited, so that the Tag fields cannot be effectively verified.
Disclosure of Invention
In view of the above, the embodiments of the present invention provide a PCIe data transmission pressure manufacturing method, a PCIe data transmission pressure manufacturing system, and an electronic device, which are used for solving the problem that the existing PCIe data transmission performance testing method cannot effectively evaluate the data transmission pressure performance. The method and the device can accumulate the TLP packet to a certain extent in the pressure test process, so as to reach the aim of traversing the Tag domain in the TLP packet as much as possible.
In order to achieve the above purpose, the embodiment of the present invention adopts the following technical scheme:
in a first aspect, the present invention provides a PCIe data transmission pressure manufacturing method, including:
the operating system initiates an initial data request aiming at End Point of PCIe protocol communication equipment to a PCIe protocol communication master End PCIe Host;
the PCIe Host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point;
the EndPoint pauses responding to the data request according to the type of the data request;
and after the End Point waits for a preset first time, restoring the response to the data request of the pause response.
With reference to the first aspect, in a first implementation manner of the first aspect, the suspension, by the End Point, of responding to the data request according to a type of the data request includes:
the EndPoint pauses the flow control of the data request of the corresponding type according to the type of the data request;
and the EndPoint pauses the response to the data request for pausing the update flow control.
With reference to the first implementation manner of the first aspect, in a second implementation manner of the first aspect, after the End Point waits for a preset first time, the restoring the response to the data request of the pause response includes:
after the End Point waits for a preset second time, the flow control of the data request of the pause response is resumed and updated; the second time is less than the first time;
after waiting for a preset third time, the End Point resumes the response to the data request of the pause response; the first time is equal to a sum of the second time and the third time.
With reference to the first aspect, in a third implementation manner of the first aspect, the PCIe Host sends the data request to the End Point in a multi-process concurrent manner.
With reference to the first aspect, in a fourth implementation manner of the first aspect, before the PCIe Host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point, the method further includes:
the operating system receives a modification to a completion timeout time Completion Timeout Value field in a Device Control Register Device Control 2Register in a configuration space of PCIe, the modification being for increasing an allowed completion time of a PCIe data request;
the operating system receives a setting of the interrupt delivery mode of the processor that causes the interrupt generated by the fatal error FataI Error Message not to be processed by the BIOS.
In a second aspect, the present invention provides a Tag domain verification method, including:
manufacturing PCIe data transmission pressure by adopting the PCIe data transmission pressure manufacturing method according to any one of the embodiments;
and after the End Point resumes the response to the data request of the pause response, performing Tag domain verification on the data request in the process of manufacturing PCIe data transmission pressure.
In a third aspect, the present invention provides a PCIe data transfer pressure manufacturing system comprising: an operating system, a PCIe protocol communication master End PCIe Host and a PCIe protocol communication equipment End Point;
the operating system is used for initiating an initial data request aiming at End Point to the PCIe Host;
the PCIe Host is used for converting the initial data request into a data request conforming to a PCIe protocol and sending the data request to the End Point;
the End Point is used for suspending responding to the data request according to the type of the data request; and after waiting for a preset first time, restoring the response to the data request of the pause response.
With reference to the third aspect, in a first implementation manner of the third aspect, the End Point includes: a pause module and a resume module; the pause module comprises: the first pause unit and the second pause unit;
the first pause unit is used for pausing the flow control of the data request of the corresponding type according to the type of the data request;
the second pause unit is used for pausing response to the data request for pausing the update flow control;
and the recovery module is used for waiting for a data request recovery response of the pause response after the preset first time.
With reference to the first implementation manner of the third aspect, in a second implementation manner of the third aspect, the recovery module includes a first recovery unit and a second recovery unit;
the first recovery unit is used for waiting for a preset second time and then carrying out flow control recovery updating on the data request of the pause response; the second time is less than the first time;
the second recovery unit is used for waiting for a preset third time and then recovering the response to the data request of the pause response; the first time is equal to a sum of the second time and the third time.
With reference to the third aspect, in a third implementation manner of the third aspect, the PCIe Host sends the data request to the End Point in a multi-process concurrent manner.
With reference to the third aspect, in a fourth implementation manner of the third aspect, the operating system initiates an initial data request for End Point to the PCIe Host through a request module;
the operating system further includes:
a configuration space modification module, configured to receive a modification to a completion timeout Comp letion Timeout Value field in a Device Control Register Device Control 2Register in a configuration space of PCIe, where the modification is configured to increase an allowable completion time of a PCIe data request;
and the interrupt setting module is used for receiving the setting modification of the interrupt transmission mode of the processor, and the setting enables the interrupt generated by the fatal error Fatal Error Message not to be processed by the BIOS.
In a fourth aspect, the present invention provides a Tag domain verification system, comprising:
the PCIe data transmission pressure manufacturing system according to any one of the preceding embodiments, configured to manufacture PCIe data transmission pressure; and
and the Tag domain verification module is used for carrying out Tag domain verification on the data request in the process of manufacturing PCIe data transmission pressure after the End Point resumes responding to the data request of the pause response.
In a fifth aspect, the present invention provides an electronic device, including: the device comprises a shell, a processor, a memory, a circuit board and a power circuit, wherein the circuit board is arranged in a space surrounded by the shell, and the processor and the memory are arranged on the circuit board; a power supply circuit for supplying power to each circuit or device of the electronic apparatus; the memory is used for storing executable program codes; the processor executes a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the PCIe data transmission pressure manufacturing method according to any one of the foregoing embodiments.
According to the PCIe data transmission pressure manufacturing method, the PCIe data transmission pressure manufacturing system and the electronic equipment, interaction in a normal PCIe data transmission process is properly blocked by using the End Point of the PCIe protocol communication equipment End, so that a TLP packet can be accumulated to a certain degree in a pressure test process, and the aim of traversing a Tag domain in the TLP packet as much as possible is fulfilled. Further, the scheme also provides a method for avoiding system crashes caused by blocking normal PCIe data transmission, and can be used for PCIe protocol verification.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of a first embodiment of a PCIe data transmission pressure manufacturing method according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a PCIe data transmission pressure manufacturing method according to a second embodiment of the present invention;
FIG. 3 is a schematic diagram of a PCIe data transfer pressure manufacturing system according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second embodiment of a PCIe data transfer pressure manufacturing system according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a third embodiment of a PCIe data transfer pressure manufacturing system according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating a fourth exemplary embodiment of a PCIe data transfer pressure manufacturing system according to an exemplary embodiment of the present invention;
fig. 7 is a schematic structural diagram of an embodiment of the electronic device of the present invention.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
It should be understood that the described embodiments are merely some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Fig. 1 is a schematic flow chart of a PCIe data transmission pressure manufacturing method according to an embodiment of the present invention. Referring to fig. 1, the method comprises the steps of:
step S101, an operating system initiates an initial data request for End Point to a PCIe Host;
step S102, the PCIe host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point;
in this embodiment, in order for the End Point to quickly accumulate PCIe data requests, the PCIe Host preferably sends PCIe data requests to the End Point in a multi-process concurrency manner.
Step S103, the EndPoint pauses responding to the data request according to the type of the data request;
in this embodiment, as an optional implementation manner, the step S103 may include steps A1-A2:
step A1: the EndPoint pauses the flow control of the data request of the corresponding type according to the type of the data request;
step A2: and the EndPoint pauses the response to the data request for pausing the update flow control.
Step S104, after the End Point waits for a preset first time, the response is resumed to the data request of the pause response.
In this embodiment, as an optional implementation manner, the step S104 may include steps B1-B2:
step B1: after the End Point waits for a preset second time, the flow control of the data request of the pause response is resumed and updated; wherein the second time is less than the first time;
step B2: after waiting for a preset third time, the End Point resumes the response to the data request of the pause response; wherein the first time is equal to a sum of the second time and the third time.
According to the PCIe data transmission pressure manufacturing method provided by the embodiment, interaction in a normal PCIe data transmission process is properly blocked by using the End Point of the PCIe protocol communication equipment, so that a TLP packet can be quickly accumulated in a pressure test process, and subsequent PCIe data transmission pressure test is facilitated.
Fig. 2 is a schematic flow chart of a PCIe data transmission pressure manufacturing method according to a second embodiment of the present invention. Referring to fig. 2, the method includes the steps of:
step S201, the operating system receives the modification of the completion timeout Completion Timeout Value field in the Device Control Register Device Control 2Register in the PCIe configuration space;
wherein the modification is to increase the allowable completion time of the PCIe data request.
In this embodiment, the Completion Timeout Value field in the Device Control 2Register in the PCIe Host configuration space is increased, so that the response time of the subsequent data request may be increased, and the TLP packet may be accumulated for a longer time, so that the accumulated TLP packet is more.
Step S202, the operating system receives the setting modification of the interrupt transmission mode of the processor;
wherein the setting causes an interrupt generated by the fatal error (Fatal Error Message) not to be processed by the BIOS;
in this embodiment, by setting the interrupt transmission mode, system crashes caused by blocking normal PCIe data transmission can be effectively avoided.
Step S203, the operating system initiates an initial data request for End Point to the PCIe Host;
in this embodiment, if the initial data request is to perform a read operation on the BAR space of the End Point, the first address of the BAR space of the End Point needs to be acquired before this step to determine the location of the read operation. If the initial data request is not a read operation to the BAR space of the End Point, then corresponding additional preparation work may be performed.
Step S204, the PCIe Host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point in a multi-process concurrency mode;
step S205, the End Point pauses responding to the data request according to the type of the data request;
in this embodiment, if the data request is a Read operation to the BAR space of the End Point, the End Point will first suspend updating the NPH stream, and then suspend responding to the Memory Read request.
In step S206, after the End Point waits for the preset first time, the End Point resumes the response to the data request with the pause response.
In this embodiment, if the preset first time is greater than Completion Timeout Value, the following is: when the End Point waiting time exceeds Completion Timeout Value, the PCIe Host may still send a new TLP packet, that is, the Tag field may still be increased (the Tag field cannot continue to accumulate until the response is recovered), but the data request that is not responded and is eventually overtime and sent by the Host may generate an error report to the operating system, so that by presetting the timeout time and interrupting the transmission mode in step S201, the crash caused by the error may be avoided to the greatest extent.
In this step, the Trace of the whole process is captured by using the PCIe protocol analyzer, it can be found that because the End Point End controls the flow control, and suspends the response to the data request, and meanwhile, the operating system continuously issues new data requests, so that the communication requests are stacked to a certain extent, and the traversal number of Tag fields in the TLP packet is greatly increased.
According to the PCIe data transmission pressure manufacturing method provided by the embodiment, interaction in a normal PCIe data transmission process is properly blocked by using the End Point of the PCIe protocol communication equipment, so that a TLP packet can be accumulated to a certain degree in a pressure test process, and the aim of traversing a Tag domain in the TLP packet as much as possible is fulfilled. Further, the scheme also provides a method for avoiding system crashes caused by blocking normal PCIe data transmission, and can be used for PCIe protocol verification.
Corresponding to the PCIe data transmission pressure manufacturing method provided by the embodiment of the present invention, the embodiment of the present invention further provides a Tag field verification method, where the PCIe data transmission pressure is manufactured by using the PCIe data transmission pressure manufacturing method provided by any one of the foregoing embodiments, and then after the End Point resumes responding to the data request of the pause response, tag field verification is performed on the data request in the whole process of manufacturing the PCIe data transmission pressure (i.e., the whole process of stopping updating the flow control from the beginning to stopping responding to the data request to resuming the flow control to resuming the data request response).
In this embodiment, by using the PCIe data transmission pressure manufacturing method provided by the present invention, TLP packets can be accumulated to a certain extent, so that Tag domain verification can be performed. After the response is restored, the TLP that did not respond before is responded to, and the corresponding Tag is released and cannot continue accumulating.
Corresponding to the PCIe data transmission pressure manufacturing method provided by the embodiment of the present invention, the embodiment of the present invention further provides a PCIe data transmission pressure manufacturing system. FIG. 3 is a schematic diagram of a PCIe data transfer pressure manufacturing system according to a first embodiment of the present invention. Referring to FIG. 3, the PCIe data transfer pressure manufacturing system of the present invention comprises: operating system 1, PCIe Host2, and End Point3;
an operating system 1, configured to initiate an initial data request for End Point3 to PCIe Host 2;
PCIe Host2, configured to convert the initial data request into a data request that conforms to a PCIe protocol, and send the data request to End Point3; the PCIe Host2 may send the data request to the End Point3 in a multi-process concurrency manner.
End Point3, is used for according to the kind of the said data request, suspend responding to the said data request; and after waiting for a preset first time, restoring the response to the data request of the pause response. The End Point3 is specifically further configured to resume the response to the data request of the pause response after waiting for the preset first time; and performing tag domain verification on the data request in the whole prior PCIe data transmission pressure manufacturing process.
FIG. 4 is a schematic diagram of a PCIe data transfer pressure manufacturing system according to a second embodiment of the present invention. Referring to fig. 4, the present embodiment, based on the structure of the first embodiment, end Point3, includes: a pause module 31 and a resume module 32; a pause module 31 comprising: a first pause unit 311, a second pause unit 312;
a first suspending unit 311, configured to suspend, according to the type of the data request, updating the flow control of the data request of the corresponding type;
a second suspending unit 312 for suspending a response to a data request for suspending updating of the flow control;
and a restoring module 32, configured to restore the response to the data request of the pause response after waiting for the preset first time.
FIG. 5 is a schematic diagram of a PCIe data transfer pressure manufacturing system according to a third embodiment of the invention. Referring to fig. 5, in this embodiment, the recovery module 32 includes a first recovery unit 321 and a second recovery unit 322 based on the structure of the second embodiment;
a first recovery unit 321, configured to wait for a preset second time, and then resume updating the flow control of the data request of the pause response; the second time is less than the first time;
the second recovery unit 322 is configured to wait for a preset third time, and recover a response to the data request of the pause response; the first time is equal to a sum of the second time and the third time.
FIG. 6 is a schematic diagram of a PCIe data transfer pressure manufacturing system according to a fourth embodiment of the invention. Referring to fig. 6, this embodiment is based on the structure of the first embodiment, the operating system 1 initiates an initial data request for End point3 to PCIe Host2 through the request module 13;
the operating system 1 further includes:
a configuration space modification module 11, configured to receive a user modification to a completion timeout Completion Timeout Value field in a Device Control Register Device Control 2Register in a configuration space of PCIe, where the modification is used to increase an allowable completion time of a PCIe data request;
the interrupt setting module 12 is configured to receive a user's modification of the interrupt transmission mode of the processor, where the setting makes the interrupt generated by the fatal error Fatal Error Message not processed by the BIOS.
Corresponding to the Tag domain verification method provided by the embodiment of the invention, the embodiment of the invention also provides a Tag domain verification system, which comprises the PCIe data transmission pressure manufacturing system provided by any one of the embodiments and a Tag domain verification module; the PCIe data transmission pressure manufacturing system is used for accumulating TLPs sent by the Host to a certain extent as far as possible and manufacturing PCIe data transmission pressure; the Tag domain verification module is used for performing Tag domain verification on the data request in the process of manufacturing PCIe data transmission pressure after the End Point resumes responding to the data request of the pause response.
The embodiment of the invention also provides electronic equipment. Fig. 7 is a schematic structural diagram of an embodiment of an electronic device according to the present invention, where the flow of the embodiment shown in fig. 1 and 2 of the present invention may be implemented, and as shown in fig. 7, the electronic device may include: the device comprises a shell 41, a processor 42, a memory 43, a circuit board 44 and a power circuit 45, wherein the circuit board 44 is arranged in a space surrounded by the shell 41, and the processor 42 and the memory 43 are arranged on the circuit board 44; a power supply circuit 45 for supplying power to the respective circuits or devices of the above-described electronic apparatus; the memory 43 is for storing executable program code; the processor 42 executes a program corresponding to the executable program code by reading the executable program code stored in the memory 43, for executing the PCIe data transmission pressure manufacturing method according to any one of the foregoing embodiments.
The electronic device exists in a variety of forms including, but not limited to:
(1) A mobile communication device: such devices are characterized by mobile communication capabilities and are primarily aimed at providing voice, data communications. Such terminals include: smart phones (e.g., iPhone), multimedia phones, functional phones, and low-end phones, etc.
(2) Ultra mobile personal computer device: such devices are in the category of personal computers, having computing and processing functions, and generally also having mobile internet access characteristics. Such terminals include: PDA, MID, and UMPC devices, etc., such as iPad.
(3) Portable entertainment device: such devices may display and play multimedia content. The device comprises: audio and video playback modules (e.g., iPod), palm game consoles, electronic books, and smart toys and portable car navigation devices.
(4) And (3) a server: the configuration of the server includes a processor, a hard disk, a memory, a system bus, and the like, and the server is similar to a general computer architecture, but is required to provide highly reliable services, and thus has high requirements in terms of processing capacity, stability, reliability, security, scalability, manageability, and the like.
(5) Other electronic devices with data interaction functions.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In this specification, each embodiment is described in a related manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments in part.
For convenience of description, the above apparatus is described as being functionally divided into various units/modules, respectively. Of course, the functions of the various elements/modules may be implemented in the same piece or pieces of software and/or hardware when implementing the present invention.
Those skilled in the art will appreciate that implementing all or part of the above-described methods in accordance with the embodiments may be accomplished by way of a computer program stored on a computer readable storage medium, which when executed may comprise the steps of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), or the like.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (13)

1. A PCIe data transfer pressure manufacturing method, comprising:
the operating system initiates an initial data request aiming at End Point of PCIe protocol communication equipment to a PCIe protocol communication master End PCIe Host;
the PCIe Host converts the initial data request into a data request conforming to a PCIe protocol and sends the data request to the End Point;
the EndPoint pauses responding to the data request of the corresponding type according to the type of the data request;
after waiting for a preset first time, the End Point resumes the response to the data request of the pause response; the preset first time is less than or equal to a preset timeout time; the preset timeout time is the allowed completion time of the data request.
2. The PCIe data transmission pressure manufacturing method according to claim 1, wherein the End Point suspending responding to the data request of the corresponding category according to the category of the data request comprises:
the EndPoint pauses the flow control of the data request of the corresponding type according to the type of the data request;
and the EndPoint pauses the response to the data request for pausing the update flow control.
3. The PCIe data transmission pressure manufacturing method according to claim 2, wherein the End Point waits for a preset first time, and resumes the response to the data request of the pause response, comprising:
after the End Point waits for a preset second time, the flow control of the data request of the pause response is resumed and updated; the second time is less than the first time;
after waiting for a preset third time, the End Point resumes the response to the data request of the pause response; the first time is equal to a sum of the second time and the third time.
4. The PCIe data transmission pressure manufacturing method according to claim 1, wherein the PCIe Host sends the data request to the End Point in a multi-process concurrent manner.
5. The PCIe data transmission pressure manufacturing method according to claim 1, wherein before the PCIe Host converts the initial data request into a PCIe protocol compliant data request to send to the End Point, further comprising:
the operating system receives a modification to a completion timeout time Completion Timeout Value field in a Device Control Register Device Control 2Register in a configuration space of PCIe, the modification being for increasing an allowed completion time of a PCIe data request;
the operating system receives a setting of the interrupt delivery mode of the processor that causes the interrupt generated by the fatal error Fatal Error Message not to be processed by the BIOS.
6. A Tag field verification method, comprising:
manufacturing PCIe data transfer pressure using the PCIe data transfer pressure manufacturing method of any one of claims 1-5;
and after the End Point resumes the response to the data request of the pause response, performing Tag domain verification on the data request in the process of manufacturing PCIe data transmission pressure.
7. A PCIe data transfer pressure manufacturing system, comprising: an operating system, a PCIe protocol communication master End PCIe Host and a PCIe protocol communication equipment End Point;
the operating system is used for initiating an initial data request aiming at End Point to the PCIe Host;
the PCIe Host is used for converting the initial data request into a data request conforming to a PCIe protocol and sending the data request to the End Point;
the End Point is configured to suspend responding to the data request of the corresponding type according to the type of the data request; after waiting for a preset first time, restoring the response to the data request of the pause response; the preset first time is less than or equal to a preset timeout time; the preset timeout time is the allowed completion time of the data request.
8. The PCIe data transmission pressure manufacturing system according to claim 7 wherein the End Point comprises: a pause module and a resume module; the pause module comprises: the first pause unit and the second pause unit;
the first pause unit is used for pausing the flow control of the data request of the corresponding type according to the type of the data request;
the second pause unit is used for pausing response to the data request for pausing the update flow control;
and the recovery module is used for waiting for a data request recovery response of the pause response after the preset first time.
9. The PCIe data transmission pressure manufacturing system according to claim 8, wherein the recovery module comprises a first recovery unit and a second recovery unit;
the first recovery unit is used for waiting for a preset second time and then carrying out flow control recovery updating on the data request of the pause response; the second time is less than the first time;
the second recovery unit is used for waiting for a preset third time and then recovering the response to the data request of the pause response; the first time is equal to a sum of the second time and the third time.
10. The PCIe data transmission pressure manufacturing system according to claim 7 wherein the PCIe Host sends the data request to the End Point in a multi-process concurrent manner.
11. The PCIe data transmission pressure manufacturing system according to claim 7 wherein the operating system initiates an initial data request for End Point to the PCIe Host through a request module;
the operating system further includes:
a configuration space modification module, configured to receive a modification to a completion timeout Completion Timeout Value field in a Device Control Register Device Control 2Register in a configuration space of PCIe, where the modification is configured to increase an allowable completion time of a PCIe data request;
and the interrupt setting module is used for receiving the setting modification of the interrupt transmission mode of the processor, and the setting enables the interrupt generated by the fatal error Fatal Error Message not to be processed by the BIOS.
12. A Tag domain verification system, comprising:
the PCIe data transmission pressure manufacturing system of any one of claims 7-11 for manufacturing PCIe data transmission pressures; and
and the Tag domain verification module is used for carrying out Tag domain verification on the data request in the process of manufacturing PCIe data transmission pressure after the End Point resumes responding to the data request of the pause response.
13. An electronic device, the electronic device comprising: the device comprises a shell, a processor, a memory, a circuit board and a power circuit, wherein the circuit board is arranged in a space surrounded by the shell, and the processor and the memory are arranged on the circuit board; a power supply circuit for supplying power to each circuit or device of the electronic apparatus; the memory is used for storing executable program codes; the processor executes a program corresponding to the executable program code by reading the executable program code stored in the memory for performing the PCIe data transmission pressure manufacturing method according to any one of the preceding claims 1-5.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101872330A (en) * 2009-11-04 2010-10-27 杭州海康威视数字技术股份有限公司 Interrupt processing method of multi-PCIE (Peripheral Component Interface Express) equipment system
CN107122277A (en) * 2017-05-09 2017-09-01 郑州云海信息技术有限公司 The wrong test system of PCIERAS notes and method based on PCIE protocol analyzers

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10986622B2 (en) * 2018-05-10 2021-04-20 Apple Inc. User equipment (UE) downlink transmission configuration indication (TCI)-state selection
US10955461B2 (en) * 2018-05-16 2021-03-23 Advantest Corporation Smart and efficient protocol logic analyzer configured within automated test equipment (ATE) hardware

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101872330A (en) * 2009-11-04 2010-10-27 杭州海康威视数字技术股份有限公司 Interrupt processing method of multi-PCIE (Peripheral Component Interface Express) equipment system
CN107122277A (en) * 2017-05-09 2017-09-01 郑州云海信息技术有限公司 The wrong test system of PCIERAS notes and method based on PCIE protocol analyzers

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
A Low-Cost and High-Throughput NoC-Aware Chip-to-Chip Interconnection;Wenkang Liao 等;《 2020 IEEE International Symposium on Circuits and Systems (ISCAS)》;1-5 *
PCIe扫盲——PCIe错误检测机制;Felix;《http://blog.chinaaet.com/justlxy/p/5100057784》;1-3 *
VMware ESXi PCIe SSD驱动测试分析与设计;王明晖;《中国优秀硕士学位论文全文数据库信息科技辑》(第4期);I138-356 *

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