CN112599703B - Display substrate, preparation method thereof and display panel - Google Patents
Display substrate, preparation method thereof and display panel Download PDFInfo
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Abstract
The application discloses a display substrate, a preparation method thereof and a display panel, wherein the preparation method of the display substrate comprises the following steps: (1) preparing a first relatively thin crystallized metal oxide layer; (2) a step of preparing an amorphous metal oxide layer on a lower crystallized metal oxide layer, subjecting the amorphous metal oxide layer to a crystallization process to make a portion of the amorphous metal oxide layer corresponding to the lower crystallized metal oxide layer a crystallized metal oxide, removing the amorphous metal oxide in the amorphous metal oxide layer and leaving the crystallized metal oxide, to obtain an upper crystallized metal oxide layer having the anode pattern; the preparation method of the display substrate can overcome the problem that the thickness of the metal oxide layer is increased to form a polycrystalline state and patterning cannot be carried out, and can obtain the second electrode layer with thicker thickness or preset thickness.
Description
Technical Field
The application relates to the technical field of display, in particular to a display substrate, a preparation method of the display substrate and a display panel.
Background
The AMOLED technology is a development trend in the panel industry, and compared with the LCD, the OLED has the advantages of simplified structure, wider color gamut, faster response time, and the like. The AMOLED technology is a bottom-emitting WOLED, but the technology adopts an evaporation method to prepare an OLED device, so that the waste of organic light-emitting materials is great; and WOLED needs CF to filter color to obtain RGB, so the energy consumption is not superior to that of the traditional LCD; in addition, low aperture ratio is an inherent defect of the bottom emission structure, which is not favorable for high resolution display applications. Compared with bottom-emitting WOLED, the top-emitting IJP technology utilizes more than 80% of raw materials, RGB color light can be emitted without CF color filtering, and top-emitting is favorable for improving the aperture opening ratio. The normal top emission IJP technique is to prepare PLN (flat layer) on the TFT substrate, then make the OLED anode, and finally make the Bank layer (hydrophobic layer).
Fig. 1 is a cross-sectional view of a conventional display substrate. As shown in fig. 1, the conventional display substrate includes a substrate 100 and an anode 200 disposed on the substrate 100, wherein the anode 200 is electrically connected to a thin film transistor 110 of the substrate 100.
At present, the anode material generally adopts a composite film of a metal layer and an oxide layer, such as ITO/Ag/ITO, Al/WOx, and the like, wherein ITO/Ag/ITO is one of the more widely applied materials. The reflectance of Ag is highest among various metals, and Bottom ITO improves the adhesion of Ag to the substrate, and Top ITO is used to inject holes. On the other hand, the luminous efficiency of the OLED device is greatly affected by the microcavity effect, and theoretically to obtain higher device efficiency, thicker Top ITO must be used to regulate and control the optical cavity length of the device. However, when Top ITO becomes thicker, the ITO film layer used for preparing Top ITO is in a polycrystalline ITO film layer, which may result in the polycrystalline ITO film layer being unable to be patterned.
Therefore, it is desirable to provide a display substrate, a method for manufacturing the same, and a display panel to solve the above technical problems.
Disclosure of Invention
In order to solve the above technical problems, the present application provides a display substrate, a method for manufacturing the same, and a display panel, in which a plurality of metal oxide layers are manufactured by a distributed deposition method, and a first electrode layer with a predetermined thickness can be obtained by direct etching by using an induced crystallization effect of each crystallized metal oxide layer on another amorphous metal oxide layer thereon, so that a problem that a polycrystalline ITO film layer cannot be patterned and thus a thick first electrode layer cannot be obtained can be solved.
In order to achieve the purpose, the display substrate, the preparation method thereof and the display panel adopt the following technical scheme.
The application provides a display substrate, which comprises a substrate and at least one anode arranged on the substrate, wherein the anode comprises a first electrode layer, a metal layer and a second electrode layer which are sequentially stacked in the direction away from the substrate, and the second electrode layer comprises a plurality of layers of crystallized metal oxide layers which are stacked; and the second electrode layer has a preset thickness, and the range of the preset thickness is 80nm-100 nm.
Further, the second electrode layer includes a first crystallized metal oxide layer and a second crystallized metal oxide layer stacked on the metal layer in sequence, wherein a thickness of the first crystallized metal oxide layer is less than or equal to a thickness of the second metal oxide layer.
Further, the thickness of the first crystallized metal oxide layer is 10nm to 40 nm.
Further, the thickness of the second crystallized metal oxide layer is 40nm to 100 nm.
Further, the thickness of the first electrode layer is 10nm-100 nm.
The present application also provides a method for manufacturing a display substrate, including a step of manufacturing an anode on a substrate, wherein the anode includes a first electrode layer, a metal layer, and a second electrode layer sequentially stacked on the substrate, and the method for manufacturing the second electrode layer includes the steps of: a step of preparing a first crystallized metal oxide layer having the anode pattern on the substrate, the first crystallized metal oxide layer being located on the metal layer; and the number of the first and second groups,
a step of preparing at least one crystallized metal oxide layer on the first crystallized metal oxide layer by:
a step of preparing an amorphized metal oxide layer on an underlying crystallized metal oxide layer, the amorphized metal oxide layer covering the underlying crystallized metal oxide layer and the substrate; a step of subjecting the amorphized metal oxide layer to crystallization treatment so that a portion of the amorphized metal oxide layer corresponding to the lower crystallized metal oxide layer becomes a crystallized metal oxide; and a step of removing a portion of the amorphized metal oxide in the amorphized metal oxide layer and leaving a crystallized metal oxide portion to obtain an upper crystallized metal oxide layer having the anode pattern.
Further, the method for preparing the first crystallized metal oxide layer includes the steps of: a step of preparing a first amorphized metal oxide layer having the anode pattern on the substrate; and crystallizing the amorphized first metal oxide layer to obtain a first crystallized metal oxide layer.
As a preferred embodiment, the first crystallized metal oxide layer is prepared in the following manner: sequentially manufacturing a first electrode layer, a metal layer and a first non-crystallized metal oxide layer on a substrate; carrying out patterning treatment on the first electrode layer, the metal layer and the first non-crystallized metal oxide layer to respectively obtain a first electrode layer with an anode pattern, a metal layer and a first non-crystallized metal oxide layer; and crystallizing the first amorphized metal oxide layer to obtain a first crystallized metal oxide layer.
Further, annealing the first amorphized metal oxide layer to obtain the first crystallized metal oxide layer, wherein the annealing temperature is 100-300 ℃.
Further, the thickness of the first crystallized metal oxide layer is 10nm to 40 nm.
Further, annealing the amorphized metal oxide layer to make a portion of the amorphized metal oxide layer corresponding to the lower crystallized metal oxide layer a crystallized metal oxide; the annealing temperature is 100-160 ℃.
The application provides a display panel, display panel includes any one display substrate.
The display substrate, the preparation method thereof and the display panel have the following beneficial effects:
according to the display substrate, the first electrode layer with the multiple crystallized metal oxide layers is adopted, so that the second electrode layer has the preset thickness, and the problem that patterning cannot be performed due to the fact that polycrystalline states are formed when the thickness of the metal oxide layers is thickened is solved; in addition, the preset thickness can be adjusted to enable the light-emitting device prepared on the basis of the display substrate to obtain the preset cavity length, so that the light-emitting efficiency of the light-emitting device can be improved.
According to the preparation method of the display substrate, the second electrode layer is prepared step by step, a thin crystallized metal oxide layer is prepared, and the reserved area of the amorphous metal oxide film is crystallized and the etching area is amorphized by utilizing the induced crystallization effect or/and crystallization treatment of the crystallized metal oxide layer on the amorphous metal oxide film, so that the etching area can be directly removed, and the second electrode layer with thicker thickness or preset thickness can be finally obtained; in addition, the etching of the first crystallized metal oxide layer can be performed synchronously with the preparation of the metal layer and the first electrode layer, and the aim of saving the manufacturing process can be achieved.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view of a conventional display substrate;
FIG. 2 is a cross-sectional view of a display substrate according to the present invention;
FIGS. 3A-3C are flow charts of a process for forming a crystallized first metal oxide layer on a display substrate according to the present invention;
FIGS. 4A-4C are process flow diagrams of fabricating a crystallized second metal oxide layer based on a display substrate having a crystallized first metal oxide layer;
FIG. 5 is a step of preparing the pixel defining layer;
fig. 6 is a cross-sectional view of the display panel according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in an orientation or positional relationship indicated in the drawings for convenience in describing the present application and to simplify the description, and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed in a particular orientation, and be operated in a particular orientation, and thus are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it should be noted that, unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, a fixed connection, a detachable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature "on," "above" and "over" the second feature may include the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is at a higher level than the second feature. "beneath," "under" and "beneath" a first feature includes the first feature being directly beneath and obliquely beneath the second feature, or simply indicating that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. To simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Fig. 2 is a cross-sectional view of a display substrate according to the present invention. As shown in fig. 2, the present invention provides a display substrate including a substrate 100 and an anode 200 disposed on the substrate 100, wherein the anode 200 includes a first electrode layer 210, a metal layer 220, and a second electrode layer 230 sequentially stacked on the substrate 100 along a thickness direction thereof.
As shown in fig. 2, the second electrode layer 230 has a predetermined thickness, and the predetermined thickness is in a range of 80nm to 100 nm. The second electrode layer 230 includes a plurality of crystallized metal oxide layers sequentially stacked on the metal layer 220. The predetermined thickness can be used to provide an optical cavity length of the light emitting device, thereby improving the light emitting efficiency of the light emitting device.
Wherein, the multi-layer crystallized metal oxide layer means that each metal oxide layer is in a crystallized state. Alternatively, each of the metal oxide layers is a crystallized metal oxide layer.
In the display substrate of the present application, the second electrode layer 230 is stacked by using a plurality of crystallized metal oxide layers, and the thickness of the second electrode layer 230 is controlled, so that the second electrode layer 230 has a predetermined thickness, the light emitting efficiency of the light emitting device manufactured by using the display substrate can be improved, and the manufacture of the display substrate and the light emitting device can be improved.
As shown in fig. 2, the substrate 100 is an array substrate. The array substrate includes a substrate 110 and a plurality of insulating layers 120 sequentially stacked in a thickness direction thereof, and further includes a thin film transistor 130 formed in the plurality of insulating layers 120.
Specifically, the array substrate may be a rigid substrate or a flexible TFT substrate.
Specifically, the material of the base substrate 110 may include polyimide, polysiloxane, epoxy-based resin, acrylic resin, polyester, and/or the like. In one embodiment, the base substrate 110 may include polyimide.
As shown in fig. 2, the multi-layered insulating layer 120 is disposed on a surface of the substrate base plate 110 facing the anode 200. Specifically, the multi-layered insulating layer 120 includes a buffer layer, a gate insulating layer, an interlayer insulating layer, a passivation layer, and a planarization layer.
For example, as shown in fig. 2, in the present embodiment, the multi-layer insulating layer 120 includes a passivation layer 121 contacting the substrate base plate 110 and a planarization layer 122 disposed on a surface of the passivation layer 121 away from the substrate base plate 110.
For example, in the present embodiment, an inorganic material is used for the passivation layer 121. The planarization layer 122 is an organic photoresist layer, which may be one of PI based or acrylic based organic photoresists.
As shown in fig. 2, a via hole 1200 is formed on the multi-layer insulating layer 120, and the via hole 1200 penetrates through at least a partial thickness area of the multi-layer insulating layer 120 to expose an electrode of the thin film transistor 130. The via 1200 is used for electrical connection or contact of the thin film transistor 140 and the subsequent anode 200.
For example, as shown in fig. 2, in the present embodiment, the multi-layer insulating layer 120 extends from the planarization layer 122 toward the substrate 110 to the surface of the drain of the thin film transistor 130 to expose the drain of the thin film transistor 130.
As shown in fig. 2, at least one thin film transistor 130 is formed in the multi-layer insulator 120, and the thin film transistor 130 includes at least an active layer, a gate electrode, a source electrode, and a drain electrode. The thin film transistor 130 is a thin film transistor that can be used for switching or driving.
The present invention does not limit the type or structure of the thin film transistor 130. In particular implementations, the display may be modified or selected according to actual display requirements.
As shown in fig. 2, the first electrode layer 210 is disposed on the planarization layer 122 and electrically connected or contacted with the drain electrode of the thin film transistor 130 through the via 1200. By providing the first electrode layer 210, adhesion between the subsequent metal layer 220 and the substrate 100 can be improved.
Specifically, the thickness of the first electrode layer 210 is 10nm to 100 nm.
Specifically, the first electrode layer 210 is a transparent electrode layer. The transparent electrode layer is made of Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO), for example, in the embodiment, the first electrode layer 210 is made of ITO.
As shown in fig. 2, the metal layer 220 is disposed on a surface of the first electrode layer 210 facing away from the planarization layer 122.
In specific implementation, the material of the metal layer 220 may be one or more of silver, magnesium, aluminum, platinum, palladium, gold, nickel, neodymium, iridium, chromium, or copper. For example, in the present embodiment, the material of the metal layer 220 is silver.
As shown in fig. 2, the second electrode layer 230 is located on a surface of the metal layer 220 facing away from the first electrode layer 210, and the second electrode layer 230 includes a plurality of crystallized metal oxide layers.
Specifically, the second electrode layer 230 has a predetermined thickness, and the predetermined thickness is in a range of 80nm to 100 nm. The thickness of the second electrode layer 230 can be controlled by adjusting the number of layers or the thickness of the multilayered crystallized metal oxide layer. In specific implementation, the optical cavity length of the light emitting device can be improved by adjusting the thickness of the second electrode layer 230, so that the light emitting efficiency is improved.
For example, as shown in fig. 2, in the present embodiment, the second electrode layer 230 includes a first crystallized metal oxide layer 231 and a second crystallized metal oxide layer 232.
Specifically, the thickness of the first crystallized metal oxide layer 231 is less than or equal to the thickness of the crystallized second crystallized metal oxide layer 232. The first crystallized metal oxide layer 231 has a thickness ranging from 10nm to 40nm, and the second crystallized metal oxide layer 232 has a thickness ranging from 40nm to 100 nm.
It is to be noted that the number of the crystallized metal oxide layers included in the second electrode layer 230 and the material of the metal oxide layer are not limited in this application.
As shown in fig. 2, a pixel defining layer 300 is disposed on the planarization layer 122. The pixel defining layer 300 covers a peripheral portion or an edge portion of the anode electrode 200 and has a pixel opening 301 exposing the anode electrode 200, the pixel opening 301 for defining the light emitting device or the pixel region.
The present application also provides a method for manufacturing a display substrate, the method including a step of manufacturing an anode on a substrate, wherein the anode includes, in a thickness direction thereof, a first electrode layer, a metal layer, and a second electrode layer that are sequentially stacked on the substrate, and the method for manufacturing the second electrode layer includes at least the steps of:
a step of preparing a first crystallized metal oxide layer having the anode pattern on the substrate, the first crystallized metal oxide layer being on the metal layer; and the number of the first and second groups,
a step of preparing at least one crystallized metal oxide layer on the first crystallized metal oxide layer by:
a step of preparing an amorphized metal oxide layer on an underlying crystallized metal oxide layer;
a step of making a portion of the amorphized metal oxide layer corresponding to the lower crystallized metal oxide layer a crystallized metal oxide; and (c) a second step of,
a step of removing a portion of the amorphized metal oxide layer and leaving a crystallized metal oxide portion to obtain an upper crystallized metal oxide layer having the anode pattern.
For the sake of simple description, a portion of the amorphized metal oxide layer corresponding to the underlying crystallized metal oxide layer (or a portion to be formed with the anode pattern) will be referred to as a reserved region hereinafter; the region of the amorphized metal oxide layer other than the reserved region is an etched region.
Wherein the lower crystallized metal oxide layer and the upper crystallized metal oxide layer are two layers arbitrarily adjacent to each other in the second electrode layer 230, and the lower crystallized metal oxide layer is closer to the substrate 110 than the upper crystallized metal oxide layer. For example, in preparing the second crystallized metal oxide layer, the lower crystallized metal oxide layer is a first crystallized metal oxide layer.
In the method for manufacturing the display substrate, the first crystallized metal oxide layer with a relatively thin thickness is first prepared, and the first crystallized metal oxide layer is used to induce crystallization of the amorphous metal oxide layer in contact with the first crystallized metal oxide layer, so that the reserved area of the amorphous metal oxide layer is crystallized, and the etched area is still amorphous, and thus the etched area of the amorphous metal oxide layer can be directly etched and removed, a second crystallized metal oxide layer or even a third crystallized metal oxide layer is obtained, and the second electrode layer 230 with a preset thickness can be obtained.
In a specific implementation, the step of forming the upper crystallized metal oxide layer on the lower crystallized metal oxide layer can be further increased according to the required thickness of the second electrode layer 230. For example, when the second electrode layer 230 includes three crystallized metal oxide layers, a third crystallized metal oxide layer may be formed on the second crystallized metal oxide layer using the step of forming an upper crystallized metal oxide layer on a lower crystallized metal oxide layer.
Specifically, the first crystallized metal oxide layer is prepared by the following method:
a. a step of preparing a first amorphized metal oxide layer having the anode pattern on the substrate; and the number of the first and second groups,
b. and crystallizing the amorphized first metal oxide layer to obtain a first crystallized metal oxide layer.
In a specific implementation, the preparation of the first crystallized metal oxide layer 231 and the preparation of the first electrode layer 210 and the metal layer 220 can be performed together, so as to achieve the purpose of reducing the manufacturing processes.
Fig. 3A to 3C are process flow charts of fabricating a crystallized first metal oxide layer on a display substrate according to the present invention, fig. 4A to 4B are process flow charts of fabricating a crystallized second metal oxide layer on a display substrate having a crystallized first metal oxide layer, and fig. 5 is a step of preparing the pixel defining layer. As shown in fig. 3A to 3C, 4A to 4B, and 5, the present application provides a preferred preparation method in which the second electrode layer includes only the first crystallized metal oxide layer and the second crystallized metal oxide layer. Hereinafter, the processes of the method for manufacturing a display substrate according to the present invention will be described in detail with reference to fig. 3A to 3C, 4A to 4B, and 5.
In this embodiment, the method for preparing the second electrode layer includes the following steps:
s1, preparing a first crystallized metal oxide layer having the anode pattern on the substrate, the first crystallized metal oxide layer being on the metal layer; and the number of the first and second groups,
s2, preparing at least one crystallized metal oxide layer on the first crystallized metal oxide layer.
As shown in fig. 3A to 3C, in the step S1, the first electrode layer, the metal layer, and the first crystallized metal oxide layer are prepared in the following manner:
s11, sequentially manufacturing a first electrode layer, a metal layer and a first non-crystallized metal oxide layer on the substrate;
s12, carrying out graphic processing on the first electrode layer, the metal layer and the first amorphous metal oxide layer to respectively obtain a first electrode layer with an anode pattern, a metal layer and a first amorphous metal oxide layer;
and S13, crystallizing the first amorphized metal oxide layer to obtain a first crystallized metal oxide layer.
As shown in fig. 3A, through step S11, a substrate 100 is provided and a first electrode layer 201, a metal layer 202 and a first amorphized metal oxide layer 203 are sequentially stacked on the planarization layer 123 on the substrate 100. As shown in fig. 3A, the substrate is an array substrate, and the structure of the array substrate can refer to the foregoing, which is not described herein again.
Specifically, the thickness of the first electrode layer 201 is controlled so that the thickness of the first electrode layer 210 of the anode is 10nm to 100 nm.
As shown in fig. 3B, the first electrode layer 201, the metal layer 202, and the first amorphized metal oxide layer 203 are patterned into a pattern of the anode 200 to obtain a first electrode layer 210, a metal layer 220, and a first amorphized metal oxide layer 231, which are sequentially stacked on the planarization layer 213.
Specifically, the patterning refers to a process of patterning the film layer into an anode pattern and removing a region outside the anode pattern. The patterning process includes, but is not limited to, photoresist coating, exposure, development, or etching processes.
For example, in the present embodiment, the patterning of the first amorphized metal oxide layer 203 can be performed simultaneously with the patterning and etching of the first electrode layer 201 and the metal layer 202, so that the preparation process of the first crystallized metal oxide layer 231 and the preparation of the first electrode layer 210 and the metal layer 220 are performed alternately, thereby achieving the purpose of saving the manufacturing process.
As shown in fig. 3C, in the step S13, the first amorphized metal oxide layer 203a is annealed to obtain the first crystallized metal oxide layer 231, wherein the annealing temperature is 100 ℃ to 300 ℃.
In the step S13, the atmosphere of the annealing treatment may be O 2 、N 2 Air or vacuum, etc.
Specifically, the first crystallized metal oxide layer 231 has a thickness of 10nm to 40 nm.
As shown in fig. 4A to 4B, in the step S2, the second crystallized metal oxide layer is prepared by:
s21, a step of preparing a second amorphized metal oxide layer on the first crystallized metal oxide layer;
s22, making the part of the amorphous metal oxide layer corresponding to the first crystallized metal oxide layer become crystallized metal oxide;
s23, removing the amorphous metal oxide part of the amorphous metal oxide layer and remaining the crystallized metal oxide part to obtain the upper crystallized metal oxide layer having the anode pattern.
As shown in fig. 4A, the second amorphized metal oxide layer 204 covers the first crystallized metal oxide layer 231 and the substrate 110. Alternatively, the second amorphized metal oxide layer 204 includes a remaining region 2041 corresponding to the first crystallized metal oxide layer 231 and an etched region 2402 excluding the remaining region 2401. Wherein the reserved region 2041 is located on the first crystallized metal oxide layer 231, and the etched region 2402 is located mainly on the planarization layer 123.
As shown in fig. 4B, in the step S22, the reserved area 2041 on the first crystallized metal oxide layer 231 can be induced to be crystallized by the first crystallized metal oxide layer 231. That is, the remaining region 2041 of the second amorphized metal oxide layer 204 is in a crystallized state, while the etched region 2042 is in an amorphized state. To this end, the etched region 2402 can be removed by direct etching to obtain the crystallized second metal oxide layer 232.
In a preferred embodiment, the second amorphized metal oxide layer 204 may be crystallized to make the reserved area 2041 in a crystallized state and make the etched area 2042 in an amorphized state.
Of course, when the remaining region 2041 of the second amorphized metal oxide layer 204 is sufficiently crystallized under the induction of the first crystallized metal oxide layer 231, the amorphized metal oxide layer 204 does not need to be crystallized.
To amorphize theThe metal oxide film 204 is annealed to crystallize the reserved region 2041, the annealing temperature being 100 ℃ to 160 ℃. The atmosphere of the annealing temperature treatment may be O 2 、N 2 Air or vacuum, etc.
Note that since the first crystallized metal oxide layer 231 has a crystallization-inducing effect, the remaining region 2041 and the etched region 2402 are different in the ease of crystallization. On this basis, the crystallization process or the annealing process is controlled so that the remaining region 2041 is in a crystallized state and the etched region 2042 is in an amorphized state.
As shown in fig. 4C, the second amorphized metal oxide layer 204 is subjected to an etching process to remove the etched region 2402, leaving only the remaining region 2041 with the pattern of the anode 200, thereby obtaining the second crystallized metal oxide layer 232 a.
In a specific implementation, the second amorphized metal oxide layer 204 may be etched by chemical etching.
In specific implementation, the chemical etching includes processes of photoresist coating (photoresist), soft baking (soft baking), exposure (exposure), developing (leveling), hard baking (hard baking), etching with an etching solution, photoresist removal, and annealing in an oven (annealing).
In specific implementation, the method for forming the amorphized metal oxide layer may be a chemical method such as spraying (spraying), chemical deposition (chemical evaporation), dipping (dipping) or a physical method such as vacuum evaporation (vacuum evaporation) and sputtering (sputtering). In general, the sputtering method can form an amorphized metal oxide film having a lower resistance and a uniform thickness.
As shown in fig. 5, the method for manufacturing the display substrate further includes a step of manufacturing a pixel defining layer 300 on the planarization layer 122. In implementation, for example, a photosensitive organic material such as a polyimide resin or an acrylic resin may be coated, and then an exposure process and a developing process may be performed to form the pixel defining layer 300. In some embodiments, the pixel defining layer 300 may be formed of a polymer material or an inorganic material through a printing process (e.g., an inkjet printing process).
Fig. 6 is a cross-sectional view of the display panel according to the present invention. As shown in fig. 6, the present invention provides a display panel, which includes the display substrate of the present invention. For the specific structure of the display substrate of the present invention, please refer to the above, which is not repeated herein.
As shown in fig. 6, the display panel further includes a light emitting functional layer 300 and a cathode 400.
As shown in fig. 6, the light emitting function layer 300 is disposed on the first electrode 150 exposed by the pixel opening 114. The light emitting function layer 300 includes at least an organic light emitting layer formed of an organic light emitting material for generating red, blue or green light.
In some embodiments, the light emitting function layer 300 may form the HTL using the above-described hole transport material before forming the organic light emitting layer. The ETL, HTL, and ETL may also be formed on the organic light emitting layer using the above-described electron transport material, and the HTL and ETL may be patterned for each pixel through a process substantially the same as or similar to that for the organic light emitting layer.
As shown in fig. 6, the cathode 400 is formed on the surface of the light emitting function layer 300, and the edge of the light emitting function layer 300 covers the pixel defining layer 123 at the periphery of the pixel opening 1230.
Wherein the anode 200, the light emitting functional layer 300 and the cathode 400 together constitute a light emitting device, and the light emitting device 200 can be used for displaying or emitting light.
The cathode layer, in which the cathode 400 is commonly provided for the light emitting devices, may also be separately formed for each light emitting device or pixel opening 1230.
Specifically, the cathode 400 is made of a transparent material or a semitransparent material. The transparent material may be, but is not limited to, indium tin oxide, indium zinc oxide, or indium oxide.
As shown in fig. 6, the encapsulation layer 500 is disposed on the cathode 400 and covers the array substrate and the light emitting device, thereby preventing the penetration of moisture or other external contaminants into the array substrate and the light emitting device.
Specifically, the encapsulation layer 500 may include a plurality of inorganic encapsulation layers and organic encapsulation layers stacked in an alternating manner.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The display substrate, the manufacturing method thereof, and the display panel provided in the embodiments of the present application are described in detail above, and specific examples are applied in the present application to explain the principles and embodiments of the present application, and the description of the embodiments is only used to help understand the technical solutions and the core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (10)
1. A preparation method of a display substrate comprises the step of preparing an anode on a substrate, wherein the anode comprises a first electrode layer, a metal layer and a second electrode layer which are sequentially laminated on the substrate, and the preparation method of the second electrode layer is characterized by comprising the following steps of:
a step of preparing a first crystallized metal oxide layer having the anode pattern, the first crystallized metal oxide layer being on the metal layer of the anode; and (c) a second step of,
a step of preparing a second crystallized metal oxide layer having the anode pattern on the first crystallized metal oxide layer, wherein the second crystallized metal oxide layer is prepared in the following method:
a step of preparing a second amorphized metal oxide layer on the first crystallized metal oxide layer having the anode pattern;
a step of performing induced crystallization of the second amorphized metal oxide layer in contact therewith using the first crystallized metal oxide layer, and performing annealing treatment on the second amorphized metal oxide layer to crystallize only a portion of the second amorphized metal oxide layer corresponding to the first crystallized metal oxide layer, wherein the annealing temperature is 100 ℃ to 160 ℃; and the number of the first and second groups,
a step of removing a portion of the amorphized metal oxide of the second amorphized metal oxide layer and leaving a crystallized metal oxide portion to obtain a second crystallized metal oxide layer having the anode pattern.
2. The method of manufacturing a display substrate according to claim 1, wherein the method of manufacturing the first crystallized metal oxide layer comprises the steps of:
preparing and patterning a first amorphized metal oxide layer on the substrate; and (c) a second step of,
and crystallizing the patterned first amorphized metal oxide layer to obtain the first crystallized metal oxide layer.
3. The method of manufacturing a display substrate according to claim 2, wherein the first amorphized metal oxide layer is annealed at a temperature of 100 ℃ to 300 ℃ to obtain the first crystallized metal oxide layer.
4. The method of claim 1, wherein the first crystallized metal oxide layer has a thickness of 10nm to 40 nm.
5. A display substrate comprises a substrate and at least one anode arranged on the substrate, wherein the anode comprises a first electrode layer, a metal layer and a second electrode layer which are sequentially stacked in the direction far away from the substrate, and the second electrode layer comprises a plurality of layers of crystallized metal oxide layers which are stacked;
the second electrode layer has a preset thickness, and the range of the preset thickness is 80nm-100 nm;
the display substrate is obtained by the method for producing a display substrate according to any one of claims 1 to 4.
6. The display substrate according to claim 5, wherein the second electrode layer comprises a first crystallized metal oxide layer and a second crystallized metal oxide layer sequentially stacked on the metal layer, wherein a thickness of the first crystallized metal oxide layer is less than or equal to a thickness of the second crystallized metal oxide layer.
7. The display substrate of claim 6, wherein the first crystallized metal oxide layer has a thickness of 10nm to 40 nm.
8. The display substrate according to claim 6, wherein the second crystallized metal oxide layer has a thickness of 40nm to 100 nm.
9. The display substrate according to claim 5, wherein the first electrode layer has a thickness of 10nm to 100 nm.
10. A display panel comprising the display substrate according to any one of claims 5 to 9.
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| US8102111B2 (en) * | 2005-07-15 | 2012-01-24 | Seiko Epson Corporation | Electroluminescence device, method of manufacturing electroluminescence device, and electronic apparatus |
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| CN1638547A (en) * | 2003-12-26 | 2005-07-13 | 三洋电机株式会社 | Method for manufacturing display device |
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