CN112580485A - Image reading and writing method and device, electronic equipment and storage medium - Google Patents
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Abstract
The application provides a method and a device for reading and writing an image, a storage medium and an electronic device, wherein the method comprises the following steps: acquiring a first address parameter of a target sub-image, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory; calculating a first external memory address of the target sub-image in the target external memory through an address calculator from the external memory to the internal memory according to the first address parameter; and reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into the first memory address in the target memory. By the method and the device, a large amount of CPU operation is not required to be consumed, the technical effects of saving CPU resources and improving the execution efficiency of image migration can be achieved, and the problem of high CPU operation consumption in a characteristic diagram moving mode between an internal memory and an external memory in the related art is solved.
Description
Technical Field
The present application relates to the field of data processing, and in particular, to a method and an apparatus for reading and writing an image, an electronic device, and a storage medium.
Background
The specific nonlinear adaptive information processing capability of the convolutional neural network overcomes the defects of the traditional artificial intelligence method in the aspects of image recognition, voice recognition, unstructured information processing and the like, so that the convolutional neural network is successfully applied to the fields of pattern recognition, intelligent control, optimal combination, prediction and the like;
the convolutional neural network comprises a plurality of hidden layers, and each hidden layer can generate a plurality of feature maps and output the feature maps to the next hidden layer;
in the calculation process of the convolutional neural network, a plurality of characteristic graphs are generated by a multilayer network of the convolutional neural network, due to space limitation, the characteristic graphs need to be segmented and cut by an internal memory, and cut images need to be spliced in an external memory, a large amount of CPU (central processing unit) operations are consumed in the process, and the execution efficiency of a neural network processor is directly influenced by the moving speed of the images.
Disclosure of Invention
The application provides an image reading and writing method and device, a storage medium and electronic equipment, which are used for at least solving the problem that the execution efficiency of a neural network processor is directly influenced by the moving speed of a characteristic image in the related technology.
According to an aspect of an embodiment of the present application, there is provided a method for reading and writing an image, including:
acquiring a first address parameter of a target sub-image, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
calculating the first external memory address of the target sub-image in the target external memory according to the first address parameter through an address calculator;
and reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into a first memory address in a target memory.
Optionally, the calculating, by the address calculator according to the first address parameter, the first external memory address of the target sub-image in the target external memory includes:
calculating, by the address calculator, the first external memory address of the target sub-image in the target external memory according to the first initial address of the target image, the first size of the target image, the second size of the target sub-image, and the first address offset of the target sub-image, wherein the first address parameter includes: the first head address, the first size, the second size, and the first address offset, where the first head address is a head address of the target image stored in the target external memory, and the first address offset is an offset of a head address of the target sub-image with respect to the first head address.
Optionally, the calculating, by the address calculator according to the first address parameter, the first external memory address of the target sub-image in the target external memory includes:
under the condition that the target images are multiple and each target image reads the target sub-images at the same position, calculating the first external memory address of the first target sub-image in the target external memory by the address calculator according to the first address parameter of the first target sub-image, wherein the multiple target images are continuously stored in the target external memory, and the first target sub-image corresponds to the first target image;
determining, by the address calculator, the first external memory address of the target sub-image of the other image according to the first external memory address of the first target sub-image, the first size, and the number of images of the first target image spaced from the other image, where the other image is an image other than the first target image in the plurality of target images.
Optionally, before writing the target sub-image to the first memory address in the target memory, the method further includes:
calculating, by the address calculator, the first memory address of the first target sub-image according to a second address parameter of the first target sub-image, wherein the second address parameter includes: the first address and the second size of the first target sub-image stored in the target memory;
determining, by the address calculator, the first memory address of the target sub-image of the other image according to the first memory address of the first target sub-image, the second size, and the number of images between the first target image and the other image, where the target sub-images of the plurality of target images are successively stored in the target memory.
Optionally, after writing the target sub-image to the first memory address in the target memory, the method further includes:
acquiring third address parameters of a plurality of target sub-feature maps, wherein the plurality of target sub-feature maps are feature maps obtained by performing convolution calculation on the target sub-images, and the third address parameters are used for determining second memory addresses of the plurality of target sub-feature maps in the target memory;
calculating, by the address calculator, the second memory address of the plurality of target sub-feature maps in the target memory according to the third address parameter;
and reading a plurality of target sub-feature maps from the target memory according to the second memory address, and writing the plurality of target sub-feature maps into a second external memory address in the target external memory.
Optionally, calculating, by the address calculator according to the third address parameter, the second memory address of the plurality of target sub-feature maps in the target memory includes:
calculating, by the address calculator, the second memory address of the first target sub-feature map according to a second initial address of the first target sub-feature map and a third size of the target sub-feature map, where the third address parameter includes the second initial address and the third size, and the second initial address is an initial address stored in the target memory by the first target sub-feature map;
determining, by the address calculator, the second memory address of the other sub feature maps according to the second memory address and the third size of the first target sub feature map, and the number of sub feature maps spaced between the first target sub feature map and the other sub feature maps, where a plurality of target sub feature maps are continuously stored in the target memory.
Optionally, before writing the plurality of target sub-feature maps to the second external memory address in the target external memory, the method further includes:
calculating, by the address calculator, the second external memory address of the first target sub-feature map according to fourth address parameters of a plurality of target sub-feature maps, where the fourth address parameters include: a first address of a plurality of target feature maps in the target external memory, a fourth size of the target feature maps, a third size of the target sub-feature maps, a second address offset of a first target sub-feature map, a plurality of target feature maps being feature maps corresponding to the target images, the plurality of target feature maps being stored in the target external memory consecutively, the plurality of target feature maps corresponding to the plurality of target sub-feature maps one by one, the first target sub-feature map corresponding to the first target feature map;
determining, by the address calculator, the second external memory address of the target sub-feature map of the other feature map according to the second external memory address and the fourth size of the first target sub-feature map, and the number of feature maps of the first target feature map spaced from the other feature maps, where the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
According to another aspect of the embodiments of the present application, there is also provided an apparatus for reading and writing an image, the apparatus including:
the device comprises an acquisition module, a convolution module and a control module, wherein the acquisition module is used for acquiring a first address parameter of a target sub-image, the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
the first computing module is used for computing the first external memory address of the target sub-image in the target external memory according to the first address parameter through an address calculator;
and the reading module is used for reading the target sub-image from the target external memory according to the first external memory address and writing the target sub-image into the first memory address in the target memory.
Optionally, the first calculation module comprises:
a first calculating unit, configured to calculate, by the address calculator, the first external memory address of the target sub-image in the target external memory according to the first initial address of the target image, the first size of the target image, the second size of the target sub-image, and the first address offset of the target sub-image, where the first address parameter includes: the first head address, the first size, the second size, and the first address offset, where the first head address is a head address of the target image stored in the target external memory, and the first address offset is an offset of a head address of the target sub-image with respect to the first head address.
Optionally, the first calculation unit comprises:
a calculating subunit, configured to calculate, by the address calculator, the first external memory address of a first target sub-image in the target external memory according to the first address parameter of the first target sub-image when the target images are multiple and each target image reads the target sub-image at the same position, where multiple target images are stored in the target external memory consecutively, and the first target sub-image corresponds to the first target image;
a determining subunit, configured to determine, by the address calculator, the first external memory address of the target sub-image of the other image according to the first external memory address of the first target sub-image, the first size, and the number of images of the first target image spaced from the other image, where the other image is an image other than the first target image in the plurality of target images.
Optionally, the apparatus further comprises:
a second calculating module, configured to calculate, by the address calculator, a first memory address of a first target sub-image according to a second address parameter of the first target sub-image before writing the target sub-image to the first memory address in a target memory, where the second address parameter includes: the first address and the second size of the first target sub-image stored in the target memory;
a first determining module, configured to determine, by the address calculator, the first memory address of the target sub-image of the other image according to the first memory address of the first target sub-image, the second size, and the number of images between the first target image and the other image, where the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
Optionally, the apparatus further comprises:
a second determining module, configured to obtain third address parameters of a plurality of target sub-feature maps after writing the target sub-image into a first memory address in a target memory, where the plurality of target sub-feature maps are feature maps obtained by performing convolution calculation on the target sub-image, and the third address parameters are used to determine a second memory address of the plurality of target sub-feature maps in the target memory;
a third calculating module, configured to calculate, by the address calculator, the second memory address of the target sub-feature maps in the target memory according to the third address parameter;
and the writing module is used for reading the plurality of target sub-feature maps from the target memory according to the second memory address and writing the plurality of target sub-feature maps into a second external memory address in the target external memory.
Optionally, the third computing module comprises:
a second calculating unit, configured to calculate, by the address calculator, a second memory address of the first target sub-feature map according to a second head address of the first target sub-feature map and a third size of the target sub-feature map, where the third address parameter includes the second head address and the third size, and the second head address is a head address of the first target sub-feature map stored in the target memory;
a determining unit, configured to determine, by the address calculator, the second memory address of the other sub feature map according to the second memory address of the first target sub feature map, the third size, and the number of sub feature maps spaced between the first target sub feature map and the other sub feature maps, where a plurality of target sub feature maps are continuously stored in the target memory.
Optionally, the apparatus further comprises:
a fourth calculating module, configured to calculate, by the address calculator, a second external memory address of a first target sub-feature map according to a fourth address parameter of a plurality of target sub-feature maps before writing the plurality of target sub-feature maps to the second external memory address in the target external memory, where the fourth address parameter includes: a first address of a plurality of target feature maps in the target external memory, a fourth size of the target feature maps, a third size of the target sub-feature maps, a second address offset of a first target sub-feature map, a plurality of target feature maps being feature maps corresponding to the target images, the plurality of target feature maps being stored in the target external memory consecutively, the plurality of target feature maps corresponding to the plurality of target sub-feature maps one by one, the first target sub-feature map corresponding to the first target feature map;
a third determining module, configured to determine, by the address calculator, the second external memory address of the target sub-feature map of the other feature map according to the second external memory address and the fourth size of the first target sub-feature map and the number of feature maps obtained by separating the first target feature map from the other feature maps, where the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
According to another aspect of the embodiments of the present application, there is also provided an electronic device, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory communicate with each other through the communication bus; wherein the memory is used for storing the computer program; and the processor is used for executing the steps of the image reading and writing method in any one of the above embodiments by running the computer program stored in the memory.
According to another aspect of the embodiments of the present application, there is further provided a computer-readable storage medium, in which a computer program is stored, where the computer program is configured to execute the steps of the method for reading and writing an image in any of the above embodiments when the computer program is executed.
According to yet another aspect of an embodiment of the present application, there is also provided a computer program product or a computer program comprising computer instructions stored in a computer readable storage medium; the processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions to enable the computer device to execute the steps of the image reading and writing method in any one of the above embodiments.
In the embodiment of the application, the target sub-image to be convolved is acquired according to the address of the sub-image to be convolved in the target external memory in the target image, the target sub-image is read out from the target external memory and then written into the memory address of the target internal memory, and because the address calculator is used for calculating the image storage address according to the address parameters and reading and writing the image according to the image storage address, a large amount of CPU (central processing unit) operation is not required to be consumed, the technical effects of saving CPU resources and improving the execution efficiency of image migration can be achieved, and the problem of large CPU operation consumption in a manner of moving the feature map between the internal memory and the external memory in the related art is solved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a flow chart illustrating an alternative method for reading and writing an image according to an embodiment of the present disclosure;
FIG. 2 is a block diagram of an alternative signature read and write circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an alternative feature diagram reading process according to an embodiment of the present application;
FIG. 4 is a schematic drawing of an alternative feature diagram writing process according to an embodiment of the present application;
FIG. 5 is a block diagram of an alternative image reading/writing apparatus according to an embodiment of the present application;
fig. 6 is a block diagram of an alternative electronic device according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In order to solve the problem, the embodiment of the present application provides a method for reading and writing an image, as shown in fig. 1, where a convolutional neural network is used as a main branch of a deep neural network, and a network structure is composed of an input layer, an output layer, and multiple hidden layers, and in a convolutional neural network calculation process, each layer generates a large number of feature maps, and a memory cannot store all the feature maps due to capacity limitation, so that the feature maps need to be transferred in the memory and an external memory, and this transfer process consumes a large amount of CPU operations:
step S101, a first address parameter of a target sub-image is obtained, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
step S102, calculating a first external memory address of the target sub-image in the target external memory according to the first address parameter through the address calculator;
step S103, reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into the first memory address in the target memory.
Optionally, in the embodiment of the present application, at least one target image is first obtained, where the target image may be an image of three channels RGB without performing a convolution operation, or may be a feature map obtained after the convolution.
Then, the sub-image to be convolved in the plurality of sub-images included in the target image is used as the target sub-image, the first address parameter of the target sub-image is obtained, the address (namely the first external memory address) of the target sub-image in the target external memory can be obtained after the first address parameter is input into the address calculator, the target sub-image is read out from the target external memory by using the first external memory address of the target sub-image, and the target sub-image is written into the first memory address in the target internal memory. It should be noted that the first memory address is an address for storing the target sub-image.
In the embodiment of the application, the target sub-image to be convolved is acquired according to the address of the sub-image to be convolved in the target external memory in the target image, the target sub-image is read out from the target external memory and then written into the memory address of the target internal memory, and because the address calculator is used for calculating the image storage address according to the address parameters and reading and writing the image according to the image storage address, a large amount of CPU (central processing unit) operation is not required to be consumed, the technical effects of saving CPU resources and improving the execution efficiency of image migration can be achieved, and the problem of large CPU operation consumption in a manner of moving the feature map between the internal memory and the external memory in the related art is solved.
As an alternative embodiment, calculating, by the address calculator according to the first address parameter, a first external memory address of the target sub-image in the target external memory includes:
calculating a first external memory address of the target sub-image in the target external memory according to the first address of the target image, the first size of the target image, the second size of the target sub-image and the first address offset of the target sub-image by an address calculator, wherein the first address parameter comprises: the first address is the first address stored in the target external memory of the target image, and the first address offset is the offset of the first address of the target sub-image relative to the first address.
Optionally, the first external memory address of the target sub-image output by the address calculator is obtained according to a first head address of the target image, a first size of the target image, a second size of the target sub-image, and a first address offset of the target sub-image, where the first address offset is an offset of the head address of the target sub-image relative to the first head address.
For example, after acquiring the first address stored in the target external memory of the target image, the offset of the first address of the target sub-image relative to the first address, the first size of the target image, and the second size of the target sub-image, the address stored in the target external memory of the target sub-image can be located.
As an alternative embodiment, calculating, by the address calculator according to the first address parameter, a first external memory address of the target sub-image in the target external memory includes:
under the condition that the target images are multiple and each target image reads a target sub-image at the same position, calculating a first external memory address of a first target sub-image in a target external memory by an address calculator according to a first address parameter of the first target sub-image, wherein the multiple target images are continuously stored in the target external memory, and the first target sub-image corresponds to the first target image;
and determining the first external memory address of the target sub-image of other images according to the first external memory address and the first size of the first target sub-image and the number of images of the first target image spaced from other images by the address calculator, wherein the other images are images except the first target image in the plurality of target images.
Optionally, when the number of the target images is multiple and the multiple target images are continuously stored in the target external memory, the target sub-images at the same position of each target image need to be acquired in a manner of performing convolution processing on the images by the convolutional neural network. To obtain the target sub-images at the same position in each target image, the storage address of the target sub-image in the target external memory (i.e. the first external memory address) in each target image can be determined by obtaining the first external memory address of the first target sub-image in the target external memory, the first size of the target image, and the number of images spaced from the first target image.
For example, a first external memory address of a first target sub-image in the target external memory is a, a first size of the target image is b, where b is width x height of the target image, at this time, the number of spaced images between a second target image and the first target image is 0, a first external memory address of a target sub-image of the second target image in the target external memory is a + b, the number of spaced images between a third target image and the first target image is 1, and a first external memory address of a target sub-image of the third target image in the target external memory is a + b + b. By analogy, the first external memory address of the target sub-image of the other image can be obtained.
As an alternative embodiment, before writing the target sub-image to the first memory address in the target memory, the method further comprises:
calculating a first memory address of the first target sub-image according to a second address parameter of the first target sub-image by an address calculator, wherein the second address parameter comprises: the first address and the second size of the first target sub-image stored in the target memory;
and determining the first memory addresses of the target sub-images of other images by the address calculator according to the first memory address and the second size of the first target sub-image and the number of images between the first target image and other images, wherein the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
Optionally, when the target sub-images of the plurality of target images are continuously stored in the target memory, the storage address of the target sub-image in the target memory (i.e. the first memory address) in each target image may be determined by obtaining the first memory address of the first target sub-image in the target memory, the second size of the target sub-image, and the number of images spaced from the first target image.
For example, a first memory address of the first target sub-image in the target memory is m, a second size of the target sub-image is n, where n is the width of the target sub-image, at this time, the number of the spaced images between the second target image and the first target image is 0, a first memory address of the target sub-image of the second target image in the target memory is m + n, the number of the spaced images between the third target image and the first target image is 1, and a first memory address of the target sub-image of the third target image in the target memory is m + n + n. By analogy, the first memory address of the target sub-image of the other image can be obtained.
As an alternative embodiment, the method further comprises:
after the target sub-image is written into a first memory address in a target memory, third address parameters of a plurality of target sub-feature maps are obtained, wherein the plurality of target sub-feature maps are feature maps obtained by performing convolution calculation on the target sub-image, and the third address parameters are used for determining a second memory address of the plurality of target sub-feature maps in the target memory;
calculating a second memory address of the plurality of target sub-feature maps in the target memory according to the third address parameter by the address calculator;
and reading a plurality of target sub-feature maps from the target memory according to the second memory address, and writing the plurality of target sub-feature maps into a second external memory address in the target external memory.
Optionally, performing convolution calculation on the target sub-image by using a convolution neural network to obtain a third address parameter of the plurality of target sub-feature maps.
The address calculator calculates the third address parameter, and can determine a second memory address of the plurality of target sub-feature maps in the target memory, which are obtained after convolution.
And then, reading a plurality of target sub-feature maps from the target memory according to the second memory address, and writing the target sub-feature maps into a second external memory address in the target external memory. Wherein the second external memory address is used for storing a plurality of target sub-feature maps.
As an alternative embodiment, calculating, by the address calculator according to the third address parameter, a second memory address of the plurality of target sub-feature maps in the target memory includes:
calculating a second memory address of the first target sub-feature map according to a second initial address of the first target sub-feature map and a third size of the target sub-feature map by using an address calculator, wherein the third address parameter comprises the second initial address and the third size, and the second initial address is an initial address stored in the target memory by the first target sub-feature map;
and determining the second memory address of other sub-feature maps according to the second memory address and the third size of the first target sub-feature map and the number of sub-feature maps spaced between the first target sub-feature map and the other sub-feature maps by the address calculator, wherein a plurality of target sub-feature maps are continuously stored in the target memory.
Optionally, the second head address of the first target sub-feature map is obtained first, and then the third size of the target sub-feature map is obtained, since the plurality of target sub-feature maps in the embodiment of the present application are stored continuously in the target memory, the address calculator may determine the second memory address of the other sub-feature maps in the target memory according to the second head address of the first target sub-feature map, the third size of the target sub-feature map, and the number of sub-feature maps at intervals between the first target sub-feature map and the other sub-feature maps.
For example, the second head address of the first target sub-feature map is p, the third size of the target sub-feature map is q, where q is the width x height of the target sub-feature map, at this time, the number of spaced images between the second target sub-feature map and the first target sub-feature map is 0, the second memory address of the second target sub-feature map is p + q, the number of spaced images between the third target sub-feature map and the first target sub-feature map is 1, and the second memory address of the third target sub-feature map is p + q + q. And in the same way, the second memory addresses of other target sub-feature graphs can be obtained.
As an alternative embodiment, the method further comprises:
before writing the plurality of target sub-feature maps to a second external memory address in the target external memory, calculating, by the address calculator, a second external memory address of the first target sub-feature map according to fourth address parameters of the plurality of target sub-feature maps, wherein the fourth address parameters include: the first addresses of a plurality of target feature maps in a target external memory, the fourth size of the target feature maps, the third size of the target sub-feature maps, the second address offset of a first target sub-feature map, the plurality of target feature maps are feature maps corresponding to target images, the plurality of target feature maps are continuously stored in the target external memory, the plurality of target feature maps correspond to the plurality of target sub-feature maps one by one, and the first target sub-feature map corresponds to the first target feature map;
and determining the second external memory addresses of the target sub-feature maps of other feature maps by an address calculator according to the second external memory address and the fourth size of the first target sub-feature map and the number of feature maps spaced by the first target feature map and other feature maps, wherein the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
Optionally, according to the first size of the target image and the size of the convolution kernel, a plurality of target feature maps may be obtained in advance, and the fourth size of the target feature map may be obtained.
And obtaining fourth address parameters of the plurality of target sub-feature maps according to the first addresses of the plurality of target feature maps in the target external memory, the fourth size of the target feature maps, the third size of the target sub-feature maps and the second address offset of the first target sub-feature map, wherein the plurality of target feature maps are continuously stored in the target external memory, the plurality of target feature maps correspond to the plurality of target sub-feature maps in a one-to-one manner, and the second address offset is the offset of the first target sub-feature map relative to the first target feature map.
The address calculator determines a second external memory address of the target sub-feature map of the other feature map according to the second external memory address of the first target sub-feature map, the fourth size of the target feature map, and the number of feature maps separating the first target feature map from the other feature map.
For example, the second external memory address of the first target sub-feature map of the first target feature map is g, the fourth size of the target feature map is h, where h is width x height of the target feature map, at this time, the number of the spaced feature maps between the second target feature map and the first target feature map is 0, the second external memory address of the first target sub-feature map of the second target feature map is g + h, the number of the spaced feature maps between the third target feature map and the first target feature map is 1, and the second external memory address of the first target sub-feature map of the third target feature map is g + h + h. And by analogy, the second memory address of the first target sub-feature map in other feature maps can be obtained.
The second external memory address of the second target sub-feature map of the first target feature map is j, the fourth size of the target feature map is h, where h is the width x the height of the target feature map, at this time, the number of feature maps at intervals between the second target feature map and the first target feature map is 0, the second external memory address of the second target sub-feature map of the second target feature map is j + h, the number of feature maps at intervals between the third target feature map and the first target feature map is 1, and the second external memory address of the second target sub-feature map of the third target feature map is j + h + h. And by analogy, a second memory address of a second target sub-feature map in the other feature maps can be obtained.
Similarly, the second external memory addresses of other target sub-feature maps of other target feature maps are also calculated according to the above calculation method, and are not described herein again.
And in the target external memory, completing the splicing of each target characteristic diagram by using the second external memory addresses of all the target sub-characteristic diagrams so as to represent the image characteristic information of the target image.
In addition, the image bit width is set to represent the pixel bit number occupied by the image, and the image bit width can be multiplied when the sizes of the target feature map, the target sub-image and the target sub-feature map are obtained to represent the pixel bit number occupied by each target feature map, target sub-image and target sub-feature map.
According to the fourth address parameter of the plurality of target sub-feature graphs obtained through calculation, the storage position of each target sub-feature graph in each target feature graph in the target external memory can be obtained, the target feature graphs are automatically moved from the target internal memory to the target external memory, the CPU operation is not needed, and the CPU resource is released.
As an alternative embodiment, an embodiment of the present application provides a system for reading and writing an image, as shown in fig. 2, 3, and 4, the system includes: the device comprises an external memory, an internal memory, a parameter configuration module, an address calculation module, a bus control interface module, a data cache module, a characteristic diagram reading module and a characteristic diagram writing module;
the external memory is connected with the bus control interface module, the data cache module is connected with the bus control interface module, the characteristic diagram writing module and the characteristic diagram reading module, the parameter configuration module is connected with the address calculation module, and the characteristic diagram reading module and the characteristic diagram writing module are respectively connected with the address calculation module, the bus control interface module and the internal memory;
the parameter configuration module is used for setting parameters, such as the size and the number of the input feature maps and the size and the offset addresses of the input original pictures, or the size and the number of the output feature maps and the size and the offset addresses of the output original pictures;
the address calculation module is used for calculating the address of the input/output characteristic diagram in the internal memory/external memory according to the parameter configuration and transmitting the address to the characteristic diagram reading/writing module;
the characteristic diagram reading module is used for reading a characteristic diagram input by an external memory from the data caching module, inputting an address of the characteristic diagram and a memory initial address in the address calculating module, and writing the characteristic diagram into a corresponding address in the memory;
the characteristic diagram writing module is used for writing the characteristic diagram written by the memory into the data caching module, outputting the address of the characteristic diagram in the address calculation module, and writing the characteristic diagram into the corresponding address in the external memory through the bus control interface module;
and the bus control interface module is used for generating bus read-write signals according to the address information transmitted by the characteristic diagram reading module and the characteristic diagram writing module and the state of the data caching module, and performing read-write operation on the external memory.
It can be understood that the external memory is equal to the target external memory, and the internal memory is equal to the target internal memory in the embodiment of the present application.
In addition, the characteristic diagram reading module sends a reading request to the bus control interface module according to the external memory address and the position of the image, for example, when the read image is located at the initial position or the middle position of a certain line of the characteristic diagram, because the subsequent images are continuously arranged in the external memory, a continuous reading request (such as continuously reading 4 images or 8 images) can be sent to improve the reading efficiency, and when the image read by the diagram is located at the end position of a certain line of the characteristic diagram (such as a point P shown in fig. 3), because the address of the subsequent image needs to jump to the initial position of the next line, a single reading request needs to be generated at the moment, while the characteristic diagram reading module sends the reading request, if the data in the data cache module is updated, the data in the cache module is read and written into the memory according to the memory address; the bus control interface module sends out a bus read request according to the read request, the address and the state of the data cache module of the characteristic diagram reading module, stores read data returned by the bus into the data cache module, and waits until the state of the data cache module can store the data of the read request if the state of the data cache module is full, and then sends out the read request.
When the feature map writing function is executed, as in the parameter configuration in fig. 4, the feature map writing module only changes to output the feature map and output the original map, the address calculation method is the same, the feature map writing module sends a write request (a continuous write request or a single write request) to the bus module according to the address and the position of the image, and writes the output feature map in the memory into the data cache module, the bus control module sends a bus write request according to the states of the write request, the address and the data cache module, and reads the data of the data cache module and sends the data to the bus, and similarly, when the data of the data cache module is insufficient, the bus control module waits until the data cache module receives enough data to send the write request.
When the efficient reading and writing of a plurality of feature maps are realized, the reading and splicing of any feature map can be completed only by changing the first address of the read or written current feature map.
According to another aspect of the embodiments of the present application, there is also provided an image reading and writing apparatus for implementing the image reading and writing method. Fig. 5 is a schematic diagram of an alternative image reading and writing apparatus according to an embodiment of the present application, and as shown in fig. 5, the apparatus may include:
the acquiring module 501 is configured to acquire a first address parameter of a target sub-image, where the target sub-image is a sub-image to be convolved in a plurality of sub-images included in a target image, and the first address parameter is used to determine a first external memory address of the target sub-image in a target external memory;
a first calculating module 502, configured to calculate, by the address calculator, a first external memory address of the target sub-image in the target external memory according to the first address parameter;
the reading module 503 is configured to read the target sub-image from the target external memory according to the first external memory address, and write the target sub-image to the first memory address in the target memory.
It should be noted that the obtaining module 501 in this embodiment may be configured to execute the step S101, the first calculating module 502 in this embodiment may be configured to execute the step S102, and the reading module 503 in this embodiment may be configured to execute the step S103.
As an alternative embodiment, the first calculation module comprises:
a first calculating unit, configured to calculate, by an address calculator, a first external memory address of the target sub-image in the target external memory according to the first initial address of the target image, the first size of the target image, the second size of the target sub-image, and the first address offset of the target sub-image, where the first address parameter includes: the first address is the first address stored in the target external memory of the target image, and the first address offset is the offset of the first address of the target sub-image relative to the first address.
As an alternative embodiment, the first calculation unit comprises:
the calculating subunit is used for calculating a first external memory address of the first target sub-image in the target external memory according to a first address parameter of the first target sub-image by the address calculator under the condition that the target images are multiple and each target image reads the target sub-image at the same position, wherein the multiple target images are continuously stored in the target external memory, and the first target sub-image corresponds to the first target image;
and the determining subunit is used for determining the first external memory address of the target sub-image of other images according to the first external memory address and the first size of the first target sub-image and the number of images of the first target image spaced from other images by the address calculator, wherein the other images are images except the first target image in the plurality of target images.
As an alternative embodiment, the apparatus further comprises:
a second calculating module, configured to calculate, by the address calculator, a first memory address of the first target sub-image according to a second address parameter of the first target sub-image before writing the target sub-image to the first memory address in the target memory, where the second address parameter includes: the first address and the second size of the first target sub-image stored in the target memory;
the first determining module is used for determining the first memory addresses of the target sub-images of other images according to the first memory address and the second size of the first target sub-image and the number of images spaced between the first target image and other images through the address calculator, wherein the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
As an alternative embodiment, the apparatus further comprises:
the second determining module is used for acquiring third address parameters of a plurality of target sub-feature maps after the target sub-images are written into the first memory addresses in the target memory, wherein the plurality of target sub-feature maps are feature maps obtained by performing convolution calculation on the target sub-images, and the third address parameters are used for determining second memory addresses of the plurality of target sub-feature maps in the target memory;
the third calculation module is used for calculating second memory addresses of the target sub-feature graphs in the target memory according to the third address parameters through the address calculator;
and the writing module is used for reading the plurality of target sub-feature maps from the target memory according to the second memory address and writing the plurality of target sub-feature maps into a second external memory address in the target external memory.
As an alternative embodiment, the third calculation module comprises:
the second calculating unit is used for calculating a second memory address of the first target sub-feature map according to a second initial address of the first target sub-feature map and a third size of the target sub-feature map through the address calculator, wherein the third address parameter comprises the second initial address and the third size, and the second initial address is an initial address stored in the target memory by the first target sub-feature map;
and the determining unit is used for determining the second memory addresses of other sub-feature maps according to the second memory address and the third size of the first target sub-feature map and the number of sub-feature maps spaced between the first target sub-feature map and the other sub-feature maps by the address calculator, wherein a plurality of target sub-feature maps are continuously stored in the target memory.
As an alternative embodiment, the apparatus further comprises:
a fourth calculating module, configured to calculate, by the address calculator, a second external memory address of the first target sub-feature map according to fourth address parameters of the plurality of target sub-feature maps before writing the plurality of target sub-feature maps to the second external memory address in the target external memory, where the fourth address parameters include: the first addresses of a plurality of target feature maps in a target external memory, the fourth size of the target feature maps, the third size of the target sub-feature maps, the second address offset of a first target sub-feature map, the plurality of target feature maps are feature maps corresponding to target images, the plurality of target feature maps are continuously stored in the target external memory, the plurality of target feature maps correspond to the plurality of target sub-feature maps one by one, and the first target sub-feature map corresponds to the first target feature map;
and the third determining module is used for determining the second external memory addresses of the target sub-feature maps of other feature maps according to the second external memory address and the fourth size of the first target sub-feature map and the number of feature maps of the interval between the first target feature map and other feature maps by the address calculator, wherein the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
According to still another aspect of the embodiments of the present application, there is also provided an electronic device for implementing the control method of food in a refrigerator, which may be a server, a terminal, or a combination thereof.
Fig. 6 is a block diagram of an alternative electronic device according to an embodiment of the present application, as shown in fig. 6, including a processor 601, a communication interface 602, a memory 603, and a communication bus 604, where the processor 601, the communication interface 602, and the memory 603 complete communication with each other through the communication bus 604, where,
a memory 603 for storing a computer program;
the processor 601, when executing the computer program stored in the memory 603, implements the following steps:
s1, acquiring a first address parameter of a target sub-image, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in the target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
s2, calculating a first external memory address of the target sub-image in the target external memory according to the first address parameter through the address calculator;
and S3, reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into the first memory address in the target memory.
Alternatively, in this embodiment, the communication bus may be a PCI (Peripheral Component Interconnect) bus, an EISA (Extended Industry Standard Architecture) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 6, but this is not intended to represent only one bus or type of bus.
The communication interface is used for communication between the electronic equipment and other equipment.
The memory may include RAM, and may also include non-volatile memory (non-volatile memory), such as at least one disk memory. Alternatively, the memory may be at least one memory device located remotely from the processor.
As an example, as shown in fig. 6, the memory 603 may include, but is not limited to, an acquisition module 501, a first calculation module 502, and a reading module 503 in the read/write device for the image. In addition, the image processing apparatus may further include, but is not limited to, other module units in the image reading and writing apparatus, which is not described in detail in this example.
The processor may be a general-purpose processor, and may include but is not limited to: a CPU (Central Processing Unit), an NP (Network Processor), and the like; but also a DSP (Digital Signal Processing), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment is not described herein again.
It can be understood by those skilled in the art that the structure shown in fig. 6 is only an illustration, and the device implementing the above image reading and writing method may be a terminal device, and the terminal device may be a terminal device such as a smart phone (e.g., an Android phone, an iOS phone, etc.), a tablet computer, a palm computer, a Mobile Internet Device (MID), a PAD, and the like. Fig. 6 is a diagram illustrating a structure of the electronic device. For example, the terminal device may also include more or fewer components (e.g., network interfaces, display devices, etc.) than shown in FIG. 6, or have a different configuration than shown in FIG. 6.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disk, ROM, RAM, magnetic or optical disk, and the like.
According to still another aspect of an embodiment of the present application, there is also provided a storage medium. Alternatively, in this embodiment, the storage medium may be a program code for executing a method of reading and writing an image.
Optionally, in this embodiment, the storage medium may be located on at least one of a plurality of network devices in a network shown in the above embodiment.
Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps:
s1, acquiring a first address parameter of a target sub-image, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in the target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
s2, calculating a first external memory address of the target sub-image in the target external memory according to the first address parameter through the address calculator;
and S3, reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into the first memory address in the target memory.
Optionally, the specific example in this embodiment may refer to the example described in the above embodiment, which is not described again in this embodiment.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing program codes, such as a U disk, a ROM, a RAM, a removable hard disk, a magnetic disk, or an optical disk.
The integrated unit in the above embodiments, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in the above computer-readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or a part or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing one or more computer devices (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the reading and writing method of the images according to the embodiments of the present application.
In the above embodiments of the present application, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The foregoing is only a preferred embodiment of the present application and it should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.
Claims (10)
1. A method for reading and writing an image, the method comprising:
acquiring a first address parameter of a target sub-image, wherein the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
calculating the first external memory address of the target sub-image in the target external memory according to the first address parameter through an address calculator;
and reading the target sub-image from the target external memory according to the first external memory address, and writing the target sub-image into a first memory address in a target memory.
2. The method of claim 1, wherein calculating, by the address calculator according to the first address parameter, the first external memory address of the target sub-image in the target external memory comprises:
calculating, by the address calculator, the first external memory address of the target sub-image in the target external memory according to the first initial address of the target image, the first size of the target image, the second size of the target sub-image, and the first address offset of the target sub-image, wherein the first address parameter includes: the first head address, the first size, the second size, and the first address offset, where the first head address is a head address of the target image stored in the target external memory, and the first address offset is an offset of a head address of the target sub-image with respect to the first head address.
3. The method of claim 2, wherein calculating, by the address calculator according to the first address parameter, the first external memory address of the target sub-image in the target external memory comprises:
under the condition that the target images are multiple and each target image reads the target sub-images at the same position, calculating the first external memory address of the first target sub-image in the target external memory by the address calculator according to the first address parameter of the first target sub-image, wherein the multiple target images are continuously stored in the target external memory, and the first target sub-image corresponds to the first target image;
determining, by the address calculator, the first external memory address of the target sub-image of the other image according to the first external memory address of the first target sub-image, the first size, and the number of images of the first target image spaced from the other image, where the other image is an image other than the first target image in the plurality of target images.
4. The method of claim 3, wherein prior to writing the target sub-image to the first memory address in the target memory, the method further comprises:
calculating, by the address calculator, the first memory address of the first target sub-image according to a second address parameter of the first target sub-image, wherein the second address parameter includes: the first address and the second size of the first target sub-image stored in the target memory;
determining, by the address calculator, the first memory address of the target sub-image of the other image according to the first memory address of the first target sub-image, the second size, and the number of images between the first target image and the other image, where the target sub-images of the plurality of target images are successively stored in the target memory.
5. The method of any of claims 1-4, wherein after writing the target sub-image to the first memory address in the target memory, the method further comprises:
acquiring third address parameters of a plurality of target sub-feature maps, wherein the plurality of target sub-feature maps are feature maps obtained by performing convolution calculation on the target sub-images, and the third address parameters are used for determining second memory addresses of the plurality of target sub-feature maps in the target memory;
calculating, by the address calculator, the second memory address of the plurality of target sub-feature maps in the target memory according to the third address parameter;
and reading a plurality of target sub-feature maps from the target memory according to the second memory address, and writing the plurality of target sub-feature maps into a second external memory address in the target external memory.
6. The method of claim 5, wherein calculating, by the address calculator according to the third address parameter, the second memory address of the plurality of target sub-feature maps in the target memory comprises:
calculating, by the address calculator, the second memory address of the first target sub-feature map according to a second initial address of the first target sub-feature map and a third size of the target sub-feature map, where the third address parameter includes the second initial address and the third size, and the second initial address is an initial address stored in the target memory by the first target sub-feature map;
determining, by the address calculator, the second memory address of the other sub feature maps according to the second memory address and the third size of the first target sub feature map, and the number of sub feature maps spaced between the first target sub feature map and the other sub feature maps, where a plurality of target sub feature maps are continuously stored in the target memory.
7. The method of claim 5, wherein prior to writing the plurality of target sub-feature maps to the second external memory address in the target external memory, the method further comprises:
calculating, by the address calculator, the second external memory address of the first target sub-feature map according to fourth address parameters of a plurality of target sub-feature maps, where the fourth address parameters include: a first address of a plurality of target feature maps in the target external memory, a fourth size of the target feature maps, a third size of the target sub-feature maps, a second address offset of a first target sub-feature map, a plurality of target feature maps being feature maps corresponding to the target images, the plurality of target feature maps being stored in the target external memory consecutively, the plurality of target feature maps corresponding to the plurality of target sub-feature maps one by one, the first target sub-feature map corresponding to the first target feature map;
determining, by the address calculator, the second external memory address of the target sub-feature map of the other feature map according to the second external memory address and the fourth size of the first target sub-feature map, and the number of feature maps of the first target feature map spaced from the other feature maps, where the target sub-images of the plurality of target images are sequentially and continuously stored in the target memory.
8. An apparatus for reading and writing an image, the apparatus comprising:
the device comprises an acquisition module, a convolution module and a control module, wherein the acquisition module is used for acquiring a first address parameter of a target sub-image, the target sub-image is a sub-image to be convolved in a plurality of sub-images contained in a target image, and the first address parameter is used for determining a first external memory address of the target sub-image in a target external memory;
the calculation module is used for calculating the first external memory address of the target sub-image in the target external memory according to the first address parameter through an address calculator;
and the reading module is used for reading the target sub-image from the target external memory according to the first external memory address and writing the target sub-image into the first memory address in the target memory.
9. A computer-readable storage medium, characterized in that the storage medium comprises a stored program, wherein the program is operative to perform the method steps of reading or writing an image according to any of claims 1 to 7.
10. An electronic device comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus; wherein:
a memory for storing a computer program;
a processor for executing the steps of the method for reading and writing an image according to any one of claims 1 to 7 by executing a program stored in a memory.
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