CN112565137A - Signal processing device - Google Patents
Signal processing device Download PDFInfo
- Publication number
- CN112565137A CN112565137A CN201910914150.6A CN201910914150A CN112565137A CN 112565137 A CN112565137 A CN 112565137A CN 201910914150 A CN201910914150 A CN 201910914150A CN 112565137 A CN112565137 A CN 112565137A
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- China
- Prior art keywords
- instruction
- phase offset
- component
- wide bandwidth
- offset derivation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
Abstract
A signal processing appliance comprising: the system comprises a wide bandwidth multiplication component, a narrow bandwidth instruction low decibel component, a wide bandwidth data low decibel component and a program control component; the wide bandwidth multiplication component is configured to obtain a phase offset derivation instruction, where the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and derive the phase offset derivation instruction after performing an expanding multiplication on the wide bandwidth portion instruction in the phase offset derivation instruction. The defect that the percentage coverage area of the signals in the prior art is small is effectively avoided.
Description
Technical Field
The invention relates to the technical field of signal processing appliances, in particular to a signal processing appliance.
Background
It is common to use a pilot header of a low decibel component house signal channel, which handles a larger signal percentage area, as a signal transmission condition processing component. But during the development of low decibel devices, a larger signal percentage area is to be covered.
Disclosure of Invention
In order to solve the above problems, the present invention provides a signal processing device, which effectively avoids the defect of small percentage coverage area of signals in the prior art.
In order to overcome the defects in the prior art, the invention provides a solution for a signal processing device, which comprises the following specific steps:
a signal processing appliance comprising: the system comprises a wide bandwidth multiplication component 1, a narrow bandwidth instruction low decibel component 2, a wide bandwidth data low decibel component 3 and a program control component 4;
the wide bandwidth multiplication component is configured to obtain a phase offset derivation instruction, where the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and derive the phase offset derivation instruction after performing an expanding multiplication on the wide bandwidth portion instruction in the phase offset derivation instruction.
The narrow bandwidth instruction low decibel component is used for acquiring the phase shift lead-in instruction, processing a peak value of a narrow bandwidth part instruction in the phase shift lead-in instruction, and comparing the peak value with a set critical number one to derive a contrast value one.
The wideband data low decibel component is configured to obtain the phase offset derivation instruction, wherein the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and process a peak value of the wide bandwidth portion instruction in the phase offset derivation instruction, and compare the peak value with a second predetermined threshold to derive a second comparison value.
The invention has the beneficial effects that:
wide bandwidth multiplication may be imparted by terminating unnecessary processing components and recycling components on the signal channel during processing with or without accompanying signaling.
Drawings
FIG. 1 is a block diagram of a signal processing device of the present invention;
Detailed Description
The present invention will be further described with reference to the following examples.
As shown in fig. 1, the signal processing device of the present embodiment includes: the system comprises a wide bandwidth multiplication component 1, a narrow bandwidth instruction low decibel component 2, a wide bandwidth data low decibel component 3 and a program control component 4;
the wide bandwidth multiplication component is configured to obtain a phase offset derivation instruction, where the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and derive the phase offset derivation instruction after performing an expanding multiplication on the wide bandwidth portion instruction in the phase offset derivation instruction.
The narrow bandwidth instruction low decibel component is used for acquiring the phase shift lead-in instruction, processing a peak value of a narrow bandwidth part instruction in the phase shift lead-in instruction, and comparing the peak value with a set critical number one to derive a contrast value one.
The wideband data low decibel component is configured to obtain the phase offset derivation instruction, wherein the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and process a peak value of the wide bandwidth portion instruction in the phase offset derivation instruction, and compare the peak value with a second predetermined threshold to derive a second comparison value.
Wide bandwidth multiplication may be imparted by terminating unnecessary processing components and recycling components on the signal channel during processing with or without accompanying signaling.
The present invention has been described above by way of embodiments, and it will be understood by those skilled in the art that the present disclosure is not limited to the above-described embodiments, and various changes, modifications and substitutions may be made without departing from the scope of the present invention.
Claims (3)
1. A signal processing appliance, comprising: the system comprises a wide bandwidth multiplication component, a narrow bandwidth instruction low decibel component, a wide bandwidth data low decibel component and a program control component;
the wide bandwidth multiplication component is configured to obtain a phase offset derivation instruction, where the phase offset derivation instruction includes a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and derive the phase offset derivation instruction after performing an expanding multiplication on the wide bandwidth portion instruction in the phase offset derivation instruction.
2. The signal processing apparatus as claimed in claim 1, wherein the narrow bandwidth instruction low decibel component is configured to obtain the phase offset lead-in instruction, process a peak value of a narrow bandwidth portion instruction in the phase offset lead-in instruction, and compare the peak value with a predetermined threshold value one to derive a comparison value one.
3. The signal processing apparatus of claim 2, wherein the wide bandwidth data low decibel component is configured to obtain the phase offset derivation instruction, wherein the phase offset derivation instruction comprises a narrow bandwidth portion instruction and a wide bandwidth portion instruction, and wherein a peak value of the wide bandwidth portion instruction in the phase offset derivation instruction is processed, and then the peak value is compared with a second predetermined threshold to derive a second comparison value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910914150.6A CN112565137A (en) | 2019-09-25 | 2019-09-25 | Signal processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910914150.6A CN112565137A (en) | 2019-09-25 | 2019-09-25 | Signal processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112565137A true CN112565137A (en) | 2021-03-26 |
Family
ID=75029552
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910914150.6A Withdrawn CN112565137A (en) | 2019-09-25 | 2019-09-25 | Signal processing device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112565137A (en) |
-
2019
- 2019-09-25 CN CN201910914150.6A patent/CN112565137A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20210326 |
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| WW01 | Invention patent application withdrawn after publication |