CN112559259B - Universal serial bus interface testing device - Google Patents
Universal serial bus interface testing device Download PDFInfo
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- CN112559259B CN112559259B CN201910910595.7A CN201910910595A CN112559259B CN 112559259 B CN112559259 B CN 112559259B CN 201910910595 A CN201910910595 A CN 201910910595A CN 112559259 B CN112559259 B CN 112559259B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
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Abstract
The embodiment of the invention provides a universal serial bus interface testing device, which comprises: the control system receives a first control command sent by a control module of the device to be tested, sends a closing signal to the second power supply control circuit and sends a turn-off signal to the first power supply control circuit; receiving a second control command sent by a control module of the device to be tested, sending a closing signal to a first power supply control circuit and sending a turn-off signal to a second power supply control circuit; the first power supply control circuit is used for switching on/off the power supply signal of the USB first protocol test equipment, the second power supply control circuit is used for switching on/off the power supply signal of the USB second protocol test equipment, and the version of the first protocol is higher than that of the second protocol. The embodiment of the invention improves the test efficiency of the USB interface.
Description
Technical Field
The invention relates to the technical field of USB (Universal Serial Bus ), in particular to a USB interface testing device.
Background
According to the USB (Universal Serial Bus ) 3.0 interface protocol standard, the USB3.0 interface is downward compatible with the USB2.0 interface protocol standard, and products produced from factories need to test the USB3.0 function and the USB2.0 function.
At present, the tool for testing the USB3.0 interface can only test the USB3.0 function or only test the USB2.0 function. When an operator tests a USB3.0 interface product, the operator firstly inserts a USB3.0 test device (equipment) into the product for testing, and after the USB3.0 test device is tested, the USB3.0 test device is pulled out, the USB2.0 test device is inserted, and after the USB2.0 test device is tested, the USB2.0 test device is pulled out, and the test is completed. Such a test method and flow have two disadvantages: firstly, the manual insertion and extraction are carried out twice, the working time is long, the fatigue degree of operators is easy to increase, and the production efficiency is low; secondly, the test result needs to be checked and judged manually, and errors are unavoidable in manual checking.
Disclosure of Invention
The embodiment of the invention provides a USB interface testing device to improve the efficiency of USB interface testing.
The technical scheme of the embodiment of the invention is realized as follows:
a universal serial bus, USB, interface test apparatus, the apparatus comprising: the USB first protocol interface module, the USB first protocol test equipment, the first power supply control circuit, the USB second protocol test equipment, the second power supply control circuit, the control system and the communication interface, and the version of the first protocol is higher than that of the second protocol, wherein:
the USB first protocol interface module is connected with the USB first protocol test equipment and the USB second protocol test equipment, and is connected with the USB first protocol interface of the equipment to be tested when the equipment to be tested tests the USB first protocol interface of the equipment to be tested;
the USB first protocol test equipment is connected with the USB first protocol interface module and the first power supply control circuit;
the USB second protocol test equipment is connected with the USB first protocol interface module and the second power supply control circuit;
the first power supply control circuit is connected with the power supply module, the USB first protocol test equipment and the control system;
the second power supply control circuit is connected with the power supply module, the USB second protocol test equipment and the control system;
the control system is connected with the first power supply control circuit and the second power supply control circuit, and is connected with the communication interface of the device to be tested through the communication interface when the device to be tested tests the USB first protocol interface of the device to be tested.
The control system is used for receiving a first control command sent by a control module of the device to be tested, wherein the command indicates that the USB second protocol test device is started and the USB first protocol test device is closed, then a closing signal is sent to the second power supply control circuit, and a turn-off signal is sent to the first power supply control circuit; receiving a second control command sent by a control module of the device to be tested, wherein the command indicates that the USB first protocol test device is started and the USB second protocol test device is closed, then sending a closing signal to a first power supply control circuit and sending a closing signal to a second power supply control circuit;
the second power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the second power supply control circuit; receiving a turn-off signal sent by a control system, and disconnecting a power supply channel of the control system;
the first power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the first power supply control circuit; and receiving a turn-off signal sent by the control system, and disconnecting the power supply path of the control system.
The USB first protocol interface module is used as a power supply module and is connected with the first power supply control circuit and the second power supply control circuit.
The first power supply control circuit is an electronic switch or a switching circuit of a discrete device;
the second power supply control circuit is an electronic switch or a switching circuit of a discrete device.
The device further comprises: and the power supply module is connected with the first power supply control circuit and the second power supply control circuit.
A universal serial bus, USB, interface test apparatus, the apparatus comprising: the USB first protocol interface module, the USB first protocol test equipment, the first power supply control circuit, the USB second protocol test equipment, the second power supply control circuit and the control system, and the version of the first protocol is higher than that of the second protocol, wherein:
the USB first protocol interface module is connected with the USB first protocol testing equipment, the USB second protocol testing equipment and the control system, and is connected with the USB first protocol interface of the equipment to be tested when the equipment to be tested tests the USB first protocol interface of the equipment to be tested;
the USB first protocol test equipment is connected with the USB first protocol interface module and the first power supply control circuit;
the USB second protocol test equipment is connected with the USB first protocol interface module and the second power supply control circuit;
the first power supply control circuit is connected with the power supply module, the USB first protocol test equipment and the control system;
the second power supply control circuit is connected with the power supply module, the USB second protocol test equipment and the control system;
the control system is connected with the first power supply control circuit, the second power supply control circuit and the USB first protocol interface module.
The control system is used for receiving a first control command sent by a control module of the device to be tested, wherein the command indicates that the USB second protocol test device is started and the USB first protocol test device is closed, stopping receiving the control command from the device to be tested, then sending a closing signal to a second power supply control circuit, sending a closing signal to the first power supply control circuit, restarting receiving the control command from the device to be tested after waiting for presetting the second protocol test duration, and stopping receiving the control command from the device to be tested when receiving the second control command sent by the control module of the device to be tested, and then sending a closing signal to the first power supply control circuit and sending a closing signal to the second power supply control circuit when receiving the second control command sent by the control module of the device to be tested, and restarting receiving the control command from the device to be tested after waiting for presetting the first protocol test duration;
the second power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the second power supply control circuit; receiving a turn-off signal sent by a control system, and disconnecting a power supply channel of the control system;
the first power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the first power supply control circuit; and receiving a turn-off signal sent by the control system, and disconnecting the power supply path of the control system.
The control system is further used for sending turn-off signals to the first power supply control circuit and the second power supply control circuit respectively after power-on.
The USB first protocol interface module is used as a power supply module and is connected with the first power supply control circuit and the second power supply control circuit.
The device further comprises: and the power supply module is connected with the first power supply control circuit and the second power supply control circuit.
According to the embodiment of the invention, the USB first protocol testing equipment and the USB second protocol testing equipment are integrated in the same testing device, and the first power control circuit and the second power control circuit are used for controlling the time-sharing operation of the USB first protocol testing equipment and the USB second protocol testing equipment, so that the first protocol function and the second protocol function of the USB first protocol interface can be tested only by initial plugging and unplugging once, and the testing efficiency of the USB first protocol interface is improved.
Drawings
FIG. 1 is a schematic diagram of a USB interface testing device according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a USB interface testing device according to another embodiment of the present invention;
FIG. 3 is a schematic diagram of a USB3.0 interface test system according to an embodiment of the present invention;
FIG. 4 is a flowchart of a method for testing a USB3.0 interface according to an embodiment of the present invention under the system architecture shown in FIG. 3;
FIG. 5 is a schematic diagram of a USB3.0 interface test system according to another embodiment of the present invention;
FIG. 6 is a flowchart of a method for testing a USB3.0 interface according to an embodiment of the present invention under the system architecture shown in FIG. 5.
Detailed Description
The invention will be described in further detail with reference to the accompanying drawings and specific examples.
Fig. 1 is a schematic structural diagram of a USB interface testing device according to an embodiment of the present invention, which mainly includes: the USB first protocol interface module 111, the USB first protocol test device 112, the first power control circuit 113, the USB second protocol test device 114, the second power control circuit 115, the control system 116 and the communication interface 117, and the version of the first protocol is higher than the second protocol, wherein:
1. USB first protocol interface module 111
The USB first protocol interface module 111 is connected to the USB first protocol test device 112 and the USB second protocol test device 114, and is connected to the USB first protocol interface 121 of the device under test when the device under test tests its USB first protocol interface 121.
The connection between the USB first protocol interface module 111 and the USB first protocol interface 121 of the device under test may be through a USB3.0 cable, or may be through a male-female connector.
2. USB first protocol test equipment 112
The USB first protocol test device 112 is connected to the USB first protocol interface module 111 and to the first power control circuit 113.
3. First power supply control circuit 113
The first power control circuit 113 is connected to the power module, the USB first protocol test device 112, and to the control system 116.
4. USB second protocol test equipment 114
The USB second protocol test device 114 is connected to the USB first protocol interface module 111 and to the second power control circuit 115.
5. Second power supply control circuit 115
The second power control circuit 115 is connected to the power module and the USB second protocol test device 114 and to the control system 116.
6. Control system 116
The control system 116 is connected to the first power control circuit 113 and the second power control circuit 115 and to the communication interface 122 of the device under test via the communication interface 117 when the device under test tests its USB first protocol interface 121.
7. Communication interface 117
The communication interface 117 is connected to the control system 116 and to the communication interface 122 of the device under test when the device under test tests its USB first protocol interface 121.
The communication interface 117 may be a network interface, an RS-232 interface, an RS485 interface, etc., where the communication interface 117 is a communication channel between the control system 116 and a control module (e.g. CPU) 123 of the device under test.
The control system 116 is configured to receive a first control command sent from a control module (e.g. CPU) 123 of the device under test from the communication interface 117, where the command indicates that the USB second protocol test device 114 is turned on and the USB first protocol test device 112 is turned off, send a close signal to the second power control circuit 115, and send a turn-off signal to the first power control circuit 113; receiving a second control command sent by a control module (such as a CPU) 123 of the device under test from the communication interface 117, where the command instructs the USB first protocol test device 112 to be turned on and the USB second protocol test device 114 to be turned off, sending a close signal to the first power control circuit 113 and a turn-off signal to the second power control circuit 115;
a control module (e.g., a CPU) 123 of the device to be tested receives a test start command input by a user, and enters a USB first protocol interface test mode to issue a first control command through a communication interface 122; when receiving a first control command completion response returned by the control system 116 from the communication interface 122, starting to test the USB second protocol function of the USB first protocol interface, completing the test, saving the test result, and sending a second control command through the communication interface 122; upon receiving a second control command completion response returned from the communication interface 122 by the control system 116, testing of the USB first protocol function of the USB first protocol interface is started, testing is completed, and test results are saved.
The first power control circuit 113 is configured to receive a closing signal sent by the control system 116, and switch on its own power path; receiving a turn-off signal sent by the control system 116, and disconnecting the power supply path of the control system;
the second power control circuit 115 is configured to receive a closing signal sent by the control system 116 and switch on its own power supply path; receiving a turn-off signal sent by the control system 116, and disconnecting the power supply path of the control system;
in practical applications, when the device itself does not have a power module, the USB first protocol interface module 111 may be used as a power module to connect the first power control circuit 113, the second power control circuit 115, and the control system 116. That is, the USB first protocol interface module 111 transmits the power signal transmitted from the USB first protocol interface 121 of the device under test to the first power control circuit 113, the second power control circuit 115, and the control system 116.
In practical applications, the apparatus may further comprise: and a power supply module connected to the first power supply control circuit 113, the second power supply control circuit 115, and the control system 116.
In practical applications, the first power control circuit 113 is an electronic switch, or a switching circuit built up by discrete devices; the second power supply control circuit 115 is an electronic switch or a discrete device-mounted switching circuit.
Fig. 2 is a schematic structural diagram of a USB interface testing device according to another embodiment of the present invention, where the device mainly includes: the first protocol interface module 211, the first protocol testing device 212, the first power control circuit 213, the second protocol testing device 214, the second power control circuit 215 and the control system 216, and the version of the first protocol is higher than the second protocol, wherein:
1. USB first protocol interface module 211
The USB first protocol interface module 211 is connected to the USB first protocol test device 212 and the USB second protocol test device connection 214, and is connected to the USB first protocol interface 221 of the device under test and is connected to the control system 216 when the device under test tests its USB first protocol interface 221.
The connection between the USB first protocol interface module 111 and the USB first protocol interface 121 of the device under test may be through a USB first protocol cable, or may be through a male-female connector.
2. USB first protocol test equipment 212
The USB first protocol test device 212 is connected to the USB first protocol interface module 211 and to the first power control circuit 213.
3. First power supply control circuit 213
The first power control circuit 213 is connected to the power module and the USB first protocol test device 212 and to the control system 216.
4. USB second protocol test equipment 214
The USB second protocol test device 214 is connected to the USB first protocol interface module 211 and to the second power control circuit 215.
5. Second power supply control circuit 215
The second power control circuit 215 is connected to the power module and the USB second protocol test device 214 and to the control system 216.
6. Control system 216
The control system 216 is connected to the first power control circuit 213, the second power control circuit 215, and the USB first protocol interface module 211.
The control system 216 is configured to receive a first control command sent by a control module (e.g. a CPU) 222 of a device under test, where the command indicates that the USB second protocol test device 214 is turned on and the USB first protocol test device 212 is turned off, stop receiving the control command from the device under test first, send a close signal to the second power control circuit 215, send a close signal to the first power control circuit 213, wait for a preset second protocol test duration, restart receiving the control command from the device under test, and when receiving the second control command sent by the control module (e.g. CPU) 222 of the device under test, the command indicates that the USB first protocol test device 212 is turned on and the USB second protocol test device 214 is turned off, stop receiving the control command from the device under test first, send a close signal to the first power control circuit 213, send a close signal to the second power control circuit 215, and restart receiving the control command from the device under test after waiting for the preset first protocol test duration;
the control module (e.g., CPU) 222 of the device to be tested receives a test start instruction input by a user, enters a test mode of the USB first protocol interface, sends a first control command through the USB first protocol interface 221, starts to test the USB second protocol function of the USB first protocol interface after waiting for a first preset time period, starts a first timer, completes the test, saves the test result, sends a second control command through the communication interface 122 when the first timer times out, starts to test the USB first protocol function of the USB first protocol interface after waiting for a second preset time period, completes the test, and saves the test result.
Wherein: the first preset time length is determined according to the sum of all the following time lengths:
a transmission duration of the first control command; the control system 216 finishes sending the closing signal to the second power supply control circuit 215 and the time period required for sending the off signal to the first power supply control circuit 213; and the second power supply control circuit 215 turns on its own power supply path, and the first power supply control circuit 213 turns off its own power supply path for a desired period of time.
The timing duration of the first timer is determined according to the duration required for completing the test procedure of the USB second protocol function of the USB first protocol interface.
The second preset time length is determined according to the sum of all the following time lengths:
a transmission duration of the second control command; the control system 216 finishes sending the closing signal to the first power supply control circuit 213 and the time period required for sending the off signal to the second power supply control circuit 215; and the time period required for the first power supply control circuit 213 to turn on its own power supply path and for the second power supply control circuit 215 to turn off its own power supply path.
The first power control circuit 213 is configured to receive a close signal sent from the control system 216 and switch on its own power path; receiving a turn-off signal sent by the control system 216, and disconnecting the power supply path of the control system;
the second power control circuit 215 is configured to receive a closing signal sent by the control system 216 and switch on its own power path; and receives a turn-off signal from the control system 216 to disconnect its own power supply path.
In practical applications, the control system 216 is further configured to send a turn-off signal to the first power control circuit 213 and the second power control circuit 215, respectively, after power-up.
In practical applications, when the device itself does not have a power module, the USB first protocol interface module 211 may also be used as a power module to connect the first power control circuit 213, the second power control circuit 215, and the control system 216. That is, the USB first protocol interface module 211 transmits the power signal transmitted from the USB first protocol interface 221 of the device under test to the first power control circuit 213, the second power control circuit 215, and the control system 216.
In practical applications, the apparatus may further comprise: the power module is connected with the first power control circuit 213, the second power control circuit 215 and the control system 216.
In practical applications, the first power control circuit 213 is an electronic switch, or a discrete device switching circuit; the second power control circuit 215 is an electronic switch or a discrete device-mounted switching circuit.
FIG. 3 is a schematic diagram of a USB3.0 interface testing system according to an embodiment of the present invention, the system includes: test equipment and testing arrangement, wherein:
1. device under test
Has a USB3.0 interface, a communication interface, and a CPU, wherein:
1. USB3.0 interface
The USB3.0 interface is connected with the CPU and is also connected with the USB3.0 interface of the testing device during testing; the USB3.0 interface of the testing device can be connected through a USB3.0 cable, or can be connected through a male connector and a female connector;
the signals transmitted by the USB3.0 interface comprise: USB3.0 signal, USB2.0 signal, 5V power signal, etc.
2. Communication interface
The communication interface is connected with the CPU and is also connected with the communication interface of the testing device during testing;
the communication interface can be a network interface, an RS-232 interface, an RS485 interface and the like, and is a communication channel between the CPU of the equipment to be tested and the control system of the testing device.
3、CPU
The CPU is connected with a USB3.0 interface and a communication interface of the device to be tested.
2. Test device
The USB power supply control circuit comprises a USB3.0 interface, a communication interface, a control system, USB3.0 test equipment, USB2.0 test equipment, a power supply control circuit 1 and a power supply control circuit 2, wherein:
1. USB3.0 interface
The USB3.0 interface is connected with USB2.0 test equipment and also connected with USB3.0 test equipment; the USB interface is also connected with a USB3.0 interface of the device to be tested during testing; when the testing device has no power supply module, the testing device is also connected with the power supply control circuit 1, the power supply control circuit 2 and the control system so as to transmit power supply signals from the device to be tested to the power supply control circuit 1, the power supply control circuit 2 and the control system.
2. Communication interface
The communication interface is connected with the control system and is also connected with the communication interface of the equipment to be tested during testing.
3. Control system
The control system is connected with the power supply control circuit 1, the power supply control circuit 2 and the communication interface of the testing device.
The control system may be a processor such as an MCU, ARM, etc. For receiving control commands from the communication interface sent from the CPU of the device under test, and sending on/off signals to the power control circuit 1 and the power control circuit 2 in a time-sharing manner according to the control commands.
4. USB3.0 test equipment
The USB3.0 testing equipment is connected with a USB3.0 interface of the testing device and is also connected with the power supply control circuit 1;
5. USB2.0 test equipment
The USB2.0 testing equipment is connected with a USB3.0 interface of the testing device and is also connected with the power supply control circuit 2;
6. power supply control circuit 1
The USB3.0 testing device is connected with the testing device, the control system and the power module;
7. power supply control circuit 2
The USB2.0 testing device is connected with the testing device, the control system and the power module;
the power supply control circuit 1 and the power supply control circuit 2 can be electronic switches, discrete device switching circuits and the like, and are used for controlling the power supply of the USB3.0 test equipment and the USB2.0 test equipment, and the on/off of the power supply control circuits are controlled by a control system.
It should be noted that, in general, the power signal of the testing device is from the device under test, when the testing device is plugged into the USB3.0 interface of the device under test, the power signal of the device under test reaches the USB3.0 interface of the testing device through the USB3.0 interface, and then is output to the control system, the power control circuit 1 and the power control circuit 2 through the USB3.0 interface.
Of course, the testing device can also be internally provided with a power supply module to realize power self-supply, and at the moment, the power supply module outputs a power supply signal to the control system, the power supply control circuit 1 and the power supply control circuit 2.
Fig. 4 is a flowchart of a method for testing a USB3.0 interface according to an embodiment of the present invention under the system architecture shown in fig. 3, which specifically includes the following steps:
step 401: and when the CPU of the device to be tested receives a test starting instruction input by a user, entering a USB3.0 test mode, and sending a first control command through the communication interface, wherein the command indicates that the USB2.0 test device is started and the USB3.0 test device is closed.
Step 402: the control system of the test device receives the first control command, sends a turn-off signal to the power control circuit 1, sends a close signal to the power control circuit 2, and then sends a first control command completion response to the CPU of the device under test.
Step 403: and the CPU of the device to be tested receives the first control command completion response and starts to test the USB2.0 function of the USB3.0 interface.
Step 404: the CPU of the device to be tested determines that the USB2.0 function test of the USB3.0 interface is completed, a first test result is saved, and a second control command is sent out through the communication interface, wherein the command indicates that the USB2.0 test device is closed and the USB3.0 test device is opened.
Step 405: the control system of the test device receives the second control command, sends a closing signal to the power control circuit 1, sends a turn-off signal to the power control circuit 2, and then sends a second control command completion response to the CPU of the device under test.
Step 406: and the CPU of the device to be tested receives the second control command completion response and starts to test the USB3.0 function of the USB3.0 interface.
Step 407: and the CPU of the device to be tested determines that the USB3.0 function test of the USB3.0 interface is completed, and stores a second test result.
FIG. 5 is a schematic diagram of a USB3.0 interface testing system according to another embodiment of the present invention, the system includes: test equipment and testing arrangement, wherein:
1. device under test
Has a USB3.0 interface and a CPU, wherein:
1. USB3.0 interface
The USB3.0 interface is connected with the CPU and is also connected with the USB3.0 interface of the testing device during testing; the USB3.0 interface of the testing device can be connected through a USB3.0 cable, or can be connected through a male connector and a female connector;
the signals transmitted by the USB3.0 interface comprise: USB3.0 signals, USB2.0 signals, power signals, etc.
2、CPU
The CPU is connected with a USB3.0 interface.
2. Test device
Has USB3.0 interface, control system, USB3.0 test equipment, USB2.0 test equipment, power control circuit 1 and power control circuit 2, wherein:
1. USB3.0 interface
The USB3.0 interface is connected with USB3.0 test equipment, USB2.0 test equipment and a control system; the USB interface is also connected with a USB3.0 interface of the device to be tested during testing; when the testing device has no power supply module, the testing device is also connected with the power supply control circuit 1, the power supply control circuit 2 and the control system so as to transmit voltage signals from the device to be tested to the control circuit 1, the control circuit 2 and the control system.
2. Control system
The control system is connected with the power supply control circuit 1, the power supply control circuit 2 and the USB3.0 interface of the testing device.
The control system may be a processor such as an MCU, ARM, etc. And the power supply control circuit is used for receiving a control command sent by the CPU of the device to be tested from the USB3.0 interface and sending a closing/shutting signal to the power supply control circuit 1 and the power supply control circuit 2 according to the control command in a time sharing mode.
4. USB3.0 test equipment
The USB3.0 testing equipment is connected with a USB3.0 interface of the testing device and is also connected with the power supply control circuit 1;
5. USB2.0 test equipment
The USB2.0 testing equipment is connected with a USB3.0 interface of the testing device and is also connected with the power supply control circuit 2;
6. power supply control circuit 1
The test device is connected with USB3.0 test equipment, a control system and a power module;
7. power supply control circuit 2
The test device is connected with USB2.0 test equipment, a control system and a power module;
the power supply control circuit 1 and the power supply control circuit 2 can be electronic switches, discrete device switching circuits and the like, and are used for controlling the power supply of the USB2.0 test equipment and the USB3.0 test equipment, and the on/off of the power supply control circuits are controlled by a control system.
It should be noted that, in general, the power signal of the testing device is from the device under test, when the testing device is plugged into the USB3.0 interface of the device under test, the power signal of the device under test reaches the USB3.0 interface of the testing device through the USB3.0 interface, and then is output to the control system, the power control circuit 1 and the power control circuit 2 through the USB3.0 interface.
Of course, the testing device can also be internally provided with a power supply module to realize power self-supply, and at the moment, the power supply module outputs a power supply signal to the control system, the power supply control circuit 1 and the power supply control circuit 2.
Fig. 6 is a flowchart of a method for testing a USB3.0 interface according to an embodiment of the present invention under the system architecture shown in fig. 5, which specifically includes the following steps:
step 600: initially, the power supply control circuit 1 and the power supply control circuit 2 of the test device are both turned off.
Step 601: and when the CPU of the device to be tested receives a test starting instruction input by a user, entering a USB3.0 test mode, and sending a first control command through a USB3.0 interface, wherein the command indicates that the USB2.0 test device is started and the USB3.0 test device is closed.
Step 602: the control system of the test device receives the first control command, stops receiving the control command from the device to be tested, then sends a turn-off signal to the power control circuit 1, and sends a turn-on signal to the power control circuit 2.
Step 603: after a CPU of the device to be tested sends out a first control command and waits for a first preset time period, starting to test the USB2.0 function of the USB3.0 interface, and starting a first timer.
Wherein: the first preset time length is determined according to the sum of all the following time lengths:
a transmission duration of the first control command; the control system finishes sending the closing signal to the power supply control circuit 2 and sending the duration required by the turn-off signal to the power supply control circuit 1; and the time period required for the power control circuit 2 to turn on its own power supply path and for the power control circuit 1 to turn off its own power supply path.
The timing duration of the first timer is predetermined according to the duration required for completing the test procedure of the USB2.0 function of the USB3.0 interface.
Step 604: after sending a turn-off signal to the power supply control circuit 1 and sending a closing signal to the power supply control circuit 2, the control system of the testing device waits for the preset USB2.0 function testing duration, and then sends the turn-off signal to the power supply control circuit 1 and the power supply control circuit 2, and resumes receiving the control command from the device to be tested.
Step 605: and the CPU of the device to be tested completes the USB2.0 function test of the USB3.0 interface, saves a first test result, and sends out a second control command through the communication interface when the first timer is overtime, wherein the command indicates that the USB2.0 test device is closed and the USB3.0 test device is opened.
Step 606: the control system of the test device receives the second control command, stops receiving the control command from the device to be tested, sends a closing signal to the power control circuit 1, and sends a turn-off signal to the power control circuit 2.
Step 607: after the CPU of the device to be tested sends out the second control command and waits for the second preset time, the CPU starts to test the USB3.0 function of the USB3.0 interface.
Wherein: the second preset time length is determined according to the sum of all the following time lengths:
a transmission duration of the second control command; the control system finishes sending the closing signal to the power supply control circuit 1 and sending the duration required by the turn-off signal to the power supply control circuit 2; and the time period required for the power supply control circuit 1 to turn on its own power supply path and for the power supply control circuit 2 to turn off its own power supply path.
Step 608: after sending a closing signal to the power supply control circuit 1 and a turn-off signal to the power supply control circuit 2, the control system of the testing device waits for a preset USB3.0 function testing duration, and then sends the turn-off signal to the power supply control circuit 1 and the power supply control circuit 2, and resumes receiving control commands from the equipment to be tested.
Step 609: and the CPU of the device to be tested completes the USB3.0 function test of the USB3.0 interface and saves a second test result.
The beneficial technical effects of the embodiment of the invention are as follows:
according to the invention, the USB first protocol testing equipment and the USB second protocol testing equipment are integrated in the same testing device, and the first power control circuit and the second power control circuit are used for controlling the time-sharing operation of the USB first protocol testing equipment and the USB second protocol testing equipment, so that the first protocol function and the second protocol function of the USB first protocol interface can be tested only by initial plugging and unplugging once, and the testing efficiency of the USB first protocol interface is improved.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather to enable any modification, equivalent replacement, improvement or the like to be made within the spirit and principles of the invention.
Claims (8)
1. A universal serial bus USB interface test apparatus, the apparatus comprising: the USB first protocol interface module, the USB first protocol test equipment, the first power supply control circuit, the USB second protocol test equipment, the second power supply control circuit, the control system and the communication interface, and the version of the first protocol is higher than that of the second protocol, wherein:
the USB first protocol interface module is connected with the USB first protocol test equipment and the USB second protocol test equipment, and is connected with the USB first protocol interface of the equipment to be tested when the equipment to be tested tests the USB first protocol interface of the equipment to be tested;
the USB first protocol test equipment is connected with the USB first protocol interface module and the first power supply control circuit;
the USB second protocol test equipment is connected with the USB first protocol interface module and the second power supply control circuit;
the first power supply control circuit is connected with the power supply module, the USB first protocol test equipment and the control system;
the second power supply control circuit is connected with the power supply module, the USB second protocol test equipment and the control system;
the control system is connected with the first power supply control circuit and the second power supply control circuit, and is connected with a communication interface of the equipment to be tested through the communication interface when the equipment to be tested tests the USB first protocol interface of the equipment to be tested;
the communication interface is connected with the control system and is connected with the communication interface of the equipment to be tested when the equipment to be tested tests the USB first protocol interface;
the control system is used for receiving a first control command sent by a control module of the device to be tested from the communication interface, wherein the command indicates that the USB second protocol test device is started and the USB first protocol test device is closed, then a closing signal is sent to the second power supply control circuit, and a turn-off signal is sent to the first power supply control circuit; receiving a second control command sent by a control module of the device to be tested from the communication interface, wherein the command indicates that the USB first protocol test device is started and the USB second protocol test device is closed, then sending a closing signal to the first power supply control circuit and sending a closing signal to the second power supply control circuit;
the second power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the second power supply control circuit; receiving a turn-off signal sent by a control system, and disconnecting a power supply channel of the control system;
the first power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the first power supply control circuit; and receiving a turn-off signal sent by the control system, and disconnecting the power supply path of the control system.
2. The apparatus of claim 1, wherein the USB first protocol interface module is connected as a power module to the first power control circuit and the second power control circuit.
3. The apparatus of claim 1, wherein the device comprises a plurality of sensors,
the first power supply control circuit is an electronic switch or a switching circuit of a discrete device;
the second power supply control circuit is an electronic switch or a switching circuit of a discrete device.
4. The apparatus of claim 1, wherein the apparatus further comprises: and the power supply module is connected with the first power supply control circuit and the second power supply control circuit.
5. A universal serial bus USB interface test apparatus, the apparatus comprising: the USB first protocol interface module, the USB first protocol test equipment, the first power supply control circuit, the USB second protocol test equipment, the second power supply control circuit and the control system, and the version of the first protocol is higher than that of the second protocol, wherein:
the USB first protocol interface module is connected with the USB first protocol testing equipment, the USB second protocol testing equipment and the control system, and is connected with the USB first protocol interface of the equipment to be tested when the equipment to be tested tests the USB first protocol interface of the equipment to be tested;
the USB first protocol test equipment is connected with the USB first protocol interface module and the first power supply control circuit;
the USB second protocol test equipment is connected with the USB first protocol interface module and the second power supply control circuit;
the first power supply control circuit is connected with the power supply module, the USB first protocol test equipment and the control system;
the second power supply control circuit is connected with the power supply module, the USB second protocol test equipment and the control system;
the control system is connected with the first power supply control circuit, the second power supply control circuit and the USB first protocol interface module;
the control system is used for receiving a first control command sent by a control module of the device to be tested, wherein the command indicates that the USB second protocol test device is started and the USB first protocol test device is closed, stopping receiving the control command from the device to be tested, then sending a closing signal to a second power supply control circuit, sending a closing signal to the first power supply control circuit, restarting receiving the control command from the device to be tested after waiting for presetting the second protocol test duration, and stopping receiving the control command from the device to be tested when receiving the second control command sent by the control module of the device to be tested, and then sending a closing signal to the first power supply control circuit and sending a closing signal to the second power supply control circuit when receiving the second control command sent by the control module of the device to be tested, and restarting receiving the control command from the device to be tested after waiting for presetting the first protocol test duration;
the second power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the second power supply control circuit; receiving a turn-off signal sent by a control system, and disconnecting a power supply channel of the control system;
the first power supply control circuit is used for receiving a closing signal sent by the control system and switching on a power supply channel of the first power supply control circuit; and receiving a turn-off signal sent by the control system, and disconnecting the power supply path of the control system.
6. The apparatus of claim 5, wherein the device comprises a plurality of sensors,
the control system is further used for sending turn-off signals to the first power supply control circuit and the second power supply control circuit respectively after power-on.
7. The apparatus of claim 5 or 6, wherein the USB first protocol interface module is connected as a power module to the first power control circuit and the second power control circuit.
8. The apparatus according to claim 5 or 6, characterized in that the apparatus further comprises: and the power supply module is connected with the first power supply control circuit and the second power supply control circuit.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102467430A (en) * | 2010-11-04 | 2012-05-23 | 英业达股份有限公司 | Universal serial bus (USB) test device and method |
| CN205982507U (en) * | 2016-08-23 | 2017-02-22 | 广州视睿电子科技有限公司 | Testing device of USB3.0 equipment |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102467430A (en) * | 2010-11-04 | 2012-05-23 | 英业达股份有限公司 | Universal serial bus (USB) test device and method |
| CN205982507U (en) * | 2016-08-23 | 2017-02-22 | 广州视睿电子科技有限公司 | Testing device of USB3.0 equipment |
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