CN112558343B

CN112558343B - Array substrate and display panel

Info

Publication number: CN112558343B
Application number: CN202011480299.7A
Authority: CN
Inventors: 吴云飞
Original assignee: Wuhan China Star Optoelectronics Technology Co Ltd
Current assignee: Wuhan China Star Optoelectronics Technology Co Ltd
Priority date: 2020-12-15
Filing date: 2020-12-15
Publication date: 2022-07-12
Anticipated expiration: 2040-12-15
Also published as: CN112558343A

Abstract

The application provides an array substrate, which comprises a display area and a non-display area surrounding the display area; the non-display area also comprises a binding area; at least two flow guide grooves arranged at intervals and at least two groups of driving circuit holes are formed on the array substrate positioned in the binding region, and one flow guide groove surrounds one group of driving circuit holes; each flow guide groove comprises a first inner wall, the first inner wall is far away from the corresponding driving circuit hole, and the first inner wall comprises at least one arc-shaped section facing the display area and at least one connecting section smoothly connected with the arc-shaped section. The application also provides a display panel. The array substrate and the display panel provided by the application can reduce the risk that alignment film forming liquid overflows the diversion grooves and reduce the coating difficulty of the alignment film forming liquid.

Description

Array substrate and display panel

Technical Field

The application relates to the technical field of display, in particular to an array substrate and a display panel.

Background

In a Thin Film Transistor-Liquid Crystal Display (TFT-LCD), a Printed Circuit Board (PCB) and an array substrate are generally connected together by using a Chip On Film (COF) substrate, so that the PCB can output a driving control signal to the array panel to complete corresponding driving control. One end of the COF substrate is electrically connected with the driving circuit of the array substrate, and the other end of the COF substrate is electrically connected with the PCB. In a conventional liquid crystal display panel, an alignment film is provided on the array substrate side. The alignment film may provide a pretilt angle to the liquid crystal molecules to align the liquid crystal molecules. The formation of the alignment film requires coating an alignment film forming solution (generally, polyimide solution, abbreviated as PI solution) on the array substrate.

With the increasing demand of customers for narrow-bezel screens, the area of the driving circuit of the array substrate is gradually close to the display area of the array substrate. In the process of coating the PI liquid, the PI liquid cannot diffuse into the driving circuit (otherwise, the driving circuit is insulated, and conduction of the driving circuit is hindered), so that the coating difficulty of the PI liquid is increased. The design method of the area where the driving circuit is located at present is as follows: a driving circuit is formed in the whole large groove, so that the probability of the PI liquid diffusing and overflowing the large groove is increased, thereby causing an increased risk of the PI liquid diffusing and overflowing the driving circuit.

Therefore, the prior art has defects which need to be solved urgently.

Disclosure of Invention

The present application provides an array substrate and a display panel capable of solving the above technical drawbacks.

In order to solve the above problems, the technical solution provided by the present application is as follows:

the application provides an array substrate, which comprises a display area and a non-display area surrounding the display area; the non-display area also comprises a binding area; at least two flow guide grooves arranged at intervals and at least two groups of driving circuit holes are formed in the array substrate positioned in the binding region, and one flow guide groove surrounds one group of driving circuit holes; each flow guide groove comprises a first inner wall, the first inner wall is far away from the corresponding driving circuit hole, and the first inner wall comprises at least one arc-shaped section adjacent to the display area and at least one connecting section smoothly connected with the arc-shaped section.

In an embodiment of the present application, the flow guide groove is a circular flow guide groove or an elliptical flow guide groove.

In an embodiment of the present application, the arc-shaped section of the diversion trench is arc-shaped or elliptical arc-shaped, and the connection section of the diversion trench is linear.

In an embodiment of the present invention, the array substrate includes a flat layer, and the flow guide grooves are formed by recessing from the flat layer to the inside of the array substrate.

In an embodiment of the present application, a roughness of a first inner wall of the flow guide groove is greater than a roughness of a flat layer between two adjacent flow guide grooves.

In an embodiment of the present application, the flow guide groove further includes a second inner wall opposite to the first inner wall, and a roughness of the second inner wall is greater than a roughness of the first inner wall.

In an embodiment of the present application, an inclination angle of the first inner wall defining the flow guide groove with respect to the flat layer is θ, and then θ is greater than or equal to 60 ° and less than or equal to 90 °.

The present application further provides a display panel, wherein the array substrate includes an array substrate as described above.

In an embodiment of the present application, the display panel further includes a color film substrate and a liquid crystal layer, where the liquid crystal layer is located between the color film substrate and the array substrate.

In an embodiment of the present disclosure, the display panel further includes a first alignment film layer formed between the array substrate and the liquid crystal layer, and a second alignment film layer formed between the color film substrate and the liquid crystal layer.

The beneficial effect of this application does: the application provides an array substrate and display panel through the water conservancy diversion slot that designs into a plurality of intervals with a square big slot among the prior art and with the water conservancy diversion slot with the adjacent first inner wall setting of display area is the arc, and makes one the water conservancy diversion slot encircles a set of drive circuit hole. The flow guide grooves are generally formed through a mechanical or laser or chemical etching mode, so that the roughness of the first inner walls of the flow guide grooves is increased, the surface tension of liquid in the flow guide grooves is increased relative to the surface tension of the liquid on the flat layer of the array substrate, and the liquid can flow on the flat layer between every two adjacent flow guide grooves and along the edges of the flow guide grooves. Thus, when the alignment film forming liquid is printed on the array substrate, when the redundant alignment film forming liquid contacts the arc-shaped section of the flow guide groove, the redundant alignment film forming liquid flows along the edge of the flow guide groove and flows on the flat layer between two adjacent flow guide grooves so as to guide the redundant alignment film forming liquid to the periphery of the area where the driving circuit hole is located. When the alignment film forming liquid is more, a part of the alignment film forming liquid flows into the flow guide groove. Therefore, the risk that the alignment film forming liquid overflows the flow guide grooves can be reduced, and the risk that the alignment film forming liquid hinders the conduction of a driving circuit and the coating difficulty of the alignment film forming liquid are further reduced. In addition, the area of the arc-shaped flow guide groove is smaller than that of the square flow guide groove with the same length, so that the occupied area of the binding area is reduced, the white space for printing of the alignment film process is increased, and the printing capacity of the alignment film process is improved.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a top view of a display panel according to a first embodiment of the present application;

FIG. 2 is a top view of a bonding area in the display panel shown in FIG. 1;

FIG. 3 is a schematic structural view of the flow guide groove shown in FIG. 2;

FIG. 4 is a schematic view of another flow guide groove shown in FIG. 2;

FIG. 5 is a top view of a bonding area in a display panel according to a second embodiment of the present disclosure;

FIG. 6 is a top view of a bonding area in another display panel according to a third embodiment of the present application;

fig. 7 is a schematic structural diagram of a bonding region in a display panel according to a fourth embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "width," "upper," "lower," and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

The present application may repeat reference numerals and/or letters in the various implementations, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various implementations and/or configurations discussed.

The application aims at the technical problem that when the alignment film forming liquid is printed on the existing array substrate, the alignment film forming liquid overflows the drive circuit and blocks the conduction of the drive circuit, and the defect can be solved by the embodiment.

The array substrate and the display panel of the present application will be described in detail with reference to specific embodiments.

Referring to fig. 1 to 4, a first embodiment of the present invention provides a display panel (not shown), which may be one of display panels such as an organic electroluminescent display panel (OLED), a liquid crystal display panel (LCD), a field emission display panel (FED), an inorganic electroluminescent display panel (LED), a Plasma Display Panel (PDP), a thin film transistor liquid crystal display (TFT-LCD), and a cathode ray tube display panel (CRT). In an embodiment of the present application, the display panel is a TFT-LCD.

Specifically, the display panel includes a color filter substrate (not shown), a liquid crystal layer (not shown), a first alignment layer (not shown), a second alignment layer (not shown), an array substrate 100, and a sealant (not shown) for effectively bonding the color filter substrate and the array substrate 100. The liquid crystal layer is located between the color film substrate and the array substrate 100, and the first alignment film layer is formed between the array substrate 100 and the liquid crystal layer. The second alignment film layer is formed between the color film substrate and the liquid crystal layer. The driving circuit hole 21 of the array substrate 100 is electrically connected to a circuit board (not shown) through a chip on film substrate (not shown).

Specifically, the color film substrate sequentially includes, from top to bottom, a first substrate, a color film layer, and a common electrode layer (not shown). Wherein the common electrode layer faces the second alignment film layer. The color film layer comprises a color filter layer and a black matrix. The color filter layer includes a plurality of red color resists, a plurality of green color resists, and a plurality of blue color resists, wherein the red color resists, the green color resists, and the blue color resists respectively correspond to three sub-pixels on the array substrate 100, and the three sub-pixels constitute one pixel. The black matrix is used for separating any two adjacent red color resistors, green color resistors and blue color resistors.

Specifically, the liquid crystal layer includes liquid crystal molecules, a photoinitiator, and a polymerizable monomer that can undergo polymerization under ultraviolet light irradiation. Wherein the liquid crystal molecules are nematic liquid crystal molecules and have negative dielectric anisotropy constants.

The frame sealing glue is completely cured by an ultraviolet curing process and a thermal curing process.

Specifically, the first alignment film layer and the second alignment film layer are made of polyimide. The first alignment film layer and the second alignment film layer are both formed by adopting polyimide inkjet ink through an inkjet printing (printing) process. Preferably, the first alignment film layer and the second alignment film layer are vertical alignment layers. Furthermore, the first alignment film layer and the second alignment film layer are optical alignment layers, and when the optical alignment layers are irradiated by ultraviolet light, a certain pretilt angle is formed, so that the consistency of the rotation directions of liquid crystal molecules in the liquid crystal layer is better.

Referring to fig. 1-2 again, the array substrate 100 includes a display region 101 and a non-display region 102 surrounding the display region 101. The liquid crystal layer is formed in the display region 101. A binding region 103 is also formed in the non-display region 102. The first alignment film layer is formed in the display region 101. At least two sets of driving circuit holes 21 and at least two flow guide grooves 22 arranged at intervals are formed on the array substrate 100 in the bonding region 103. One of the flow guide grooves 22 surrounds a group of the driving circuit holes 21. Each group of the driving circuit holes 21 constitutes a connection terminal electrically connected to one end of the substrate.

In this embodiment, three sets of the driving circuit holes 21 and three flow guiding grooves 22 are disposed in the bonding region 103. Of course, in other embodiments, the number of the groups of the driving circuit holes 21 and the number of the flow guide grooves 22 are not limited to three, but may be divided into two or more arbitrary groups of the driving circuit holes 21 and arbitrary number of the flow guide grooves 22 according to actual conditions.

In an embodiment of the present application, the arrangement of the driving circuit holes 21 in each group may be the same or different.

Wherein, water conservancy diversion slot 22 can be made through modes such as mechanical cutting, laser or chemical etching, so make the roughness grow of water conservancy diversion slot 22's inner wall, the roughness grow of inner wall, and liquid is in surface tension grow on the inner wall of water conservancy diversion slot, the mobility of liquid worsens. When liquid contacts the guide grooves 22, the liquid flows along the edges of the guide grooves.

Referring to fig. 2, in the present embodiment, the flow guiding grooves 22 are elliptical flow guiding grooves.

Specifically, each of the flow guiding grooves 22 includes a first inner wall 221 and a second inner wall 222 opposite to the first inner wall 221. The first inner wall 221 includes at least one arc segment 2211 facing the display area 101 and at least one connection segment 2212 smoothly connecting the arc segments 2211. The arc-shaped section 2211 and the connecting section 2212 of the diversion trench 22 are both in the shape of an elliptical arc. In an embodiment of the present application, the first inner wall 221 includes two arc-shaped segments 2211 and two connecting segments 2212. In other embodiments, the first inner wall 221 may further include two arc-shaped segments 2211 and one connecting segment 2212 or one arc-shaped segment 2211 and one connecting segment 2212. The second inner wall 222 is adjacent to the corresponding driving circuit hole 21, and the shape of the second inner wall 22 is not limited, and may be an arc shape, an elliptical arc shape, a linear shape, or the like.

Referring to fig. 3, in an embodiment of the present application, the diversion trench 22 further includes a bottom wall 223 connecting the first inner wall 221 and the second inner wall 222. The cross section of the flow guide groove 22 in the depth direction and across the first inner wall 221 and the second inner wall 222 is U-like.

Referring to fig. 4, in an embodiment of the present application, one end of the first inner wall 221 and one end of the second inner wall 222 of the diversion trench 22 are connected together. The cross section of the flow guide groove 22 in the depth direction and across the first inner wall 221 and the second inner wall 222 is V-like.

Of course, the structure of the diversion trench 22 of the present application is not limited to the above-mentioned U-like shape and V-like shape, and may be other shapes.

In an embodiment of the present invention, the array substrate 100 has a second substrate (not shown) and a plurality of thin film transistor array layers (not shown) disposed on the second substrate. The thin film transistor array layer includes a buffer layer (not shown), a gate metal layer (not shown), a gate insulating layer (not shown), an interlayer insulating layer (not shown), a source/drain metal layer (not shown), a pixel electrode layer (not shown), a passivation layer (not shown), and a planarization layer 30.

Wherein the planarization layer 30 faces the liquid crystal layer. The flow guide grooves 22 are formed by being recessed from the planarization layer 30 toward the inside of the array substrate 100.

Wherein, the roughness of the first inner wall 221 of the flow guide groove 22 is greater than the roughness of the flat layer 30 between two adjacent flow guide grooves 22. The roughness of the second inner wall 222 is greater than the roughness of the first inner wall 221. When the alignment film-forming liquid contacts the edge of the flow guide groove 22, the alignment film-forming liquid flows along the edge of the flow guide groove 22 and on the flat layer 30 between two adjacent flow guide grooves 22, so as to guide the redundant alignment film-forming liquid to the periphery of the region where the driving circuit hole 21 is located. When the amount of the alignment film forming solution is large, a part of the alignment film forming solution may flow into the flow guide groove 22, and since the roughness of the second inner wall 222 is larger than that of the first inner wall 221, the alignment film forming solution flowing into the flow guide groove 22 is more biased to flow along the first inner wall 221.

Referring to fig. 3-4 again, in an embodiment of the present application, an included angle θ is defined between an extension plane of the planarization layer 30 in the flow guide groove 22 and the first inner wall 221 of the flow guide groove 22, and then θ is greater than or equal to 60 ° and less than or equal to 90 °.

In an embodiment of the present disclosure, the display panel further includes a first polarizing plate formed on a surface of the array substrate 100 away from the liquid crystal layer and a second polarizing plate formed on a surface of the color filter substrate away from the liquid crystal layer. Wherein the first polarizing plate and the second polarizing plate function as: and controlling the light of the backlight source to only allow the light in a specific direction to pass through and filter the light in other directions. The light processed by the first polarizing plate can control the brightness of the light emitted from the display screen through the twisting action of the liquid crystal molecules of the liquid crystal layer, so that the brightness of the display panel is controlled.

Referring to fig. 1 and 5, a second embodiment of the invention provides an array substrate 200. The array substrate 200 includes a display region 101 and a non-display region 102 surrounding the display region 101. A binding region 103 is also formed in the non-display region 102. At least two sets of driving circuit holes 21 and at least two flow guide grooves 22 arranged at intervals are formed on the array substrate 100 in the bonding region 103. One of the flow guide grooves 22 surrounds a group of the driving circuit holes 21. In this embodiment, the diversion trench 22 is a circular diversion trench. Each of the flow guide grooves 22 includes a first inner wall 221 and a second inner wall 222 opposite to the first inner wall 221. The first inner wall 221 includes two arc-shaped segments 2211 facing the display area 101 and two connecting segments 2212 smoothly connecting the arc-shaped segments 2211, and the arc-shaped segments 2211 and the connecting segments 2212 are circular.

In an embodiment of the present invention, the array substrate 100 has a second substrate (not shown) and a plurality of thin film transistor array layers (not shown) disposed on the second substrate. The thin film transistor array layer includes a planarization layer 30. The flow guide grooves 22 are formed by being recessed from the planarization layer 30 toward the inside of the array substrate 100. The roughness of the first inner wall 221 of the flow guide groove 22 is greater than the roughness of the flat layer 30 between two adjacent flow guide grooves 22.

Referring to fig. 1 and 6, a third embodiment of the invention provides an array substrate 300. The array substrate 300 includes a display region 101 and a non-display region 102 surrounding the display region 101. A binding region 103 is also formed in the non-display region 102. At least two sets of driving circuit holes 21 and at least two flow guide grooves 22 arranged at intervals are formed on the array substrate 100 in the bonding region 103. One of the flow guide grooves 22 surrounds a group of the driving circuit holes 21. In the present embodiment, each of the flow guiding grooves 22 includes a first inner wall 221 and a second inner wall 222 opposite to the first inner wall 221. The first inner wall 221 includes two arc-shaped segments 2211 facing the display area 101 and two connecting segments 2212 smoothly connecting the arc-shaped segments 2211. The arc-shaped section 2211 of the diversion trench 22 may be an elliptical arc or a circular arc, and the connection section 2212 may be a straight line.

In an embodiment of the present invention, the array substrate 100 has a second substrate (not shown) and a plurality of thin film transistor array layers (not shown) disposed on the second substrate. The thin film transistor array layer includes a planarization layer 30. The flow guide grooves 22 are formed by being recessed from the planarization layer 30 toward the inside of the array substrate 100. Wherein, the roughness of the first inner wall 221 of the flow guide groove 22 is greater than the roughness of the flat layer 30 between two adjacent flow guide grooves 22.

Referring to fig. 1 and 7, a fourth embodiment of the invention provides an array substrate 400. The array substrate 400 includes a display region 101 and a non-display region 102 surrounding the display region 101. A binding region 103 is also formed in the non-display region 102. At least two sets of driving circuit holes 21 and at least two flow guide grooves 22 arranged at intervals are formed on the array substrate 100 in the bonding region 103. One of the flow guide grooves 22 surrounds a group of the driving circuit holes 21. In the present embodiment, each of the flow guiding grooves 22 includes a first inner wall 221 and a second inner wall 222 opposite to the first inner wall 221. The first inner wall 221 includes an arc-shaped section 2211 facing the display area 101 and one or two connecting sections 2212 smoothly connecting the arc-shaped section 2211. Specifically, only one end of the diversion trench 22 facing the display area 102 is formed with the arc-shaped segment 2211, and the end facing away from the display area 102 is not formed with the arc-shaped segment 2211. The connecting section 2212 is formed only at a position adjacent to one flow guide groove 22 and the other flow guide groove 22. The arc-shaped section 2211 of the diversion trench 22 may be in an elliptical arc shape or a circular arc shape, and the connecting section 2212 may be in an elliptical arc shape or a circular arc shape or a straight shape.

The beneficial effect of this application does: the application provides an array substrate and display panel through the water conservancy diversion slot that designs into a plurality of intervals with a square big slot among the prior art and set up the water conservancy diversion slot with the setting of the adjacent first inner wall of display area is the arc, and makes one the water conservancy diversion slot encircles a set of drive circuit hole. The flow guide grooves are generally formed through a mechanical or laser or chemical etching mode, so that the roughness of the first inner walls of the flow guide grooves is increased, the surface tension of liquid in the flow guide grooves is increased relative to the surface tension of the liquid on the flat layer of the array substrate, and the liquid can flow on the flat layer between every two adjacent flow guide grooves and along the edges of the flow guide grooves. Thus, when the alignment film forming liquid is printed on the array substrate, when the redundant alignment film forming liquid contacts the arc-shaped section of the flow guide groove, the redundant alignment film forming liquid flows along the edge of the flow guide groove and flows on the flat layer between two adjacent flow guide grooves so as to guide the redundant alignment film forming liquid to the periphery of the area where the driving circuit hole is located. When the alignment film forming liquid is more, a part of the alignment film forming liquid flows into the flow guide groove. Therefore, the risk that the alignment film forming liquid overflows the flow guide grooves can be reduced, and the risk that the alignment film forming liquid obstructs the conduction of a driving circuit and the coating difficulty of the alignment film forming liquid are further reduced. In addition, the area of the arc-shaped flow guide groove is smaller than that of the square flow guide groove with the same length, so that the occupied area of the binding area is reduced, the white space for printing of the alignment film process is increased, and the printing capacity of the alignment film process is improved.

In summary, although the present application has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, so that the scope of the present application shall be determined by the appended claims.

Claims

1. An array substrate comprises a display area and a non-display area surrounding the display area; the non-display area also comprises a binding area; the array substrate in the binding region is provided with at least two flow guide grooves arranged at intervals and at least two groups of driving circuit holes, and one flow guide groove surrounds one group of driving circuit holes; each flow guide groove comprises a first inner wall, the first inner wall is far away from the corresponding driving circuit hole, and the first inner wall comprises at least one arc-shaped section facing the display area and at least one connecting section smoothly connected with the arc-shaped section;

the array substrate comprises a flat layer, and the flow guide grooves are formed from the flat layer to the inner part of the array substrate in a concave mode;

the roughness of the first inner wall of each flow guide groove is larger than that of the flat layer between every two adjacent flow guide grooves;

the flow guide groove further comprises a second inner wall back to the first inner wall, and the roughness of the second inner wall is larger than that of the first inner wall.

2. The array substrate of claim 1, wherein the flow guide grooves are circular flow guide grooves or elliptical flow guide grooves.

3. The array substrate of claim 1, wherein the arc-shaped section of the flow guide groove is arc-shaped or elliptical-arc-shaped, and the connection section of the flow guide groove is linear.

4. The array substrate of claim 1, wherein the first inner walls defining the flow guide trenches are inclined at an angle θ of 60 ° ≦ θ ≦ 90 ° with respect to the planarization layer.

5. A display panel, wherein the array substrate comprises an array substrate according to any one of claims 1 to 4.

6. The display panel of claim 5, further comprising a color filter substrate and a liquid crystal layer, wherein the liquid crystal layer is located between the color filter substrate and the array substrate.

7. The display panel of claim 5, wherein the display panel further comprises a first alignment film layer formed between the array substrate and the liquid crystal layer and a second alignment film layer formed between the color filter substrate and the liquid crystal layer.